JP6691394B2 - Rectenna array - Google Patents

Description

  The present invention relates to a rectenna array capable of suppressing harmonics and improving conversion efficiency without using a dedicated device.

  Conventionally, in a rectenna array used in a wireless power transmission system, etc., a dedicated harmonic suppression rectenna device is prepared for each antenna or antenna block, or devices for the required power level are prepared. There is a need. By using a specially designed harmonic suppression rectenna device, harmonics can be suppressed and the conversion efficiency to DC can be increased.

JP 2012-75227 A JP, 2013-165389, A

  However, conventionally, it is difficult to provide a dedicated harmonic suppression rectenna device, and it has been difficult to suppress harmonics and improve conversion efficiency in a rectenna array.

  The present invention has been made in view of the above conventional problems, and an object of the present invention is to provide a rectenna array that can suppress harmonics and enhance conversion efficiency without using a dedicated device.

  In order to solve the above problems, the rectenna array of the first aspect of the present invention is an antenna circuit to which an input terminal of one rectifier circuit is connected to each of two antennas, and an output of one of the rectifier circuits. A signal combining circuit in which an end and the output end of the other rectifier circuit are connected by a transmission line, and an RF power combining element is connected to the transmission line, wherein the RF power combining element is not a midpoint of the transmission line. It is characterized in that it is connected to the transmission line at a point.

  The rectenna array according to the second aspect of the present invention includes an antenna circuit to which an input terminal of one rectifier circuit is connected to each of 2n (n is an integer of 2 or more) antennas and two antenna circuits. A pair of rectifier circuits is provided, and an output end of one rectifier circuit of each set and an output end of the other rectifier circuit are connected by a transmission line, and an n-th stage circuit in which an RF power combiner is connected to the transmission line. , N> m, a m-th stage circuit provided for each m that is a natural number, wherein the two RF power combiners of the (m + 1) th stage circuit are set as one set, and one of the RF power combiners of each set is combined. An output terminal of the element and an output terminal of the other RF power combining element are connected by a transmission line, and an m-th stage circuit in which the RF power combining element is connected to the transmission line is provided, which is a natural number satisfying n ≧ p. For at least one p, at least one of the p stage circuits Set of RF power combining device is characterized in that it is connected to the transmission line at the connection point is not the midpoint of the transmission line.

  According to the present invention, since the RF power combiner is connected to the connection point which is not the intermediate point of the transmission line, it is possible to suppress harmonics and improve conversion efficiency without using a dedicated device.

It is a figure which shows one Example of the rectenna array of this Embodiment. It is a figure which shows the example of another rectifier circuit 2. FIG. 8 is a diagram showing a part of a rectenna array of modification 1. FIG. 9 is a diagram showing a rectenna array of Modification Example 2.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram showing an example of a rectenna array according to the present embodiment.

  As shown in the figure, the rectenna array has a multistage structure like a tournament table. Specifically, the rectenna array includes an antenna circuit 10, a first stage circuit 11, a second stage circuit 12, and a third stage circuit 13.

(Structure of antenna circuit 10)
The input terminal of one rectifier circuit 2 is connected to each of the 2 to the third power (8) antennas 1. That is, the number of antennas 1 and the number of rectifier circuits 2 are 2 to the n-th power, and n is 3, which is an integer of 2 or more, for example.

  Each antenna 1 is, for example, a microstrip antenna, a slot antenna, a tapered slot antenna, a dielectric rod antenna, or an antenna array in which a plurality of these antennas are connected.

  Each rectifier circuit 2 is, for example, a series-connected diode as shown in FIG. In the case of the orientation of FIG. 1, the input end of the rectifier circuit 2 is the anode of the diode and the output end is the cathode. The direction of the diode may be reversed.

  Alternatively, the rectifier circuit 2 may be a shunt-connected diode as shown in FIG. When a shunt-connected diode is used, the input terminal and the output terminal of the rectifier circuit 2 are common. The input end and the output end are, for example, as shown in the drawing, the anodes of the diodes, and the cathodes of the diodes are grounded. The direction of the diode may be reversed.

  Alternatively, the rectifier circuit 2 may be a circuit in which a series-connected diode and a shunt-connected diode are combined, as shown in FIG. In the case of the figure, the input end of the rectifier circuit 2 is the anode of the series-connected diodes, and the output end is the cathode of the series-connected diodes. The direction of each diode may be reversed.

  As described above, various circuits can be adopted as the rectifier circuit 2. The same applies to modified examples described later.

  The antenna 1 receives a radio wave, and the rectifier circuit 2 converts the AC signal output from the antenna 1 into DC. The signal output from the rectifier circuit 2 contains a harmonic component of the fundamental frequency of the radio wave.

(Third stage circuit)
The third stage circuit 13 corresponds to the nth stage circuit when n is 3.

  In the third-stage circuit 13, two rectifier circuits 2 are set as one set, and the output end of one rectifier circuit 2 of each set and the output end of the other rectifier circuit 2 are connected by a transmission line, and an RF line is connected to the transmission line. The power combiner 3 is connected.

  The RF power combiner 3 is connected to the transmission line at a connection point P1 which is not the midpoint P0 of the transmission line. The transmission line is, for example, a microstrip line, a slot line, or a coplanar line, and is formed on, for example, a flat substrate (not shown). Such a transmission line is simply called a transmission line.

  Preferably, when the distance between the intermediate point P0 and the connection point P1 is d, d is

となっている。

Has become.

  However, k is an integer of 0 or more, and λ is suppressed by the RF power combiner 3 connected to the transmission line including the intermediate point and the connection point of the harmonics of the radio wave received by each antenna 1. It is the wavelength of the harmonic.

  The signal output from each rectifier circuit 2 passes through the transmission line and is combined by the RF power combiner 3. At this time, the harmonics contained in the signal output from the rectifier circuit 2 are suppressed by the difference (d) in the lengths of the transmission lines.

  For example, the RF power combiner 3 of the third stage circuit 13 suppresses the fourth harmonic. When k = 0 and the wavelength of the fourth harmonic is λ (@ 4th harmonics), d is λ (@ 4th harmonics) / 4. When d is set in this way, the fourth harmonic is canceled by d at the connection point P1 and can be suppressed. Further, impedance matching can be maintained at the connection point P1.

  Even if d is not set as in the above equation, at least the fourth harmonic can be reduced by combining the signals at the connection point P1 other than the intermediate point P0.

(Second stage circuit)
The second-stage circuit 12 corresponds to the m-th stage circuit provided for 2 which is one of natural numbers satisfying n> m.

  In the second stage circuit 12, the two (m + 1) th stage circuits, that is, the two RF power combiners 3 of the third stage circuit 13 are set as one set, and the output end of one RF power combiner 3 of each set and the other The output end of the RF power combiner 3 is connected by a transmission line, and the RF power combiner 3 of the second stage circuit 12 is connected to the transmission line.

  The RF power combiner 3 is connected to the transmission line at a connection point P1 which is not the midpoint P0 of the transmission line.

  Preferably, also in the second stage circuit 12, the distance d between the intermediate point P0 and the connection point P1 is as in the above equation.

  The signal output from each RF power combiner 3 of the third stage circuit 13 passes through the transmission line and is combined by the RF power combiner 3 of the second stage circuit 12. At this time, the harmonic contained in the signal output from each RF power combiner 3 of the third stage circuit 13 is suppressed by the difference (d) in the length of the transmission line.

  For example, the RF power combiner 3 of the second stage circuit 12 suppresses the third harmonic. When k = 0 and the wavelength of the third harmonic is λ (@ 3rd harmonics), d is λ (@ 3rd harmonics) / 4. When d is set in this way, the third harmonic is canceled by d at the connection point P1 and can be suppressed. Further, impedance matching can be maintained at the connection point P1.

  Even if d is not set as in the above equation, at least the third harmonic can be reduced by combining the signals at the connection point P1 other than the intermediate point P0.

  Also, consider p and q which are natural numbers that satisfy n ≧ p> q. When n is 3, for example, p is 3 and q is 2.

  In this case, if the third-stage circuit 13 is the p-th stage circuit, the second-stage circuit 12 is the q-th stage circuit. Since λ (@ 4th harmonics) <λ (@ 3rd harmonics), the wavelength of the harmonic wave suppressed by the q-th stage circuit is longer than the wavelength of the harmonic wave suppressed by the p-th stage circuit.

  This is an advantage in manufacturing the rectenna array of this embodiment.

  Since the number of RF power combiner elements 3 in the p-th stage circuit is larger than the number of RF power combiner elements 3 in the q-th stage circuit, it is easier to fabricate a rectenna array when the former transmission line is shorter than the latter transmission line.

  As described above, even if the former transmission line is relatively short, if the wavelength of the harmonic wave to be suppressed by the former circuit (p-th stage circuit) is short, d can be set as in the above equation.

  Further, even if the wavelength of the harmonic wave to be suppressed in the latter circuit (qth stage circuit) is relatively long, the latter transmission line is relatively long, so d can be set as in the above equation.

  Therefore, the rectenna array of this embodiment can be easily manufactured.

(First stage circuit)
The first-stage circuit 11 corresponds to the m-th stage circuit provided for 1 which is one of natural numbers satisfying n> m.

  In the first-stage circuit 11, the two (m + 1) -th stage circuits, that is, the two RF power combiners 3 of the second-stage circuit 12 are set as one set, and the output end of one RF power combiner 3 of each set and the other The output end of the RF power combiner 3 is connected by a transmission line, and the RF power combiner 3 of the first stage circuit 11 is connected to the transmission line.

  The RF power combiner 3 is connected to the transmission line at a connection point P1 which is not the midpoint P0 of the transmission line.

  Preferably, also in the first-stage circuit 11, the distance d between the intermediate point P0 and the connection point P1 is as in the above equation.

  The signal output from each RF power combiner 3 of the second stage circuit 12 passes through the transmission line and is combined by the RF power combiner 3 of the first stage circuit 11. At this time, the harmonic contained in the signal output from each RF power combiner 3 of the second stage circuit 12 is suppressed by the difference (d) in the length of the transmission line.

  For example, the RF power combiner 3 of the first stage circuit 11 suppresses the second harmonic. When k = 0 and the wavelength of the second harmonic is λ (@ 2nd harmonics), d is λ (@ 2nd harmonics) / 4. When d is set in this way, the second harmonic is canceled by the connection point P1 due to d, and the second harmonic can be suppressed. Further, impedance matching can be maintained at the connection point P1.

  Even if d is not set as in the above equation, at least the second harmonic can be reduced by connecting the RF power combiner 3 to the transmission line at the connection point P1 other than the intermediate point P0.

  Also, consider p and q which are natural numbers that satisfy n ≧ p> q. When n is 3, for example, p is 2 and q is 1.

  In this case, assuming that the second-stage circuit 12 is the p-th stage circuit, the first-stage circuit 11 is the q-th stage circuit. Since λ (@ 3rd harmonics) <λ (@ 2nd harmonics), the wavelength of the harmonic wave suppressed by the q-th stage circuit is longer than the wavelength of the harmonic wave suppressed by the p-th stage circuit.

  Since the number of RF power combiner elements 3 in the p-th stage circuit is larger than the number of RF power combiner elements 3 in the q-th stage circuit, it is easier to fabricate a rectenna array when the former transmission line is shorter than the latter transmission line.

  As described above, even if the former transmission line is relatively short, if the wavelength of the harmonic wave to be suppressed by the former circuit (p-th stage circuit) is short, d can be set as in the above equation.

  Further, even if the wavelength of the harmonic wave to be suppressed in the latter circuit (qth stage circuit) is relatively long, the latter transmission line is relatively long, so d can be set as in the above equation.

  Therefore, the rectenna array of this embodiment can be easily manufactured.

  In addition, as shown in the document “5.8GHz band class F high efficiency amplifier for SSPS using GaN HEMT,” IEICE Technical Report SPS2008-04. It is known that Therefore, in this embodiment, the conversion efficiency can be improved by suppressing the harmonic components.

(Modification 1)
As shown in FIG. 3, in at least one set of the rectifier circuits 2, a high frequency choke coil, a high impedance line or a pseudo ground plane shown by reference numeral 5 may be connected to both rectifier circuits.

  For example, as shown in FIG. 3, a high frequency choke coil or the like (5) is connected between the cathodes of the two rectifier circuits 2. Alternatively, although not shown, a high frequency choke coil or the like (5) is provided for one or both of the rectifier circuits 2, one end of which is connected to the cathode of the rectifier circuit 2 and the other end of which is grounded.

  Even if a harmonic other than an integral multiple of the fundamental wave occurs at the connection point P1, the high frequency choke coil 5 and the like take out and remove the harmonic other than the integral multiple. As a result, only integral multiple harmonics remain at the connection point P1. Harmonics that are integral multiples are suppressed by signal combining by the RF power combiners 3 of the third-stage circuit 13, the second-stage circuit 12, and the first-stage circuit 11, as described above.

  That is, by connecting the high frequency choke coil, the high impedance line, or the pseudo ground plane to the connection point P1 of the n-th stage circuit, it is possible to suppress harmonics other than integral multiples and further improve the conversion efficiency.

  The configuration of Modification 1 may be adopted in Modifications described later.

(Modification 2)
Although n is 3 in the present embodiment, n may be 1.

  That is, as shown in FIG. 4, for each of the two antennas 1, the antenna circuit 100 to which the input end of one rectifier circuit 2 is connected, the output end of one rectifier circuit 2 and the other rectifier circuit 2 are connected. And a signal combining circuit 200 in which the RF power combiner 3 is connected to the output line, and the RF power combiner 3 transmits at a connection point P1 other than the midpoint P0 of the transmission line. You may comprise the rectenna array connected to a track. In this case, preferably, the distance (d) between the intermediate point P0 and the connection point P1 is set by the above formula. For example, this rectenna array suppresses the second harmonic. In addition, you may comprise so that other harmonics may be suppressed.

(Modification 3)
Further, n may be 2, 4 or more. When n is 2, for example, the second harmonic and the third harmonic are suppressed. In addition, you may comprise so that the harmonic of other integral multiple may be suppressed. When n is 4, for example, the second to fifth harmonics are suppressed. In addition, you may comprise so that the harmonic of other integral multiple may be suppressed. Alternatively, it may be configured to suppress harmonics other than integral multiples.

(Modification 4)
Further, when n is 2 or more, λ of the q-th stage circuit may be shorter than λ of the p-th stage circuit for natural numbers p and q that satisfy n ≧ p> q. This setting may be used at the expense of the ease of making the rectenna array.

(Modification 5)
Further, in the present embodiment, the RF power combiner is connected to the connection point that is not the middle point in all the transmission lines, but the RF power combiner is connected to the connection point that is not the middle point in any one of the transmission lines. May be. At least in the transmission line, the effect of suppressing harmonics can be obtained. That is, although the effect is small, at least the effect of suppressing harmonics and improving the conversion efficiency can be obtained.

  As described above, in the rectenna array of this embodiment, the antenna circuit 10 to which the input terminal of one rectifier circuit 2 is connected and the two rectifier circuits are provided for each of the 2 n-th antennas 1. 2 as one set, the output end of one rectifier circuit 2 and the output end of the other rectifier circuit 2 of each set are connected by a transmission line, and the n-th stage in which the RF power combiner 3 is connected to the transmission line. A circuit (13) and an m-th stage circuit (12, 11) provided for each m which is a natural number that satisfies n> m, and includes one set of two RF power combining elements 3 of the (m + 1) th stage circuit. As the m-th stage in which the output end of one RF power combiner 3 and the output end of the other RF power combiner 3 of each set are connected by a transmission line, and the RF power combiner 3 is connected to the transmission line. Circuit (12, 11) and is a natural number that satisfies n ≧ p For one p, at least one set of RF power combining elements of the p-stage circuit is connected to the transmission line at the connection point is not the midpoint of the transmission line.

  Alternatively, as in Modification 2, the rectenna array has an antenna circuit to which the input end of one rectifier circuit 2 is connected to each of the two antennas, an output end of one rectifier circuit 2 and an other end of the rectifier circuit 2. A circuit in which the output end of the rectifier circuit 2 is connected by a transmission line and the RF power combining element 3 is connected to the transmission line is provided, and the RF power combining element 3 is connected to the transmission line at a connection point which is not an intermediate point of the transmission line. Connected.

  In any of the rectenna arrays, the RF power combiner is connected to a connection point that is not the middle point of the transmission line, so that it is possible to suppress harmonics and improve conversion efficiency without using a dedicated device.

  Preferably, for all p that is a natural number satisfying n ≧ p, all the sets of RF power combining elements of the p-th stage circuit are connected to the transmission line at a connection point that is not the midpoint of the transmission line, so that harmonic suppression is performed. The effect of can be enhanced and the conversion efficiency can be further enhanced.

  Moreover, since the distance d between the intermediate point and the connection point is set as in the above equation, the harmonics can be canceled and the conversion efficiency can be further improved.

  Further, for p and q, which are natural numbers that satisfy n ≧ p> q, λ of the q-th stage circuit (λ of the above formula) is longer than λ of the p-th stage circuit (λ of the above formula), so that harmonics It is easy to make a rectenna array that can be offset.

  Further, as in the first modification, in at least one set of the rectifier circuits 2, by connecting a high frequency choke coil, a high impedance line, or a pseudo ground plane to the output terminals of one of the rectifier circuits 2 or both of the rectifier circuits 2, an integer Harmonics other than double can be suppressed, and conversion efficiency can be further improved.

1 Antenna 2 Rectifier Circuit 3 RF Power Combining Element P0 Intermediate Point P1 Connection Point 10, 100 Antenna Circuit 11 First Stage Circuit 12 Second Stage Circuit 13 Third Stage Circuit 200 Signal Compositing Circuit

Claims (8)

An antenna circuit to which the input end of one rectifier circuit is connected to each of the two antennas,
A signal combining circuit in which an output end of the one rectifying circuit and an output end of the other rectifying circuit are connected by a transmission line, and an RF power combining element is connected to the transmission line;
The RF power combiner is connected to the transmission line at a connection point that is not the midpoint of the transmission line ,
A rectenna array , wherein a high frequency choke coil, a high impedance line, or a pseudo ground plane is connected to at least one of the rectifier circuits . An antenna circuit to which an input terminal of one rectifier circuit is connected to each of 2n (n is an integer of 2 or more) antennas,
The two rectifying circuits are set as one set, and the output end of one rectifying circuit of each set and the output end of the other rectifying circuit are connected by a transmission line, and an RF power combining element is connected to the transmission line. n-stage circuit,
An m-th stage circuit provided for each m that is a natural number satisfying n> m, wherein one of the two RF power combiners of the (m + 1) th stage circuit is one set, and one RF power combiner of each set is provided. And an output terminal of the other RF power combining element are connected by a transmission line, and the m-th stage circuit in which the RF power combining element is connected to the transmission line,
For at least one p that is a natural number satisfying n ≧ p, at least one set of RF power combining elements of the p-th stage circuit is connected to the transmission line at a connection point that is not the midpoint of the transmission line ,
A rectenna array , wherein a high frequency choke coil, a high impedance line, or a pseudo ground plane is connected to at least one of the rectifier circuits . An antenna circuit to which the input end of one rectifier circuit is connected to each of the two antennas,
A signal combining circuit in which an output end of the one rectifying circuit and an output end of the other rectifying circuit are connected by a transmission line, and an RF power combining element is connected to the transmission line;
The RF power combiner is connected to the transmission line at a connection point that is not the midpoint of the transmission line ,
If the distance between the intermediate point and the connection point is d,

Here, k is an integer of 0 or more, and λ is a harmonic suppressed by the RF power combiner connected to the transmission line including the intermediate point and the connection point among the harmonics of the radio wave received by each antenna. Rectenna array characterized by the wavelength of the waves . An antenna circuit to which an input terminal of one rectifier circuit is connected to each of 2n (n is an integer of 2 or more) antennas,
The two rectifying circuits are set as one set, and the output end of one rectifying circuit of each set and the output end of the other rectifying circuit are connected by a transmission line, and an RF power combining element is connected to the transmission line. n-stage circuit,
An m-th stage circuit provided for each m that is a natural number satisfying n> m, wherein one of the two RF power combiners of the (m + 1) th stage circuit is one set, and one RF power combiner of each set is provided. And an output terminal of the other RF power combining element are connected by a transmission line, and the m-th stage circuit in which the RF power combining element is connected to the transmission line,
For at least one p that is a natural number satisfying n ≧ p, at least one set of RF power combining elements of the p-th stage circuit is connected to the transmission line at a connection point that is not the midpoint of the transmission line ,
If the distance between the intermediate point and the connection point is d,

Here, k is an integer of 0 or more, and λ is a harmonic suppressed by the RF power combiner connected to the transmission line including the intermediate point and the connection point among the harmonics of the radio wave received by each antenna. Rectenna array characterized by the wavelength of the waves . The RF power combiner of all the sets of the p-th stage circuit is connected to the transmission line at a connection point that is not the midpoint of the transmission line for all p that are natural numbers that satisfy n ≧ p. Or the rectenna array described in 4 . The rectenna array according to claim 3 , wherein λ of the q-th stage circuit is longer than λ of the p-th stage circuit for natural numbers p and q satisfying n ≧ p> q. The rectenna array according to any one of claims 1 to 6, wherein the antenna is a microstrip antenna, a slot antenna, a tapered slot antenna, a dielectric rod antenna, or an antenna array in which a plurality of these are connected. The rectifier circuit is series connected with a diode shunt connected diodes or series connected diodes and rectenna array according to any one of claims 1 to 7, characterized in that a circuit combining diodes shunt connection, .

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