JP6714929B2 - Motor rotation speed detector - Google Patents

Description

The present invention relates to a motor rotation speed detection device.

A method using a hall sensor or an encoder is generally used as a method for detecting the rotation speed of a brushless motor. In particular, among the rotation speed detection methods using the hall sensor, a method using three hall sensors is widely known.

FIG. 13 is a diagram showing the operating principle of a conventional three-phase brushless motor. The operation of the conventional motor rotation speed detection device will be described with reference to FIG.

The rotor of the brushless motor includes a magnetic pole pair including N poles and S poles. Then, _three Hall sensors HS ₁ , HS ₂ , and HS ₃ as position sensors are arranged around the rotor at equal electrical angle intervals of 120°.

The brushless motor is configured such that this rotor rotates. Each Hall sensor detects when the magnetic pole switches from the S pole to the N pole or from the N pole to the S pole as the rotor rotates around the rotation axis, and detects the state of the output signal as shown in FIG. Change (high level, low level). FIG. 14 shows the states of the output signals Hu, Hv, Hw with respect to the rotation phase angles of the rotors of the Hall sensors HS ₁ , HS ₂ , HS ₃ . Further, FIG. 3 shows a diagram in which this is indicated by the value of the output signal (high level is 1, low level is 0). By combining the output signal values of Hu, Hv, and Hw, the rotor rotation phase angle can be divided into six state sections B1 to B6 at equal intervals of 60 degrees.

Therefore, the rotation speed of the rotor can be detected by using the output signal of each Hall sensor. That is, by counting the number of clock pulses in each of the sections B1 to B6 by the counter, the rotation speed of the motor (the average rotation speed in each of the sections B1 to B6) can be detected. Now, assuming that the frequency of the clock pulse is fc [Hz], the counter counts the number n of clock pulses with respect to 1/6 rotation in each of the sections B1 to B6 with the phase interval of 60°. Is
Ω=60 fc/6n=10 fc/n [rpm] (1)
Can be calculated as

JP-A-6-144274

Here, for example, in order to reduce the cost of the motor rotation speed detection device and reduce the size of the device for mounting on a small-scale device, the output signal Hu of the number of Hall sensors smaller than the number of phases of the motor, for example, the Hall sensor. , Hv, Hw of two signals of Hu and Hv are considered to detect the rotation speed. FIG. 16 shows the values of the Hall sensor output signals Hu and Hv with respect to the rotor rotation phase angle. In this case, the rotor rotation phase angle can be divided into four state sections B1' to B4'.

In this case, the phase interval between the sections B1' and B3' is 120°, but the phase interval between the sections B2' and B4' is 60°, which is different from the phase interval between the sections B1' and B3'. Therefore, the sections B2' and B4' and the sections B1' and B3' have different clock pulse counting times, and therefore the conventional method cannot be applied as it is to accurately detect the rotation speed.

Therefore, it is an object of the present invention to provide a motor rotation speed detection device capable of accurately detecting the rotation speed with a number of Hall sensors that is smaller than the number of motor phases.

One aspect of the present invention is a rotational speed detection device for a magnetic pole pair number P, an M-phase motor, wherein the first to Nth (N is greater than 1) arranged at intervals of an integral multiple of an electrical angle of 180/M°. (An integer larger than M) and a phase section for one rotation of the M-phase motor is divided into 2P sections, each of which is (180/MP). )·Li° (i is an integer of 1 or more and N or less, Li is an integer of 1 or more and (M−N+1) or less) in a section Bij (j is an integer of 1 or more and 2P or less) In each of the first to Nth signals, only the i-th signal is a signal representing the first state, and all other signals are signals representing the second state different from the first state, A section discriminating unit that generates and outputs from the output signals of the first to Nth Hall sensors, and the i-th signal of the first to N-th signals is a signal representing the first state. , In the section Bij, a clock pulse output unit that outputs a clock pulse of the frequency fc/Li, a counter that counts the clock pulse output from the output unit in each of the sections Bij, and a count value of the counter Provided is a motor rotation speed detection device including a rotation speed calculation unit that calculates a rotation speed of a motor.

The clock pulse output unit generates clock pulses of 1st to Kth frequencies for 1st to Kth frequencies that are different frequencies of the frequency fc/Li. And a first to N-th arithmetic unit, and a logical sum arithmetic unit, and the i-th arithmetic unit calculates the frequency fc when the i-th signal is a signal representing the first state. /Li outputs an output from the clock generator that generates a clock pulse, and the logical sum calculation unit calculates a logical sum of output signals from the first to Nth calculation units, and in a section Bi, A clock pulse of frequency fc/Li may be output.

The first state is a first logic, the second state is a second logic different from the first logic, and the first to Nth operation units are AND operation units. And the i-th calculation unit calculates the logical product of the output from the clock generator that generates the clock pulse of the frequency fc/Li and the logic represented by the i-th signal. it can.

The clock pulse output unit outputs the output from the clock generator to 1/ when the i-th signal is a signal representing the first state and a clock generator that generates a clock pulse having a frequency fc. A clock frequency converter that multiplies Li and generates a clock pulse of frequency fc/Li in the section Bij can be provided.

Another aspect of the present invention is a rotational speed detecting device for an M-phase motor having a number P of magnetic pole pairs, which is arranged at intervals of an integral multiple of an electrical angle of 180/M°, where N is 1 or more. (An integer larger than M) and a phase section for one rotation of the M-phase motor is divided into 2P sections, each of which is (180/MP). )·Li° (i is an integer of 1 or more and N or less, Li is any integer of 1 or more and (M−N+1) or less) of a section Bij (j is an integer of 1 or more and 2P or less) In each of the first to Nth signals, only the i-th signal is a signal representing the first state, and all other signals are signals representing the second state different from the first state, The section determination section that generates and outputs the output signals of the first to Nth hall sensors, the clock pulse output section that outputs the clock pulse of the frequency fc, and the section Bij are output from the output section. When the counter that counts clock pulses and the i-th signal of the first to N-th signals are signals that represent the first state, the count value of the counter is multiplied by 1/Li for the section Bij. The present invention provides a motor rotation speed detection device including a rotation speed calculation unit that calculates the rotation speed of a motor based on the calculated value.

P=1, M=3, N=2, and the section discrimination unit calculates the exclusive OR of the output signals of the first and second Hall sensors and the negation of the exclusive OR, and The calculation results may be output as the first signal and the second signal, respectively.

According to the present invention having the above configuration, there is provided a motor rotation speed detection device capable of accurately detecting the rotation speed by the number of Hall sensors that is smaller than the number of motor phases.

It is a figure which shows the principle of the motor rotation speed detection apparatus which concerns on the 1st Embodiment of this invention. It is a figure which shows the whole structure of the motor rotation speed detection apparatus which concerns on the 1st Embodiment of this invention. It is a figure which shows an example of a circuit structure of the area determination part of the motor rotation speed detection apparatus and the clock signal output part which concern on the 1st Embodiment of this invention. It is a figure which shows the example of the relationship between a slot and a division area. It is a figure which shows the whole structure of the motor rotation speed detection apparatus which concerns on the 2nd Embodiment of this invention. It is a figure which shows an example of the circuit structure of the area determination part and clock pulse output part which concern on the 2nd Embodiment of this invention. Is a diagram showing an output of a Hall sensor HS _1, HS _2, values and section determination unit of the output signal of the HS ₃ with respect to the rotor rotational phase angle. It is a figure which shows an example of the circuit structure of the area determination part and clock pulse output part which concern on the 2nd Embodiment of this invention. Is a diagram showing an output of a Hall sensor HS _1, HS _2, values and section determination unit of the output signal of the HS ₃ with respect to the rotor rotational phase angle. It is a figure which shows an example of the circuit structure of the area determination part and clock pulse output part which concern on the 2nd Embodiment of this invention. It is a diagram showing an output of a Hall sensor _{HS 1, HS 2, HS 3} , the value of the output signal of the HS ₄ and section determination unit to the rotor rotational phase angle. It is a figure which shows an example of the circuit structure of the area determination part and clock pulse output part which concern on the 2nd Embodiment of this invention. It is a figure which shows the operation principle of the conventional three-phase brushless motor. Shows the Hall sensor HS _1, HS _2, the output signal Hu with respect to the rotational phase angle of the HS ₃ of rotor, Hv, the status of Hw. Hall sensor HS _1, HS _2, the output signal Hu with respect to the rotational phase angle of the HS ₃ of rotor, Hv, is a diagram illustrating the value of Hw. It is a figure which shows the value of the output signals Hu and Hv of a Hall sensor with respect to a rotor rotation phase angle.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a diagram showing a principle of a motor rotation speed detecting device according to a first embodiment of the present invention.

As described above, when three Hall sensors are used, the clock pulse can be counted by the counter in each of the sections B1 to B6, and the rotation speed of the motor can be calculated based on the counted value. It was

In the conventional method, the problem when two Hall sensors are used is caused by counting clock pulses of the same frequency in sections having different phase intervals. Therefore, the present inventors have found that the problem can be solved by switching the frequency of the clock pulse to be counted between the sections B1′ and B3′ and the sections B2′ and B4′.

Therefore, it is necessary to distinguish between sections B1' and B3' having a phase interval of 120° and sections B2' and B4' having a phase interval of 60°. For example, each section can be discriminated by the XOR operation of the output signals Hu and Hv of the hall sensor and the NOT operation thereof. FIG. 1 shows the calculation result.

Therefore, clock pulses of fc/2 [Hz] are counted in the sections B1′ and B3′ in which the phase interval is 120°, and in the sections B2′ and B4′ in which the phase interval is 60°, which is ½ of that, By counting the clock pulses of fc [Hz], the rotation speed can be detected by the same counter.

That is, in the sections B1′ and B3′ in which the phase interval is 120°, the number N of clock pulses of fc/2 [Hz] is counted for 1/3 rotation, so the rotation speed Ω is
Ω=60 fc/2/3 N=10 fc/N [rpm] (2)
Becomes
On the other hand, in the sections B2′ and B4′ in which the phase interval is 60°, the number N of clock pulses of fc [Hz] is counted for 1/6 rotation, so the rotation speed is
Ω=60fc/6N=10fc/N [rpm] (3)
Becomes
Therefore, the rotation speed can be detected by the same counter even with the two Hall sensors having a smaller number of motor phases.

FIG. 2 is a diagram showing the overall configuration of the motor rotation speed detection device according to the first embodiment of the present invention. Further, FIG. 3 is a diagram showing an example of a circuit configuration of a section determination unit and a clock pulse output unit of the motor rotation speed detection device according to the first embodiment of the present invention.

The motor rotation speed detection device 1 includes a clock pulse output unit 13 for each of the first Hall sensor HS ₁ , the second Hall sensor HS ₂ , the section determination unit 11, the clock pulse output unit 13, and the sections B1′ to B4′. A counter 15 for counting the clock pulses output from the counter 15 and a rotation speed calculator 17 for calculating the rotation speed of the motor based on the count value of the counter 15.

The first Hall sensor HS ₁ and the second Hall sensor HS ₂ are arranged clockwise at an electrical angle of 120°.

The section determination unit 11 includes an XOR element 111 and a NOT element 113. Further, the clock pulse output unit 13 includes a first clock pulse generator 131 ₁ that generates a clock pulse of frequency fc/2, a second clock pulse generator 131 ₂ that generates a clock pulse of frequency fc, and a first clock pulse generator 131 ₂ . An AND element 133 ₁ , a second AND element 133 ₂ , and an OR element 135 are provided.

The output lines of the first Hall sensor HS ₁ and the second Hall sensor HS ₂ are connected to the input lines of the XOR element 111. The output line of the XOR element 111 and the output line of the first clock pulse generator 131 ₁ are connected to the input line of the _first AND element 133 ₁ . Further, the output line of the XOR element 111 is connected to the input line of the second AND element 133 ₂ via the NOT element 113, and the output line of the second clock pulse generator 131 ₂ is the second AND element. It is connected to the input line of 133 ₂ . The output line of the _first AND element 133 _{1 and} the output line of the second AND element 133 ₂ are connected to the input line of the OR element 135, and the output from the OR element 135 is output as the output of the clock pulse output unit 13. It

The counter 15 counts the clock pulses output from the clock pulse output unit 13, and when any one of the sections B1′ to B4′ changes to another section based on the output from the XOR element 111, The count value is reset. As a result, the clock pulse output from the clock pulse output unit 13 can be counted for each of the sections B1′ to B4′.

The rotation speed calculation unit 17 calculates the rotation speed of the motor based on the count value of the counter 15.

Based on the above device configuration, the operation of the motor rotation speed detection device according to the first embodiment of the present invention will be described.

Referring to FIG. 1, the output from the XOR element 111 is 1 in the sections B1′ and B3′. Therefore, the section discriminating unit 11 generates and outputs the first signal having the value 1 in the first state and the second signal having the value 0 in the second state. The first signal having a value of 1 from the section discriminating unit 11 and the clock pulse of the frequency fc/2 from the _first clock pulse generator 131 ₁ are input to the first AND element 133 ₁ . On the other hand, the second signal whose value is 0 from the section discrimination unit 11 is input to the second AND element 133 ₂ . Therefore, the OR element 135, that is, the clock pulse output unit 13, outputs the clock pulse of the frequency fc/2 which is the output from the _first clock pulse generator 131 ₁ as it is. At this time, since the phase interval between the sections B1′ and B3′ is 120°, the counter 15 counts the number n of clock pulses of fc/2 [Hz] with respect to 1/3 rotation. Based on this, the calculation unit 17 calculates the rotation speed Ω from the above equation (2).

On the other hand, in the sections B2′ and B4′, the output from the XOR element 111 is 0. Therefore, the section determination unit 11 generates and outputs the first signal having the value 0 in the second state and the second signal having the value 1 in the first state. The second signal whose value is 0 from the section discrimination unit 11 is input to the first AND element 133 ₁ . On the other hand, the second signal having a value of 1 from the section discrimination unit 11 and the clock pulse of the frequency fc from the _first clock pulse generator 131 ₁ are input to the second AND element 133 ₂ . Therefore, the clock pulse of the frequency fc, which is the output from the _second clock pulse generator 131 ₂ , is output from the OR element 135, that is, the clock pulse output unit 13 as it is. At this time, since the phase interval between the sections B2′ and B4′ is 60°, the counter 15 counts n of the number of clock pulses of fc [Hz] with respect to 1/6 rotation. Based on this, 17 calculates the rotation speed Ω from the above equation (3).

In this case, as can be seen from FIG. 1, the output signal of the _first AND element 133 _{1 and} the output signal of the second AND element 133 ₂ are contradictory (when one is 1, the other is 0), The output signal of the _first AND element 133 _{1 and} the output signal of the second AND element 133 ₂ are not simultaneously input to the counter 15.

In the above embodiment, “0” is used as the first state and “1” is used as the second state. However, the circuit configurations of the section discriminating unit and the clock pulse output unit are changed to “1” as the first state. , "0" may be used as the second state, or any appropriate different distinguishable state may be used.

When two kinds of clock pulse generators of fc [Hz] and fc/2 [Hz] cannot be prepared, the clock pulse output unit 13 uses the clock pulse generator of fc [Hz] from the XOR element 111. Based on the output of the above, each section is discriminated, and in the sections B1′ and B3′, the clock pulse from the clock pulse output unit 13 is divided in half and output, and in the sections B2′ and B4′. The clock pulse may be output as it is.

Instead of this, the counter 15 determines each section based on the output from the XOR element 111 by using one clock pulse generator of fc [Hz], and in the sections B1′ and B3′, , Halves the count value of the clock pulse from the clock pulse output unit 13 and outputs the count value to the rotation speed calculation unit 17, and in the intervals B2′ and B4′, the count value of the clock pulse from the clock pulse output unit 13 May be output to the rotation speed calculation unit 17 as it is.

With such a configuration, the rotation speed of the motor can be detected by the number of Hall sensors that is smaller than the number of phases of the motor.

(Second embodiment)
The motor rotation speed detection device according to the first embodiment detects the rotation speed of a three-phase motor having one magnetic pole pair with two Hall sensors. In the present embodiment, this is generalized, and the rotation speed of the M-phase motor having the number P of magnetic pole pairs is set in the clockwise direction at an integer multiple of an electrical angle of 360/N° (N is an integer larger than 1 and smaller than M). It is to be detected by N Hall sensors arranged in.

First, consider the case where the number of magnetic pole pairs is one. When N hall sensors are used, the phase can be divided into two per hall sensor, and thus the phase can be divided into 2N sections. On the other hand, the minimum value of the phase interval of the divided section is 180/M°. Therefore, if the section of the minimum value of the phase interval of 180/M° is called “slot”, the number of slots per one rotation of the rotor is 360/(180/M)=2M.

In this way, when the number N of Hall sensors to be used is determined, the number of rotor phase divisions is uniquely determined, but the number of phase intervals in the division section (hereinafter, the minimum value 180/M° is the basic unit 1) is N. Of the Hall sensors of which the output signal of the Hall sensor is used.

At this time, there occurs a case in which the phase interval M is divided into N, that is, only _M C _N. When the phase interval of the N-1 sections is 1, the maximum phase interval of the section is M-N+1 of the phase intervals of the remaining 1 section. FIG. 4 shows an example of the relationship between slots and divided sections.

It is obtained by dividing the phase section for one rotation of the M-phase motor into N, each of which is (180/M).Li (i is an integer of 1 or more and N or less, Li is 1 or more (M-N+1). In each of the sections Bi having a phase interval of (any one of the following), only the i-th signal is the signal representing the first state (for example, high level=1), and all other signals are the above-mentioned A logical operation circuit for generating first to Nth signals, which are signals representing a second state (for example, low level=0) different from the first state, from the output signals of the first to Nth hall sensors. Can be configured. That is, since the combination of the section Bi and the output signals of the first to N-th Hall sensors has a one-to-one correspondence, the output signals of the first to N-th Hall sensors are logical values and only the i-th signal is the first. A logic function that outputs a signal indicating a second state (for example, low level=0) that is different from the first state for all other signals. Conceivable. Although there are many logical expressions expressing the same logical function, it is possible to configure the logical operation circuit so that a logical expression generated from the output signals of the first to Nth Hall sensors is created.

Therefore, a clock pulse generator having a frequency fc/Li [Hz] corresponding to the phase interval Li of each section is prepared, and the i-th signal of the first to N-th signals represents the first state. In such a case, if the clock pulse of the frequency fc/Li is output in the section Bi and the clock pulse is counted by the counter, the rotation speed can be detected by the same counter.

That is, since the number n of clock pulses of fc/Li [Hz] is counted for Li/2M rotation, the rotation speed Ω is
Ω=60×(Li/2M)×(fc/(nLi))=30fc/Mn [rpm] (4)
Therefore, the rotation speed can be detected by the same counter by N Hall sensors that are smaller than the number of phases of the motor regardless of the phase interval Li of the section.

ここで、ｍはＰ以下の整数である。 Although the above discussion was made with the number of magnetic pole pairs being 1, it is easy to extend the number of magnetic pole pairs to P. When the number of magnetic pole pairs becomes P, the number of phase divisions becomes P times. The output signal of the Hall sensor in the divided state, which is P times, is only repeated in the same cycle. Then, each of the phase sections for one rotation of the M-phase motor is divided into 2P sections, and each section is further divided into N sections, each of which is (180/MP).Li (i is 1 or more and N or less). The interval Bij (j is an integer of 1 or more and 2P or less) having a phase interval of 1 or more and Li is an integer of 1 or more (M−N+1) or less has the following properties.
(1) The logics in the section Bij where j is an odd number and j is an even number are the same. That is,
Bi1=Bi3=... =Bi,(2m-1)
Bi2=Bi4=... =Bi,2m.
(2) The logic in the section Bij in which j differs from each other by 1 has an inverted relationship. That is,

Here, m is an integer of P or less.

Further, in each of the sections Bij, only the i-th signal is the signal representing the first state, and all other signals are the signals representing the second state different from the first state. It is possible to configure a logical operation circuit that generates N signals from the output signals of the first to Nth Hall sensors. That is, since the combination of the section Bij and the output signals of the first to N-th Hall sensors has a one-to-one correspondence, the output signals of the first to N-th Hall sensors are logical values and only the i-th signal is the first. A logic function that outputs a signal indicating a second state (for example, low level=0) that is different from the first state for all other signals. Conceivable. Although there are many logical expressions expressing the same logical function, it is possible to configure the logical operation circuit so that a logical expression generated from the output signals of the first to Nth Hall sensors is created.

Therefore, a clock pulse generator having a frequency fc/Li [Hz] corresponding to the phase interval Li of each section is prepared, and the i-th signal of the first to N-th signals represents the first state. In this case, if the clock pulse of the frequency fc/Li is output and the clock pulse is counted by the counter in the section Bij, the rotation speed can be detected by the same counter.

That is, since the number n of clock pulses of fc/Li [Hz] is counted for Li/2MP rotation, the rotation speed Ω is
Ω=60×(Li/(2MP))×(fc/(nLi))=60fc/2MPn [rpm] (5)
Therefore, the rotation speed can be detected by the same counter by N Hall sensors that are smaller than the number of motor phases, regardless of the phase interval Li of the section.

FIG. 5 is a diagram showing an overall configuration of a motor rotation speed detection device 1 according to the second embodiment of the present invention, and FIG. 6 is a section determination unit of the motor rotation speed detection device according to the second embodiment of the present invention. FIG. 3 is a diagram showing an example of a circuit configuration of a clock pulse output unit. In FIGS. 5 and 6, parts corresponding to those in FIGS. 2 and 3 are denoted by the same reference numerals, and overlapping description with the first embodiment will be omitted.

The motor rotation speed detection device 1 outputs the clock pulse output from the clock pulse output unit 13 for each of the first to Nth Hall sensors HS _{1 to} HS _N , the section determination unit 11, the clock pulse output unit 13, and the section Bij. And a rotation speed calculation unit 17 that calculates the rotation speed of the motor based on the count value of the counter 15.

The first to Nth Hall sensors HS _{1 to} HS _N are arranged clockwise at intervals of an integral multiple of 180/M° of electrical angle.

The section determination unit 11 is obtained by further dividing each of the sections obtained by dividing the phase section for one rotation of the M-phase motor into 2P sections into N sections, each of which is (180/MP)·Li°(i Is an integer of 1 or more and N or less, Li is an integer of 1 or more (M-N+1) or less), and in each of the sections Bij (j is an integer of 1 or more and 2P or less) The first to Nth signals are the first to Nth signals, in which only the signals are signals representing the first state and all other signals are signals representing the second state different from the first state. It is generated from the output signals of the Hall sensors HS _{1 to} HS _{N and} is output.

The clock pulse output unit 13 is a first to Kth clock pulse generator that generates clock pulses of the first to Kth frequencies for the first to Kth frequencies, which are different frequencies of the frequency fc/Li. 131 ₁ provided to 131 and _K, first to N aND element 133 ₁ to 133 _N is an operation unit of the first to N, the OR element 135 is a logical sum operation unit. The i-th AND element 133 _i generates the i-th signal output from the section discriminating unit 11 and the clock pulse of the frequency fc/Li among the _{first to} Kth clock pulse generators 131 _{1 to} 131 _K. The clock pulse from the clock pulse generator 131 _j is input. The outputs from the _{first to} Nth AND elements 133 _{1 to} 133 _N are input to the OR element 135, and the output from the OR element 135 is output as the output of the clock pulse output unit 13.

The counter 15 counts the clock pulses output from the clock pulse output unit 13, and based on the output from the section determination unit 11, when any section of the section Bij changes to another section, its count value is Will be reset. As a result, the clock pulse output from the clock pulse output unit 13 can be counted for each of the sections Bij.

The rotation speed calculation unit 17 calculates the rotation speed Ω of the motor from the above equation (4) based on the count value of the counter 15.

When it is not possible to prepare K kinds of clock pulse generators of fc/Li [Hz] (i=1, 2,..., K), a section discrimination unit is used by using one clock pulse generator of fc [Hz]. Each section may be discriminated based on the output from 11, and the clock pulse from the clock pulse output unit 13 may be divided into 1/Li and output according to the phase interval of the section.

Instead of this, each section is discriminated based on the output from the section discriminating unit 11 by using one clock pulse generator of fc [Hz], and the counter is counted according to the phase interval of the section. The numerical value may be multiplied by 1/Li and output to the rotation speed calculation unit 17.

Hereinafter, some specific examples will be described.

<Number of magnetic pole pairs 1, number of phases 5, number of Hall sensors 3>
When the number of magnetic pole pairs P=1, the number of phases M=5, and the number of Hall sensors N=3, the number of rotor phase divisions is 2N=6, and six states can be detected. Hall sensor HS for rotor rotation phase angle when using the output signal of the Hall sensor HS, which is arranged at intervals of an electrical angle of 180/5 = 36 ° clockwise _{1, HS 2, HS 3 1} , HS 2, HS 3 The value of the output signal of is shown in FIG.

From FIG. 9, the phase intervals L1 and L2 when the basic unit is 36° in the sections B11, B21, B12, and B22 are 2, and the phase interval L3 when the basic unit is 36° in the sections B31 and B32 is 1. Therefore, as the clock pulse generator, a first clock pulse generator that generates a clock pulse of frequency fc/2 [Hz] and a second clock pulse generator that generates a clock pulse of frequency fc [Hz] are prepared. do it. FIG. 8 shows an example of the circuit configuration in this case, and FIG. 9 shows the output of the section discrimination unit 11 in this case.

Next, with respect to the first and second Hall sensors HS ₁ and HS ₂ and the second Hall sensor HS ₂ , which are arranged at an electrical angle of 180/5=36° in the clockwise direction, the electrical angle of 72 in the clockwise direction. Output signals of the first, second, and fourth Hall sensors HS ₁ , HS ₂ , HS ₄ with respect to the rotor rotation phase angle when the output signals of the fourth Hall sensor HS ₄ arranged at intervals of ° are used. The value of is shown in FIG.

From FIG. 10, the phase intervals L1 and L2 when the basic unit is 36° in the sections B11, B21, B12, and B22 are 1 and the phase interval L3 when the basic unit is 36° in the sections B31 and B32 are 3 Therefore, as the clock pulse generator, a first clock pulse generator that generates a clock pulse of frequency fc [Hz] and a second clock pulse generator that generates a clock pulse of frequency fc/3 [Hz] are prepared. do it. FIG. 10 shows an example of the circuit configuration in this case, and FIG. 9 shows the output of the section discrimination unit 11 in this case.

<1 magnetic pole pair, 5 phases, 4 Hall sensors>
When the number of magnetic pole pairs P=1, the number of phases M=5, and the number of Hall sensors N=4, the number of rotor phase divisions is 2N=8, and eight states can be detected. Halls for the rotor rotation phase angle when the output signals of the first to fourth Hall sensors HS ₁ , HS ₂ , HS ₃ , HS ₄ arranged clockwise at intervals of 180/5=36° are used. The values of the output signals of the sensors HS ₁ , HS ₂ , HS ₃ and HS ₄ are shown in FIG.

From FIG. 11, the phase intervals L1, L2, and L4 are 1 when 36° of the sections B11, B21, B41, B12, B22, and B42 are basic units, and 36° of the sections B31 and B32 are basic units. Since the phase interval L3 of 2 is 2, the clock pulse generator has a first clock pulse generator that generates a clock pulse of frequency fc [Hz] and a second clock pulse generator that generates a clock pulse of frequency fc/2 [Hz]. A clock pulse generator may be prepared. FIG. 12 shows an example of the circuit configuration in this case, and FIG. 11 shows the output of the section discrimination unit 11 in this case.

With such a configuration, the rotation speed of the motor can be detected by the number of Hall sensors that is smaller than the number of phases of the motor.

In the above embodiment, the brushless motor has been described as an example, but the present invention is not limited to the brushless motor, and it is needless to say that the present invention can be applied to all motors having a configuration similar to that of the brushless motor (for example, a synchronous motor). Yes.

Although the present invention has been described above with reference to some embodiments for the purpose of illustration, the present invention is not limited thereto, and various forms and details can be obtained without departing from the scope of the present invention. It will be apparent to those skilled in the art that variations and modifications can be made.

_{HS 1, HS 2, HS 3} , HS 4, HS N first to fourth, N Hall sensors 1 Motor speed detector 11 section determination unit 111 XOR element 113 NOT element 13 clock pulse output unit 131 _1, 131 ₂ , 131 _j , 131 _K 1st, 2nd, jth, Kth clock pulse generator 133 ₁ , 133 ₂ , 133 ₃ , 133 _i , 133 _N 1st, 2nd, 3rd, i-th, N AND element 135 OR element 15 Counter 17 Rotational speed calculation unit

Claims (6)

A rotational speed detection device for a magnetic pole pair number P, M-phase motor,
First to Nth (N is an integer larger than 1 and smaller than M) Hall sensors arranged at intervals of an integral multiple of electrical angle 180/M°,
The phase section for one rotation of the M-phase motor is divided into 2P sections, and each section is further divided into N sections, each of which is (180/MP)·Li° (i is 1 or more and N or less). , Li is any integer of 1 or more (M−N+1) or less) in each section Bij (j is an integer of 1 or more and 2P or less), and only the i-th signal is the first signal. The first to Nth signals, which are signals indicating the second state in which all the other signals are different from the first state, are output from the first to Nth hall sensors. A section discriminator that generates and outputs a signal,
When the i-th signal of the first to N-th signals is a signal representing the first state, a clock pulse output unit that outputs a clock pulse of frequency fc/Li in the section Bij,
A counter that counts clock pulses output from the output unit for each of the sections Bij;
A rotation speed calculation unit that calculates the rotation speed of the motor based on the count value of the counter;
A motor rotation speed detection device. The clock pulse output unit generates first to Kth clock pulses of first to Kth frequencies, which are different frequencies of the frequency fc/Li, from first to Kth clock generators. When,
First to N-th arithmetic units,
An OR operation unit,
Equipped with
The i-th arithmetic unit outputs an output from the clock generator that generates a clock pulse of the frequency fc/Li when the i-th signal is a signal representing the first state,
The motor rotation speed according to claim 1, wherein the logical sum calculation unit calculates a logical sum of output signals from the first to Nth calculation units and outputs a clock pulse of frequency fc/Li in the section Bi. Detection device. The first state is a first logic,
The second state is a second logic different from the first logic,
The first to Nth operation units are AND operation units,
The motor rotation according to claim 2, wherein the i-th arithmetic unit calculates a logical product of an output from the clock generator that generates a clock pulse of the frequency fc/Li and a logic represented by the i-th signal. Speed detection device. The clock pulse output unit generates a clock pulse having a frequency fc;
When the i-th signal is a signal representing the first state, the output from the clock generator is multiplied by 1/Li, and a clock frequency for generating a clock pulse of frequency fc/Li in the section Bij. A converter,
The motor rotation speed detection device according to claim 1, further comprising: A rotational speed detection device for a magnetic pole pair number P, M-phase motor,
First to Nth (N is an integer larger than 1 and smaller than M) Hall sensors arranged at intervals of an integral multiple of electrical angle 180/M°,
The phase section for one rotation of the M-phase motor is divided into 2P sections, and each section is further divided into N sections, each of which is (180/MP)·Li° (i is 1 or more and N or less). In the interval Bij (j is an integer of 1 to 2P) having a phase interval of 1 or more (M−N+1) or less), only the i-th signal is the first signal. Output signals of the first to Nth hall sensors are first to Nth signals, which are signals representing a state and all other signals are signals representing a second state different from the first state. A section discriminating unit that generates and outputs from
A clock pulse output unit for outputting a clock pulse of frequency fc;
A counter that counts clock pulses output from the output unit for each of the sections Bij;
When the i-th signal of the first to N-th signals is the signal representing the first state, the motor of the section Bij is calculated based on a value obtained by multiplying the count value of the counter by 1/Li. A rotation speed calculation unit for calculating the rotation speed,
A motor rotation speed detection device. P=1, M=3, N=2,
The section determination unit calculates an exclusive logical sum of the output signals of the first and second Hall sensors and a negation of the exclusive logical sum, and outputs the calculation results as the first signal and the second signal, respectively. The motor rotation speed detection device according to any one of claims 3 to 5, wherein

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