JP6724800B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device having a plurality of lead frames.

The semiconductor device has a plurality of lead frames arranged side by side. A space is provided between the lead frames in order to secure an insulation distance between adjacent lead frames. The heat generated in the semiconductor chip is dissipated by the heat dissipating structure of the semiconductor device, but part of it is transferred to the printed wiring board through the lead frame and dissipated.

If the thickness of the lead frame is increased, the processing becomes difficult and the material cost is increased, so that the thickness is limited. Further, the width of the lead frame is also limited to secure the insulation distance. Therefore, since the cross-sectional area of the lead frame cannot be sufficiently secured, the lead frame itself also generates heat. However, the surface area of the lead frame is small and the heat radiation from the lead frame is limited.

The heat of the semiconductor chip is transferred to the printed wiring board through the lead frame and radiated into the air from the pattern on the printed wiring board. However, increasing the pattern area of the printed wiring board for heat dissipation may cause an increase in wiring inductance. In addition, the inductance due to the insufficient cross-sectional area of the lead frame cannot be ignored.

If the cross-sectional area and surface area of the lead frame can be increased to improve heat dissipation, the temperature rise of the semiconductor chip and the lead frame can be suppressed. As a result, the pattern area on the printed wiring board can be reduced and the component mounting density on the printed wiring board can be increased. Further, since the temperature rise of the semiconductor device is suppressed, it is possible to reduce the number of heat radiation fins mainly responsible for heat radiation of the semiconductor device. However, when the surface area of the lead frame is widened, the pitch of the lead frame is increased in order to secure the distance between the lead frames, which leads to an increase in the size of the semiconductor device. Therefore, a semiconductor device has been proposed in which the width of a part of the lead frame is increased to improve the heat dissipation and the twisting process is performed so that the insulation distance is widened (for example, refer to Patent Document 1).

JP-A-5-326796

However, since the lead frame is not only bent but also twisted, there is a problem that the semiconductor chip mounted on the lead frame is destroyed and the characteristics are changed.

The present invention has been made to solve the above problems, and an object of the present invention is to improve heat dissipation while ensuring an insulation distance between lead frames and preventing destruction and characteristic changes of a semiconductor chip. A semiconductor device capable of being obtained.

A semiconductor device according to the present invention includes a semiconductor chip, an inner lead on which the semiconductor chip is mounted, and an outer lead formed by bending the inner lead, and a plurality of lead frames arranged side by side. A sealing material that seals the semiconductor chip and the inner leads, and a printed wiring board connected to the outer leads, the outer leads having a width wider than a root portion connected to the inner leads. a wide wide portion, said wide portion the outer lead so as insulation distance spread between the lead frame adjacent the twisting process, the inner lead is sunk with respect to said root portion of said outer leads The wide portion is provided up to the tip of the outer lead and is soldered by penetrating the printed wiring board .

In the present invention, the heat dissipation can be improved by providing the outer lead with the wide portion. Also, by twisting the outer leads, it is possible to secure an insulation distance between the lead frames. Further, since the inner lead is sunk with respect to the root part of the outer lead, it is possible to prevent the semiconductor chip from being broken and the characteristic change due to the stress generated when the outer lead is bent and twisted.

FIG. 3 is a cross-sectional view showing the semiconductor device according to the first embodiment of the present invention. FIG. 3 is a plan view showing a state before lead forming of the semiconductor device according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view showing a state before lead forming of the semiconductor device according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view showing a state of lead forming of the semiconductor device according to the first embodiment of the present invention. FIG. 11 is a plan view showing a state before lead forming of a semiconductor device according to a comparative example. FIG. 6 is a cross-sectional view showing a state before lead forming of a semiconductor device according to a comparative example. FIG. 11 is a cross-sectional view showing a state of lead forming of a semiconductor device according to a comparative example. FIG. 6 is a sectional view showing a semiconductor device according to a second embodiment of the present invention. FIG. 6 is a plan view showing a state before lead forming of the semiconductor device according to the second embodiment of the present invention. FIG. 6 is a cross-sectional view showing a state before lead forming of the semiconductor device according to the second embodiment of the present invention. FIG. 6 is a cross-sectional view showing a state of lead forming of the semiconductor device according to the second embodiment of the present invention. FIG. 6 is a sectional view showing a semiconductor device according to a third embodiment of the present invention. FIG. 9 is a plan view showing a state before lead forming of the semiconductor device according to the third embodiment of the present invention. FIG. 11 is a cross-sectional view showing a state before lead forming of the semiconductor device according to the third embodiment of the present invention. FIG. 11 is a cross-sectional view showing a state of lead forming of the semiconductor device according to the third embodiment of the present invention. It is sectional drawing which shows the semiconductor device which concerns on Embodiment 4 of this invention. It is a side view which shows the semiconductor device which concerns on Embodiment 4 of this invention. FIG. 13 is a plan view showing a state before lead forming of the semiconductor device according to the fourth embodiment of the present invention. FIG. 9 is a cross-sectional view showing a state before lead forming of the semiconductor device according to the fourth embodiment of the present invention. FIG. 11 is a cross-sectional view showing a state of lead forming of the semiconductor device according to the fourth embodiment of the present invention. FIG. 11 is a side view showing a state of lead forming of the semiconductor device according to the fourth embodiment of the present invention. It is sectional drawing which shows the semiconductor device which concerns on Embodiment 5 of this invention. It is a side view which shows the semiconductor device which concerns on Embodiment 5 of this invention. FIG. 11 is a plan view showing a state before lead forming of the semiconductor device according to the fifth embodiment of the present invention. FIG. 13 is a cross-sectional view showing a state before lead forming of the semiconductor device according to the fifth embodiment of the present invention. FIG. 13 is a cross-sectional view showing a state of lead forming of the semiconductor device according to the fifth embodiment of the present invention. FIG. 13 is a side view showing a state of lead forming of the semiconductor device according to the fifth embodiment of the present invention.

A semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals, and repeated description may be omitted.

Embodiment 1.
FIG. 1 is a sectional view showing a semiconductor device according to the first embodiment of the present invention. FIG. 2 is a plan view showing a state before lead forming of the semiconductor device according to the first embodiment of the present invention. FIG. 3 is a sectional view showing a state before lead forming of the semiconductor device according to the first embodiment of the present invention. FIG. 4 is a sectional view showing a state of lead forming of the semiconductor device according to the first embodiment of the present invention.

A plurality of lead frames 1 are arranged side by side. Each lead frame 1 has an inner lead 1a on which the semiconductor chip 2 is mounted, and an outer lead 1b that is formed by bending the inner lead 1a. The semiconductor chip 2 is a power semiconductor element such as MOSFET, SBD, IGBT or PN diode.

A sealing material 3 such as a molding resin completely seals the semiconductor chip 2 and the inner leads 1a. The tip of the outer lead 1b penetrates the printed wiring board 4, and the back surface of the printed wiring board 4 is connected to the outer lead 1b by the solder 5.

As shown in FIG. 2, the punched outer lead 1b has a wide portion 6 wider than the root portion connected to the inner lead 1a. Since the wide portion 6 exists in the space between the adjacent lead frames 1, a sufficient insulating distance cannot be secured between the adjacent lead frames 1.

Therefore, as shown in FIG. 4, the outer lead 1b is twisted so that the insulation distance between the wide portions 6 of the adjacent lead frames 1 is increased. Here, the outer lead 1b is twisted by 90 degrees with respect to the inner lead 1a, but the twist angle is not limited to 90 degrees as long as a sufficient insulation distance can be secured.

The inner lead 1a has a sunk portion 7 that is sunk into the root portion of the outer lead 1b. The semiconductor chip 2 is mounted on the submerged portion 7 of the inner lead 1a.

Next, the effect of this embodiment will be described in comparison with a comparative example. FIG. 5 is a plan view showing a state before lead forming of the semiconductor device according to the comparative example. FIG. 6 is a cross-sectional view showing a state of the semiconductor device according to the comparative example before lead forming. FIG. 7 is a cross-sectional view showing a state of lead forming of a semiconductor device according to a comparative example.

In the comparative example, the wide portion 6 is not provided. In the comparative example as well, the inner leads 1a completely covered with the sealing material 3 can secure the insulation distance, so that the pitch can be reduced. However, it is necessary to take a distance outside the sealing material 3, and it is necessary to punch out between the outer leads 1b to provide a sufficient space. As a result, the size of the device is increased and the pitch of the lead frame is increased. Further, the surface area of the lead frame 1 is small and the heat radiation from the lead frame 1 is limited. Part of the heat generated by the semiconductor chip 2 and the heat generated by the lead frame 1 itself are transmitted to the wiring pattern formed on the printed wiring board 4 through the lead frame 1 and radiated from the wiring pattern to the air. However, increasing the pattern area of the printed wiring board 4 for heat dissipation causes an increase in wiring inductance. In addition, the inductance due to the insufficient cross-sectional area of the lead frame 1 cannot be ignored.

On the other hand, in the present embodiment, by providing the wide portion 6 on the outer lead 1b, the surface area of the lead frame 1 is increased, so that the heat radiation from the lead frame 1 is increased, and the semiconductor chip 2 and the lead frame 1 are increased. The temperature rise can be reduced. Furthermore, the increase in the cross-sectional area of the lead frame 1 reduces the heat generation of the lead frame 1 itself. Therefore, the heat dissipation can be improved without increasing the size of the device and increasing the pitch of the lead frame. Further, by twisting the outer leads 1b, it is possible to secure an insulation distance between the lead frames 1.

Further, the inner lead 1a is sunk with respect to the root portion of the outer lead 1b. As a result, it is possible to prevent the semiconductor chip 2 from being destroyed and its characteristics changed due to the stress generated when the outer lead 1b is bent and twisted.

Further, since the temperature rise of the printed wiring board 4 can be reduced, the density of the components mounted on the printed wiring board 4 can be improved, and the board size can be reduced. As a result, the wiring pattern on the printed wiring board 4 can be made to be only the wiring pattern required for energization, so that the parasitic capacitance or parasitic inductance generated in the wiring pattern can be reduced.

Further, since the wide portion 6 is larger than the through hole of the printed wiring board 4 and has a stopper function, the distance between the printed wiring board 4 and the sealing material 3 can be secured. Therefore, a dedicated stopper or stopper-shaped electrode terminal becomes unnecessary.

Embodiment 2.
FIG. 8 is a sectional view showing a semiconductor device according to the second embodiment of the present invention. FIG. 9 is a plan view showing a state before lead forming of the semiconductor device according to the second embodiment of the present invention. FIG. 10 is a cross-sectional view showing a state before lead forming of the semiconductor device according to the second embodiment of the present invention. FIG. 11 is a sectional view showing a state of lead forming of the semiconductor device according to the second embodiment of the present invention.

In the present embodiment, a constriction 8 is provided at the root of the outer lead 1b, which is the starting point for bending and twisting. As a result, bending and twisting can be performed with a smaller force, so that stress on the semiconductor chip 2 and the sealing material 3 can be relieved. Other configurations and effects are similar to those of the first embodiment.

Embodiment 3.
FIG. 12 is a sectional view showing a semiconductor device according to the third embodiment of the present invention. FIG. 13 is a plan view showing a state before lead forming of the semiconductor device according to the third embodiment of the present invention. FIG. 14 is a sectional view showing a state before lead forming of the semiconductor device according to the third embodiment of the present invention. FIG. 15 is a sectional view showing a state of lead forming of the semiconductor device according to the third embodiment of the present invention.

In the present embodiment, the wide portion 6 is provided up to the tip of the outer lead 1b, and the width of the outer lead 1b is constant. The wide portion 6 penetrates the printed wiring board 4 and is soldered. As a result, the soldering area can be increased, so that heat transfer from the lead frame 1 to the printed wiring board 4 can be improved.

Fourth Embodiment
FIG. 16 is a sectional view showing a semiconductor device according to the fourth embodiment of the present invention. FIG. 17 is a side view showing a semiconductor device according to the fourth embodiment of the present invention. FIG. 18 is a plan view showing a state before lead forming of the semiconductor device according to the fourth embodiment of the present invention. FIG. 19 is a sectional view showing a state before lead forming of the semiconductor device according to the fourth embodiment of the present invention. FIG. 20 is a sectional view showing a state of lead forming of the semiconductor device according to the fourth embodiment of the present invention. FIG. 21 is a side view showing a state of lead forming of the semiconductor device according to the fourth embodiment of the present invention.

In the present embodiment, the tips of the outer leads 1b penetrate the printed wiring board 4 and are connected to the back surface of the printed wiring board 4 by the solder 5. Then, a part of the wide portion 6 is bent and connected to the surface of the printed wiring board 4 by solder 9. As a result, not only the back surface of the printed wiring board 4 but also the front surface thereof can be electrically and thermally coupled to the lead frame 1. Therefore, the heat generated in the semiconductor chip 2 can be efficiently transmitted to the printed wiring board 4. Further, since the wide portion 6 is larger than the through hole of the printed wiring board 4 and has a stopper function as in the first embodiment, the distance between the printed wiring board 4 and the sealing material 3 can be secured.

Embodiment 5.
22 is a sectional view showing a semiconductor device according to the fifth embodiment of the present invention. FIG. 23 is a side view showing a semiconductor device according to the fifth embodiment of the present invention. FIG. 24 is a plan view showing a state before lead forming of the semiconductor device according to the fifth embodiment of the present invention. FIG. 25 is a sectional view showing a state before lead forming of the semiconductor device according to the fifth embodiment of the present invention. FIG. 26 is a sectional view showing a state of lead forming of the semiconductor device according to the fifth embodiment of the present invention. FIG. 27 is a side view showing a state of lead forming of the semiconductor device according to the fifth embodiment of the present invention.

In the present embodiment, the tips of the outer leads 1b are bent and connected to the surface of the printed wiring board 4 by solder 9. As a result, surface mounting becomes possible, and heat transfer from the lead frame 1 to the printed wiring board 4 can be improved.

The semiconductor chip 2 is not limited to one formed of silicon, but may be formed of a wide bandgap semiconductor having a bandgap larger than that of silicon. The wide band gap semiconductor is, for example, silicon carbide, a gallium nitride-based material, or diamond. The semiconductor chip 2 formed of such a wide bandgap semiconductor has high withstand voltage and high allowable current density, and thus can be downsized. By using this miniaturized semiconductor chip 2, the semiconductor device incorporating this semiconductor chip 2 can also be miniaturized. Further, since the semiconductor chip 2 has high heat resistance, the heat radiation fins of the heat sink can be downsized, and the water-cooled portion can be air-cooled, so that the semiconductor device can be further downsized. Moreover, since the power loss of the semiconductor chip 2 is low and the efficiency is high, the efficiency of the semiconductor device can be improved.

1 lead frame, 1a inner lead, 1b outer lead, 2 semiconductor chip, 3 sealing material, 4 printed wiring board, 6 wide part, 7 submerged part, 8 constriction

Claims (7)

A semiconductor chip,
A plurality of lead frames each having an inner lead on which the semiconductor chip is mounted and an outer lead that is bent with respect to the inner lead, and arranged side by side with each other;
A sealing material that seals the semiconductor chip and the inner lead,
A printed wiring board connected to the outer lead,
The outer lead has a wide portion that is wider than a root portion connected to the inner lead,
The outer leads are twisted so that the insulation distance between the wide portions of the adjacent lead frames is increased,
The inner lead is sunk with respect to the root portion of the outer lead ,
The semiconductor device, wherein the wide portion is provided up to the tip of the outer lead and is soldered through the printed wiring board . A semiconductor chip,
A plurality of lead frames each having an inner lead on which the semiconductor chip is mounted and an outer lead that is bent with respect to the inner lead, and arranged side by side with each other;
A sealing material that seals the semiconductor chip and the inner lead,
A printed wiring board connected to the outer lead,
The outer lead has a wide portion that is wider than a root portion connected to the inner lead,
The outer leads are twisted so that the insulation distance between the wide portions of the adjacent lead frames is increased,
The inner lead is sunk with respect to the root portion of the outer lead,
The tip of the outer lead penetrates the printed wiring board and is soldered to the back surface of the printed wiring board,
A semiconductor device, wherein a part of the wide portion is bent and soldered to the surface of the printed wiring board. A semiconductor chip,
A plurality of lead frames each having an inner lead on which the semiconductor chip is mounted and an outer lead that is bent with respect to the inner lead, and arranged side by side with each other;
A sealing material that seals the semiconductor chip and the inner lead,
A printed wiring board connected to the outer lead,
The outer lead has a wide portion that is wider than a root portion connected to the inner lead,
The outer leads are twisted so that the insulation distance between the wide portions of the adjacent lead frames is increased,
The inner lead is sunk with respect to the root portion of the outer lead,
A semiconductor device, wherein the outer leads are bent at their tips and soldered to the printed wiring board. A semiconductor chip,
A plurality of lead frames each having an inner lead on which the semiconductor chip is mounted and an outer lead bent to the inner lead, and arranged side by side with each other;
A sealing material that seals the semiconductor chip and the inner lead,
A printed wiring board connected to the outer lead,
The outer lead has a wide portion that is wider than a root portion connected to the inner lead,
The outer leads are twisted so that the insulation distance between the wide portions of the adjacent lead frames is increased,
A constriction is provided at the base of the outer lead ,
The semiconductor device, wherein the wide portion is provided up to the tip of the outer lead and is soldered through the printed wiring board . A semiconductor chip,
A plurality of lead frames each having an inner lead on which the semiconductor chip is mounted and an outer lead that is bent with respect to the inner lead, and arranged side by side with each other;
A sealing material that seals the semiconductor chip and the inner lead,
A printed wiring board connected to the outer lead,
The outer lead has a wide portion that is wider than a root portion connected to the inner lead,
The outer leads are twisted so that the insulation distance between the wide portions of the adjacent lead frames is increased,
A constriction is provided at the base of the outer lead,
The tip of the outer lead penetrates the printed wiring board and is soldered to the back surface of the printed wiring board,
A semiconductor device, wherein a part of the wide portion is bent and soldered to the surface of the printed wiring board. A semiconductor chip,
A plurality of lead frames each having an inner lead on which the semiconductor chip is mounted and an outer lead that is bent with respect to the inner lead, and arranged side by side with each other;
A sealing material that seals the semiconductor chip and the inner lead,
A printed wiring board connected to the outer lead,
The outer lead has a wide portion that is wider than a root portion connected to the inner lead,
The outer leads are twisted so that the insulation distance between the wide portions of the adjacent lead frames is increased,
A constriction is provided at the base of the outer lead,
A semiconductor device, wherein the outer leads are bent at their tips and soldered to the printed wiring board. The semiconductor chip is a semiconductor device according to any one of claim 1 to 6, characterized in that it is formed by a wide band gap semiconductor.

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