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JP6806526B2 - Printed wiring board - Google Patents
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JP6806526B2 - Printed wiring board - Google Patents

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JP6806526B2
JP6806526B2 JP2016210990A JP2016210990A JP6806526B2 JP 6806526 B2 JP6806526 B2 JP 6806526B2 JP 2016210990 A JP2016210990 A JP 2016210990A JP 2016210990 A JP2016210990 A JP 2016210990A JP 6806526 B2 JP6806526 B2 JP 6806526B2
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wiring
conductor
width
gap
wiring board
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JP2018073955A (en
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清水 範征
範征 清水
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Kyocera Corp
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Kyocera Corp
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Description

本開示は、配線のショート不良が抑制された印刷配線板に関する。 The present disclosure relates to a printed wiring board in which short circuit defects of wiring are suppressed.

基板に配線を形成する方法の1つとして、セミアディティブ法が挙げられる。このセミアディティブ法は、例えば、下記に示す手順(1)〜(5)を含む。
(1)絶縁材料上に無電解銅めっきのシード層を形成する。
(2)ドライフィルムのめっきレジストを形成する。
(3)露光および現像して、導体部以外のめっきレジストを除去する。
(4)めっきレジストを除去した箇所に電解パターン銅めっきで導体を形成して、めっきレジストを剥離する。
(5)シード層の無電解銅めっきをフラッシュエッチングで除去して、配線を形成する。
A semi-additive method is mentioned as one of the methods for forming wiring on a substrate. This semi-additive method includes, for example, steps (1) to (5) shown below.
(1) A seed layer of electroless copper plating is formed on the insulating material.
(2) Form a plating resist for a dry film.
(3) Exposure and development are performed to remove the plating resist other than the conductor portion.
(4) A conductor is formed by electrolytic pattern copper plating at a portion where the plating resist has been removed, and the plating resist is peeled off.
(5) The electroless copper plating of the seed layer is removed by flash etching to form wiring.

配線は、特許文献1に示すように、設計の都合上、基板のランドや部品を実装するためのパッドなどの導体を避けるように、直線部から配線を屈曲させて進行方向を変える場合がある。 As shown in Patent Document 1, for the convenience of design, the wiring may be bent from a straight portion to change the traveling direction so as to avoid conductors such as a land on a board and a pad for mounting a component. ..

実開昭62−190369号公報Jitsukaisho 62-190369 Gazette

本開示の印刷配線板は、基板と、基板に配置されたランドおよびパッドの少なくとも一方を構成する導体と、基板に配置された配線とを含み、前記配線が前記導体を避けるように形成されて、前記導体と配線との間に間隙が設けられており、前記導体それぞれの周囲に設けられている間隙において、前記導体を避けている配線の配線幅よりも狭い部分が2箇所以下であることを特徴とする。 The printed wiring board of the present disclosure includes a substrate, a conductor constituting at least one of a land and a pad arranged on the substrate, and a wiring arranged on the substrate, and the wiring is formed so as to avoid the conductor. , A gap is provided between the conductor and the wiring, and in the gap provided around each of the conductors, there are two or less portions narrower than the wiring width of the wiring avoiding the conductor. It is characterized by.

本開示の印刷配線板の一実施形態を示す説明図である。It is explanatory drawing which shows one Embodiment of the printed wiring board of this disclosure. (a)は本開示の印刷配線板に係る配線の部分の拡大説明図であり、(b)は配線の他の実施形態を示す拡大説明図である。(A) is an enlarged explanatory view of a portion of wiring according to the printed wiring board of the present disclosure, and (b) is an enlarged explanatory view showing another embodiment of wiring. 本開示の印刷配線板の他の実施形態を示す拡大説明図である。It is an enlarged explanatory view which shows the other embodiment of the printed wiring board of this disclosure.

上述のセミアディティブ法を採用して基板に配線を形成する場合、ドライフィルムは、現像や乾燥工程等で、膨潤(現像)や温度変化(特に乾燥前後)によって伸び縮みすることがある。この場合、配線が直線であれば、配線に沿って均等にドライフィルムに収縮力が掛かるため剥がれにくい。しかし、配線のファイン化に伴って、ドライフィルムと絶縁材料との密着面積が狭くなる傾向にある。そのため、配線が屈曲する部分では、屈曲する方向の内側への収縮力しか発生しないので、ドライフィルム剥がれが発生しやすくなる。更に、配線幅と間隙の関係によっては、現像液の液流起因で、ドライフィルム剥がれが発生しやすくなる。ドライフィルムの剥がれが発生すると、ドライフィルム下部の剥がれた隙間に電解パターン銅めっきが潜り込こむ。その結果、配線と近接するランドやパッドなどの導体、または配線同士が誤って接続され、ショート不良が発生する。 When wiring is formed on a substrate by adopting the above-mentioned semi-additive method, the dry film may expand or contract due to swelling (development) or temperature change (particularly before and after drying) in a developing or drying process. In this case, if the wiring is straight, the dry film is evenly contracted along the wiring, so that it is difficult to peel off. However, as the wiring is refined, the contact area between the dry film and the insulating material tends to be narrowed. Therefore, in the portion where the wiring is bent, only an inward contraction force is generated in the bending direction, so that the dry film is likely to be peeled off. Further, depending on the relationship between the wiring width and the gap, the dry film is likely to peel off due to the flow of the developing solution. When the dry film is peeled off, the electrolytic pattern copper plating sneaks into the peeled gap at the bottom of the dry film. As a result, conductors such as lands and pads that are close to the wiring, or wirings are erroneously connected to each other, resulting in a short circuit failure.

本開示の印刷配線板は、基板に配置された配線が、基板に配置された導体を避けるように形成されて、導体と配線との間に間隙が設けられている。この導体それぞれの周囲に設けられている間隙において、配線の配線幅よりも狭い部分が2箇所以下である。したがって、本開示の印刷配線板によれば、配線とランドおよびパッドの少なくとも一方を構成する導体とのショート不良、および周辺部の大規模ショート不良の発生が抑制される。配線と導体との間隙がこのような幅を有しているのは、印刷配線板の製造時において、ドライフィルムの応力が集中する屈曲する箇所において、ドライフィルムと絶縁材料との密着面積を広くしていることに由来する。その結果、ドライフィルム剥がれが抑制され、銅めっきの潜り込みも抑制される。
また、基板に導体としてランドを形成する際、レーザビアのランドでは、レーザの熱の影響でランド周囲の基板の絶縁材料の粗化が進行して、ドライフィルムとの密着性が低下し、ショート不良の発生が起こりやすい傾向がある。そのため、配線と導体との間隙を、上記したように形成すると、絶縁材料の粗化の進行を抑制し、ショート不良の発生を抑制することができる。
In the printed wiring board of the present disclosure, the wiring arranged on the substrate is formed so as to avoid the conductor arranged on the substrate, and a gap is provided between the conductor and the wiring. In the gaps provided around each of the conductors, there are two or less portions narrower than the wiring width of the wiring. Therefore, according to the printed wiring board of the present disclosure, it is possible to suppress the occurrence of short-circuit defects between the wiring and the conductor constituting at least one of the land and the pad, and large-scale short-circuit defects in the peripheral portion. The reason why the gap between the wiring and the conductor has such a width is that when the printed wiring board is manufactured, the contact area between the dry film and the insulating material is widened at the bending point where the stress of the dry film is concentrated. It comes from doing. As a result, the peeling of the dry film is suppressed, and the sneaking of the copper plating is also suppressed.
Further, when forming a land as a conductor on a substrate, in the land of the laser via, the insulating material of the substrate around the land is roughened due to the influence of the heat of the laser, the adhesion with the dry film is lowered, and a short circuit defect Tends to occur easily. Therefore, if the gap between the wiring and the conductor is formed as described above, the progress of roughening of the insulating material can be suppressed and the occurrence of short-circuit defects can be suppressed.

本開示の一実施形態に係る印刷配線板を、図1に基づいて説明する。図1に示すように、印刷配線板10は、基板1と配線2と導体3とを含む。 A printed wiring board according to an embodiment of the present disclosure will be described with reference to FIG. As shown in FIG. 1, the printed wiring board 10 includes a substrate 1, wiring 2, and a conductor 3.

基板1は、絶縁性を有する素材で形成されていれば特に限定されない。絶縁性を有する素材としては、例えば、エポキシ樹脂、ビスマレイミド−トリアジン樹脂、ポリイミド樹脂、ポリフェニレンエーテル樹脂などの有機樹脂などが挙げられる。これらの有機樹脂は2種以上を混合して用いてもよい。絶縁性を有する素材として有機樹脂を使用する場合、有機樹脂に補強材を配合して使用してもよい。補強材としては、例えば、ガラス繊維、ガラス不織布、アラミド不織布、アラミド繊維、ポリエステル繊維などの絶縁性布材が挙げられる。補強材は2種以上を併用してもよい。さらに、絶縁性を有する素材には、シリカ、硫酸バリウム、タルク、クレー、ガラス、炭酸カルシウム、酸化チタンなどの無機充填材が含まれていてもよい。 The substrate 1 is not particularly limited as long as it is made of a material having an insulating property. Examples of the insulating material include organic resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. Two or more kinds of these organic resins may be mixed and used. When an organic resin is used as a material having an insulating property, a reinforcing material may be mixed with the organic resin and used. Examples of the reinforcing material include insulating cloth materials such as glass fiber, glass non-woven fabric, aramid non-woven fabric, aramid fiber, and polyester fiber. Two or more types of reinforcing materials may be used in combination. Further, the insulating material may contain an inorganic filler such as silica, barium sulfate, talc, clay, glass, calcium carbonate and titanium oxide.

基板1は、単層構造を有していてもよく、上記の絶縁性を有する素材で形成された絶縁層が2層以上積層された多層構造を有していてもよい。基板1には、配線2以外に、例えば、電源層(ベタ層)、グランド層(ベタ層)などの導体層(図示せず)が形成されていてもよい。さらに、基板1には、配線を保護するためにソルダーレジスト層(図示せず)が設けられていてもよい。基板1は通常、四角形状を有している。この基板1は縦5mm、横5mmから縦80mm、横80mm程度の大きさであってもよい。 The substrate 1 may have a single-layer structure, or may have a multi-layer structure in which two or more insulating layers formed of the above-mentioned insulating material are laminated. In addition to the wiring 2, the substrate 1 may be formed with, for example, a conductor layer (not shown) such as a power supply layer (solid layer) and a ground layer (solid layer). Further, the substrate 1 may be provided with a solder resist layer (not shown) in order to protect the wiring. The substrate 1 usually has a quadrangular shape. The substrate 1 may have a size of about 5 mm in length and 5 mm in width to 80 mm in length and 80 mm in width.

配線2は、図1に示すように、導体3の周囲に沿ってその一部を囲うように、且つ基板1に配置された導体3を避けるように形成される。配線2と接続される配線20は、導体3を避ける事とは無関係の配線を指す。配線2の幅は、導体3の径との対比や配線のファイン化を考慮すると、配線2の幅の上限は30μmであってもよく、上限が20μmであってもよい。配線2は複数であってもよく、例えば2本1組の並行な双配線であってもよい。 As shown in FIG. 1, the wiring 2 is formed so as to surround a part of the conductor 3 along the periphery thereof and to avoid the conductor 3 arranged on the substrate 1. The wiring 20 connected to the wiring 2 refers to a wiring unrelated to avoiding the conductor 3. The upper limit of the width of the wiring 2 may be 30 μm or 20 μm in consideration of the comparison with the diameter of the conductor 3 and the refinement of the wiring. The number of wirings 2 may be plural, and for example, a pair of two wirings may be double wirings in parallel.

配線2は導体で形成されている。導体としては、例えば銅、アルミニウム、金、銀などが挙げられる。加工性およびコストを考慮して銅を用いるのがよい。配線2は、例えば、化学銅めっき(無電解銅めっき)などの化学(無電解)めっき、電解銅めっきなどの電解めっき、銅箔などの金属箔によって形成される。銅箔などの金属箔上に銅めっきなどのめっきを施すことによって形成されてもよい。 The wiring 2 is made of a conductor. Examples of the conductor include copper, aluminum, gold, silver and the like. Copper should be used in consideration of workability and cost. The wiring 2 is formed of, for example, chemical (electroless) plating such as chemical copper plating (electroless copper plating), electrolytic plating such as electrolytic copper plating, and metal foil such as copper foil. It may be formed by plating a metal foil such as copper foil with copper plating or the like.

導体3は基板1に少なくとも1つ配置され、配線導体と接続するビアランドまたは部品を実装するためのパッドの少なくとも一方を構成し、実装された部品(図示せず)と印刷配線板10とを電気的に接続するものである。この導体3は、例えば銅箔で形成され、径が100μm以下であってもよく、90μm以下であってもよい。導体3の形状は、円形、楕円形、多角形などであってもよい。 At least one conductor 3 is arranged on the substrate 1, constitutes at least one of a vialand or a pad for mounting a component connected to the wiring conductor, and electrically connects the mounted component (not shown) and the printed wiring board 10. It is to connect to the target. The conductor 3 may be formed of, for example, a copper foil and may have a diameter of 100 μm or less, or 90 μm or less. The shape of the conductor 3 may be circular, elliptical, polygonal or the like.

配線2と導体3との間には複数の間隙4が設けられる。間隙4は、配線2に最も近接した導体3の周縁の任意の一箇所から近接する配線2への垂線の幅を意味する。この間隙4が広ければ、ドライフィルムの剥がれが起きにくく、ショート不良を抑制できるが、配線2は基板1の限られたスペースにおいて配設する必要があるため、間隙4を無限に広げることはレイアウト上困難である。そのため、導体3の周囲に設けられる複数の間隙4に関して、導体3を避けている配線2の配線幅21よりも狭い部分を2箇所以下に抑えることで、ドライフィルムの剥がれを起きにくくして、ショート不良を抑制することができる。間隙4のうち、配線幅21より狭い部分の箇所は2箇所以下であれば、1箇所でもよく、無くてもよい。 A plurality of gaps 4 are provided between the wiring 2 and the conductor 3. The gap 4 means the width of a perpendicular line from any one point on the periphery of the conductor 3 closest to the wiring 2 to the wiring 2 adjacent to the wiring 2. If the gap 4 is wide, the dry film is less likely to peel off and short circuit defects can be suppressed. However, since the wiring 2 needs to be arranged in the limited space of the substrate 1, expanding the gap 4 infinitely is a layout. It is difficult to do. Therefore, with respect to the plurality of gaps 4 provided around the conductor 3, the portion narrower than the wiring width 21 of the wiring 2 avoiding the conductor 3 is suppressed to two or less places, so that the dry film is less likely to peel off. Short-circuit defects can be suppressed. Of the gap 4, the portion narrower than the wiring width 21 may or may not be one as long as it is two or less.

図2(a)に矢印で示すように、配線2を導体3の上下にある空間へシフトして、導体3と配線2との間隙4において、配線幅21より広い部分の間隙42を1箇所形成する。このとき、配線幅21よりも狭い部分の間隙41は2箇所形成される。これにより、ドライフィルムの剥がれを起きにくくし、ショート不良を抑制できる。
また、図2(b)に示すように、間隙42が2箇所、間隙41が1箇所となるように、導体3の周囲に設けられる間隙4のうち、配線2に対する間隙42の箇所を増やせば、よりショート不良の抑制が期待できる。
As shown by an arrow in FIG. 2A, the wiring 2 is shifted to the space above and below the conductor 3, and in the gap 4 between the conductor 3 and the wiring 2, there is one gap 42 in a portion wider than the wiring width 21. Form. At this time, two gaps 41 are formed in a portion narrower than the wiring width 21. As a result, peeling of the dry film is less likely to occur, and short-circuit defects can be suppressed.
Further, as shown in FIG. 2B, if the number of gaps 42 with respect to the wiring 2 is increased among the gaps 4 provided around the conductor 3 so that the gaps 42 are two and the gaps 41 are one. , It can be expected to suppress short circuit defects.

間隙41の幅は、配線幅21より狭ければ特に限定されず、30μm以下であってもよく、18μm以下であってもよい。間隙41と配線幅21とが同じ幅であれば、ショート不良は発生しない。間隙42の幅は、配線幅21より広ければ特に限定されない。間隙42を形成し、配線2がシフトする方向に、別の配線(図示せず)がある場合、その配線も配線2と同方向にシフトさせて、配線間でのショート不良を抑制する。配線2と別の配線との間隙は特に限定されないが、配線2の配線幅21以上であるのがよい。 The width of the gap 41 is not particularly limited as long as it is narrower than the wiring width 21, and may be 30 μm or less, or 18 μm or less. If the gap 41 and the wiring width 21 have the same width, a short circuit defect does not occur. The width of the gap 42 is not particularly limited as long as it is wider than the wiring width 21. When a gap 42 is formed and there is another wiring (not shown) in the direction in which the wiring 2 shifts, the wiring is also shifted in the same direction as the wiring 2 to suppress a short circuit defect between the wirings. The gap between the wiring 2 and another wiring is not particularly limited, but the wiring width of the wiring 2 is preferably 21 or more.

(他の実施形態)
図3は本開示の他の実施形態を示している。なお、上述した部材と同じものは同符号を付けて説明を省略する。基板1において、配線2は導体3を囲うように略V字状に配置される。本明細書において、「略V字状」とは略コ字状および略U字状も含有する。
(Other embodiments)
FIG. 3 shows another embodiment of the present disclosure. The same members as those described above are designated by the same reference numerals, and the description thereof will be omitted. On the substrate 1, the wiring 2 is arranged in a substantially V shape so as to surround the conductor 3. In the present specification, the "substantially V-shaped" also includes a substantially U-shaped and a substantially U-shaped.

図3に示すように、配線2のうち導体3を囲う最外の配線23、23の延長線上の交点の角度θは110度以上であってもよく、その上限は180度未満であってもよい。 As shown in FIG. 3, the angle θ of the intersection of the outermost wires 23 and 23 surrounding the conductor 3 of the wiring 2 on the extension line may be 110 degrees or more, and the upper limit thereof may be less than 180 degrees. Good.

以下、実施例を挙げて本開示の印刷配線板を具体的に説明するが、本開示の印刷配線板はこれらの実施例に限定されるものではない。 Hereinafter, the printed wiring board of the present disclosure will be specifically described with reference to examples, but the printed wiring board of the present disclosure is not limited to these examples.

(実施例1)
印刷配線板を、公知のセミアディティブ法により形成した。まず、基板のシード層表面に厚みが25μmのドライフィルム(めっきレジスト)(日立化成社製RDシリーズ)を形成し、露光・現像を行った。次に、導体部分以外のめっきレジストを除去して、配線幅30μmの配線および径95μmのランドとなる導体を電解パターン銅めっきで形成した。このとき、配線は導体およびランドを避けるように形成し、他の配線との間隙も少なくとも配線幅と同じ長さを確保した。導体と近接する配線との間隙のうち、配線幅より狭い箇所は2箇所であった。次に、残ったドライフィルムを剥離し、シード層をフラッシュエッチングで除去した。印刷配線板の製造中において、配線と導体との間においてドライフィルム剥がれは発生しなかった。このようにして、配線と配線が避ける導体との間隙が配線幅(30μm)未満である箇所が、複数の配線と導体との間でそれぞれ2箇所ある印刷配線板を得た。得られた印刷配線板は、配線と導体との間および配線と他の配線との間でショート不良が発生しなかった。
(Example 1)
The printed wiring board was formed by a known semi-additive method. First, a dry film (plating resist) (RD series manufactured by Hitachi Kasei Co., Ltd.) having a thickness of 25 μm was formed on the surface of the seed layer of the substrate, and exposed and developed. Next, the plating resist other than the conductor portion was removed, and a wiring having a wiring width of 30 μm and a conductor having a diameter of 95 μm as a land were formed by electrolytic pattern copper plating. At this time, the wiring was formed so as to avoid the conductor and the land, and the gap between the wiring and the other wiring was secured to be at least the same length as the wiring width. Of the gaps between the conductor and the adjacent wiring, there were two locations narrower than the wiring width. Next, the remaining dry film was peeled off and the seed layer was removed by flash etching. During the manufacture of the printed wiring board, no dry film peeling occurred between the wiring and the conductor. In this way, a printed wiring board was obtained in which the gap between the wiring and the conductor to be avoided by the wiring was less than the wiring width (30 μm) at two locations between the plurality of wirings and the conductor. In the obtained printed wiring board, short-circuit defects did not occur between the wiring and the conductor and between the wiring and other wiring.

(実施例2)
配線の配線幅が18μmとなるように変更した以外は、実施例1と同様の手順で印刷配線板を得た。得られた印刷配線板は、配線と導体との間隙が配線幅(18μm)未満である箇所がそれぞれ2箇所あった。この印刷配線板の製造中において、ドライフィルム剥がれは発生しなかった。得られた印刷配線板は、配線と導体との間でショート不良が発生しなかった。
(Example 2)
A printed wiring board was obtained in the same procedure as in Example 1 except that the wiring width of the wiring was changed to 18 μm. In the obtained printed wiring board, there were two places where the gap between the wiring and the conductor was less than the wiring width (18 μm). During the production of this printed wiring board, the dry film did not peel off. In the obtained printed wiring board, a short circuit defect did not occur between the wiring and the conductor.

(比較例1)
配線の配線幅が20μmとなるように変更した以外は、実施例1、2と同様の手順で印刷配線板を得た。得られた印刷配線板は、配線と導体との間隙が配線の配線幅(20μm)未満である箇所がそれぞれ3箇所であった。印刷配線板の製造中において、ドライフィルムの一部分に剥がれが発生した。その結果、得られた印刷配線板は、一部の配線間および配線と導体との間でショート不良が発生した。
(Comparative Example 1)
A printed wiring board was obtained in the same procedure as in Examples 1 and 2 except that the wiring width of the wiring was changed to 20 μm. In the obtained printed wiring board, there were three places where the gap between the wiring and the conductor was less than the wiring width (20 μm) of the wiring. During the production of the printed wiring board, a part of the dry film was peeled off. As a result, in the obtained printed wiring board, short-circuit defects occurred between some wirings and between the wirings and the conductors.

以上のように、実施例1および2で得られた印刷配線板では、記導体と配線との間に設けられた間隙のうち、導体を避けるように形成された配線の配線幅より狭い部分が2箇所以下となっており、ショート不良が発生しなかった。一方、比較例1で得られた印刷配線板では、配線と導体との間の間隙のうち、配線幅よりも狭い部分が3箇所あり、得られた印刷配線板は、ショート不良が発生した。 As described above, in the printed wiring boards obtained in Examples 1 and 2, the portion of the gap provided between the conductor and the wiring that is narrower than the wiring width of the wiring formed so as to avoid the conductor is There were two or less locations, and no short circuit failure occurred. On the other hand, in the printed wiring board obtained in Comparative Example 1, there were three portions of the gap between the wiring and the conductor narrower than the wiring width, and the obtained printed wiring board had a short circuit defect.

1 基板
2、20、23 配線
21 配線幅
3 導体
4、41、42 間隙
10 印刷配線板
1 Substrate 2, 20, 23 Wiring 21 Wiring width 3 Conductor 4, 41, 42 Gap 10 Printed wiring board

Claims (4)

基板と、
基板に配置されたランドおよびパッドの少なくとも一方を構成する導体と、
前記基板に配置された配線と、を含み、
前記配線、前記導体を迂回して、前記導体との間に間隙を有するように配置されており、
前記間隙前記配線の幅よりも狭い部分が1箇所または、前記配線の幅よりも狭い部分が2箇所であることを特徴とする印刷配線板。
With the board
A conductor forming at least one of the lands and pads disposed on said substrate,
Wherein the wiring disposed on the substrate,
The wiring is to bypass the conductors are arranged to have a gap between said conductors,
The gap is one place narrow portion than the width of the wiring or printed circuit board narrow part than the width of the wiring is characterized in that it is a two places.
前記間隙は、前記配線の幅よりも狭い部分が1箇所と前記配線の幅よりも広い部分が2箇所の構成、または前記配線の幅よりも狭い部分が2箇所と前記配線の幅よりも広い部分が1箇所の構成である請求項1に記載の印刷配線板。 The gap is composed of one portion narrower than the width of the wiring and two portions wider than the width of the wiring, or two portions narrower than the width of the wiring and wider than the width of the wiring. The printed wiring board according to claim 1, wherein the portion is configured in one place . 前記配線が、導体を囲うように略V字状に配置される請求項1または2に記載の印刷配線板。 The printed wiring board according to claim 1 or 2, wherein the wiring is arranged in a substantially V shape so as to surround the conductor. 前記配線は、2本1組の平行な双配線である請求項1〜3のいずれかに記載の印刷配線板。
The printed wiring board according to any one of claims 1 to 3 , wherein the wiring is a pair of parallel dual wirings .
JP2016210990A 2016-10-27 2016-10-27 Printed wiring board Active JP6806526B2 (en)

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