JP6838726B2 - Optical phase-locked loop - Google Patents

Description

The present invention relates to an optical phase-locked loop that synchronizes the optical phase of station emission with the multi-level QAM signal light in an optical multi-level QAM signal receiver that performs optical homodyne phase-locked detection of multi-value QAM signal light of 16 values or more. ..

FIG. 10 shows a configuration example of a conventional optical phase-locked loop for QPSK signal light (Patent Document 1 and Patent Document 2).

10, station output from QPSK signal light and local light source 21 emitting is input to the light receiver 22 including an optical 90-degree hybrid circuit, the differential electrical signals of the I component V _I, V _-I and Q The differential electric signals V _Q and V _−Q of the components are input to the COSTAS circuit 28. The COSTAS circuit 28 detects the phase error component of the local oscillator light V _I, V _-I and V _Q, the V _-Q for QPSK signal light fed back to the local light source 21 via the loop filter 29, QPSK signal The optical frequency is controlled so that the phase error of the local emission with respect to the light becomes zero.

The COSTAS circuit 28 can detect the phase error of the locally oscillated light with respect to the BPSK signal light and the QPSK signal light. For example, in QPSK, ± [pi / 4 transmission information, will be sent using the quaternary phase of ± 3 [pi] / 4, the COSTAS circuit 28, V _I, V _-I and V _Q, the phase of the V _-Q 4 times By doing so, the phase error can be detected in a form that does not depend on the transmission information.

However, in the case of a multi-level QAM signal having 16 or more values, there are signals that depend on transmission information and information that does not depend on the transmission information (true phase error) when the phase is multiplied by 4. For example, in 16QAM, in the IQ space shown in FIG. 11, there are eight signals ● corresponding to specific symbols having a phase of ± π / 4 or ± 3π / 4 and eight signals ○ corresponding to other symbols. Of these, the signal ● corresponding to a specific symbol whose phase is ± π / 4 or ± 3π / 4 becomes π when the phase is multiplied by 4, and the deviation from π can be detected as a phase error, but the signal ○ indicates the phase. Even if it is multiplied by 4 or 8, only the phase error cannot be detected.

As described above, the COSTAS circuit 28 functions as a phase error detector for the BPSK signal light and the QPSK signal light, but cannot function as the phase error detector for the multi-level QAM signal having 16 or more values. On the other hand, now that the Internet has become widespread, the number of modulation methods is increasing in order to expand the communication capacity.

Therefore, in Patent Document 2, as shown in FIG. 11, the specific symbol determination circuit 23 and the extraction circuits 26 and 27 are inserted between the receiver 22 and the COSTAS circuit 28, and the phase is derived from the multi-value QAM signal having 16 or more values. Indicates a configuration in which a signal ● corresponding to a specific symbol of ± π / 4 or ± 3π / 4 is extracted and input to the COSTAS circuit 28.

The specific symbol determination circuit 23 detects the intensity R from the sum of squares of the I component and the Q component of the multi-level QAM signal in the intensity detection circuit 24, and the comparison circuit 25 compares the phase with one or more threshold values by ± π. A control signal corresponding to the appearance timing of a specific symbol of / 4 or ± 3π / 4 is generated. Extraction circuit 26 and 27, V _I output from the photodetector 22 by the control signal, V _-I and V _Q, the V _-Q latched, input to the COSTAS circuit 28. For example, the timing at which the intensity R becomes the threshold value R1 or less is determined and four inner rings of the 16QAM signal are extracted, and the timing at which the intensity R becomes the threshold value R2 (R2> R1) or more is determined and the four outer rings are extracted.

Japanese Unexamined Patent Publication No. 2014-138258 Japanese Unexamined Patent Publication No. 2015-162863

The specific symbol determination circuit 23 described in Patent Document 2 has a configuration in which the intensity is detected from the sum of squares of the I component and the Q component of the multi-value QAM signal to determine the threshold value, and a large number of multi-values accompanying the expansion of communication capacity It was difficult to cope with the increase in the symbol rate. Therefore, there is a need for a method capable of extracting specific symbols having a phase of ± π / 4 or ± 3π / 4 without detecting the intensity of each symbol of the multi-level QAM signal.

The present invention provides an optical phase-locked loop improved from a specific symbol determination circuit that determines the appearance timing of a specific symbol having a phase of ± π / 4 or ± 3π / 4 from a multi-level QAM signal light having 16 or more values. The purpose.

The present invention performs optical homodyne phase synchronous detection using a station emission source that outputs a multi-value QAM signal light having 16 or more values, and outputs a differential electric signal of the I component and a differential electric signal of the Q component. A specific symbol that inputs a light receiver and a differential electric signal of the I component and a differential electric signal of the Q component, and outputs a control signal indicating the appearance timing of a specific symbol having a phase of ± π / 4 or ± 3π / 4. The judgment circuit, the differential electric signal of the I component, the differential electric signal of the Q component, and the control signal are input, the phase error signal in the specific symbol is detected according to the control signal, and the station emission source is detected by this phase error signal. In an optical phase synchronization circuit provided with a phase error control means for controlling the optical frequency of the multi-valued QAM signal light and the optical phase of the station emission, the specific symbol determination circuit is an absolute signal of the differential electric signal of the I component. The first absolute value determination circuit that outputs the first determination signal by the logical calculation of the value and the predetermined threshold, and the second determination by the logical calculation of the absolute value of the differential electric signal of the Q component and the predetermined threshold. It includes a second absolute value determination circuit that outputs a signal, and an extraction control signal generation circuit that outputs as a control signal by logical calculation of the first determination signal and the second determination signal.

In the optical phase-locked loop of the present invention, the extraction control signal generation circuit is set to a value that can detect only the symbol of the minimum amplitude of the multi-valued QAM signal light as a predetermined threshold value, and the first determination signal and the second determination signal are determined. By logical calculation of the signal, the control signal indicating the appearance timing of the specific symbol of the four inner rings having the phase of ± π / 4 or ± 3π / 4 and the minimum amplitude is output.

In the optical phase-locked loop of the present invention, the extraction control signal generation circuit has a multi-value QAM signal light with a multi-value number M of M = 2 ²ⁿ (n is an integer of 2 or more), and a multi-value QAM signal as a predetermined threshold. Set to a value that can detect only the symbol with the maximum amplitude of light, and by logical calculation of the first judgment signal and the second judgment signal, the phase is ± π / 4 or ± 3π / 4 and the four outer rings with the maximum amplitude It is configured to output a control signal indicating the appearance timing of a specific symbol.

In the optical phase synchronization circuit of the present invention, as a predetermined threshold, the amplitude difference between the first threshold value capable of detecting a symbol having an intermediate amplitude or more of the multi-valued QAM signal light and one symbol of the multi-valued QAM signal light from the first threshold value. The first absolute value determination circuit sets the second threshold value as large as possible, and the first absolute value determination circuit is a first absolute value determination circuit that outputs a 1-1 determination signal using the first threshold value, and a second absolute value determination circuit. The second absolute value determination circuit includes the first and second absolute value determination circuits that output the first and second determination signals using the threshold value, and the second absolute value determination circuit uses the first threshold value to output the second determination signal. A control signal generation circuit for extraction, which includes a second absolute value determination circuit that outputs 2-1 and a second absolute value determination circuit that outputs a 2-2 determination signal using a second threshold value. Generates a first intermediate control signal that takes the NOR of the 1-1 judgment signal and the 2-1 judgment signal, and ANDs the 1-2 judgment signal and the 2-2 judgment signal. The second intermediate control signal is generated, the first intermediate control signal and the second intermediate control signal are ANDed, and four specific symbols having a phase of ± π / 4 or ± 3π / 4 and an intermediate amplitude are specified. It is configured to output a control signal indicating the appearance timing of.

The optical phase-locked loop of the present invention determines the absolute value of the differential electric signal of the I component and the differential electric signal of the Q component in the specific symbol determination circuit, and by logical calculation of the determination signal, a large number of 16 values or more. A control signal indicating the appearance timing of a specific symbol having a phase of ± π / 4 or ± 3π / 4 can be generated from the value QAM signal light. By giving this control signal to the phase error control means, it is possible to detect a highly accurate phase error from a specific symbol and use it for phase synchronization control.

It is a figure which shows the structure of Example 1 of the optical phase-locked loop of this invention. It is a figure which shows the operation principle of the specific symbol determination circuit 10A of Example 1. FIG. It is a figure which shows the structure of Example 2 of the optical phase-locked loop of this invention. It is a figure which shows the operation principle of the specific symbol determination circuit 10A of Example 2. It is a figure which shows the structure of Example 3 of the optical phase-locked loop of this invention. It is a figure which shows the operation principle of the specific symbol determination circuit 10B. It is a figure which shows the operation principle of the specific symbol determination circuit 10B. It is a figure which shows the operation principle of the specific symbol determination circuit 10B. It is a figure which shows the structure of Example 4 of the optical phase-locked loop of this invention. It is a figure which shows the structural example of the conventional optical phase-locked loop for QPSK signal light. It is a figure which shows the structural example of the optical phase-locked loop described in Patent Document 2.

(Example 1)
FIG. 1 shows the configuration of the first embodiment of the optical phase-locked loop of the present invention.
In FIG. 1, the station light emitting source 21, the receiver 22, the extraction circuits 26 and 27, the COSTAS circuit 28, and the loop filter 29 are the same as the conventional configuration (configuration of Patent Document 2) shown in FIG. The feature of Example 1 is that a specific symbol having a phase of ± π / 4 or ± 3π / 4 from an M value QAM signal light having a value of 16 or more, 4 points of the inner ring having the minimum amplitude, 4 points of the outer ring having the maximum amplitude, or both of them is used. This is the configuration of the specific symbol determination circuit 10A that generates a control signal for extraction and gives it to the extraction circuits 26 and 27.

Specific symbol decision circuit 10A is the absolute value determination for outputting an exclusive OR E of the differential electrical signals V _I I component output from the photodetector 22, and the A of comparing the V _-I with a threshold V _th B The circuit 11, the absolute value determination circuit 12 that outputs the exclusive logical sum F of C and D comparing the differential electric signals V _Q , V _{−Q of} the Q component and the threshold value V _{th, and the absolute value determination circuit 11} It is composed of an extraction control signal generation circuit 13A that generates a control signal G by either AND or NOR or Ex-NOR of the output E and the output F of the absolute value determination circuit 12. Here, A is V _I -V _th, B is V _th -V _-I, C is V _Q -V _th, D is 1 if it is positive V _th -V _-Q respectively, and 0 if it is negative Become.

FIG. 2 shows the operating principle of the specific symbol determination circuit 10A of the first embodiment.
2, the absolute value determination circuit 11, V _I> + if _{V th A = 1, V I} <+ if _{V th A = 0, V -I} <+ V th (-V I <+ V th, V if _{I> -V th) B = 1} , V -I> + V th (-V I> + V th, and V _I <if -V _th) B = 0, exclusive OR of a and B Output E. In other words, | V _I |> V if _th E = 0, | a <E = 1 if the V _th | V _I.

The absolute value determination circuit 12 has C = 1 if _{V Q} > + V _th , C = 0 if _{V Q} <+ V _{th , V -Q} <+ V _th (-V _Q <+ V _th , V _Q > -V. _{If th} ), then D = 1, V _-Q > + V _th (-V _Q > + V _th , V _Q <-V _th ), then D = 0, and output the exclusive OR F of C and D. .. That is, if | V _Q |> V _th , F = 0, and if | V _Q | <V _th , F = 1.

Extraction control signal generating circuit 13A is set to a value which can detect only the minimum amplitude of the symbols of the M-QAM signal light as a threshold value V _th, by taking the AND of the E and F, the threshold V _th, the -V _th It is possible to generate a control signal G that is inside and has a phase of ± π / 4 or ± 3π / 4 and extracts specific symbols (●) of four inner rings having the minimum amplitude. When extracting the specific symbols of the four inner rings, it is possible ^{to correspond to the M value QAM signal light of M = 2 2n} and M = 2 ^{2n + 1} (n is an integer of 2 or more).

Furthermore, set to a value which can detect only the maximum amplitude of the symbols of the M-QAM signal light as a threshold value V _th, by taking the NOR E and F, the threshold V _th, is outside the -V _th phase ± [pi At / 4 or ± 3π / 4, it is possible to generate a control signal G that extracts a symbol (●) of four outer rings having the maximum amplitude. In the case of M value QAM signal light with M = 2 ^{2n + 1} (n is an integer of 2 or more), the phase of the symbol having the maximum amplitude is not ± π / 4 or ± 3π / 4, so M = 2 ^2n. It is limited to the M value QAM signal light (n is an integer of 2 or more).

In the case of 16QAM signal light, the symbol of the four inner rings having a phase of ± π / 4 or ± 3π / 4 and the minimum amplitude, and the four outer rings having a phase of ± π / 4 or ± 3π / 4 and having the maximum amplitude. symbol extracted so can be separated at one threshold V _th, by taking the Ex-NOR E and F, the threshold V _th, -V _th inner and symbol of the inner ring / outer ring 8 points outside the (●) The control signal G can be generated.

As described above, the specific symbol determination circuit 10A of the first embodiment uses the _{two absolute value determination circuits 11 and 12 for one threshold value V th} , and the extraction control signal generation circuit 13A ANDs E and F, or By taking NOR or Ex-NOR, it is possible to generate a control signal G that extracts a specific symbol having a phase of ± π / 4 or ± 3π / 4 and extracting a specific symbol of the minimum amplitude, the maximum amplitude, or both. Extraction circuit 26 and 27, at the timing when the control signal G becomes 1, V _I, V _-I and V _Q output from the photodetector 22, latches the V _-Q, and inputs the COSTAS circuit 28.

(Example 2)
FIG. 3 shows the configuration of the second embodiment of the optical phase-locked loop of the present invention.
FIG. 3 is the same as that of the first embodiment except that the configurations of the absolute value determination circuits 11'and 12' of the second embodiment are different.

Specific symbol decision circuit 10A is the absolute value judgment that outputs the NOR E of the photodetector differential electrical signals of the I component output from 22 V _I, V _-I with a threshold V _th and the A comparing B ' The circuit 11', the absolute value determination circuit 12'that outputs the negative logical sum F of C and D'comparing _{the differential electric signals V Q} , V _-Q and the threshold V _{th of the Q component, and the absolute value determination circuit.} It is composed of an extraction control signal generation circuit 13A that generates a control signal G by AND, NOR, or Ex-NOR of the output E of 11'and the output F of the absolute value determination circuit 12'. Here, A is V _I −V _th , _{B'is V −I} −V _th , C is V _Q −V _th , and D'is _{1 if V −Q} −V _th is positive, and if it is negative. It becomes 0.

FIG. 4 shows the operating principle of the specific symbol determination circuit 10A of the second embodiment.
4, the absolute value determining circuit 11 ', V _I> + if _{V th A = 1, V I} <+ if _{V th A = 0, V -I} > + V th (-V I> + V th, and V _I <if _{-V th) B '= 1,} V -I <+ V th (-V I <+ V th, V I> if -V _th) B' = 0, a and B ' Negative OR E is output. In other words, | V _I |> V if _th E = 0, | a <E = 1 if the V _th | V _I.

The absolute value determination circuit _12'is C = 1 if _{V Q} > + V th, C = 0 if _{V Q} <+ V _{th , V -Q} > + V _th (-V _Q > + V _th , V _Q <- If V _th ), then D'= 1, if V _-Q <+ V _th (-V _Q <+ V _th , V _Q > -V _th ), then D'= 0, and the NOR of C and D is F. Output. That is, if | V _Q |> V _th , F = 0, and if | V _Q | <V _th , F = 1.

Here, exclusive E in Example 1, and F, negative in the second embodiment disjunction E, F are differential electrical signals V _I I component, as a result of comparison between V _-I with a threshold V _th It has the same logic, and the differential electric signals V _Q , V _{−Q of the} Q component and the threshold value V _th are compared as a result of the same logic. Therefore, the processing in the extraction control signal generation circuit 13A is the same as that in the first embodiment.

It is also possible to use exclusive E in Example 1, the inverted output E of F, F or NOR E in Example 2, F inverted output E,, the F. In this case, it is as follows.

The extraction control signal generation circuit 13A sets the threshold value V _th to a value that can detect only the symbol having the minimum amplitude of the M value QAM signal light, and takes the NORs of E and F _{to obtain the threshold values V th} and −V _th . It is possible to generate a control signal G that is inside and has a phase of ± π / 4 or ± 3π / 4 and extracts specific symbols (●) of four inner rings having the minimum amplitude. When extracting the specific symbols of the four inner rings, it is possible ^{to correspond to the M value QAM signal light of M = 2 2n} and M = 2 ^{2n + 1} (n is an integer of 2 or more).

In addition, the threshold value V _th is set to a value that can detect only the symbol of the maximum amplitude of the M value QAM signal light, and by ANDing E and F , _{it is outside the threshold values V th} and −V _th and the phase is ± π. At / 4 or ± 3π / 4, it is possible to generate a control signal G that extracts a symbol (●) of four outer rings having the maximum amplitude. In the case of M value QAM signal light with M = 2 ^{2n + 1} (n is an integer of 2 or more), the phase of the symbol having the maximum amplitude is not ± π / 4 or ± 3π / 4, so M = 2 ^2n. It is limited to the M value QAM signal light (n is an integer of 2 or more).

In the case of 16QAM signal light, the symbol of the four inner rings having a phase of ± π / 4 or ± 3π / 4 and the minimum amplitude, and the four outer rings having a phase of ± π / 4 or ± 3π / 4 and having the maximum amplitude. symbol extracted so can be separated at one threshold V _th, by taking the Ex-NOR E and F, the threshold V _th, -V _th inner and symbol of the inner ring / outer ring 8 points outside the (●) The control signal G can be generated.

As described above, the specific symbol determination circuits 10A of Examples 1 and 2 use two absolute value determination circuits 11, 12 or 11', 12'for one _{threshold value V th, and the extraction control signal generation circuit 13A.} By taking AND, NOR, Ex-NOR of E and F , or NOR, AND, Ex-NOR of E and F, the phase is ± π / 4 or ± 3π / 4, and the minimum or maximum amplitude or A control signal G that extracts both specific symbols can be generated. Extraction circuit 26 and 27, at the timing when the control signal G becomes 1, V _I, V _-I and V _Q output from the photodetector 22, latches the V _-Q, and inputs the COSTAS circuit 28.

(Example 3)
FIG. 5 shows the configuration of the third embodiment of the optical phase-locked loop of the present invention. Example 3 is a modification of Example 1 shown in FIG. 1, but can be similarly adapted to Example 2 shown in FIG.
In FIG. 5, the station light emitting source 21, the receiver 22, the extraction circuits 26 and 27, the COSTAS circuit 28, and the loop filter 29 are the same as the conventional configuration (configuration of Patent Document 2) and the configuration of Example 1 shown in FIG. is there. The feature of Example 3 is a specific symbol that generates a control signal for extracting four specific symbols having a phase of ± π / 4 or ± 3π / 4 and an intermediate amplitude from M value QAM signal light having 16 or more values. This is the configuration of the determination circuit 10B.

The specific symbol determination circuit 10B uses two threshold values V _th1 and V _th2 . However, V _th1 <V _th2 . Specific symbol decision circuit 10B is the absolute value determination for outputting an exclusive OR E1 of the differential electrical signals V _I I component output from the photodetector 22, and the A of comparing the V _-I with a threshold V _th1 B The circuit 11-1 and the absolute value determination circuit 12-1 that outputs the exclusive logical sum F1 of C and D comparing the differential electric signals V _Q and V _{-Q of} the Q component and the threshold value V _{th1 and the receiver.} differential electrical signal V _I of the I component output from 22, an absolute value determining circuit 11-2 for outputting an exclusive OR E2 of a and B of the comparison between the V _-I with a threshold V _th2, the Q component The absolute value determination circuit 12-2 that outputs the exclusive logical sum F2 of C and D comparing the differential electric signals V _Q , V _-Q and the threshold value V _{th2, and the output E1 of the absolute value determination circuit 11-1.} For extraction, the output F1 of the absolute value determination circuit 12-1 and the output E2 of the absolute value determination circuit 11-2 and the output F2 of the absolute value determination circuit 12-2 are input, and the control signal G3 is generated by a predetermined logical calculation. It is composed of a control signal generation circuit 13B.

6 and 7 show the operating principle of the specific symbol determination circuit 10B.
6, the absolute value determination circuits 11-1 and 11-2, like the absolute value judgment circuit 11 of Example 1, with respect to the threshold value V _th1, | V _I |> if V _th1 E1 = 0 , | V _I | <outputs E1 = 1 if V _th1, against a threshold V _th2, | V _I |> if _{V th2 E2 = 0, | V} I | if <V _th2 E2 = 1 is output.

Similar to the absolute value determination circuit 12 of the first embodiment, the absolute value determination circuits 12-1 and 12-2 have F1 = 0 and | V _Q if | V _Q |> V _{th1 with respect to the threshold value V th1.} If | <V _th1 , F1 = 1 is output, and for the threshold V _th2 , | V _Q |> V _th2 , F2 = 0, | V _Q | <V _th2 , F2 = 1 is output. To do.

The extraction control signal generation circuit 13B is composed of NOR131, AND132, and 133. It is set to a value capable of detecting the intermediate amplitude or symbols M-QAM signal light as a threshold V _th1, by taking the NOR of E1 and F1 in NOR131, outside the four corners of the symbol of the threshold V _th1, -V _th1 (● ) Can be generated as a control signal G1.

In addition, the threshold value V _th2 is set to a value larger than the threshold value V _th1 by the amplitude difference of one symbol of the M value QAM signal light, and by ANDing E2 and F2 with AND132, the inner squares _{of the threshold values V th2} and −V _{th2 are obtained.} The control signal G2 for extracting the symbol (●) of can be generated.

Further, in FIG. 7, by ANDing the control signals G1 and G2 with AND133, specific symbols (●) at four intermediate points sandwiched between the _{threshold values V th1} and −V _th1 and the threshold _{values V th2} and −V _{th2 are extracted.} The control signal G3 can be generated. That is, the control signal G3 is, V _th1 <| a 1 when _{<V th2 | V I | <} V th2 and V _th1 <| V _Q. Extraction circuit 26 and 27, at the timing when the control signal G3 is 1, V _I output from the photodetector 22, V _-I and V _Q, latches the V _-Q, and inputs the COSTAS circuit 28.

Thus, the particular symbol decision circuit 10B of the third embodiment, using the two absolute value determination circuits 11-1 and 12-1 with respect to the threshold value V _th1, the threshold V _th2 to the two absolute value determining circuit 11 By using −2, 12-2 and taking the NOR of E1 and F1, the AND of E2 and F2, and the AND of G1 and G2 in the extraction control signal generation circuit 13B, M = 2 ²ⁿ and M = 2 ^{2n + From} the M value QAM signal light of 1 (n is an integer of 2 or more), the phase is ± π / 4 or ± 3π / 4, and the intermediate amplitude between _{the thresholds V th1} , -V _th1 and the thresholds V _th2 , -V _th2. It is possible to generate a control signal G3 for extracting a specific symbol of.

Further, when the threshold value V _th2 is set to a value capable of detecting only the symbol of the maximum amplitude of the M value QAM signal light, the NORs of the outputs E2 and F2 of the two absolute value determination circuits 11-2 and 12-2 with respect to _{the threshold value V th2 are set.} By combining them, as shown in FIG. 8 (1), it is possible to generate a control signal for extracting the symbols of the middle four points and the outer ring four points. ^{However, in this case, the phase is limited to M = 2 2n} (n is an integer of 2 or more) M value QAM signal light having a phase of ± π / 4 or ± 3π / 4 and a symbol of four outer rings.

Similarly, when the threshold value V _th1 is set to a value that can detect only the symbol having the minimum amplitude of the M value QAM signal light, the outputs E1 and F1 of the two absolute value determination circuits 111-1 and 12-1 with respect to _{the threshold value V th1.} By combining AND, as shown in FIG. 8 (2), it is possible to generate a control signal for extracting symbols of four intermediate points and four inner rings having the minimum amplitude. However, in this case, it can correspond to the M value QAM signal light of ^{M = 2 2n} and M = 2 ^{2n + 1 (n is an integer of 2 or more).}

Furthermore, by using three threshold values and three pairs of absolute value determination circuits, the phase is ± π / 4 or ± 3π / 4, and the sum of the middle 4 points and the maximum amplitude outer ring 4 points or the minimum amplitude inner ring 4 points. A control signal for extracting eight specific symbols can be generated. Further, by increasing the number of pairs of the threshold value and the absolute value determination circuit, it is possible to generate a control signal for extracting a specific symbol having a phase of ± π / 4 or ± 3π / 4 and 8 points or more.

(Example 4)
FIG. 9 shows the configuration of the fourth embodiment of the optical phase-locked loop of the present invention.
The configuration of Example 4 shown in FIG. 9 is a modification of Example 1 shown in FIG. 1, but can be similarly adapted to Example 2 shown in FIG. 3 and Example 3 shown in FIG. ..

In FIG. 9, the feature of the third embodiment is that the extraction circuit 26 is moved between the COSTAS circuit 28 and the loop filter 29, and the COSTAS circuit 28 detects and extracts the phase error for all the symbols of the M value QAM signal light. The circuit 26 extracts the phase error of a specific symbol having a phase of ± π / 4 or ± 3π / 4 from the phase error signal by the control signal G output from the specific symbol determination circuit 10A, and stations the station via the loop filter 29. The optical frequency of the light emitting source 21 is controlled.

10A, 10B Specific symbol judgment circuit 11, 12 Absolute value judgment circuit 13A, 13B Extraction control signal generation circuit 21 Station light emitting source 22 Receiver 23 Specific symbol judgment circuit 24 Strength detection circuit 25 Comparison circuit 26, 27 Extraction circuit 28 COSTAS circuit 29 loop filter

Claims (3)

A receiver that outputs multi-valued QAM signal light of 16 values or more by optical homodyne phase synchronous detection using station emission output from the station emission source and outputs the differential electric signal of the I component and the differential electric signal of the Q component. , The specific symbol determination circuit that inputs the differential electric signal of the I component and the differential electric signal of the Q component and outputs a control signal indicating the appearance timing of the specific symbol having a phase of ± π / 4 or ± 3π / 4. When,
The differential electric signal of the I component, the differential electric signal of the Q component, and the control signal are input, the phase error signal in the specific symbol is detected according to the control signal, and the station is detected by the phase error signal. With a phase error control means that controls the optical frequency of the light emitting source to synchronize the optical phases of the multi-valued QAM signal light and the station emission.
In an optical phase-locked loop equipped with
The specific symbol determination circuit is
A first absolute value determination circuit that outputs a first determination signal by a logical operation of the absolute value of the differential electric signal of the I component and a predetermined threshold value, and
A second absolute value determination circuit that outputs a second determination signal by a logical operation of the absolute value of the differential electric signal of the Q component and the predetermined threshold value, and
An extraction control signal generation circuit that outputs as the control signal by logical operation of the first determination signal and the second determination signal.
With
The extraction control signal generation circuit is set to a value that can detect only the symbol having the minimum amplitude of the multi-valued QAM signal light as the predetermined threshold value, and the logical calculation of the first determination signal and the second determination signal. The optical phase-locked loop is characterized in that it outputs the control signal indicating the appearance timing of the specific symbols of the four inner rings having the minimum amplitude and the phase is ± π / 4 or ± 3π / 4. A receiver that outputs multi-valued QAM signal light of 16 values or more by optical homodyne phase synchronous detection using station emission output from the station emission source and outputs the differential electric signal of the I component and the differential electric signal of the Q component. , The specific symbol determination circuit that inputs the differential electric signal of the I component and the differential electric signal of the Q component and outputs a control signal indicating the appearance timing of the specific symbol having a phase of ± π / 4 or ± 3π / 4. When,
The differential electric signal of the I component, the differential electric signal of the Q component, and the control signal are input, the phase error signal in the specific symbol is detected according to the control signal, and the station is detected by the phase error signal. With a phase error control means that controls the optical frequency of the light emitting source to synchronize the optical phases of the multi-valued QAM signal light and the station emission.
In an optical phase-locked loop equipped with
The specific symbol determination circuit is
A first absolute value determination circuit that outputs a first determination signal by a logical operation of the absolute value of the differential electric signal of the I component and a predetermined threshold value, and
A second absolute value determination circuit that outputs a second determination signal by a logical operation of the absolute value of the differential electric signal of the Q component and the predetermined threshold value, and
An extraction control signal generation circuit that outputs as the control signal by logical operation of the first determination signal and the second determination signal.
With
In the extraction control signal generation circuit, the multi-valued number M of the multi-valued QAM signal light is M = 2 ²ⁿ (n is an integer of 2 or more), and the maximum amplitude of the multi-valued QAM signal light is set as the predetermined threshold value. Set to a value that can detect only the symbol, and by logical calculation of the first judgment signal and the second judgment signal, the specific symbol of the outer ring 4 points having a phase of ± π / 4 or ± 3π / 4 and a maximum amplitude An optical phase-locked loop having a configuration in which the control signal indicating the appearance timing is output. A receiver that outputs multi-valued QAM signal light of 16 values or more by optical homodyne phase synchronous detection using station emission output from the station emission source and outputs the differential electric signal of the I component and the differential electric signal of the Q component. , The specific symbol determination circuit that inputs the differential electric signal of the I component and the differential electric signal of the Q component and outputs a control signal indicating the appearance timing of the specific symbol having a phase of ± π / 4 or ± 3π / 4. When,
The differential electric signal of the I component, the differential electric signal of the Q component, and the control signal are input, the phase error signal in the specific symbol is detected according to the control signal, and the station is detected by the phase error signal. With a phase error control means that controls the optical frequency of the light emitting source to synchronize the optical phases of the multi-valued QAM signal light and the station emission.
In an optical phase-locked loop equipped with
The specific symbol determination circuit is
A first absolute value determination circuit that outputs a first determination signal by a logical operation of the absolute value of the differential electric signal of the I component and a predetermined threshold value, and
A second absolute value determination circuit that outputs a second determination signal by a logical operation of the absolute value of the differential electric signal of the Q component and the predetermined threshold value, and
An extraction control signal generation circuit that outputs as the control signal by logical operation of the first determination signal and the second determination signal.
With
As the predetermined threshold value, a first threshold value capable of detecting a symbol having an intermediate amplitude or more of the multi-valued QAM signal light and a second threshold value larger than the first threshold value by the amplitude difference of one symbol of the multi-valued QAM signal light. Set and
The first absolute value determination circuit is a first absolute value determination circuit that outputs a 1-1 determination signal using the first threshold value, and a first 1-absolute value determination circuit using the second threshold value. It is equipped with a 1-2 absolute value determination circuit that outputs the determination signal of 2.
The second absolute value determination circuit is a second absolute value determination circuit that outputs a second determination signal using the first threshold value, and a second absolute value determination circuit that uses the second threshold value. It is equipped with a 2nd to 2nd absolute value judgment circuit that outputs a judgment signal of 2.
The extraction control signal generation circuit generates a first intermediate control signal obtained by taking the NOR of the 1-1 determination signal and the 2-1 determination signal, and generates the first intermediate control signal with the first and second determination signals. A second intermediate control signal is generated by ANDing the 2-2 determination signal, and the first intermediate control signal and the second intermediate control signal are ANDed, and the phase is ± π / 4 or ± 3π. An optical phase-locked loop having a configuration in which the control signal indicating the appearance timing of four specific symbols having an intermediate amplitude at / 4 is output.

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