JP6864467B2 - Single phase inverter - Google Patents

Description

Embodiments of the present invention relate to single-phase inverters.

In the future, it is expected that demand for single-phase inverters that output AC voltage from DC voltage sources will increase, mainly in high-frequency fields such as non-contact power supply to electric vehicles. When a single-phase inverter is used for such an application, it is considered that inductive interference and radio wave interference due to harmonics contained in the output AC voltage become problems. Conventionally, various countermeasures against such problems due to harmonics have been devised, but all of these countermeasures have been mainly such that the harmonic voltage is removed by the action of a filter. Countermeasures using filters cause problems such as an increase in the size of the device and an increase in cost.

Japanese Unexamined Patent Publication No. 2008-104295 Japanese Unexamined Patent Publication No. 2010-23364

Therefore, we provide a single-phase inverter that can suppress the occurrence of problems due to harmonics while suppressing the increase in size and cost of the device.

The single-phase inverter of the present embodiment includes a plurality of single-phase full-bridge circuits to which a DC voltage supplied from a DC voltage source is input. At least two of the plurality of single-phase full-bridge circuits have different voltage values of the DC voltage supplied to each other. At least two of the plurality of single-phase full-bridge circuits have different firing phases from each other. Each output of a plurality of single-phase full bridge circuits is connected in series in multiple stages. AC voltage is output from both ends of each output connected in series. The plurality of single-phase full-bridge circuits are a first full-bridge circuit, a second full-bridge circuit, a third full-bridge circuit, and a fourth full-bridge circuit, and the first full-bridge circuit and the second full-bridge circuit The voltage value of the DC voltage supplied is the first voltage value Edc1, and the voltage value of the DC voltage supplied to the third full bridge circuit and the fourth full bridge circuit is the first voltage value. Is a different second voltage value Edc2, and the firing phases of the first full-bridge circuit and the second full-bridge circuit are different firing phases from each other, and the third full-bridge circuit and the fourth full-bridge circuit The firing phase of the above is the same firing phase. In this case, the first voltage value Edc1 and the second voltage value Edc1 and the second voltage value Edc1 so that the relationship between the first voltage value Edc1 and the second voltage value Edc2 satisfies the following equation “Edc1: Edc2 = 1: 31/2/2”. The voltage value Edc2 is set. Further, in this case, based on the firing phase of the first full bridge circuit, the firing phase of the second full bridge circuit is delayed by 60 °, and the firing phase of the third full bridge circuit and the fourth full bridge circuit is delayed. The firing phase is delayed by 30 °.

The figure which shows typically the structure of the non-contact power feeding apparatus including the single-phase inverter which concerns on one Embodiment. The figure which shows typically the waveform of the voltage output from each inverter part. The figure which shows typically the voltage waveform of each part of a single-phase inverter and the waveform of the voltage and current appearing on the secondary side of a transformer.

Hereinafter, one embodiment will be described with reference to the drawings.
The single-phase inverter 1 shown in FIG. 1 constitutes a non-contact power feeding device 4 together with a transformer 2 and a low-pass filter 3 (hereinafter, referred to as LPF3). The non-contact power feeding device 4 is used, for example, for the purpose of performing non-contact power feeding to an electric vehicle.

The AC voltage output from the single-phase inverter 1 is applied to the primary winding 2a of the transformer 2. In the present embodiment, the transformation ratio of the transformer 2 is, for example, "1: 1". The AC voltage Ehf output from the secondary winding 2b of the transformer 2 is input to the LPF3. The LPF3 is configured as, for example, an L-type or π-type LC filter composed of an inductor and a capacitor.

The LPF3 is designed to block components of the lowest order or higher of the harmonics contained in the AC voltage Ehf. In this case, although the details will be described later, the minimum order of the harmonics included in the AC voltage Ehf is “11”. Therefore, in the present embodiment, the LPF3 is designed to block harmonic components of the 11th order or higher included in the AC voltage Ehf. The output voltage of LPF3 is supplied to a load (not shown) to be fed.

The single-phase inverter 1 includes a plurality of inverter units INV1 to INV4. The inverter units INV1 to INV4 are all configured as a single-phase full bridge circuit, and convert the input DC voltage into an AC voltage and output it. In the present embodiment, the inverter units INV1, INV2, INV3, and INV4 correspond to the first full bridge circuit, the second full bridge circuit, the third full bridge circuit, and the fourth full bridge circuit, respectively.

The DC voltage of the first voltage value Edc1 supplied from the DC voltage source 5 via the power supply lines 6 and 7 is input to the inverter unit INV1. The DC voltage source 5 is composed of, for example, a voltage source such as a battery or a precharged capacitor. The inverter unit INV1 includes four switches S11 to S14. As the switches S11 to S14, for example, a semiconductor switching element such as a power MOSFET or an IGBT can be used.

A series circuit of switches S11 and S12 and a series circuit of switches S13 and S14 are connected between the power lines 6 and 7. The interconnection node N1 of the switches S11 and S12 serves as an output node on the high potential side of the inverter unit INV1, and the interconnection node N2 of the switches S13 and S14 serves as an output node on the low potential side of the inverter unit INV1.

The DC voltage of the first voltage value Edc1 supplied from the DC voltage source 8 via the power supply lines 9 and 10 is input to the inverter unit INV2. As the DC voltage source 8, the same configuration as that of the DC voltage source 5 can be adopted. The inverter unit INV2 includes four switches S21 to S24. As the switches S21 to S24, the same configuration as that of the switches S11 to S14 can be adopted.

A series circuit of switches S21 and S22 and a series circuit of switches S23 and S24 are connected between the power lines 9 and 10. The interconnection node N3 of the switches S21 and S22 serves as an output node on the high potential side of the inverter unit INV2, and the interconnection node N4 of the switches S23 and S24 serves as an output node on the low potential side of the inverter unit INV2.

The DC voltage of the second voltage value Edc2 supplied from the DC voltage source 11 via the power supply lines 12 and 13 is input to the inverter unit INV3. As the DC voltage source 11, the same configuration as that of the DC voltage source 5 or the like can be adopted. The inverter unit INV3 includes four switches S31 to S34. As the switches S31 to S34, the same configuration as the switches S11 to S14 can be adopted.

A series circuit of switches S31 and S32 and a series circuit of switches S33 and S34 are connected between the power lines 12 and 13. The interconnection node N5 of the switches S31 and S32 serves as an output node on the high potential side of the inverter unit INV3, and the interconnection node N6 of the switches S33 and S34 serves as an output node on the low potential side of the inverter unit INV3.

The DC voltage of the second voltage value Edc2 supplied from the DC voltage source 14 via the power supply lines 15 and 16 is input to the inverter unit INV4. As the DC voltage source 14, the same configuration as that of the DC voltage source 5 or the like can be adopted. The inverter unit INV4 includes four switches S41 to S44. As the switches S41 to S44, the same configuration as the switches S11 to S14 can be adopted.

A series circuit of switches S41 and S42 and a series circuit of switches S43 and S44 are connected between the power lines 15 and 16. The interconnection node N7 of the switches S41 and S42 serves as an output node on the high potential side of the inverter unit INV4, and the interconnection node N8 of the switches S43 and S44 serves as an output node on the low potential side of the inverter unit INV4.

As described above, the inverter units INV1 and INV2 and the inverter units INV3 and INV4 have different DC voltage values supplied to each other. The first voltage value Edc1 which is the voltage value of the DC voltage supplied to the inverter units INV1 and INV2 and the second voltage value Edc2 which is the voltage value of the DC voltage supplied to the inverter units INV3 and INV4 are as follows. The relationship is as shown in equation (1).
^{Edc1: Edc2 = 1: 3 1/2} / 2 ... (1)

The switch control unit 17 controls the on / off of each switch of the inverter units INV1 to INV4. The detailed timing of turning on / off each switch will be described later, but the firing phases of the inverter section INV1 and the inverter section INV2 are different from each other. Further, the firing phases of the inverter section INV3 and the inverter section INV4 are the same firing phase. Further, the firing phases of the inverter section INV1 and the inverter sections INV3 and INV4 are different from each other. Further, the firing phases of the inverter section INV2 and the inverter sections INV3 and INV4 are different from each other.

In the above configuration, the output node N2 on the low potential side of the inverter unit INV1 is connected to the output node N3 on the high potential side of the inverter unit INV2. Further, the output node N4 on the low potential side of the inverter unit INV2 is connected to the output node N5 on the high potential side of the inverter unit INV3. Further, the output node N6 on the low potential side of the inverter unit INV3 is connected to the output node N7 on the high potential side of the inverter unit INV4.

Then, an AC voltage output from between the output node N1 on the high potential side of the inverter unit INV1 and the output node N8 on the low potential side of the inverter unit INV4 is applied to the primary winding 2a of the transformer 2. That is, in the single-phase inverter 1 having the above configuration, the outputs of the inverter units INV1 to INV4 are connected in series in multiple stages, and an AC voltage is output from both ends of the outputs connected in series.

Next, the operation of the above configuration will be described with reference to FIGS. 2 and 3. In FIGS. 2 and 3, the start time of one cycle of the AC voltage output from the single-phase inverter 1 is set to 0 °, and the end time is shown as 360 °. Further, the vertical axis in FIG. 3 shows each voltage divided by the voltage Edc1, that is, each voltage normalized by the voltage Edc1.

[1] Operation of Inverter Unit INV1 The on / off of switches S11 to S14 of the inverter unit INV1 is controlled as follows in one cycle of the AC voltage. That is, from 0 ° to 120 °, the switches S11 and S14 are turned on and the switches S12 and S13 are turned off. Further, at 120 ° to 180 ° and 300 ° to 360 °, all switches S11 to S14 are turned off. Further, at 180 ° to 300 °, the switches S11 and S14 are turned off and the switches S12 and S13 are turned on.

By controlling the switches S11 to S14 as described above, an AC voltage as shown in FIG. 2A appears between the output nodes N1 and N2 of the inverter unit INV1. That is, the AC voltage output from the inverter unit INV1 becomes + Edc1 at 0 ° to 120 °, 0 at 120 ° to 180 °, −Edc1 at 180 ° to 300 °, and 0 at 300 ° to 360 °. ..

[2] Operation of Inverter Unit INV2 The on / off of switches S21 to S24 of the inverter unit INV2 is controlled as follows in one cycle of the AC voltage. That is, at 0 ° to 60 ° and 180 ° to 240 °, all switches S21 to S24 are turned off. Further, at 60 ° to 180 °, the switches S21 and S24 are turned on and the switches S22 and S23 are turned off. Further, at 240 ° to 360 °, the switches S21 and S24 are turned off and the switches S22 and S23 are turned on.

By controlling the switches S21 to S24 as described above, an AC voltage as shown in FIG. 2B appears between the output nodes N3 and N4 of the inverter unit INV2. That is, the AC voltage output from the inverter unit INV2 becomes 0 at 0 ° to 60 °, + Edc1 at 60 ° to 180 °, 0 at 180 ° to 240 °, and −Edc1 at 240 ° to 360 °. ..

[3] Operation of Inverter Unit INV3 The on / off of switches S31 to S34 of the inverter unit INV3 is controlled as follows in one cycle of the AC voltage. That is, at 0 ° to 30 ° and 150 ° to 210 °, all switches S31 to S34 are turned off. Further, at 30 ° to 150 °, the switches S31 and S34 are turned on and the switches S32 and S33 are turned off. Further, at 210 ° to 330 °, the switches S31 and S34 are turned off and the switches S32 and S33 are turned on.

By controlling the switches S31 to S34 as described above, an AC voltage as shown in FIG. 2C appears between the output nodes N5 and N6 of the inverter unit INV3. That is, the AC voltage output from the inverter unit INV3 becomes 0 at 0 ° to 30 °, + Edc2 at 30 ° to 150 °, 0 at 150 ° to 210 °, and −Edc2 at 210 ° to 330 °. It becomes 0 at 330 ° to 360 °.

[4] Operation of Inverter Unit INV4 The on / off of switches S41 to S44 of the inverter unit INV4 is controlled as follows in one cycle of the AC voltage. That is, at 0 ° to 30 ° and 150 ° to 210 °, all switches S41 to S44 are turned off. Further, at 30 ° to 150 °, the switches S41 and S44 are turned on and the switches S42 and S43 are turned off. Further, at 210 ° to 330 °, the switches S41 and S44 are turned off and the switches S42 and S43 are turned on.

By controlling the switches S41 to S44 as described above, an AC voltage as shown in FIG. 2D appears between the output nodes N7 and N8 of the inverter unit INV4. That is, the AC voltage output from the inverter unit INV4 becomes 0 at 0 ° to 30 °, + Edc2 at 30 ° to 150 °, 0 at 150 ° to 210 °, and −Edc2 at 210 ° to 330 °. It becomes 0 at 330 ° to 360 °.

[5] Overall operation When the inverter units INV1 and INV2 perform the above-mentioned operations, a voltage as shown in FIG. 3A appears between the nodes N1 and N4. That is, the voltage Ehf1 between the nodes N1 and N4 is 1 at 0 ° to 60 °, 2 at 60 ° to 120 °, 1 at 120 ° to 180 °, -1 at 180 ° to 240 °, and 240. From ° to 300 °, it becomes -2, and from 300 ° to 360 °, it becomes -1.

Further, when the inverter units INV3 and INV4 perform the above-described operations, a voltage as shown in FIG. 3B appears between the nodes N5 and N8. That is, the voltage Ehf2 between the nodes N5 and N8 becomes 0 at 0 ° to 30 °, 3 ^1/2 at 30 ° to 150 ° (hereinafter referred to as √3), and 0 at 150 ° to 210 °. It is −√3 from 210 ° to 330 ° and 0 from 330 ° to 360 °.

As shown in FIG. 3C, the AC voltage output from the single-phase inverter 1 and the AC voltage Ehf output from the secondary winding 2b of the transformer 2 is a staircase in which the voltage Ehf1 and the voltage Ehf2 are combined. It becomes a wavy waveform. That is, the AC voltage Ehf is 1 from 0 ° to 30 °, 1 + √3 from 30 ° to 60 °, 2 + √3 from 60 ° to 120 °, 1 + √3 from 120 ° to 150 °, and 150. It is 1 from ° to 180 °. The AC voltage Ehf is -1 at 180 ° to 210 °, -1 + √3 at 210 ° to 240 °, -2 + √3 at 240 ° to 300 °, and -1 + √ at 300 ° to 330 °. It becomes 3, and it becomes 1 at 330 ° to 360 °.

Further, the current Ihf flowing through the secondary winding 2b of the transformer 2 becomes a waveform in which the waveform of the AC voltage Ehf is blunted by the action of the LPF3. That is, the current Ihf has a sinusoidal waveform as shown in FIG. 3C.

As described above, the following effects can be obtained according to the present embodiment.
The voltage output from a general single-phase inverter has a rectangular wavy waveform. Such a rectangular wave-shaped output voltage contains a large number of harmonic components. In order to remove such harmonic voltage, a filter having specifications for removing even low-order harmonics is required, which causes problems such as an increase in size of the device and an increase in cost.

Therefore, the single-phase inverter 1 of the present embodiment includes four inverter units INV1 to INV4 having the same configuration as a general single-phase inverter, and DC voltages supplied to each other for at least two of the inverter units INV1 to INV4. In addition to making the voltage values of the inverters different from each other, at least two of the inverter units INV1 to INV4 have different firing phases from each other. The outputs of the four inverter units INV1 to INV4 are connected in series in multiple stages, and an AC voltage is output from both ends of the outputs connected in series.

The AC voltage output from the single-phase inverter 1 having such a configuration is a waveform obtained by combining the output voltages of the inverter units INV1 to INV4 shown in FIGS. It has a stepped waveform as shown in c). Since such a stepped voltage waveform has a waveform closer to a sine wave than a rectangular wave-shaped voltage waveform, the harmonic components contained therein are reduced. Therefore, as the LPF3, a filter that is smaller and cheaper than a filter for removing harmonic components contained in a rectangular wave-shaped voltage can be used. Therefore, according to the present embodiment, it is possible to obtain the effect of suppressing the occurrence of problems due to harmonics while suppressing the increase in size and cost of the device.

The effect of reducing the harmonic component of the AC voltage output from the single-phase inverter 1 is more remarkable as the number of pulses p of the voltage waveform is increased. The number of pulses p corresponds to the number of commutations that do not occur at the same time in one cycle of the AC voltage. The order n of the harmonics included in the AC voltage is expressed by the following equation (2). However, m is a positive integer.
n = p × m ± 1 ... (2)

Further, the amount of harmonics generated in the AC voltage En is expressed by the following equation (3), assuming that the magnitude of the fundamental wave is 1.
En = 1 / n ... (3)

As is clear from the above equation (2), when the pulse number p is 12, the harmonic order n included in the AC voltage is "11, 13, 23, 25, ...", And the fifth and seventh orders are Harmonics are not included. Further, as is clear from the above equation (3), the generated amount En of the fifth and seventh harmonics is larger than the generated amount En of the higher order harmonics.

Therefore, in the present embodiment, the voltage value of the DC voltage supplied to the inverter units INV1 to INV4 and the firing phase of the inverter units INV1 to INV4 are set so that the number of pulses p is 12. Specifically, in the present embodiment, the DC voltage value Edc1 supplied to the inverter units INV1 and INV2 and the DC voltage voltage value Edc2 supplied to the inverter units INV3 and INV4 satisfy the above equation (1). It is set as.

Further, in the present embodiment, the firing phase of the inverter section INV2 is delayed by 60 ° and the firing phase of the inverter sections INV3 and INV4 is delayed by 30 ° with reference to the firing phase of the inverter section INV1. As a result, the number of pulses p of the AC voltage output from the single-phase inverter 1 becomes 12, and the AC voltage does not include the 5th and 7th harmonics. Therefore, the minimum order of the harmonics contained in the AC voltage output from the single-phase inverter 1 is 11th order, and the LPF3 may be 5th order as long as it can block the 11th order harmonic components. A smaller and cheaper filter can be used as compared with a filter capable of blocking the 7th harmonic component.

The single-phase inverter 1 includes four inverter units INV1 to INV4 having the same configuration as a general single-phase inverter, but is configured to obtain a desired output by connecting them in series and in multiple stages. Therefore, the capacity of each inverter unit INV1 to INV4 may be about 1/4 of the capacity of a general single-phase inverter capable of obtaining the same output as that of the single-phase inverter 1. Therefore, according to the present embodiment, the above-mentioned effect of reducing harmonics can be obtained without causing an increase in size of the device and a significant increase in cost as compared with a conventional general single-phase inverter.

In anticipation of the effect of reducing harmonics, it is conceivable to adopt PWM control as the drive control of the switches S11 to S44 of the single-phase inverter 1. However, when PWM control is used, switching loss may increase. Since the single-phase inverter 1 of the present embodiment does not use PWM control, the above-mentioned harmonic reduction effect can be obtained without increasing the switching loss.

(Other embodiments)
The single-phase inverter 1 is not limited to the application of non-contact power supply to the electric vehicle exemplified in the above embodiment, and can be used for various applications such as induction heating. That is, the present invention can be applied to all single-phase inverters that convert a DC voltage into an AC voltage and output it. Therefore, the transformer 2, LPF3, and the like may be provided as needed.

The voltage value of the DC voltage supplied to the inverter units INV1 to INV4 and the firing phase of the inverter units INV1 to INV4 may not be limited to those shown in the above embodiment, and the AC voltage output from the single-phase inverter 1 may be used. The desired stepped waveform, and thus the number of AC voltage pulses, may be appropriately set to be the desired number. That is, the DC voltage supplied to at least two of the inverter units INV1 to INV4 may be set to be different, and at least two of the inverter units INV1 to INV4 may be set to have different firing phases. ..

The inverter units INV3 and INV4 can be replaced with one inverter unit. However, the capacity of the inverter unit to be replaced requires twice the capacity of the inverter units INV3 and INV4. Further, as the voltage value of the DC voltage supplied to the inverter unit, a voltage value (= 3 ^1/2 ) that is twice the voltage value Edc2 of the DC voltage supplied to the inverter units INV3 and INV4 is required.

The single-phase inverter 1 was provided with four single-phase full-bridge circuits (inverter units INV1 to INV4), and each output was connected in series in multiple stages. However, the number of single-phase full-bridge circuits is 2. It may be three or five or more.

Although some embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other embodiments, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are also included in the scope of the invention described in the claims and the equivalent scope thereof.

In the drawing, 1 is a single-phase inverter, 3 is a low-pass filter, 5, 8, 11 and 14 are DC voltage sources, INV1 is an inverter section (single-phase full bridge circuit, first full bridge circuit), and INV2 is an inverter section (single phase). Phase full bridge circuit, second full bridge circuit), INV3 indicates an inverter unit (single phase full bridge circuit, third full bridge circuit), INV4 indicates an inverter unit (single phase full bridge circuit, fourth full bridge circuit).

Claims (3)

A single-phase inverter equipped with a plurality of single-phase full-bridge circuits to which a DC voltage supplied from a DC voltage source is input.
At least two of the plurality of single-phase full-bridge circuits have different voltage values of the DC voltage supplied to each other.
At least two of the plurality of single-phase full-bridge circuits have different firing phases from each other.
Each output of the plurality of single-phase full bridge circuits is connected in series in multiple stages,
AC voltage is output from both ends of each output connected in series .
The plurality of single-phase full-bridge circuits are a first full-bridge circuit, a second full-bridge circuit, a third full-bridge circuit, and a fourth full-bridge circuit.
The voltage value of the DC voltage supplied to the first full bridge circuit and the second full bridge circuit is the first voltage value Edc1.
The voltage value of the DC voltage supplied to the third full bridge circuit and the fourth full bridge circuit is a second voltage value Edc2 different from the first voltage value.
The firing phases of the first full bridge circuit and the second full bridge circuit are different from each other.
The firing phases of the third full bridge circuit and the fourth full bridge circuit are the same firing phase.
The relationship between the first voltage value Edc1 and the second voltage value Edc2 is expressed by the following equation.
^{Edc1: Edc2 = 1: 3 1/2} / 2
The first voltage value Edc1 and the second voltage value Edc2 are set so as to satisfy the above conditions.
With reference to the firing phase of the first full-bridge circuit, the firing phase of the second full-bridge circuit is delayed by 60 °, and the firing phase of the third full-bridge circuit and the fourth full-bridge circuit is 30. ° Single-phase inverter designed to delay. Let n be the order of the harmonics, p be the number of pulses, and m be a positive integer.
The order n of the harmonics included in the AC voltage is the following equation n = p × m ± 1
Assuming that the condition is satisfied and the magnitude of the fundamental wave is 1, the amount of harmonics generated in the AC voltage En is the following equation En = 1 / n.
The single-phase inverter according to claim 1, wherein the voltage value of the DC voltage and the firing phase are set so as to satisfy the above conditions. The single-phase inverter according to claim 1 or 2, further comprising a low-pass filter that blocks components of harmonics having a minimum order or higher included in the AC voltage.

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