JP6903174B2 - A method for a wide range of CCT adjustments along the blackbody line using two independently controlled current channels and three CCTs. - Google Patents

Description

Adjustable white lighting is one of the biggest trends in commercial and home lighting. Adjustable white luminaires can usually change their color and light output level along two independent axes.

An interface current channeling circuit can be used to convert the two current channels of a conventional two-channel driver into three drive currents for three LED arrays. By doing so, the same two-channel driver can be used for applications that simply require two LED arrays or for applications that require three LED arrays.

A more detailed understanding can be obtained from the following description given as an example along with the accompanying drawings.

It is a chromaticity diagram showing a color space. FIG. 5 shows their relationship with different correlated color temperatures (CCTs) and blackbody lines (BBLs) on the chromaticity diagram. FIG. 6 is a block diagram showing hardware used in an adjustable white light engine with a corresponding number of light emitting diode (LED) arrays and driver channels. FIG. 6 is a block diagram showing hardware used in an adjustable white light engine with a larger number of LED arrays than the driver channel. It is a circuit diagram of an interface current channeling circuit. FIG. 5 is a flow chart illustrating a method for providing two stages of linear CCT synchronism in one or more LED arrays.

In the following description, a number of specific details such as specific structures, components, materials, dimensions, processing steps, and techniques are described to provide a complete understanding of this embodiment. However, those skilled in the art will appreciate that embodiments can be implemented without these particular details. In other examples, well-known structures or processing steps are not described in detail to avoid obscuring the embodiments. When an element, such as a layer, region, or substrate, is referred to as being "on" or "over" the other element, it may be directly on top of the other element. It will be understood that there may be elements that can or intervene. In contrast, if one element is referred to as "directly above" or "directly above" another element, it will be understood that there are no intervening elements. Also, if an element is referred to as "beneath", "below", or "under" of another element, it is directly below or just below the other element. It will be understood that there can be or intervening elements in. In contrast, when an element is referred to as "directly below" or "immediately below", there are no intervening elements.

In order not to obscure the presentation of embodiments in the detailed description below, some processing steps or actions known in the art may be combined together for presentation and description purposes. In that example, it may not be explained in detail. In other examples, some processing steps or operations known in the art may not be described at all. Rather, it should be understood that the following description focuses on the characteristic features or elements of the various embodiments described herein.

With reference to FIG. 1, a chromaticity diagram representing a color space is shown. A color space is a three-dimensional space: that is, a color is specified by a set of three numbers that specify the color and brightness of a particular uniform visual stimulus. The three numbers may be the International Commission on Illumination (CIE) coordinates XYZ, or other values such as hue, saturation, and luminance. Based on the fact that the human eye has three different types of color sensitive cones, the eye response is best represented by these three "tristimulus values".

The chromaticity diagram is a color projected in a two-dimensional space ignoring the brightness. For example, the standard CIE XYZ color space projects directly into the corresponding chromaticity space specified by the two chromaticity coordinates known as x and y, as shown in FIG.

Saturation is an objective specification of color quality, regardless of its brightness. Saturation consists of two independent parameters, often specified as hue and chromaticity, the latter alternative called saturation, chroma, intensity, or stimulus purity. The chromaticity diagram may include all colors perceptible to the human eye. The chromaticity diagram is high because the parameters are based on the spectral power distribution (SPD) of the light emitted from the colored object and factored into the sensitivity curve measured for the human eye. Can provide accuracy. Any color can be accurately represented with respect to the two color coordinates x and y.

All colors within a particular region known as the MacAdam ellipse (MAE) 102 may be indistinguishable from the color at the center 104 of the ellipse to the average human eye. The chromaticity diagram can have multiple MAEs. Standard deviation color matching in LED lighting uses deviations from the MAE to describe the color accuracy of the light source.

The chromaticity diagram includes a Blackbody locus (Planckian locus) or a blackbody line (BBL) 106. BBL106 is a path or locus in which the color of a glowing blackbody takes a specific chromaticity space when the temperature of the blackbody changes. It goes from dark red at low temperatures to orange, yellowish white, white, and finally becomes bluish white at very high temperatures. In general, the human eye prefers white spots that are not too far from BBL106. The color dots above the blackbody line are too green, but the dots below are too pink.

One way to produce white light using light emitting diodes (LEDs) can be to additively mix red, green, and blue light. However, this method may require accurate calculation of the mixing ratio so that the resulting color points are on or near BBL106. Another method may be to mix two or more phosphor-converted white LEDs with different correlated color temperatures (CCTs). This method will be described in detail below.

To make an adjustable white light engine, LEDs with two different CCTs at both ends of the desired adjustment range can be used. For example, the first LED may have a CCT of 2700K, which is warm white, and the second LED may have a color temperature of 4000K, which is neutral white. White with a temperature between 2700K and 4000K is a mixture of the power supplied to the first LED through the driver's first channel and the power supplied to the second LED through the driver's second channel. It can be obtained by simply changing the ratio.

Next, with reference to FIG. 2, a diagram showing their relationship to different CCTs and BBL106s is shown. When plotted on a chromaticity diagram, the chromatic points achievable by mixing two LEDs with different CCTs can form a first straight line 202. Assuming that the 2700K and 4000K color points are exactly on the BBL 106, the color point between these two CCTs will be below the BBL 106. This may not be a problem as the maximum distance of points on this line from BBL106 can be relatively small.

However, in practice it is desirable to provide a wider adjustment range of color temperature, for example between 2700K and 6500K, which can be cold white or daylight. If only 2700K LEDs and 6500K LEDs are used for mixing, the first straight line 202 between the two colors can be well below the BBL 106. As shown in FIG. 2, the color point at 4000K can be very far from the BBL 106.

To remedy this, a third channel (4000K) of neutral white LEDs may be added between the two LEDs and a two-step tuning process may be performed. For example, the first step line 204 can be between 2700K and 4000K, and the second step line 206 can be between 4000K and 6500K. It may provide three-step MAE BBL CCT tunability over a wide range of CCTs. A first LED array with a warm white (WW) CCT, a second LED array with a neutral white (NW) CCT, and a third LED array with a bluish white (CW) CCT and A two-stage adjustment process can be used to achieve three-stage MAE BBL CCT synchronism over a wide range of CCTs.

Next, with reference to FIG. 3, a block diagram showing the hardware used in an adjustable white light engine with a corresponding number of LED arrays and driver channels is shown. As mentioned above, the two-channel driver 302 can be used to power two LED arrays having a CCT at the end of the desired adjustment range. The 2-channel driver 302 can be a conventional LED driver known in the art. The two LED arrays can be mounted on the LED board 318. The first channel 304 of the two-channel driver 302 can power the first LED array 306 of the first CCT, and the second channel 308 of the two-channel driver 302 can be the second LED of the second CCT. The array 310 can be powered. The two-channel driver 302 may provide two drive currents to the LED boards 318 via one or more electrical connections 312 such as wires or direct board-to-board connections. One or more electrical connections 312 may be connected to one or more solder points 316.

A 3-channel driver can be used to control the three LED arrays in a similar manner. However, 3-channel drivers can be more complex and expensive than traditional 2-channel drivers. It may be desirable to multiplex the output of the driver to power more LED arrays than channels so that the driver's channel-to-LED array ratio exceeds 1: 1.

Next, with reference to FIG. 4, a block diagram showing the hardware used in an adjustable white light engine with more LED arrays than the driver channel is shown. An interface current channeling circuit can be used to convert the two current channels of the two-channel driver 402 into three drive channels in order to achieve color temperature synchronism close to the two-piece linear BBL 106.

In one embodiment, the interface current channeling circuit may be mounted on a converter printed circuit board (PCB) 404 between the two-channel driver 402 and the LED board 406. The 2-channel driver 302 can be a conventional LED driver known in the art. The interface current channeling circuit allows the two-channel driver 402 to be used for applications that require two LED arrays, and applications that involve three LED arrays. Since the same 2-channel driver 402 can be used in both cases, circuit complexity, size, and cost can be reduced.

FIG. 3 shows an interface channeling circuit that can be used to power three LED arrays using a two-channel driver, but the principle described below is that the driver is more than the number of output channels. It should be noted that it can be applied to any configuration used to power a large number of LED arrays. In addition, although the following description relates to the synchronism of LED arrays with different CCTs, those skilled in the art will appreciate the embodiments described herein in the color ranges, infrared (IR) ranges. , And any desired adjustable range, such as the ultraviolet (UV) range, will be appreciated.

As described in more detail below, the interface current channeling circuit mounted on the converter PCB404 is such that the two-channel driver 402 has two LED arrays at the end of the desired adjustable range and the desired adjustable range. It can power an additional LED array approximately in the center of. A first LED array 408 with a first CCT, a second LED array 410 with a second CCT, and a third LED array 412 with a third CCT can be mounted on the LED board 318. The first channel 412 and the second channel 414 of the two-channel driver 402 may be connected to the PCB 404 by a set of first connections 416 such as wires or direct board-to-board connections. The first channel 412 and the second channel 414 can have positive and negative outputs, respectively.

The converter PCB 404 may supply three drive currents to the LED board 406 with a set of second electrical connections such as wires or direct board-to-board connections 418. The set 418 of the second electrical connection may be connected to one or more solder points 420 on the LED board 406. The set 418 of the second electrical connection may include three separate negative outputs for the first LED array 408, the second LED array 410, and the third LED array 412. The LED + output from the converter PCB 404 can be connected to the positive output of the 2-channel driver 402. The LED + output may be connected to the anode ends of the first LED array 408, the second LED array 410, and the third LED array 412.

Here, the mathematical relationship between the input and output of the interface current channeling circuit is described herein. In the following equation, the first input current can be I1 and the second input current can be I2. Output current, than to warm white (WW) _{I WW} relative LED, _{I NW} relative neutral white (NW) LED, white bluish (CW) LED may be a _{I CW.} The relationship is defined as:
When Il> I2 I _WW = I1-I2, _INW = 2 × I2, _ICW = 0 Equation (1)
Other cases I _WW = 0, I _NW = 2 × I1, _ICW = I2-I1 Equation (2)

If Il> I2, the WW channel can receive current equal to the difference between I1 and I2, and the NWW channel can receive twice as much current as I2. The sum of the I _WW and _{I NW} is still I1 + I2. It should be noted that the actual sum can be slightly less than I1 + I2 as part of the total current is used to power the interface current channeling circuit.

When the current of I1 is 0 and I1 corresponds to the WWLED, all the currents of I2 flow to the CWLED, and no current flows to the WWLED or NWLED. Similarly, when the current of I2 is 0 and 12 corresponds to the CWLED, all the current of I1 flows to the WWLED, and no current flows to the CWLED or NWLED.

Next, with reference to FIG. 5, a circuit diagram of the interface current channeling circuit is shown. Interface current channeling circuits utilize various analog technologies such as voltage sensing, low-pass filters, and analog signal subtraction. All voltages in the figure refer to ground. The converter PCB may use a voltage controlled current source to control the current through the WWLED and CWLED. In addition, the converter PCB may only perform on / off control for the current flowing through the NWLED. WWLEDs and CWLEDs may have a CCT at the end of the desired adjustable range. The NWLED may have a CCT located approximately in the center of the desired adjustable range.

The first input current I1 may be connected to a _{first sense resistor (R s) 502.} Second input current I2 may be connected to the second _R s 504. The first R _s 502 and the second R _s 504 can have the same resistance value. The first diode D1506 can prevent the first input current I1 from being injected into the second input current I2. The second diode D2508 can prevent the second input current I2 from being injected into the first input current I1. The first R _s 502 and the second R _s 504 are connected to the anode of the first LED string 510 containing the WWLED, the second LED string 512 containing the NWLED, and the third LED string 514 containing the CWLED. Obtain, one common terminal V _c may be shared. The voltage at V _a and V _b represents the current flowing through _{the first R s} 502 and the second R _s 504 with the common node component which is the voltage at _{V c.}

As shown in the first calculation circuit 560, _{the voltage at V b} can be attenuated by a resistor divider that includes a first resistor (R1) 516 and a second resistor (R2) 518. The resulting signal can be transmitted through a first lowpass filter (LPF) 520 to generate _{V bb} in the low voltage region. V _bb can be defined as:
V _bb = LPF (V _b × α), equation (3)
Where α is the damping coefficient, which can be defined as:
α = R2 / (R1 + R2), equation (4).

As shown in the second calculation circuit 562, the voltage at _{V a} may be attenuated by a resistive divider comprising a first resistor (R1) 522 and a second resistor (R2) 524. In embodiments, the first resistor (R1) 522 can have the same value as the first resistor (R1) 516 and the second resistor (R2) has the same value as the second resistor (R2) 518. possible. The resulting signal, to produce a V _aa in the low voltage region, may be transmitted through the second LPF526. In one embodiment, the second LPF 526 may perform the same operation as the first LPF 520. _Vaa can be defined as:
V _aa = LPF (V _a x α), equation (5)
Here, α is the damping coefficient defined by the above equation (4).

V _bb may be supplied to a first operational amplifier (op amp) 528 configured to perform subtraction between V _bb and _Vaa. The output of the first operational amplifier 528 can be _{VWW. VWW} is defined as follows:
V _WW = (V _aa −V _bb ) × β, equation (6)
Here, β = R4 / R3, equation (7).

_VWW can also be defined as:
V _WW = (I1-I2) × R _s × α × β, equation (8).

Therefore, the current I _WW can be defined as:
I _WW = V _WW / R = (I1-I2) × α × β × R _s / R Equation (9).

If α × β / R is equal to the value of _{1 / R s , the current I WW} is equal to I1-I2.

The V _aa may be fed to a second op amp 530 configured to perform a subtraction between the V _aa and the V _bb. The output of the second operational amplifier 530 can be _{VCW. VCW} can be defined as:
V _CW = (V _bb −V _aa ) × β, equation (10)
Here, β is defined by the equation (7). In one embodiment, R3 and R4 may have the same value in the first calculation circuit 560 and the second calculation circuit 562.

_VCW can also be defined as:
_VCW = (I _2- I ₁ ) × R _s × α × β equation (11).

Therefore, the current I _WW can be defined as:
l _CW = V _CW / R = (I _2- I ₁ ) × α × β × R _s / R equation (12)

If α × β / R is equal to the value of _{1 / R s , the current ICW} is equal to _{I 2-} I _1.

The _VWW can be supplied to a voltage controlled current source that can be implemented in the first amplifier (amplifier) 536. The first amplifier 536 may output _{a voltage V g1.} The voltage V _g1 may be input to the first transistor M1 used to provide the drive current for the first LED string 510. The first transistor M1 can be a conventional metal oxide semiconductor field effect transistor (MOSFET). The first transistor M1 can be an n-channel MOSFET.

The first amplifier 536 may adjust the closed-loop voltage _Vg1 so that the current flowing through the first transistor M1 is _{equal to VWW} / _RS. The inputs to the first amplifier 536 can be very close to each other in closed loop control. The first amplifier 536 _may compare the detected voltage across _R s 564 the value of _{V WW} at the source of the first transistor Ml. R _s 564 may have the same resistance value as the first R _s 502 and / or the second R _{s 504.} If the detection voltage is _{lower than VWW} , the first amplifier 536 can increase the current of the first transistor M1 until the _{detection voltage is approximately equal to VWW.} Similarly, if the detection voltage is _{higher than VWW} , the first amplifier 536 can _{reduce Vg1} , which can reduce the current of the first transistor M1.

The _VCW can be supplied to a voltage controlled current source that can be implemented in the second amplifier 538. The second amplifier 538 may output _{a voltage V g2.} The voltage _Vg2 may be input to the third transistor M3 used to provide the drive current for the third LED string 514. The third transistor M3 can be a conventional metal oxide semiconductor field effect transistor (MOSFET). The third transistor M3 can be an n-channel MOSFET.

The second amplifier 538, so that the current flowing through the third transistor M3 is equal to _V CW / _{R s,} obtained by adjusting the voltage _{V g2} of the closed loop (Regulate). The inputs to the second amplifier 538 can be very close to each other in closed loop regulation. The second amplifier _538, the value of _{V CW,} can be compared to detect the voltage across _R s 566 at the source of the third transistor M3. R _s 566 may have the same resistance value as the first R _s 502 and / or the second R _{s 504.} When the detected voltage is lower than V _CW, the second amplifier 538 may increase the V _g2 so as to increase the current of the third transistor M3 to the detection voltage is substantially equal to V _CW. Similarly, if the detected voltage is higher than _{V CW,} the second amplifier _538, obtained by reducing _{V g2,} which may decrease the current of the third transistor M3.

The output of the first amplifier 536 and the output of the second amplifier 538 may be clamped to zero if the difference between the inputs is negative.

The second transistor M2 can control the power to the second LED string 512. The second transistor M2 can be a conventional metal oxide semiconductor field effect transistor (MOSFET). The second transistor M2 can be an n-channel MOSFET. The second transistor M2 can only be turned on when both the first input current I1 and the second input current I2 are regulated. The second transistor M2 may have a pull-up resistor (R7) 544 associated with _{V c.} The pull-up resistor (R7) 544 can be tied to _{node V c} because the low voltage supply section VDD may not be available at startup. As a result, the first transistor M1 and the third transistor M3 are turned off. If the second transistor M2, which supplies the drive current for the second LED string 512, is also off, the entire circuit appears as an open circuit to the current source. This can trigger open circuit protection and lead to a non-start condition. By tying the gate of M2 to node V _c, to provide the available current paths at startup.

The current generated by the voltage control current source for the first LED string 510 and the third LED string 514 may be slightly greater than the absolute value of (I1-I2). This can ensure that the second LED string 512 is off when either I1 or I2 carries zero current. In other words, only one string of LEDs at any endpoint in the desired adjustment range can be turned on at a time.

The AND logic of the switching transistor can be realized by the gate control block 532. The gate control block 532 is used when the output (V _g1 ) of the first amplifier 536 and the output (V _g2 ) of the second amplifier 538 in the voltage control current source cannot maintain the regulation. Take advantage of the fact that you can swing to the power rail (VDD). VDD can be selected so that _{the voltages V g1} and V _g2 are significantly lower than VDD when the first amplifier 536 and the second amplifier 538 are tuned under all operating conditions.

V _g1 can be attenuated by a resistor divider containing a first resistor (R5) 540 and a second resistor (R6) 542 and then fed to the REF input of the first shunt regulator 570. V _g2 can be attenuated by a resistor divider containing a first resistor (R5) 574 and a second resistor (R6) 576 and then fed to the REF input of the second shunt regulator 572. In one embodiment, the first resistor (R5) 540 and a second resistor (R6) 542 _can be a same value as the first resistor (R5) 574 and a second resistor (R6) 576 of _{V g2} .. The first shunt regulator 570 and the second shunt regulator 572 may have an internal reference voltage of 2.5V. If the voltage applied to those REF nodes is higher than 2.5V, the first shunt regulator 570 and the second shunt regulator 572 can carry large currents. If the voltage applied to those REF nodes is less than 2.5V, the first shunt regulator 570 and the second shunt regulator 572 can carry a very small quiescent current.

A large sinking current can reduce the gate voltage of the second transistor M2 to a level below its threshold, which can turn off the second transistor M2. The first shunt regulator 570 and the second shunt regulator 572 are unable to pull their cathodes out _{of the V f of the diode under their REF node.} Therefore, the second transistor M2 may have a threshold voltage higher than 2V. Alternatively, a shunt regulator with a lower internal reference voltage, such as 1.5V, may be used.

When V _g1 and V _g2 are maximal near 3V, VDD can be set to 5V and the attenuation coefficient α can be set to 0.6. When the first amplifier 536 and the second amplifier 538 are adjusted, the voltage appearing at the REF node of the shunt regulator is up to 1.8V, the shunt regulator draws the minimum current, and the gate of the second transistor M2 is VDD. It is pulled high toward. If either the first amplifier 536 or the second amplifier 538 is out of the tuning range, the shunt regulator may turn off the NMOS.

The well-known structure and processing steps shown in FIG. 5, including one or more resistors, diodes, and capacitors, are used to avoid obscuring the embodiments described herein. Please note that it is not explained in detail.

Next, with reference to FIG. 6, a flowchart showing a method for providing two-stage linear CCT synchronism in one or more LED arrays is shown. In step 602, the first input current I1 can be received from the first channel 412 of the 2-channel LED driver 402. In step 604, the second input current I2 can be received from the second channel 414 of the two-channel LED driver 402. In step 606, the ratio of the first input current I1 to the second input current I2 can be determined. In step 608, the first input current I1 and the second input current I2 can be converted into a first output current, a second output current, and a third output current based on the ratio. In step 610, the first output current can be supplied to the first LED array 510 having the CCT approximately at the end of the desired CCT range, and the second output current is approximately opposite to the desired CCT range. A third LED array 516 with a CCT at the end can be fed and a third output current can be fed to a third LED array 514 with a CCT approximately in the middle of the desired CCT range.

The method shown in FIG. 6 can be performed by an interface current channeling circuit. The interface current channeling circuit may include a first sense resistor 502 to sense the first input voltage from the first input current I2 from the first channel 412 of the two channel LED driver 402. The second sense resistor 504 can sense the second input voltage of the second input current I2 from the second channel 414 of the two-channel LED driver 402. The first sense resistor 502 and the second sense resistor 504 are associated with the common node V _c . The first calculation circuit 560 subtracts the second input voltage from the first input voltage to generate the first output voltage, and the first LED having the CCT at substantially the end of the desired CCT range. It may be configured to power the array 510. The second calculation circuit 562 subtracts the first input voltage from the second input voltage to generate a second output voltage, having a CCT at a substantially opposite end of the desired CCT range. It may be configured to power the LED array 512 of 2. The gate control block 532 produces a third output voltage and has a CCT approximately in the center of the desired CCT range when both the first input current I1 and the second input current I2 are regulated. It may be configured to power the LED array 514 of 3.

Although the features and elements are described above in a particular combination, one of ordinary skill in the art will appreciate that each feature or element can be used alone or in any combination with other features and elements. .. In addition, the methods described herein may be implemented in a computer program, software, or firmware embedded in a computer-readable medium for execution by a computer or processor. Examples of computer-readable media include electronic signals (transmitted over a wired or wireless connection) and computer-readable storage media. Examples of computer-readable storage media include read-only memory (ROM), random access memory (RAM), registers, cache memory, semiconductor memory devices, internal hard disks and magnetic media such as removable disks, optical magnetic media, and CD-ROMs. It includes, but is not limited to, optical media such as discs and digital versatile discs.

Claims (17)

With a first input terminal configured to receive a first input current having a first current level from a first current channel;
With a second input terminal configured to receive a second input current with a second current level from the second current channel;
A first having a level equal to the first current level minus the first current level under the first condition where the first current level is greater than the second current level, otherwise equal to zero. With a first current generator configured to supply drive current;
A level equal to twice the second current level under the second condition where the first current level is greater than the second current level, otherwise equal to twice the first current level. With a second current generator configured to supply a second drive current with;
A third having a level equal to zero under a third condition where the first current level is greater than the second current level, otherwise equal to the first current level minus the second current level. With a controller configured to supply drive current;
Have,
circuit. It has a first input terminal and a second input terminal, and further has a circuit board on which the first current generator, the second current generator, and the controller are arranged.
The circuit according to claim 1. The first current generator is at least:
With a first circuit that is electrically coupled to receive a first input voltage based on the first input current and to supply a first output voltage based on the first input voltage;
With a first voltage control current source that receives the first output voltage and is electrically coupled to supply the first drive current based on the level of the first output voltage;
Have,
The circuit according to claim 1. The second current generator is at least:
With a second circuit that is electrically coupled to receive a second input voltage based on the second input current and to supply a second output voltage based on the second input voltage;
With a second voltage control current source that receives the second output voltage and is electrically coupled to supply the second drive current based on the level of the second output voltage;
Have,
The circuit according to claim 3. The controller supplies the third drive current having a level based on the levels of the first and second input voltages, provided that both the first and second input current levels are greater than zero. Configured to
The circuit according to claim 4. The controller has a switch and gate control logic that turns the switch on in response to the condition that both the first and second input current levels are greater than zero. It is configured to turn off the switch in other cases.
The circuit according to claim 1. Light Emitting Diode (LED) Lighting System:
With an LED array configured to emit light with a first correlated color temperature (CCT) at the first end of the first range;
With a second LED array configured to emit light with a second CCT at the second end of the first range;
With a third LED array configured to emit light having a third CCT in the range between the first CCT and the second CCT;
A two-channel LED driver having two output terminals, and a two-channel LED driver configured to supply a separate drive current in each of the two output terminals;
Two input terminals, each of which is electrically coupled to the respective output terminals of the two output terminals of the two-channel LED driver, the two input terminals and the three outputs. Terminals, each of the three output terminals being separate for each of the first, second, and third LED arrays via their respective first, second, and third drive channels. A converter circuit having three output terminals that are electrically coupled to the respective LED arrays of the first, second, and third LED arrays so as to supply the drive current of the above. :
The level of the second input voltage based on the second drive current of the two-channel LED driver is subtracted by being electrically coupled so as to receive the first input voltage based on the first drive current of the two-channel LED driver. With a first computing circuit configured to supply a first output voltage having a level equal to the level of the first input voltage;
To supply a second output voltage that is electrically coupled to receive the second input voltage and has a level equal to the level of the second input voltage minus the level of the first input voltage. Consists of a second computational circuit;
With a first current generator configured to generate a first drive current having a level based on said level of said first output voltage;
With a second current generator configured to generate a second drive current having a level based on said level of said second output voltage;
A third drive current having a level based on the level of the first and second input voltages is supplied provided that both the levels of the first and second drive currents are greater than zero. With the control circuit to be configured;
With converter circuits, including;
Has a system. With at least the first circuit board on which the first, second, and third LED arrays are arranged;
With the second circuit board on which the converter circuit is arranged;
Have more,
The system according to claim 7. The first CCT corresponds to warm white light, the second CCT corresponds to cold white light, and the third CCT corresponds to daylight white light.
The system according to claim 7. The first, second, and third drive currents control the combined light output of the system over an adjustable range of 2700K to 6500K. Adjust the brightness of the light output of each LED array of the 3 LED arrays,
The system according to claim 7. The first calculation circuit is:
With a first partition resistor configured to attenuate the first input voltage;
With a first low-pass filter configured to filter the attenuated first input voltage;
With the first operational amplifier;
Have,
The system according to claim 7. The second calculation circuit is:
With a second split resistor configured to attenuate the first input voltage;
With a second low-pass filter configured to filter the attenuated first input voltage;
With the second operational amplifier;
Have,
The system according to claim 7. The first calculation circuit is configured to reduce the first output voltage to substantially zero under the condition that the difference between the first input voltage and the second input voltage is negative. ,
The system according to claim 7. The second calculation circuit is configured to reduce the second output voltage to substantially zero under the condition that the difference between the second input voltage and the first input voltage is negative. ,
The system according to claim 7. A two-channel LED driver having two output terminals, and a two-channel LED driver configured to supply a separate drive current in each of the two output terminals;
Two input terminals, each of which is electrically coupled to the respective output terminals of the two output terminals of the two-channel LED driver, the two input terminals and the three outputs. A converter circuit comprising a terminal, each of the three output terminals configured to supply separate LED drive currents, the two inputs of the converter circuit. The first input terminal of the terminals is configured to receive a first current having a first current level from the first output terminal of the two output terminals of the two channel LED driver. The second input terminal of the two input terminals of the converter circuit draws a second current having a second current level from the second output terminal of the two output terminals of the two-channel LED driver. Configured to receive, said converter circuit further:
A first drive current having a level equal to the first current level minus the first current level under conditions where the first current level is greater than the second current level, otherwise equal to zero. With a first current generator configured to supply;
A second having a level equal to twice the second current level under conditions where the first current level is greater than the second current level, and otherwise equal to twice the first current level. With a second current generator configured to supply the drive current of
A third drive current having a level equal to zero under the condition that the first current level is greater than the second current level, otherwise equal to the first current level minus the second current level. With a controller configured to supply;
With converter circuits, including;
Have,
device. It has a first input terminal and a second input terminal, and further has a circuit board on which the first current generator, the second current generator, and the controller are arranged.
The device of claim 15. The converter circuit is:
Wherein the first electrically coupled to receive a first input voltage based on the driving current of two-channel LED driver, pulling level of the second input voltage based on the second driving current of the two-channel LED driver the With a first computing circuit configured to supply a first output voltage having a level equal to the level of the first input voltage;
To supply a second output voltage that is electrically coupled to receive the second input voltage and has a level equal to the level of the second input voltage minus the level of the first input voltage. Consists of a second computational circuit;
With a first current generator configured to generate a first drive current having a level based on said level of said first output voltage;
With a second current generator configured to generate a second drive current having a level based on said level of said second output voltage;
To supply a third drive current having a level based on the level of the first and second input voltages provided that both the levels of the first and second drive currents are greater than zero. With the control circuit to be configured;
Have,
The device of claim 15.

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