JP6924943B2 - Film formation method and film deposition equipment - Google Patents

Description

Various aspects and embodiments of the present invention relate to film forming methods and film forming devices.

In recent years, the development of organic electronic devices such as thin displays using organic EL (Electro Luminescence) elements, which are light emitting elements, has been promoted, and the application of thin film transistors (TFTs) as drive systems for organic EL elements is being considered. Has been done. An oxide semiconductor composed of indium (In), gallium (Ga), and zinc (Zn), so-called IGZO, is used as the TFT channel from the viewpoint of high electron mobility and low power consumption. IGZO has relatively high electron mobility even in the amorphous state. Therefore, by using an oxide semiconductor such as IGZO for the TFT channel, high-speed switching operation can be realized.

Further, in the TFT, a protective film such as a silicon nitride (SiN) film is formed in order to protect the channel from ions and moisture in the outside world. When a SiN film is formed by plasma CVD (Chemical Vapor Deposition), silane (SiH4) and ammonia (NH3) are often used as raw material gases. When silane and ammonia are used as raw material gases, it is said that a reduction reaction occurs due to hydrogen (H) radicals and H ions during film formation, causing desorption of oxygen atoms from the oxide semiconductor. Further, the H atom incorporated into the SiN film reacts with the oxygen (O) atom in the oxide semiconductor constituting the channel due to external factors such as the passage of time, light irradiation, and temperature change, and the oxide semiconductor. Is said to cause the elimination of O atoms. As a result, the characteristics of the oxide semiconductor are deteriorated, and the characteristics of the TFT are deteriorated.

In order to prevent this, a SiN film is formed as a protective film on the oxide semiconductor by using silicon chloride (SiCl4) gas or silicon fluoride (SiF4) gas and a nitrogen (N) -containing gas containing no H atom. The technique of filming is known. As a result, since H atoms do not exist in the protective film, deterioration of the characteristics of the oxide semiconductor can be suppressed.

JP 2015-12131

By the way, in a TFT, if a protective film is formed in a state where the temperature of the substrate of the TFT is not properly adjusted, the bonds between the atoms constituting the protective film are weakened, and the film quality such as the film density of the protective film is deteriorated. I have something to do. When the quality of the protective film deteriorates, the number of gaps through which H atoms pass increases. As a result, the barrier property of the protective film against H atoms may be impaired. Therefore, it is expected to improve the film quality of the protective film and provide a protective film having a high barrier property against H atoms.

The disclosed film forming method is, in one embodiment, a method for forming a protective film that protects an oxide semiconductor formed on a substrate, and the substrate or the oxidation before the oxide semiconductor is formed. In the first carry-in step of carrying the substrate into the processing container after the product semiconductor is formed, and in a state where the substrate carried into the processing container is heated to a temperature of 250 ° C. or higher, SiC4 gas and SiCl4 gas are used. The first film forming step of forming the protective film by plasma of a mixed gas containing SiF4 gas and a processing gas containing at least one of a nitrogen atom and an oxygen atom and not containing a hydrogen atom is included. ..

According to one aspect of the film forming method disclosed, it is possible to provide a protective film having a high barrier property against H atoms.

FIG. 1 is a schematic cross-sectional view showing an example of the configuration of the film forming apparatus according to the present embodiment. FIG. 2 is a cross-sectional view showing an example of the structure of the TFT. FIG. 3 is a cross-sectional view showing an example of the configuration of an organic electronic device to which a TFT is applied. FIG. 4 is a flowchart showing an example of the film forming procedure of the gate insulating layer and the passivation layer. FIG. 5 is a diagram showing a measurement result of the relationship between the temperature of the substrate during the film formation of the silicon oxide film and the film density of the silicon oxide film after the film formation. FIG. 6 is a diagram showing a measurement result of the relationship between the temperature of the substrate during the film formation of the silicon oxide film and the WERR of the silicon oxide film after the film formation. FIG. 7 is a diagram showing a measurement result of the relationship between the temperature of the substrate during the film formation of the silicon nitride film and the film density of the silicon nitride film after the film formation. FIG. 8 is a diagram showing a measurement result of the relationship between the temperature of the substrate during the film formation of the silicon nitride film and the WERR of the silicon nitride film after the film formation. FIG. 9 is a diagram showing the measurement result of the fluctuation amount of the threshold voltage of the TFT by the PBTS method. FIG. 10 is a diagram for explaining the verification result of the barrier property of the protective film using the μ-PCD method. FIG. 11 is a flowchart showing an example of the film forming procedure of the gate insulating layer, the passivation layer and the sealing film. FIG. 12 is a cross-sectional view showing another example of the structure of the TFT. FIG. 13 is a cross-sectional view showing an example of the configuration of a top gate type TFT.

Hereinafter, embodiments of the film forming method and the film forming apparatus disclosed in the present application will be described in detail with reference to the drawings. In each drawing, the same or corresponding parts are designated by the same reference numerals.

[Structure of film forming apparatus 10]
First, the configuration of the film forming apparatus 10 according to the present embodiment will be described. FIG. 1 is a schematic cross-sectional view showing an example of the configuration of the film forming apparatus 10 according to the present embodiment. The film forming apparatus 10 according to the present embodiment is an inductively coupled plasma chemical vapor deposition (ICP-CVD) apparatus. In FIG. 1, the film forming apparatus 10 has a processing container 11 having a substantially rectangular parallelepiped shape. In the processing container 11, a mounting table 12 for mounting the substrate S on the upper surface is arranged. A temperature control mechanism (not shown) is provided in the mounting table 12, and the temperature of the substrate S mounted on the mounting table 12 is controlled to a predetermined temperature by the temperature control mechanism.

The substrate S is, for example, a glass substrate or a plastic substrate used for an FPD (Flat Panel Display), a sheet display, or the like. A window member 14 constituting the ceiling portion of the processing container 11 is provided on the upper portion of the processing container 11, and the antenna 13 is provided on the window member 14 so as to face the mounting table 12 inside the processing container 11. Is placed. The window member 14 is made of, for example, a dielectric or the like, and partitions the inside and the outside of the processing container 11. The window member 14 may be composed of a plurality of divided pieces.

An opening for carrying in and out the substrate S is formed on the side wall of the processing container 11, and the opening is closed by the gate valve 16. An exhaust port 18 is provided at the bottom of the processing container 11, and an exhaust device 17 is connected to the exhaust port 18. The exhaust device 17 evacuates the inside of the processing container 11 through the exhaust port 18 and reduces the pressure inside the processing container 11 to a predetermined pressure.

The window member 14 is supported on the side wall of the processing container 11 via an insulating member (not shown), and the window member 14 and the processing container 11 do not come into direct contact with each other and are not electrically conductive. Further, the window member 14 has a size capable of covering at least the entire surface of the substrate S mounted on the mounting table 12.

A gas introduction port 15 is provided on the side wall of the processing container 11, and valves 22a to 22d are connected to the gas introduction port 15 via a gas supply pipe 23. The valve 22a is connected to the gas supply source 20a via the flow rate controller 21a. The valve 22b is connected to the gas supply source 20b via the flow rate controller 21b. The valve 22c is connected to the gas supply source 20c via the flow rate controller 21c. The valve 22d is connected to the gas supply source 20d via the flow rate controller 21d.

The gas supply source 20a is a supply source of SiCl4 gas. The gas supply source 20b is a supply source of SiF4 gas. The gas supply source 20c is a source of a processing gas containing at least one of a nitrogen atom and an oxygen atom and not containing a hydrogen atom. In the present embodiment, the gas supply source 20c supplies O2 gas as a processing gas. The gas supply source 20d is a source of a processing gas containing at least one of a nitrogen atom and an oxygen atom and not containing a hydrogen atom. In the present embodiment, the gas supply source 20d supplies N2 gas as a processing gas.

The flow rate of the SiCl4 gas supplied from the gas supply source 20a is adjusted by the flow rate controller 21a, and is supplied from the gas introduction port 15 into the processing container 11 via the valve 22a and the gas supply pipe 23. The flow rate of the SiF4 gas supplied from the gas supply source 20b is adjusted by the flow rate controller 21b, and is supplied into the processing container 11 from the gas introduction port 15 via the valve 22b and the gas supply pipe 23. The flow rate of the O2 gas supplied from the gas supply source 20c is adjusted by the flow rate controller 21c, and is supplied into the processing container 11 from the gas introduction port 15 via the valve 22c and the gas supply pipe 23. The flow rate of the N2 gas supplied from the gas supply source 20d is adjusted by the flow rate controller 21d, and is supplied into the processing container 11 from the gas introduction port 15 via the valve 22d and the gas supply pipe 23.

The antenna 13 is composed of an annular conductor arranged along the upper surface of the window member 14, and is connected to the high frequency power supply 26 via the matching unit 25. The high-frequency power supply 26 supplies high-frequency power of a predetermined frequency to the antenna 13, and generates a magnetic field inside the processing container 11 via the window member 14 by the high-frequency current flowing through the antenna 13. The magnetic field generated in the processing container 11 generates an induced electric field in the processing container 11, and the induced electric field accelerates the electrons in the processing container 11. Then, the electrons accelerated by the induced electric field collide with the gas molecules and atoms introduced into the processing container 11, and inductively coupled plasma is generated in the processing container 11.

In the film forming apparatus 10 of the present embodiment, when the gate insulating layer described later is formed, SiCl4 gas, SiCF4 gas, and O2 gas are supplied into the processing container 11 and the mixed gas of the supplied gases is used. , Inductively coupled plasma produces cations and radicals. Then, the generated cations and radicals form a silicon oxide film on the substrate S placed on the mounting table 12. Subsequently, SiCl4 gas, SiCF4 gas, and N2 gas are supplied into the processing container 11, and cations and radicals are generated by inductively coupled plasma from the mixed gas of the supplied gases. Then, a silicon nitride film is formed on the silicon oxide film by the generated cations and radicals. As a result, a gate insulating layer, which is a laminated film including a silicon oxide film and a silicon nitride film, is formed. The gate insulating layer has a function of protecting the oxide semiconductor formed on the substrate S from moisture and the like, in addition to the original function as a capacitor that generates an electric field in the channel. That is, the gate insulating layer and the silicon oxide film and the silicon nitride film contained in the gate insulating layer correspond to an example of a protective film that protects the oxide semiconductor formed on the substrate S.

Further, in the film forming apparatus 10 of the present embodiment, when the passion layer described later is formed, SiCl4 gas, SiCF4 gas, and O2 gas are supplied into the processing container 11, and a mixed gas of the supplied gases is supplied. From this, cations and radicals are generated by inductively coupled plasma. Then, the generated cations and radicals form a silicon oxide (SiO) film on the substrate S placed on the mounting table 12. Subsequently, SiCl4 gas, SiCF4 gas, and N2 gas are supplied into the processing container 11, and cations and radicals are generated by inductively coupled plasma from the mixed gas of the supplied gases. Then, a silicon nitride (SiN) film is formed on the SiO film by the generated cations and radicals. As a result, a passivation layer, which is a laminated film containing a SiO film and a SiN film, is formed. The passivation layer has a function of protecting the oxide semiconductor formed on the substrate S from moisture and the like. That is, the passivation layer and the SiO film and SiN film contained in the passivation layer correspond to an example of a protective film that protects the oxide semiconductor formed on the substrate S.

Further, in the film forming apparatus 10 of the present embodiment, when the sealing film described later is formed, SiCl4 gas, SiCF4 gas, and N2 gas are supplied into the processing container 11 and the supplied gas is mixed. Inductively coupled plasma produces cations and radicals from the gas. Then, the generated cations and radicals form a sealing film, which is a SiN film, on the substrate S placed on the mounting table 12.

In the film formation of the gate insulating layer or the passionation layer, the SiCl4 gas and the SiCl4 gas, which are not the material gases that directly constitute the silicon oxide film or the silicon nitride film but are the material gases that directly form the silicon oxide film or the silicon nitride film. , O2 gas and N2 gas are adjusted to appropriate concentrations, and Ar gas or the like is used to play an auxiliary role in the film forming process, such as facilitating discharge for generating inductively coupled plasma. Rare gas may be added. That is, the mixed gas containing SiCl4 gas, SiCF4 gas, and O2 gas may further contain a rare gas, and the mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas further contains a rare gas. It may be included.

The film forming apparatus 10 includes a controller 27 that controls the operation of each part of the film forming apparatus 10. The controller 27 controls the exhaust device 17, the flow rate controllers 21a to 21d, the valves 22a to 22d, and the high frequency power supply 26, respectively. The controller 27 is realized by, for example, a computer having various integrated circuits such as an ASIC (Application Specific Integrated Circuit) and a CPU (Central Processing Unit), an electronic circuit, and the like.

[Structure of TFT 30]
FIG. 2 is a cross-sectional view showing an example of the configuration of the TFT 30. The TFT 30 in this embodiment is a bottom gate type.

As shown in FIG. 2, for example, the TFT 30 includes an undercoat layer 31 formed on the substrate S, a gate electrode 32 partially formed on the undercoat layer 31, an undercoat layer 31 and a gate electrode 32. The gate insulating layer 33 is provided so as to cover the gate insulating layer 33.

Further, as shown in FIG. 2, for example, the TFT 30 has a channel 34 formed so as to be arranged directly above the gate electrode 32 on the gate insulating layer 33 and both sides of the channel 34 on the gate insulating layer 33. Each of the source electrode 35 and the drain electrode 36 formed in the above is provided. In this embodiment, the channel 34 is an oxide semiconductor. For the channel 34, for example, so-called IGZO, which is an oxide semiconductor composed of indium (In), gallium (Ga), and zinc (Zn), is used. The material of the channel 34 is not limited to IGZO as long as it is an oxide semiconductor.

In the present embodiment, the gate insulating layer 33 is a laminated film including a silicon oxide film 33a and a silicon nitride film 33b. In the gate insulating layer 33, the silicon nitride film 33b comes into contact with the channel 34. When the gate insulating layer 33 is formed, the silicon oxide film 33a and the silicon nitride film 33b are formed by using SiCl4, a SiCF4 gas, and an oxygen-containing gas or a nitrogen-containing gas containing no hydrogen atom. Since the silicon oxide film 33a and the silicon nitride film 33b are formed using SiCl4, SiCF4 gas, and an oxygen-containing gas or a nitrogen-containing gas containing no hydrogen atoms, the silicon oxide film 33a and the silicon nitride film 33b are formed in the gate insulating layer 33 after the formation. The content of H atoms can be reduced. As a result, deterioration of the characteristics of the channel 34 due to H atoms can be suppressed. Further, since the silicon oxide film 33a and the silicon nitride film 33b are formed of a film using SiCl4, a SiCF4 gas, and an oxygen-containing gas or a nitrogen-containing gas containing no hydrogen atom, the gate insulating layer 33 after the formation is formed. The content of F atoms in it can be increased. As a result, when the TFT 30 is subjected to an annealing process, which is a subsequent step of the film forming process of the gate insulating layer 33, F atoms in the gate insulating layer 33 are diffused toward the channel 34, and defects in the channel 34 are F. Repaired by atoms. In order to suppress deterioration of the characteristics of the channel 34 due to H atoms and promote repair of the channel 34 by F atoms, the concentration of hydrogen contained in the gate insulating layer 33 is preferably 1 atom% or less, and the gate insulating layer. The concentration of halogen (that is, fluorine) contained in 33 is preferably 1 atom% or more.

In the above-described embodiment, the case where the silicon nitride film 33b is formed on the silicon oxide film 33a to form the gate insulating layer 33 including the silicon oxide film 33a and the silicon nitride film 33b has been described. The present invention is not limited to this. For example, the silicon oxide film 33a may be formed on the silicon nitride film 33b. In this case, the silicon oxide film 33a comes into contact with the channel 34.

Further, the TFT 30 includes, for example, as shown in FIG. 2, a passivation layer 37 formed on the gate insulating layer 33 so as to cover the channel 34, the source electrode 35, and the drain electrode 36. In the present embodiment, the passivation layer 37 is a laminated film including a silicon oxide film 37a and a silicon nitride film 37b. In the passivation layer 37, the silicon oxide film 37a comes into contact with the channel 34. When the passivation layer 37 is formed, the silicon oxide film 37a and the silicon nitride film 37b are formed by using SiCl4, a SiCF4 gas, and an oxygen-containing gas or a nitrogen-containing gas containing no hydrogen atom. Since the silicon oxide film 37a and the silicon nitride film 37b are formed of a film using SiCl4, a SiCF4 gas, and an oxygen-containing gas or a nitrogen-containing gas containing no hydrogen atom, H in the passivation layer 37 after the film formation. The content of atoms can be reduced. As a result, deterioration of the characteristics of the channel 34 due to H atoms can be suppressed. Further, since the silicon oxide film 37a and the silicon nitride film 37b are formed by using SiCl4, SiCF4 gas, and an oxygen-containing gas or a nitrogen-containing gas containing no hydrogen atom, the silicon oxide film 37a and the silicon nitride film 37b are formed in the passivation layer 37 after the formation. The content of F atom can be increased. As a result, when the TFT 30 is annealed after the film formation process of the passivation layer 37, the F atoms in the passivation layer 37 are diffused toward the channel 34, and the oxygen defect of the channel 34 becomes the F atom. Will be repaired by. In order to suppress the deterioration of the characteristics of the channel 34 due to H atoms and promote the repair of the channel 34 by F atoms, the concentration of hydrogen contained in the passivation layer 37 is preferably 1 atom% or less, and the passivation layer 37 has a concentration of hydrogen. The concentration of halogen (that is, fluorine) contained is preferably 1 atom% or more.

In the above-described embodiment, the case where the silicon nitride film 37b is formed on the silicon oxide film 37a to form the passivation layer 37 including the silicon oxide film 37a and the silicon nitride film 37b has been described. The invention is not limited to this. For example, the silicon oxide film 37a may be formed on the silicon nitride film 37b. In this case, the silicon nitride film 37b comes into contact with the channel 34.

[Structure of organic electronic device 40 to which TFT 30 is applied]
FIG. 3 is a cross-sectional view showing an example of the configuration of the organic electronic device 40 to which the TFT 30 is applied.

As shown in FIG. 3, for example, the organic electronic device 40 partially penetrates the TFT 30, the organic flattening layer 41 formed on the passivation layer 37 of the TFT 30, the organic flattening layer 41, and the passivation layer 37. It is sandwiched between the anode layer 42 formed on the organic flattening layer 41 so as to contact the drain electrode 36, the bank layer 43 formed on the anode layer 42, and the adjacent bank layers 43 on the anode layer 42. The organic light emitting layer 44 formed as described above and the cathode layer 45 formed on the organic light emitting layer 44 are provided. In the present embodiment, the organic flattening layer 41, the anode layer 42, the bank layer 43, the organic light emitting layer 44, and the cathode layer 45 constitute an organic EL element.

Further, the organic electronic device 40 includes, for example, as shown in FIG. 3, a sealing film 46 formed on the bank layer 43 so as to cover the organic EL element. In the present embodiment, the sealing film 46 is a silicon nitride film formed by using, for example, SiCl4 gas, SiCF4 gas, and a nitrogen-containing gas containing no H atom such as N2 gas. Since the sealing film 46 is formed by using SiCl4 gas, SiCF4 gas, and a nitrogen-containing gas containing no H atoms, the content of H atoms in the silicon nitride film after the film formation should be reduced. Can be done. As a result, deterioration of the characteristics of the organic EL element and the channel 34 due to H atoms can be suppressed.

[Procedure for forming the gate insulating layer 33 and the passivation layer 37]
FIG. 4 is a flowchart showing an example of the film forming procedure of the gate insulating layer 33 and the passivation layer 37. The flowchart shown in FIG. 4 is executed by the controller 27 controlling the operation of each part of the film forming apparatus 10 according to a predetermined program. Further, the flowchart shown in FIG. 4 shows an example of the manufacturing method of the TFT 30 shown in FIG.

First, the gate valve 16 is released, and the substrate S on which the undercoat layer 31 and the gate electrode 32 are formed is carried into the processing container 11 (S101). The substrate S carried into the processing container 11 is placed on the mounting table 12. After the substrate S is placed on the mounting table 12, the gate valve 16 is closed. The substrate S on which the undercoat layer 31 and the gate electrode 32 are formed is an example of a substrate before the oxide semiconductor is formed. Step S101 is an example of the first carry-in step.

Next, in a state where the substrate S is heated to a temperature of 250 ° C. or higher, it is oxidized by plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and O2 gas so as to cover the undercoat layer 31 and the gate electrode 32. A silicon film 33a is formed (S102). Specifically, the temperature control mechanism in the mounting table 12 heats the substrate S mounted on the mounting table 12 to a temperature of 250 ° C. or higher. Then, a mixed gas containing SiCl4 gas, SiCF4 gas, and O2 gas is supplied into the processing container 11 from the gas supply source 20a, the gas supply source 20b, and the gas supply source 20c. Then, the inside of the processing container 11 is controlled to a predetermined pressure by the exhaust device 17, and a high frequency power of a predetermined magnitude is supplied to the antenna 13 via the matching device 25 by the high frequency power supply 26. As a result, an induced electric field is generated in the processing container 11, and a plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and O2 gas is generated. Then, the silicon oxide film 33a is formed on the undercoat layer 31 and the gate electrode 32 by the cations and radicals contained in the plasma. Step S102 is an example of the first film forming step and the silicon oxide film forming step.

Next, in a state where the substrate S is heated to a temperature of 250 ° C. or higher, the silicon nitride film 33b is covered with the plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas so as to cover the silicon oxide film 33a. A film is formed (S103). Specifically, the temperature control mechanism in the mounting table 12 heats the substrate S mounted on the mounting table 12 to a temperature of 250 ° C. or higher. Then, a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas is supplied into the processing container 11 from the gas supply source 20a, the gas supply source 20b, and the gas supply source 20d. Then, the inside of the processing container 11 is controlled to a predetermined pressure by the exhaust device 17, and a high frequency power of a predetermined magnitude is supplied to the antenna 13 via the matching device 25 by the high frequency power supply 26. As a result, an induced electric field is generated in the processing container 11, and a plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas is generated. Then, the silicon nitride film 33b is formed on the silicon oxide film 33a by the cations and radicals contained in the plasma. Step S103 is an example of the first film forming step and the silicon nitride film forming step.

The silicon oxide film 33a is formed on the undercoat layer 31 and the gate electrode 32, and the silicon nitride film 33b is formed on the silicon oxide film 33a to include the silicon oxide film 33a and the silicon nitride film 33b. The gate insulating layer 33 is formed. When the silicon oxide film 33a is formed on the silicon nitride film 33b, the order of steps S102 and S103 in FIG. 4 is switched.

Next, the gate valve 16 is released, and the substrate S on which the gate insulating layer 33 is formed is carried out from the processing container 11 (S104). After the substrate S is carried out of the processing container 11, the gate valve 16 is closed. The substrate S carried out from the processing container 11 is conveyed to another device. Then, in another device, the channel 34, the source electrode 35, and the drain electrode 36 are formed.

Next, the gate valve 16 is released, and the substrate S on which the channel 34, the source electrode 35, and the drain electrode 36 are formed by another device is carried into the processing container 11 (S105). The substrate S carried into the processing container 11 is placed on the mounting table 12. After the substrate S is placed on the mounting table 12, the gate valve 16 is closed. The substrate S on which the channel 34, the source electrode 35, and the drain electrode 36 are formed by another device is an example of the substrate after the oxide semiconductor is formed. Step S105 is an example of the first carry-in step.

Next, with the substrate S heated to a temperature of 250 ° C. or higher, the channel 34, the source electrode 35, and the drain electrode 36 are covered with a plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and O2 gas. A silicon oxide film 37a is formed on the surface (S106). Specifically, the temperature control mechanism in the mounting table 12 heats the substrate S mounted on the mounting table 12 to a temperature of 250 ° C. or higher. Then, a mixed gas containing SiCl4 gas, SiCF4 gas, and O2 gas is supplied into the processing container 11 from the gas supply source 20a, the gas supply source 20b, and the gas supply source 20c. Then, the inside of the processing container 11 is controlled to a predetermined pressure by the exhaust device 17, and a high frequency power of a predetermined magnitude is supplied to the antenna 13 via the matching device 25 by the high frequency power supply 26. As a result, an induced electric field is generated in the processing container 11, and a plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and O2 gas is generated. Then, the silicon oxide film 37a is formed on the channel 34, the source electrode 35, and the drain electrode 36 by the cations and radicals contained in the plasma. Step S106 is an example of the first film forming step and the silicon oxide film forming step.

Next, in a state where the substrate S is heated to a temperature of 250 ° C. or higher, the silicon nitride film 37b is covered with the plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas so as to cover the silicon oxide film 37a. A film is formed (S107). Specifically, the temperature control mechanism in the mounting table 12 heats the substrate S mounted on the mounting table 12 to a temperature of 250 ° C. or higher. Then, a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas is supplied into the processing container 11 from the gas supply source 20a, the gas supply source 20b, and the gas supply source 20d. Then, the inside of the processing container 11 is controlled to a predetermined pressure by the exhaust device 17, and a high frequency power of a predetermined magnitude is supplied to the antenna 13 via the matching device 25 by the high frequency power supply 26. As a result, an induced electric field is generated in the processing container 11, and a plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas is generated. Then, the silicon nitride film 37b is formed on the silicon oxide film 37a by the cations and radicals contained in the plasma. Step S107 is an example of the first film forming step and the silicon nitride film forming step.

The silicon oxide film 37a is formed on the channel 34, the source electrode 35 and the drain electrode 36, and the silicon nitride film 37b is formed on the silicon oxide film 37a, whereby the silicon oxide film 37a and the silicon nitride film 37b are formed. A passivation layer 37 containing the above is formed. When the silicon oxide film 37a is formed on the silicon nitride film 37b, the order of steps S106 and S107 in FIG. 4 is changed.

Next, the gate valve 16 is released, and the substrate S on which the gate insulating layer 33 and the passivation layer 37 are formed is carried out from the processing container 11 (S108).

In the above-described embodiment, a film that functions as a protective film can be formed by applying the first transfer step and the first film formation step to each of the gate insulating layer 33 and the passivation layer 37.

[Relationship between the film quality of the gate insulating layer 33 and the temperature of the substrate S]
Here, the relationship between the temperature of the substrate S during film formation of the gate insulating layer 33 (that is, the silicon oxide film 33a and the silicon nitride film 33b) and the film quality of the gate insulating layer 33 after film formation will be described. FIG. 5 is a diagram showing a measurement result of the relationship between the temperature of the substrate S during the film formation of the silicon oxide film 33a and the film density of the silicon oxide film 33a after the film formation. In FIG. 5, the horizontal axis represents the temperature [° C.] of the substrate S, and the vertical axis represents the film density [g / cm3] of the silicon oxide film 33a.

As shown in FIG. 5, the film density of the silicon oxide film 33a increased as the temperature of the substrate S increased, and became saturated when the temperature of the substrate S was around 300 ° C.

FIG. 6 is a diagram showing the measurement results of the relationship between the temperature of the substrate S during film formation of the silicon oxide film 33a and the wet etching rate ratio (WERR: Wet Etching Rate Ratio) of the silicon oxide film 33a after film formation. .. In FIG. 6, the horizontal axis represents the temperature [° C.] of the substrate S, and the vertical axis represents the WERR of the silicon oxide film 33a. Here, the WERR of the silicon oxide film 33a is the thermal silicon oxide when the silicon oxide film 33a and the hot silicon oxide film formed by the thermal oxidation treatment method are wet-etched with hydrofluoric acid. It is the ratio of the etching rate of the silicon oxide film 33a to the etching rate of the film. The smaller the WRR value of the silicon oxide film 33a, the higher the corrosion resistance of the silicon oxide film 33a.

As shown in FIG. 6, the WERR of the silicon oxide film 33a became smaller as the temperature of the substrate S increased.

As is clear from the measurement results shown in FIGS. 5 and 6, when the temperature of the substrate S is 250 ° C. or higher, the film density of the silicon oxide film 33a increases to a value of about 2.23 g / cm3 or higher. Moreover, the WERR of the silicon oxide film 33a was suppressed to about 11% or less.

FIG. 7 is a diagram showing a measurement result of the relationship between the temperature of the substrate S during the film formation of the silicon nitride film 33b and the film density of the silicon nitride film 33b after the film formation. In FIG. 7, the horizontal axis represents the temperature [° C.] of the substrate S, and the vertical axis represents the film density [g / cm3] of the silicon nitride film 33b.

As shown in FIG. 7, the film density of the silicon nitride film 33b increased as the temperature of the substrate S increased, and became saturated when the temperature of the substrate S was around 300 ° C.

FIG. 8 is a diagram showing a measurement result of the relationship between the temperature of the substrate S during the film formation of the silicon nitride film 33b and the WERR of the silicon nitride film 33b after the film formation. In FIG. 8, the horizontal axis represents the temperature [° C.] of the substrate S, and the vertical axis represents the WERR of the silicon nitride film 33b. The WERR of the silicon nitride film 33b is the etching of the silicon oxide film when the silicon nitride film 33b and the silicon oxide film formed by the thermal oxidation treatment method are wet-etched with hydrofluoric acid. It is the ratio of the etching rate of the silicon nitride film 33b to the rate. The smaller the WERR value of the silicon nitride film 33b, the higher the corrosion resistance of the silicon nitride film 33b.

As shown in FIG. 8, the WERR of the silicon nitride film 33b became smaller as the temperature of the substrate S was higher, and was saturated when the temperature of the substrate S was around 300 ° C.

As is clear from the measurement results shown in FIGS. 7 and 8, when the temperature of the substrate S is 250 ° C. or higher, the film density of the silicon nitride film 33b increases to a value of about 2.85 g / cm3 or higher. Moreover, the WERR of the silicon nitride film 33b was suppressed to about 2.0 or less.

As a result of intensive research based on the measurement results of FIGS. 5 to 8, the inventor found that the silicon oxide film 33a and the silicon nitride film were formed when the temperature of the substrate S was 250 ° C. or higher, preferably 300 ° C. or higher. It was found that the film quality of 33b (ie, film density and WERR) meets predetermined permissible specifications.

Therefore, in the present embodiment, the silicon oxide film 33a and the silicon nitride film 33b are formed in a state where the substrate S is heated to a temperature of 250 ° C. or higher, preferably 300 ° C. or higher. Thereby, the film quality (that is, the film density and WERR) of the gate insulating layer 33 as a protective film can be improved. When the film quality of the protective film is improved, the bonds between the atoms constituting the protective film are strengthened, and the gap through which H atoms pass through the protective film can be reduced. As a result, it is possible to provide a protective film having a high barrier property against H atoms.

In the above description, the relationship between the temperature of the substrate S during film formation of the gate insulating layer 33 (that is, the silicon oxide film 33a and the silicon nitride film 33b) and the film quality of the gate insulating layer 33 after film formation was discussed. .. However, the same argument as for the gate insulating layer 33 can be applied to the passivation layer 37 (that is, the silicon oxide film 37a and the silicon nitride film 37b). That is, the film quality of the passivation layer 37 as a protective film is formed by forming the silicon oxide film 37a and the silicon nitride film 37b in a state where the substrate S is heated to a temperature of 250 ° C. or higher, preferably 300 ° C. or higher. (That is, the film density and WERR) can be improved, and as a result, a protective film having a high barrier property against H atoms can be provided. The upper limit of the temperature of the substrate S is preferably a temperature in consideration of the heat resistance of the substrate S, for example, about 450 ° C.

[Fluctuation of TFT threshold voltage]
FIG. 9 is a diagram showing the measurement result of the fluctuation amount of the threshold voltage of the TFT by the PBTS (Positive Bias Temperature Stress) method. In FIG. 9, the “comparative example” is a measurement result corresponding to a TFT having a passivation layer which is a SiO film formed by a mixed gas of SiH4 gas and O2 gas. The threshold voltage refers to the gate voltage when the drain current starts to flow.

As shown in FIG. 9, when SiH4 gas / O2 gas was used as the mixed gas at the time of film formation of the passivation layer, the fluctuation amount of the threshold voltage was 3.56 V. The amount of fluctuation of the threshold voltage did not satisfy the predetermined allowable specifications. That is, in the gas combination in the comparative example, since H atoms are present in the passivation layer after film formation, the H atoms in the passivation layer cause the O atoms to be separated from the TFT channel (oxide semiconductor), resulting in the result. Therefore, it is considered that the fluctuation amount of the threshold voltage has increased.

On the other hand, when SiCl4 gas / SiCF4 gas / O2 gas and SiCl4 gas / SiCF4 gas / N2 gas are used as the mixed gas at the time of film formation of the passivation layer as in the present embodiment, the fluctuation amount of the threshold voltage. Was 0.11V. The amount of fluctuation of the threshold voltage satisfies the predetermined allowable specifications. That is, in the combination of gases of the present embodiment, since H atoms do not exist in the passivation layer after film formation, the separation of O atoms from the channel 34 (oxide semiconductor) of the TFT 30 is suppressed, and as a result, the threshold voltage is increased. It is considered that the amount of fluctuation was suppressed.

[Verification of barrier property of protective film]
FIG. 10 is a diagram for explaining the verification result of the barrier property of the protective film using the μ-PCD (Microwave PhotoConductivity Decay) method. In the μ-PCD method, an oxide semiconductor is irradiated with laser light and microwaves, and the intensity of the reflected wave of the microwave having a correlation with the density of carriers in the oxide semiconductor (hereinafter referred to as “reflected wave intensity”). It is a method of measuring (called). In the verification experiment using the μ-PCD method, the oxide semiconductor covered with the protective film (passivation layer 37) of the present embodiment is subjected to plasma treatment with H2 gas plasma, and the oxide semiconductor before the plasma treatment is applied. The reflected wave intensity of the oxide semiconductor after the plasma treatment was compared with the reflected wave intensity of the oxide semiconductor. In FIG. 10, "INITIAL" indicates the reflected wave intensity of the oxide semiconductor before plasma treatment with H2 gas plasma, and "After H plasma" indicates the reflected wave of the oxide semiconductor after plasma treatment with H2 gas plasma. Shows strength.

Here, when H atoms pass through the protective film and desorb O atoms in the oxide semiconductor by plasma treatment, the oxide semiconductor becomes a conductor and the reflected wave intensity of the oxide semiconductor after plasma treatment cannot be measured. Should drop to the range of. However, as shown in FIG. 10, when the oxide semiconductor is covered with the protective film (passivation layer 37) of the present embodiment, the reflected wave intensity of the oxide semiconductor after the plasma treatment is the oxide semiconductor before the plasma treatment. There is almost no change with respect to the reflected wave intensity of. That is, as is clear from the verification results shown in FIG. 10, the protective film (passivation layer 37) of the present embodiment can effectively prevent the passage of H atoms.

[Procedure for forming the gate insulating layer 33, the passivation layer 37, and the sealing film 46]
FIG. 11 is a flowchart showing an example of the film forming procedure of the gate insulating layer 33, the passivation layer 37, and the sealing film 46. The flowchart shown in FIG. 11 is executed by the controller 27 controlling the operation of each part of the film forming apparatus 10 according to a predetermined program. Further, the flowchart shown in FIG. 11 shows an example of the manufacturing method of the organic electronic device 40 shown in FIG. In FIG. 11, steps S111 to S118 correspond to steps S101 to S108 shown in FIG. 4, so the description thereof will be omitted.

The gate valve 16 is closed after the substrate S on which the gate insulating layer 33 and the passivation layer 37 are formed is carried out from the processing container 11 (S118). The substrate S carried out from the processing container 11 is conveyed to another device. Then, in another device, an organic EL element (that is, an organic flattening layer 41, an anode layer 42, a bank layer 43, an organic light emitting layer 44, and a cathode layer 45) is formed.

Next, the gate valve 16 is released, and the substrate S on which the organic EL element is formed by another device is carried into the processing container 11 (S119). The substrate S carried into the processing container 11 is placed on the mounting table 12. After the substrate S is placed on the mounting table 12, the gate valve 16 is closed. The substrate S on which the organic EL element is formed by another device is an example of a substrate on which an oxide semiconductor is formed, a protective film is formed, and the organic EL element is formed above the oxide semiconductor and the protective film. Is. Step S119 is an example of the second carry-in step.

Next, in a state where the substrate S is adjusted to a temperature of 100 ° C. or lower, a silicon nitride film is formed so as to cover the organic EL element with a plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas. A sealing film 46 is formed (S120). Specifically, the temperature control mechanism in the mounting table 12 heats the substrate S mounted on the mounting table 12 to a temperature of 100 ° C. or lower. Then, a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas is supplied into the processing container 11 from the gas supply source 20a, the gas supply source 20b, and the gas supply source 20d. Then, the inside of the processing container 11 is controlled to a predetermined pressure by the exhaust device 17, and a high frequency power of a predetermined magnitude is supplied to the antenna 13 via the matching device 25 by the high frequency power supply 26. As a result, an induced electric field is generated in the processing container 11, and a plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas is generated. Then, the sealing film 46, which is a silicon nitride film, is formed on the organic EL element by the cations and radicals contained in the plasma. Step S120 is an example of the second film forming step.

Next, the gate valve 16 is released, and the substrate S on which the gate insulating layer 33, the passivation layer 37, and the sealing film 46 are formed is carried out from the processing container 11 (S121).

As described above, according to the present embodiment, the oxide semiconductor is protected by the plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, O2 gas or N2 gas in a state where the substrate S is heated to a temperature of 250 ° C. or higher. A protective film is formed. As a result, the film quality of the protective film can be improved, so that the gap through which H atoms pass through the protective film can be reduced. As a result, it is possible to provide a protective film having a high barrier property against H atoms.

Further, according to the present embodiment, in a state where the substrate S in which the organic EL element is formed above the channel 34 and the protective film is adjusted to a temperature of 100 ° C. or lower, the SiCl4 gas, the SiCF4 gas, and the N2 gas are mixed. A sealing film 46, which is a silicon nitride film, is formed so as to cover the organic EL element by the plasma of the mixed gas contained therein. As a result, the content of H atoms in the sealing film 46 can be reduced. As a result, deterioration of the characteristics of the organic EL element and the channel 34 due to H atoms can be suppressed. Further, damage to the organic EL element due to heat can be avoided.

[others]
The present invention is not limited to the above-described embodiment, and various modifications can be made within the scope of the gist thereof.

In the above-described embodiment, the case where the protective film protecting the channel 34 is applied to the gate insulating layer 33 and the passivation layer 37 in the TFT 30 of FIG. 2 has been described, but in other layers of the TFT having another structure. Also, the present invention can be applied. FIG. 12 is a cross-sectional view showing another example of the structure of the TFT.

The TFT 50 includes, for example, as shown in FIG. 12, an etching stopper layer 51 formed so as to cover the channel 34, and a passivation layer 52 formed so as to cover the etching stopper layer 51, the source electrode 35, and the drain electrode 36. Be prepared.

In the TFT 50, the etching stopper layer 51 is a laminated film including a silicon oxide film 51a and a silicon nitride film 51b. In the etching stopper layer 51, the silicon oxide film 51a comes into contact with the channel 34.

The etching stopper layer 51 is formed under the same conditions as the passivation layer 37 of the above-described embodiment. That is, the silicon oxide film 51a is formed under the same conditions as the silicon oxide film 37a (see step S106 in FIG. 4), and the silicon nitride film 51b is formed under the same conditions as the silicon nitride film 37b (see step S107 in FIG. 4). ) Is formed. As a result, the film quality of the etching stopper layer 51 as a protective film can be improved, so that the gap through which H atoms pass through the protective film can be reduced. As a result, it is possible to provide a protective film having a high barrier property against H atoms.

Further, in the above-described embodiment, the bottom gate type TFT has been described as an example, but the present invention can also be applied to the top gate type TFT. FIG. 13 is a cross-sectional view showing an example of the configuration of the top gate type TFT 60.

In FIG. 13, a large number of TFTs 60 formed on the substrate S are an undercoat layer 61 formed on the substrate S and composed of a silicon oxide film or a laminated film including a silicon oxide film and a silicon nitride film, and an undercoat layer 61. A channel 62 formed above and made of IGZO, a source region 68 and a drain region 69 formed on both sides of the channel 62, a gate insulating layer 65 covering the channel 62, and a gate insulating layer 65 formed on the gate insulating layer 65, respectively. The gate electrode 66, the interlayer insulating film 67 that partially covers the entire gate electrode 66, the source region 68, and the drain region 69, and the source region 68 that is formed on the source region 68 and penetrates the interlayer insulating film 67. The contacting source wiring 63, the drain wiring 64 formed on the drain region 69, penetrating the interlayer insulating film 67 and contacting the drain region 69, the passion film 70 covering the source wiring 63 and the drain wiring 64, and the passivation. An organic flattening film 71 that covers the film 70 and a pixel electrode 72 that covers the organic flattening film 71 are provided. That is, the TFT 60 has a laminated structure in which the channel 62, the gate insulating layer 65, and the gate electrode 66 are laminated in this order from the bottom.

The film forming apparatus 10 is preferably used for forming the interlayer insulating film 67. That is, the interlayer insulating film 67 is formed by the same method as the protective film (gate insulating layer 33 and passivation layer 37) of the bottom gate type embodiment described above. When the interlayer insulating film 67 is formed, the exposed IGZO film is exposed to plasma containing N2 and fluorine gas, so that the conductivity is increased to form the source region 68 and the drain region 69. On the other hand, since the IGZO film covered with the gate electrode 66 functioning as a mask and the gate insulating layer 65 is not exposed to plasma containing fluorine gas, its conductivity does not increase as compared with the exposed IGZO film, and forms the channel 62. .. Further, since the IGZO film covered with the gate electrode 66 serves as the channel 62, the width of the gate electrode 66 is reflected in the width of the channel 62 (specifically, the width of the channel 62 is within the range of processing accuracy by the mask). It becomes the same as the width of the gate electrode 66).

The conductivity of the exposed IGZO film is increased because fluorine radicals and the like existing in the plasma are selectively introduced only into the source region 68 and the drain region 69 in the IGZO film, and the fluorine introduced into the IGZO film is a donor. This is because the resistivity of the source region 68 and the drain region 69 into which fluorine is introduced is selectively reduced. Further, in the TFT 60, fluorine atoms are diffused from the fluorine-containing silicon nitride film constituting the interlayer insulating film 67 to the channel 62 in the IGZO film, and the unbonded hands existing as defects in the channel 62 are terminated. As a result, the defect of the channel 62 that destabilizes the electrical characteristics of the TFT 60 is repaired, and the electrical characteristics of the TFT 60 are also improved.

In the TFT 60, the undercoat layer 61 is a laminated film including a silicon oxide film 61a and a silicon nitride film 61b. In the undercoat layer 61, the silicon nitride film 61b comes into contact with the channel 62.

The undercoat layer 61 is formed under the same conditions as the gate insulating layer 33 of the bottom gate type embodiment described above. That is, the silicon oxide film 61a is formed under the same conditions as the bottom gate type silicon oxide film 33a (see step S102 in FIG. 4), and the silicon nitride film 61b is the same as the bottom gate type silicon nitride film 33b. The film is formed under the conditions (step S103 of FIG. 4). As a result, the film quality of the undercoat layer 61 as a protective film can be improved, so that the gap through which H atoms pass through the protective film can be reduced. As a result, it is possible to provide a protective film having a high barrier property against H atoms.

Further, in the TFT 60, the gate insulating layer 65 is a laminated film including a silicon oxide film 65a and a silicon nitride film 65b. In the gate insulating layer 65, the silicon oxide film 65a comes into contact with the channel 62.

The gate insulating layer 65 is formed under the same conditions as the passivation layer 37 of the bottom gate type embodiment described above. That is, the silicon oxide film 65a is formed under the same conditions as the bottom gate type silicon oxide film 37a (see step S106 in FIG. 4), and the silicon nitride film 65b is the same as the bottom gate type silicon nitride film 37b. The film is formed under the conditions (step S107 in FIG. 4). As a result, the film quality of the gate insulating layer 65 as the protective film can be improved, so that the gap through which H atoms pass through the protective film can be reduced. As a result, it is possible to provide a protective film having a high barrier property against H atoms.

Further, in the above-described embodiment, the case where the protective film (that is, the gate insulating layer and the passivation layer) is a laminated film including a silicon oxide film and a silicon nitride film has been described, but the present invention is not limited to this. The protective film is a silicon nitride film, a silicon oxide film, a silicon nitride film, a laminated film containing a plurality of silicon nitride films, a laminated film containing a plurality of silicon oxide films, a laminated film containing a plurality of silicon oxynitride films, or a laminated film. It may be a laminated film containing at least any two of a silicon nitride film, a silicon oxide film and a silicon oxynitride film. Further, when the protective film is a laminated film containing a plurality of silicon nitride films, a laminated film containing a plurality of silicon oxide films, or a laminated film containing a plurality of silicon oxynitride films, a plurality of silicon nitride films, a plurality of layers. The silicon oxide film or a plurality of silicon oxynitride films may have different halogen concentrations.

Further, in the above-described embodiment, O2 gas or N2 gas has been described as an example as a processing gas containing at least one of a nitrogen atom and an oxygen atom and not containing a hydrogen atom, but the present invention is limited to this. No. The processing gas containing at least one of a nitrogen atom and an oxygen atom and not containing a hydrogen atom may be N2O gas or the like.

Further, in the above-described embodiment, the case where the sealing film 46 is formed by the plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 has been described, but the present invention is not limited to this. The sealing film 46 may be formed by plasma of a mixed gas containing at least one of SiCl4 gas and SiCF4 gas and N2 gas.

Further, in the above-described embodiment, an example in which the first film forming step and the second film forming step are carried out in the same processing container 11 has been described, but the present invention is not limited to this, and the first film forming step and the first film forming step are not limited to this. The film forming step of 2 may be carried out in different processing containers 11, and further, the gate insulating layer 33 and the passivation layer 37 may be formed in different processing containers 11.

Further, in the above-described embodiment, the film forming apparatus 10 for forming a film by a CVD method using inductively coupled plasma as a plasma source has been described as an example, but the present invention is not limited to this. In the film forming apparatus 10 that forms a film by the CVD method using plasma, the plasma source is not limited to inductively coupled plasma, and any plasma source such as capacitively coupled plasma, microwave plasma, or magnetron plasma can be used. Can be done.

Further, the film forming method in the above-described embodiment is realized, for example, by the controller 27 executing a program for realizing the film forming method. Programs for realizing the film forming method include, for example, optical recording media such as DVD (Digital Versatile Disc) and PD (Phase change rewritable Disk), magneto-optical recording media such as MO (Magneto-Optical disk), and tape media. It is provided via a magnetic recording medium or a storage medium such as a semiconductor memory. The controller 27 reads a program from the storage medium and executes the read program to control each part of the film forming apparatus 10 to realize the film forming method according to the above-described embodiment. The controller 27 may acquire and execute the program for realizing the film forming method from another device such as a server that stores the program via a communication medium.

S Substrate 10 Formation device 11 Processing container 12 Mounting stand 13 Antenna 14 Window member 15 Gas inlet 16 Gate valve 17 Exhaust device 18 Exhaust port 20a to 20d Gas supply source 21a to 21d Flow controller 22a to 22d Valve 23 Gas supply pipe 25 Matcher 26 High frequency power supply 27 Controller 30 TFT
31 Undercoat layer 32 Gate electrode 33 Gate insulating layer 33a Silicon oxide film 33b Silicon nitride film 34 Channel 35 Source electrode 36 Drain electrode 37 Passion layer 37a Silicon oxide film 37b Silicon nitride film 40 Organic electronic device 41 Organic flattening layer 42 Anode layer 43 Bank layer 44 Organic light emitting layer 45 Cathode layer 46 Sealing film 51 Etching stopper layer 51a Silicon oxide film 51b Silicon nitride film 52 Passion layer 61 Undercoat layer 61a Silicon oxide film 61b Silicon nitride film 62 Channel 63 Source electrode 64 Drain electrode 65 Gate insulating layer 65a Silicon oxide film 65b Silicon nitride film 66 Gate electrode 67 Interlayer insulating film layer 68 Source area 69 Drain area 70 Passion film 71 Organic flattening film 72 Pixel electrode

Claims (8)

A method for forming a protective film that protects an oxide semiconductor formed on a substrate.
The protective film is a laminated film composed of a plurality of films, and is a laminated film.
The first carry-in step of carrying the substrate before the oxide semiconductor is formed or the substrate after the oxide semiconductor is formed into the processing container, and
Look including a first film forming step of forming the protective film in contact with the oxide semiconductor,
The first film forming step is
A silicon nitride film forming step of forming a silicon nitride film as the protective film by plasma of a mixed gas containing SiCl4 gas, SiCF4 gas, and N2 gas while the substrate is heated to a temperature of 250 ° C. or higher. When,
Silicon oxide film forming step of forming a silicon oxide film as the protective film by plasma of a mixed gas containing SiCl4 gas, SiCF4 gas and O2 gas while the substrate is heated to a temperature of 250 ° C. or higher. When
Film forming method, which comprises a. The film forming method according to claim 1, wherein the mixed gas further contains a rare gas. Before SL on the silicon nitride film, film forming method according to claim 1, characterized in that forming the silicon oxide film as the protective film. The film forming method according to claim 1 which before Symbol silicon oxide film, characterized by forming a silicon nitride film as the protective film. The protective film according to claim 1 to 4 , wherein the protective film is applied to at least one of an undercoat layer, a gate insulating layer, an etching stop layer and a passivation layer in a thin film transistor (TFT). The film forming method according to any one. The concentration of hydrogen contained in the protective film is 1 atom% or less.
The film forming method according to any one of claims 1 to 5 , wherein the concentration of the halogen contained in the protective film is 1 atom% or more. The substrate on which the oxide semiconductor is formed, the protective film is formed, and the oxide semiconductor and the organic EL (Electro Luminescence) element are formed above the protective film is carried into the processing container. The second carry-in process and
In a state where the substrate carried into the processing container is adjusted to a temperature of 100 ° C. or lower, a plasma of a mixed gas containing at least one of SiCl4 gas and SiCF4 gas and a nitrogen-containing gas containing no hydrogen atom is used. The invention according to any one of claims 1 to 6 , further comprising a second film forming step of forming a sealing film which is a silicon nitride film so as to cover the organic EL element. Film formation method. Processing container and
A gas supply unit for supplying gas into the processing container and
A plasma generation unit for generating gas plasma in the processing container,
A film forming apparatus comprising a control unit for executing the film forming method according to any one of claims 1 to 7.

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