JP6926510B2 - Thermoelectric module - Google Patents

Description

The present invention relates to a thermoelectric module. More specifically, the present invention relates to thermoelectric modules that can achieve high durability, high productivity, high thermoelectric effect and good appearance.

For example, in technical fields such as temperature control and exhaust heat utilization, thermoelectric elements such as a Perche element that converts electrical energy into thermal energy using the Perche effect and a Seebeck element that converts thermal energy into electrical energy using the Seebeck effect. Utilization of the element is expected. A thermoelectric element is composed of a junction of different types of metals or semiconductors and performs energy conversion between electrical energy and thermal energy, and is typically a combination of a p-type semiconductor chip and an n-type semiconductor chip. Is used. Further, for the purpose of obtaining a greater effect, a so-called "thermoelectric module" having a configuration in which a plurality of thermoelectric elements are connected in series between two substrates facing each other is widely adopted.

However, in a thermoelectric module having the above configuration, deformation such as warpage of the thermoelectric module due to thermal stress caused by the temperature difference between the front and back during operation (hereinafter, may be referred to as "thermal deformation"). May occur, and the thermoelectric element (constituent semiconductor chip) and the electrode may be separated or the thermoelectric element may be damaged. Further, when an impact is received from the outside, the thermoelectric element may be broken or the thermoelectric element may be cracked.

Therefore, in the technical field, a pair of substrates, a plurality of semiconductor chips arranged on the pair of substrates, and a wiring conductor for electrically connecting the plurality of semiconductor chips are provided on the pair of substrates. Further, various techniques have been proposed for the purpose of reducing thermal deformation and improving impact resistance in a thermoelectric module including an external connection terminal electrically connected to the wiring conductor.

First, by arranging a plurality of semiconductor chips in a grid pattern and not arranging the semiconductor chips at the four corners of the grid array where thermal stress and / or impact tends to be concentrated, the semiconductor chips caused by thermal deformation It is known to prevent peeling and breakage from the insulating substrate and improve the durability of the thermoelectric module (see, for example, Patent Document 1). However, in this case, it contributes to the effect as a thermoelectric element (for example, the Perche effect, the Seebeck effect, etc., hereinafter may be referred to as the "thermoelectric effect") as compared with the case where the semiconductor chip is also arranged at the four corners. Since the number of elements to be used is reduced, it may be difficult for the thermoelectric module as a whole to exhibit the desired performance. Further, since the number of semiconductor chips as members for connecting the pair of substrates is reduced, the mechanical strength of the thermoelectric module as a whole is lowered. Further, since the semiconductor chips are not arranged at the four corners, it gives the impression that there is a defect such as a defect of the semiconductor chip, which is not preferable in terms of appearance.

Next, some semiconductor chips (particularly semiconductor chips arranged at the corners) are formed by a reinforcing element whose difference from the average coefficient of thermal expansion of the semiconductor chip is within 20% and which is 10% or more higher than the average hardness of the semiconductor chip. It is also known that the impact resistance of the thermoelectric module is improved by substituting (see, for example, Patent Document 2). However, in order to manufacture such a thermoelectric module, it is necessary to replace only a part (corner) of the semiconductor chip with a reinforcing element and arrange it. Therefore, the above configuration causes the manufacturing process to be complicated, and the thermoelectric module There is a risk of significantly reducing productivity.

Further, according to Patent Document 2, it is said that the impact resistance can be further improved by not electrically connecting the reinforcing element to the circuit formed by the thermoelectric element. However, in this case, the number of elements that contribute to the thermoelectric effect is reduced. Further, depending on the material constituting the reinforcing element, the reinforcing element may act as a heat conduction path connecting the pair of substrates. As a result, the temperature difference between the front and back of the thermoelectric module becomes small, and it may be difficult for the thermoelectric module as a whole to exhibit the desired performance.

Next, for the purpose of preventing damage to the thermoelectric element due to thermal deformation of the substrate due to the operation of the thermoelectric module, in the central region of the facing surfaces of the pair of substrates, which has an area equivalent to four or more semiconductor chips. It is also known that the semiconductor chips are not arranged and the semiconductor chips are densely arranged in the region other than the central region (see, for example, Patent Document 3). According to this, the distance between the base point of the warp due to thermal stress and the outer periphery of the substrate is shortened to reduce the displacement amount and the force of the warp generated on the outer periphery of the substrate, and the warp is dispersed in each thermoelectric element. Damage to the thermoelectric element due to warping of the substrate can be reduced. However, in this case, since the number of elements that contribute to the effect as a thermoelectric element is reduced as compared with the case where the semiconductor chip is also arranged in the central region, it is difficult to exhibit the desired performance of the thermoelectric module as a whole. There is a risk of becoming.

Further, in Patent Document 3, semiconductor chips are arranged in an odd-numbered × odd-numbered lattice pattern, and electrodes are drawn out from semiconductor chips arranged at both corners on one side of the outer circumference of the arrangement. Several configurations are disclosed. When odd-numbered semiconductor chips are alternately arranged and densely arranged on one side of the outer periphery of the lattice-like arrangement, the semiconductor chips at both ends are of the same type (that is, p-type and p-type or n-type and n-type). ). On the other hand, the two electrodes drawn out from the thermoelectric module need to be connected to different types of semiconductor chips. Therefore, in the thermoelectric module, it is presumed that semiconductor chips of the same type are arranged side by side at least in a part of the array. If a part of the arrangement is disturbed (not alternating) in this way, the manufacturing process is complicated, and the productivity of the thermoelectric module may be significantly reduced.

Further, the bonding strength between the semiconductor chip and the electrode includes, for example, the bonding strength between the material of the semiconductor chip and the bonding layer member provided on the surface thereof by plating or the like, and the bonding between the semiconductor chip and the electrode is formed. Includes the joint strength between each member. Therefore, the bonding strength between the semiconductor chip and the electrode may differ depending on the type of the semiconductor chip (that is, p-type or n-type). Therefore, from the viewpoint of reducing thermal stress and / or damage to the thermoelectric element due to external impact due to the temperature difference between the front and back of the thermoelectric module during operation, the thermoelectric stress and / or impact tends to be concentrated in a grid pattern. It is desirable to arrange a type of semiconductor chip having a higher bonding strength with the electrode at the four corners of the array. In this case, the types of semiconductor chips arranged at the four corners should be the same. However, as described above, in the above configuration, different types of semiconductor chips are arranged at the two adjacent corners, and electrodes are drawn from the respective semiconductor chips. Therefore, in the above configuration, it is impossible to arrange a type of semiconductor chip having a higher bonding strength with the electrode at all four corners, and the thermoelectric element is damaged due to thermal deformation and / or external impact. It is difficult to increase the durability of the thermoelectric module.

As described above, in the technical field, the fact is that a thermoelectric module having high durability, high productivity, high thermoelectric effect and good appearance has not yet been achieved.

Patent No. 4288935 Japanese Unexamined Patent Publication No. 2004-235367 Patent No. 5465829

As described above, in the art, there is a demand for thermoelectric modules that can achieve high durability, high productivity, high thermoelectric effect and good appearance.

The present invention has been made in view of the above problems, and one object of the present invention is to provide a thermoelectric module capable of achieving high durability, high productivity, high thermoelectric effect, and good appearance.

That is, the thermoelectric module according to the present invention (hereinafter, may be referred to as "the module of the present invention") is formed at a predetermined position on a pair of substrates facing each other and facing surfaces of the pair of substrates. A plurality of thermoelectric elements composed of an electrode and two different types of semiconductor chips electrically connected via the electrode formed on one substrate of the pair of substrates are formed on the other substrate of the pair of substrates. It includes a series electric circuit formed by being conducted in the same direction through the electrodes formed in the series, and two terminals for conducting both ends of the series electric circuit and the outside. Further, the two different types of semiconductor chips are arranged so as to form an odd-numbered × odd-numbered grid-like array.

Further, the module of the present invention is configured to satisfy the requirements (a) to (d) listed below.
(A) The two different types of semiconductor chips are alternately arranged in both of the two orthogonal axial directions of the grid array.
(B) Two different types of semiconductor chips constituting the thermoelectric element are adjacent to each other in one of the two orthogonal axial directions of the grid array.
(C) The four semiconductor chips arranged at the four corners of the grid array are all of the same type.
(D) In the central region, which is not the outermost periphery of the grid-like array, the semiconductor chip is arranged at one place where the same type of semiconductor chip as the semiconductor chip arranged at the corner portion should be arranged. Not.

By satisfying the above requirements (a) to (d), the module of the present invention can achieve high durability, high productivity and high thermoelectric effect. Further, since the semiconductor chips are densely arranged on the outermost periphery of the lattice-like arrangement (the place where the semiconductor chips are not arranged is not provided), a good appearance can be achieved.

Other objects, other features and accompanying advantages of the present invention will be readily understood from the description of each embodiment of the invention described with reference to the following drawings.

It is a schematic diagram which shows the example of the arrangement of the semiconductor chip in the thermoelectric module which concerns on the prior art. In the example of a grid-like arrangement of 5 × 5 semiconductor chips in the thermoelectric module (first module) according to the first embodiment of the present invention, a place where the semiconductor chip is not arranged, both ends of the series electric circuit of the thermoelectric element, and the outside. It is a schematic diagram which shows the candidate of the place where two terminals are arranged for making a conduction. It is a schematic diagram which shows the example of the grid-like arrangement of 5 × 5 of the semiconductor chips in the 1st module. It is a schematic diagram which shows the example of the arrangement of a plurality of different types of semiconductor chips in the thermoelectric module which concerns on various examples of this invention and various comparative examples corresponding to the prior art.

<< Problems of thermoelectric modules related to conventional technology >>
Before explaining the thermoelectric module according to various embodiments of the present invention, the problems of the thermoelectric module according to the prior art will be summarized below.

In a thermoelectric module in which semiconductor chips are arranged in a grid pattern, if the semiconductor chips are not arranged at the corners to prevent thermal stress and / or impact from concentrating on the corners and damaging the thermoelectric module, the thermoelectric effect is achieved. Since the number of contributing elements is reduced, the performance of the thermoelectric module is reduced and the mechanical strength is reduced. In addition, it gives the impression that there is a defect such as a defect in the semiconductor chip, which is not preferable in appearance.

If it is possible to prevent the thermoelectric module from being damaged by concentrating thermal stress and / or impact on the corners by replacing a part (particularly the corners) of the semiconductor chip with a reinforcing element, the manufacturing process becomes complicated. , The productivity of the thermoelectric module is reduced. Further, when the reinforcing element is not electrically connected, not only the number of elements contributing to the thermoelectric effect is reduced, but also the reinforcing element acts as a heat conduction path, which leads to deterioration of the performance of the thermoelectric module.

When the damage of the thermoelectric element due to the warp of the substrate is reduced by providing the portion where the semiconductor chip is not arranged in the central region of the lattice-like arrangement, the number of elements contributing to the effect as the thermoelectric element is also reduced.

By the way, FIG. 1 is a schematic diagram showing an example of an arrangement of semiconductor chips in a thermoelectric module according to the prior art. In FIG. 1, the shaded squares and the white squares represent different types of semiconductor chips, and the thick bend lines represent the pattern of a series electric circuit formed by electrically connecting these semiconductor chips. show. Further, the black-painted square represents a place where the semiconductor chip is not placed (hereinafter, may be referred to as a “non-placed place”).

The actual thermoelectric module is formed in addition to the arrangement of a plurality of two different types of semiconductor chips as shown in FIG. 1, a pair of substrates sandwiching the arrangement, and predetermined positions on opposite surfaces of these substrates. As a component, the electrode and two terminals for conducting both ends of the series electric circuit and the outside are included. However, in FIG. 1, the illustration of these components is omitted for the purpose of facilitating explanation and the like. Further, also in the drawings referred to after FIG. 1, some or all of these components may be omitted if necessary.

When a terminal is pulled out from a semiconductor chip arranged at a corner in a thermoelectric module having an odd number of x odd number of lattices, a series of electric circuits formed by connecting a plurality of thermoelectric elements in the same direction are provided at both ends of a series electric circuit. Different types of semiconductor chips need to be placed. Therefore, for example, as shown in FIG. 1A, semiconductor chips of the same type are arranged side by side in at least a part of the array. When the arrangement of the semiconductor chips is partially disturbed (not alternating) in this way, the manufacturing process is complicated and the productivity of the thermoelectric module is lowered. In addition, since the types of semiconductor chips at the four corners of the lattice arrangement are not the same, the bonding strength between the semiconductor chips and the electrodes at the corners cannot be made uniform, and the thermoelectric element is caused by thermal stress and / or impact. It becomes difficult to reduce the damage of the.

When trying to arrange different types of semiconductor chips at both ends of a series electric circuit without disturbing the arrangement of the semiconductor chips as described above, for example, as shown in FIG. 1 (b), the two corners from which the terminals are pulled out It is necessary to omit (do not arrange) one of the semiconductor chips. In this case, since the non-arranged portion is provided at the corner portion, the performance and mechanical strength of the thermoelectric module are deteriorated, or the impression that there is a defect is given.

On the other hand, when the terminals are pulled out from the semiconductor chips arranged at the corners in the thermoelectric module having a non-odd number × non-odd number grid array, for example, as shown in FIG. 1 (c), the semiconductor chips at the corners are It will be a different type. Therefore, it is not necessary to disturb the arrangement of the semiconductor chips as described above. However, also in this case, since the types of the semiconductor chips at the four corners of the lattice arrangement are not the same, the bonding strength between the semiconductor chips and the electrodes at the corners cannot be made uniform, and thermal stress and / or impact It becomes difficult to reduce the damage of the thermoelectric element caused by the above.

As described above, it is difficult to achieve high durability, high productivity, high thermoelectric effect and good appearance in the thermoelectric module according to the prior art.

<< First Embodiment >>
Hereinafter, the thermoelectric module (hereinafter, may be referred to as “first module”) according to the first embodiment of the present invention will be described with reference to the drawings.

<composition>
The first module is electrically connected via a pair of substrates facing each other, electrodes formed at predetermined positions on the facing surfaces of the pair of substrates, and electrodes formed on one of the substrates of the pair of substrates. Series electricity formed by conducting a plurality of thermoelectric elements composed of two different types of semiconductor chips connected to each other in the same direction via the electrodes formed on the other substrate of the pair of substrates. It includes a circuit and two terminals for conducting both ends of the series electric circuit and the outside.

The shape and size of the substrate are appropriately determined according to, for example, the application of the first module. Further, the number of thermoelectric elements incorporated in the first module (that is, the number of semiconductor chips) is appropriately determined according to, for example, the magnitude of the thermoelectric effect required in the application of the first module. However, from the viewpoint of weight reduction and / or miniaturization of the first module, it is desirable that more thermoelectric elements are densely arranged (that is, as tightly as possible) between smaller substrates.

The materials and configurations of the two different types of semiconductor chips can also be appropriately selected depending on, for example, the magnitude of the thermoelectric effect required in the application of the first module. Specifically, a combination of a p-type semiconductor chip (for example, Bi _1.5 Sb _0.5 Te ₃ or the like) and an n-type semiconductor chip (for example, Bi ₂ Te ₃ or the like) can be used.

The electrodes formed at predetermined positions on the facing surfaces of the pair of substrates are made of a good conductor (for example, copper or the like), and are joined to the semiconductor chip by soldering, for example. Typically, the pair of boards is a type of so-called "wiring board".

As described above, the thermoelectric element incorporated in the first module is composed of two different types of semiconductor chips that are electrically connected via electrodes formed on one of the pair of substrates. Then, the plurality of thermoelectric elements are electrically conducted (electrically connected) in the same direction via the electrodes formed on the other substrate of the pair of substrates. That is, the thermoelectric element has a so-called "π-shaped" structure.

Further, the two different types of semiconductor chips are arranged so as to form an odd-numbered × odd-numbered grid-like array. The number of semiconductor chips constituting each side of this grid-like array is also appropriately determined according to, for example, the magnitude of the thermoelectric effect required in the application of the first module.

Further, the first module is configured to satisfy the requirements (a) to (d) listed below.

(A) The two different types of semiconductor chips are alternately arranged in both of the two orthogonal axial directions of the grid array. In other words, two different types of semiconductor chips are arranged in a grid pattern so as to correspond to a so-called "checkerboard pattern".

(B) Two different types of semiconductor chips constituting the thermoelectric element are adjacent to each other in one of the two orthogonal axial directions of the grid array. Technically, it is also possible to form a thermoelectric element by electrically connecting two different types of semiconductor chips located diagonally (diagonally) in a grid-like arrangement. It is also possible to form a thermoelectric element by electrically connecting two different types of semiconductor chips via wiring that bypasses other semiconductor chips. However, such a configuration increases the manufacturing cost of the first module due to, for example, an increase in the substrate area for laying wiring, an increase in electrical resistance due to the addition of wiring, and a decrease in the arrangement density of semiconductor chips. And / or it is not desirable because it may lead to deterioration of performance.

(C) The four semiconductor chips arranged at the four corners of the grid array are all of the same type. Specifically, the four semiconductor chips arranged at the four corners of the grid array are all p-type or all n-type.

(D) In the central region, which is not the outermost periphery of the grid-like array, the semiconductor chip is arranged at one place where the same type of semiconductor chip as the semiconductor chip arranged at the corner portion should be arranged. Not. Here, the "outermost circumference of the grid array" refers to the region in which the semiconductor chips constituting the four sides of the grid array are arranged, and the "central region" is surrounded by the outermost circumference in the grid array. Refers to the area where you are.

In other words, the semiconductor chips are arranged in all the places where the semiconductor chips should be arranged in the central region and the outermost periphery except the places where the semiconductor chips are not arranged (non-arranged parts) as described above. There is. In other words, in the first module, two different types of semiconductor chips are alternately arranged with two different types of semiconductor chips in both of the two orthogonal axial directions of an odd number × odd number of lattice arrays. One semiconductor of the same type as the four semiconductor chips of the same type arranged at the four corners of the first array among the semiconductor chips arranged in the central region which is the region other than the outermost circumference in the first array which is an array. The chips are arranged so as to form a second array, which is an array from which the chips have been removed, and two different types of semiconductor chips constituting the thermoelectric element are adjacent to each other in one of the two orthogonal axial directions of the second array. There is. In the present specification, such a state is referred to as a "densely arranged state".

By the way, in theory, the number of non-arranged parts does not necessarily have to be one. One purpose of providing the non-arranged portion is "to make the number of two different types of semiconductor chips included in the first module the same". Another purpose of providing non-arranged parts is "a plurality of two different types of adjacent semiconductor chips arranged alternately (in a checkered pattern) in an odd-numbered × odd-numbered grid array by conducting them alternately and in series. To make it possible to form a series electric circuit consisting of thermoelectric elements. " As long as these objectives are achieved, the number of non-placements in the central region is not limited to one.

Specifically, when non-arranged parts are not provided in an odd-numbered × odd-numbered grid array, the number of semiconductor chips of the same type as the semiconductor chips arranged at the corners is the number of semiconductor chips of a different type. One more than. Therefore, the number of non-arranged locations provided at the locations where the same type of semiconductor chips as the corner semiconductor chips should be arranged is the number of non-arranged locations provided at the locations where different types of semiconductor chips should be arranged. It is only necessary to increase the number by one. Specifically, for example, in the central region, two non-arranged parts for semiconductor chips of the same type as the corners may be provided and one non-arranged part for semiconductor chips of a different type from the corners may be provided. The former may be provided at three locations and the latter may be provided at two locations.

However, as the number of places where semiconductor chips are not placed (non-placed places) is increased, the number of elements that contribute to the thermoelectric effect decreases, so that the performance of the thermoelectric module and the mechanical strength deteriorate. .. From this point of view, it is desirable that the number of non-placed locations is as small as possible. Therefore, in the first module, only one non-arranged portion for a semiconductor chip of the same type as the corner portion is provided in the central region.

The position where the non-arranged portion is provided in the central region of the first module is not particularly limited as long as it is "a location where a semiconductor chip of the same type as the semiconductor chip arranged at the corner should be arranged". Further, depending on the position of the non-arranged portion determined as described above, the electrodes forming a series electric circuit by alternately electrically connecting a plurality of different types of semiconductor chips and both ends of the series electric circuit. The arrangement of the two terminals for conducting electricity with the outside can be appropriately determined.

For example, FIG. 2 shows an example of a grid-like arrangement of 5 semiconductor chips in the first module, in which a semiconductor chip is not arranged and both ends of a series electric circuit of a thermoelectric element are made conductive with each other. It is a schematic diagram which shows the candidate of the place where one terminal is arranged. In FIG. 2, the shaded squares and the white squares represent different types of semiconductor chips, respectively. In the following description with respect to FIG. 2, the shaded squares represent p-type semiconductor chips, and the white squares represent n-type semiconductor chips. These two different types of semiconductor chips are arranged alternately in both of the two orthogonal axial directions of the grid array. The p-type semiconductor chip (diagonal square) is arranged at the four corners of the outermost periphery, the midpoint of each side, and the four corners and the center of the central region. They are respectively arranged between p-type semiconductor chips.

In the above case, the candidates for the non-arranged locations in the central region are five locations where the same type (p-type) semiconductor chip as the corner portion is arranged. That is, in the first module shown in FIG. 2, the semiconductor chip is not arranged in any one of the five places where the four sides are drawn by thick lines and shown by the diagonally shaded squares.

In addition, candidates for placement locations (terminal conduction locations) of semiconductor chips that are conductive with two terminals for conducting between both ends of a series electric circuit formed by a plurality of thermoelectric elements and the outside are indicated by two upward arrows. It is pointed out. In this example, it is assumed that two terminals are pulled out from one side of the outer peripheral portion which is lower in the figure. In this case, there are six terminal conduction points including the three terminal conduction points candidates shown in (1) to (3) and the three terminal conduction points whose left and right sides are reversed.

Although FIG. 2 shows an example of pulling out two terminals from one side of the outer peripheral portion, the two terminals may be pulled out individually from different sides. However, from the viewpoint of weight reduction and / or miniaturization of the first module, a configuration in which two terminals are pulled out from one side of the outer peripheral portion is desirable (details will be described later).

<effect>
Due to the requirement of (a) above, two different types of semiconductor chips are always alternately arranged in all parts of the grid array (except for the portion where the semiconductor chips are not arranged due to the configuration of (d) above), so that the manufacturing process Can be simplified and the productivity of the module of the present invention can be increased. In addition, since two different types of semiconductor chips are evenly distributed due to such an arrangement, the distribution of mechanical strength in the plane of the lattice-like arrangement becomes more even. As a result, the thermal stress and / or impact acting on the first module can be dispersed more evenly, so that the durability of the first module can be improved.

Further, due to the requirement (b) above, two different types of semiconductor chips constituting the thermoelectric element are adjacent to each other in one of the two orthogonal axial directions of the lattice array, so that these two types of semiconductor chips can be used. The shape of the electrically connected electrodes can be simplified and the length can be minimized. As a result, the manufacturing process can be simplified and the productivity of the first module can be increased.

Further, according to the requirement (c) above, all four semiconductor chips arranged at the four corners of the grid array are of the same type. Therefore, it is possible to equalize the mechanical strengths at the four corners of the grid-like array where the thermal stress and / or the external impact tends to be concentrated due to the temperature difference between the front and back of the thermoelectric module during operation. And / or the effect of impact can be avoided from concentrating on some corners. As a result, the durability of the first module can be increased.

In addition, due to the requirement (d) above, the semiconductor chip is not arranged at one place where the semiconductor chip of the same type as the semiconductor chip arranged at the corner should be arranged in the central region of the lattice-like arrangement. Thereby, a series electric circuit formed by a plurality of thermoelectric elements can be formed by using a plurality of different types of semiconductor chips alternately arranged in an odd number × odd number lattice array. That is, a high thermoelectric effect can be achieved by densely arranging a plurality of thermoelectric elements.

On the other hand, since the portion where the semiconductor chip is not arranged (non-arranged portion) is not provided on the outermost circumference of the grid-like arrangement as described above, it seems as if the first module has a defect such as a defect of the semiconductor chip. A good appearance can be achieved without giving.

As described above, according to the first module, high durability, high productivity, high thermoelectric effect and good appearance can be achieved.

Here, for reference, a specific example of the grid-like arrangement of the semiconductor chips in the first module is shown. FIG. 3 is a schematic diagram illustrating examples of a plurality of 5 × 5 grid-like arrays of semiconductor chips (specifically, 4 of (a) to (d)) in the first module. In FIG. 3, as in FIG. 1 described above, the shaded squares and the white squares represent different types of semiconductor chips, and the thick bending lines are obtained by electrically connecting these semiconductor chips. Represents the pattern of the formed series electric circuit. The black squares represent places where the semiconductor chips are not placed (non-placed places).

As illustrated in FIG. 3, the first module can be configured as a thermoelectric module arranged in a grid pattern of 5 × 5, and can achieve the various effects described above. In the first module illustrated in FIG. 3, a grid-like arrangement of 5 × 5 semiconductor chips was adopted as described above, but for example, 7 × 7 and 9 × 9, etc., 5 × An odd-numbered × odd-numbered grid-like array other than five may be adopted. Further, an odd number of semiconductor chips constituting adjacent sides of the grid array, such as 5 × 7 and 7 × 9, may be adopted.

<< Second Embodiment >>
Hereinafter, the thermoelectric module (hereinafter, may be referred to as “second module”) according to the second embodiment of the present invention will be described with reference to the drawings.

As described above, the bonding strength between the semiconductor chip and the electrode may differ depending on the type of the semiconductor chip (that is, p-type or n-type). Therefore, from the viewpoint of reducing thermal stress and / or damage to the thermoelectric element due to external impact due to the temperature difference between the front and back of the thermoelectric module during operation, the thermoelectric stress and / or impact tends to be concentrated in the lattice. It is desirable to arrange a type of semiconductor chip having a higher bonding strength with the electrode at the four corners of the array.

<composition>
Therefore, the second module has the same configuration as the first module described above, and the bonding strength between the semiconductor chip and the electrode arranged at the corners of the grid array is arranged at the corners of the grid array. It is configured to be higher than the bonding strength between the semiconductor chip of a different type from the semiconductor chip and the electrode.

In other words, the second module is configured such that, of the two different types of semiconductor chips, the semiconductor chip having the higher bonding strength with the electrode is arranged at the corner of the grid array. For example, when the bonding strength between the p-type semiconductor chip and the electrode is higher than the bonding strength between the n-type semiconductor chip and the electrode, the second module is arranged so that the p-type semiconductor chip is arranged at the corner of the grid pattern. It is composed. On the contrary, when the bonding strength between the n-type semiconductor chip and the electrode is higher than the bonding strength between the p-type semiconductor chip and the electrode, the second module is arranged so that the n-type semiconductor chip is arranged at the corner of the lattice arrangement. Is configured. The high bonding strength between the semiconductor chip and the electrode corresponds to the high mechanical strength of the bonding layer between the semiconductor chip and the electrode.

<effect>
According to the second module, a type of semiconductor chip having a higher bonding strength with an electrode is arranged at four corners of a grid-like arrangement in which thermal stress and / or impact tends to be concentrated. Therefore, the durability of the thermoelectric module can be more effectively reduced by more effectively reducing the thermal stress caused by the temperature difference between the front and back surfaces of the thermoelectric module and / or the damage of the thermoelectric element caused by the impact from the outside during operation. Can be enhanced.

<< Third Embodiment >>
Hereinafter, the thermoelectric module (hereinafter, may be referred to as “third module”) according to the third embodiment of the present invention will be described with reference to the drawings.

By the way, the mechanical strength of the semiconductor chip itself may also differ depending on the type of the semiconductor chip (that is, p-type or n-type). Therefore, from the viewpoint of reducing thermal stress and / or damage to the thermoelectric element due to external impact due to the temperature difference between the front and back of the thermoelectric module during operation, the thermoelectric stress and / or impact tends to be concentrated in the lattice. It is desirable to arrange a type of semiconductor chip having higher mechanical strength at the four corners of the array.

<composition>
Therefore, in the same configuration as the first module or the second module described above, the third module has the mechanical strength of the semiconductor chip arranged at the corners of the grid array at the corners of the grid array. It is configured to be higher than the mechanical strength of the semiconductor chip of a different type from the semiconductor chip to be arranged.

In other words, the third module is configured such that the semiconductor chip having the higher mechanical strength of the two different types of semiconductor chips is arranged at the corner of the grid array. For example, when the mechanical strength of the p-type semiconductor chip is higher than the mechanical strength of the n-type semiconductor chip, the third module is configured so that the p-type semiconductor chips are arranged at the corners of the grid-like arrangement. On the contrary, when the mechanical strength of the n-type semiconductor chip is higher than the mechanical strength of the p-type semiconductor chip, the third module is configured so that the n-type semiconductor chips are arranged at the corners of the grid-like arrangement. ..

<effect>
According to the third module, a type of semiconductor chip having higher mechanical strength is arranged at the four corners of the grid-like array where thermal stress and / or impact tends to be concentrated. Therefore, the durability of the thermoelectric module can be more effectively reduced by more effectively reducing the thermal stress caused by the temperature difference between the front and back surfaces of the thermoelectric module and / or the damage of the thermoelectric element caused by the impact from the outside during operation. Can be enhanced.

<< Fourth Embodiment >>
Hereinafter, the thermoelectric module (hereinafter, may be referred to as “fourth module”) according to the fourth embodiment of the present invention will be described with reference to the drawings.

As described above, in the first module, one place where the same type of semiconductor chip as the semiconductor chip arranged at the corner should be arranged in the central region which is not the outermost region of the grid-like arrangement of the semiconductor chips. No semiconductor chip is placed in. That is, the above-mentioned "non-arranged portion" is provided in the central region. Thereby, a series electric circuit formed by a plurality of thermoelectric elements can be formed by using a plurality of different types of semiconductor chips alternately arranged in an odd number × odd number lattice array. That is, a high thermoelectric effect can be achieved by densely arranging a plurality of thermoelectric elements.

Further, since an odd-numbered × odd-numbered grid-like array is formed by a plurality of different types of semiconductor chips arranged alternately in this way, the same type of semiconductor chips are placed on all four corners of the grid-like array. Can be placed. Therefore, it is possible to equalize the mechanical strengths at the four corners of the grid-like array where the thermal stress and / or the external impact tends to be concentrated due to the temperature difference between the front and back of the thermoelectric module during operation. And / or the effect of impact can be avoided from concentrating on some corners. As a result, the durability of the thermoelectric module can be improved.

However, by providing the non-arranged portion as described above, the number of semiconductor chips as members for connecting the pair of substrates is reduced, so that the mechanical strength of the thermoelectric module as a whole is lowered to some extent. As a countermeasure to this problem, for example, a thermoelectric module is formed by arranging a semiconductor chip or other member electrically insulated from a series electric circuit formed by a thermoelectric element in a non-arranged place and joining it to a pair of substrates. It is conceivable to prevent a decrease in mechanical strength as a whole.

However, when the thermal conductivity of the semiconductor chip or other member arranged in the non-arranged portion is high as described above, the non-arranged portion acts as a heat conduction path connecting the pair of substrates, and the front and back of the thermoelectric module. There is a risk that the temperature difference between the two will become smaller and it will be difficult to achieve the desired performance of the thermoelectric module as a whole. In order to reduce such problems, it is desirable to keep the thermal conductivity in the non-arranged parts relatively low.

<composition>
Therefore, in the same configuration as the thermoelectric module of any of the first module to the third module described above, the fourth module has nothing arranged in the central region where the semiconductor chip is not arranged. Alternatively, a member having a thermal conductivity lower than that of the semiconductor chip is arranged.

When nothing is arranged in the place where the semiconductor chip is not arranged (non-arranged part) in the central region, there is a gap in the place, and the heat conduction through the place is slower than the heat conduction through the semiconductor chip. On the other hand, when a member having a thermal conductivity lower than that of the semiconductor chip is arranged at the non-arranged portion in the central region, the heat conduction through the portion is also slower than the heat conduction via the semiconductor chip.

<effect>
As is clear from the above, according to the fourth module, the non-arranged portion acts as a heat conduction path connecting the pair of substrates, the temperature difference between the front and back of the thermoelectric module becomes small, and the thermoelectric module as a whole is located. It is possible to avoid the problem that it becomes difficult to demonstrate the performance of the period.

<< Fifth Embodiment >>
Hereinafter, the thermoelectric module (hereinafter, may be referred to as “fifth module”) according to the fifth embodiment of the present invention will be described with reference to the drawings.

As described above, these semiconductors have two terminals for conducting between both ends of a series electric circuit of a thermoelectric element formed by alternately and electrically connecting two different types of semiconductor chips and the outside. It may be pulled out from only one side of the outer peripheral portion of the grid-like arrangement of chips, or may be pulled out individually from different sides. However, when the two terminals are pulled out individually from different sides, a space for pulling out the terminals is required on each side. Therefore, from the viewpoint of weight reduction and / or miniaturization of the thermoelectric module, from one side of the outer peripheral portion. A configuration that pulls out two terminals is desirable.

In the above case, in the module of the present invention, since two different types of semiconductor chips are alternately arranged in an odd-numbered × odd-numbered lattice arrangement, semiconductors arranged at both ends of one side of the outer peripheral portion, that is, at the corners. The types of chips are the same.

<composition>
Therefore, the fifth module has the same configuration as the thermoelectric module of any of the first module to the fourth module described above, and the two terminals form the same side of the outermost periphery of the grid-like array. At least one of the two different types of semiconductor chips, which is electrically connected to the end face of the two different types of semiconductor chips on the same substrate side and is electrically connected to the two terminals, is other than the corners of the grid array. Is located in.

In the above, the end face of the semiconductor chip through which the two terminals are conducted is also the end face of the thermoelectric element composed of two different types of semiconductor chips. Further, the arrangement of the two terminals is not particularly limited as long as both of them are not arranged at the corners of the grid array. For example, both of the two terminals may be arranged outside the corners of the grid array, or one of the two terminals may be arranged at the corners of the grid array and the other of the two terminals may be arranged in the grid array. It may be arranged other than the corner part of.

<effect>
According to the above, in the module of the present invention in which two different types of semiconductor chips are alternately arranged in an odd-numbered × odd-numbered lattice arrangement, two for conducting conduction between both ends of a series electric circuit of a thermoelectric element and the outside. It is possible to achieve weight reduction and / or miniaturization of the thermoelectric module while securing terminals.

Here, some specific examples will be described with respect to the arrangement of a plurality of different types of semiconductor chips in the thermoelectric module according to various examples of the present invention.

FIG. 4 is a schematic diagram showing an example of an arrangement of two different types of semiconductor chips in a thermoelectric module according to various examples of the present invention and various comparative examples corresponding to the prior art. In any of the examples shown in FIG. 4, the arrangement of the semiconductor chips was a grid-like arrangement of 5 × 5. As described above, the actual thermoelectric module is formed in addition to the arrangement of two different types of semiconductor chips, a pair of substrates sandwiching the arrangement, and a predetermined position on the facing surfaces of these substrates. It includes two terminals as components for conducting conduction between both ends of a series electric circuit of an electrode and a thermoelectric element and the outside. However, in FIG. 4, for the purpose of facilitating the explanation, the substrate is formed on the upper side (front side toward FIG. 4) of the pair of substrates sandwiching the array of semiconductor chips, and the upper substrate. The electrodes are omitted unless otherwise specified.

First, in the first embodiment, the p-type semiconductor chip is arranged at all four corners of the grid-like arrangement of the semiconductor chips, and the semiconductor chip is arranged at a position where the p-type semiconductor chip should be arranged in the central region. Other than that, p-type semiconductor chips and n-type semiconductor chips are arranged alternately. Further, one of the semiconductor chips to which the two terminals for conducting the both ends of the series electric circuit of the thermoelectric element and the outside are conducted is arranged at a place other than the corner portion of the lattice-like arrangement.

Next, in the second embodiment, as in the first embodiment, the p-type semiconductor chips are arranged at all four corners of the grid-like arrangement of the semiconductor chips, and the p-type semiconductor chips are arranged in the central region. The semiconductor chips are not arranged at the places where they should be, and the p-type semiconductor chips and the n-type semiconductor chips are alternately arranged in other places. However, the semiconductor chips in which the two terminals for conducting the both ends of the series electric circuit of the thermoelectric element and the outside are conducted are arranged at places other than the corners of the lattice-like arrangement.

Next, in the third embodiment, as in the first embodiment, the p-type semiconductor chips are arranged at all four corners of the grid-like arrangement of the semiconductor chips, and the p-type semiconductor chips are arranged in the central region. The semiconductor chips are not arranged at the places where they should be, and the p-type semiconductor chips and the n-type semiconductor chips are alternately arranged in other places. However, the position of the non-arranged portion in the central region is different from that of the first embodiment. Further, one of the semiconductor chips to which the two terminals for conducting the both ends of the series electric circuit of the thermoelectric element and the outside are conducted is arranged at a place other than the corner portion of the lattice-like arrangement.

Next, Example 4 has the same configuration as that of Example 1. However, lead wires are connected to both ends of the series electric circuit of the thermoelectric element and the two terminals for conducting the outside.

Next, Example 5 has the same configuration as that of Example 1. However, of the two terminals for conducting between both ends of the series electric circuit of the thermoelectric element and the outside, the terminal that is conducting to the semiconductor chip arranged at a place other than the corner of the grid array is the terminal. An electrode extending to the nearest corner extends to the corner, and a lead wire is connected to the electrode and the other electrode.

Next, Example 6 has the same configuration as that of Example 5. However, in the sixth embodiment, a post for wire bonding wiring is connected instead of the lead wire in the fifth embodiment.

The thermoelectric modules according to the first to sixth embodiments described above satisfy all the above-mentioned requirements (1) to (4). Therefore, high durability, high productivity, high thermoelectric effect and good appearance can be achieved.

On the other hand, in the thermoelectric module according to Comparative Example 1, which is one example of the thermoelectric module according to the prior art, the types of the semiconductor chips arranged at the four corners of the grid-like arrangement of the semiconductor chips are not the same, and the type is p-type. The semiconductor chips and the n-type semiconductor chips are not arranged alternately, and the conductive semiconductor chips of the two terminals for conducting the both ends of the series electric circuit of the thermoelectric element and the outside are the corners of the lattice arrangement. It is placed in the department. The thermoelectric module according to Comparative Example 1 corresponds to the thermoelectric module according to the prior art shown in FIG. 1 (a) described above. In order to form a pattern of a series electric circuit similar to that shown in FIG. 1 (a), it is formed on the upper substrate (front side toward FIG. 4) of the pair of substrates sandwiching the array of semiconductor chips. It is necessary to electrically connect the p-type semiconductor chip and the n-type semiconductor chip so as to straddle the non-dispersed portion by the electrode (see the square shown by the broken line in FIG. 4). Since the wiring for electrically connecting the semiconductor chips that are not adjacent to each other is long, it is not desirable because it may lead to deterioration of the performance of the thermoelectric module due to an increase in electric resistance.

Next, in the thermoelectric module according to Comparative Example 2, which is another example of the thermoelectric module according to the prior art, the semiconductor chip is not arranged at one corner of the grid-like arrangement of the semiconductor chips. In addition, one of the two terminals for conducting the conduction between both ends of the series electric circuit of the thermoelectric element and the outside is a semiconductor chip arranged at a position adjacent to a corner where the semiconductor chip is not arranged as described above. It is conducting.

Next, in the thermoelectric module according to Comparative Example 3, which is still another example of the thermoelectric module according to the prior art, the two terminals for conducting the both ends of the series electric circuit of the thermoelectric element and the outside are conducted. All the semiconductor chips are arranged at the corners of the grid-like arrangement. However, the semiconductor chip is not arranged at one corner of the grid-like array of the semiconductor chip.

The thermoelectric modules according to Comparative Examples 1 to 3 described above do not satisfy all of the above-mentioned requirements (1) to (4). Therefore, high durability, high productivity, high thermoelectric effect and good appearance cannot be achieved by these thermoelectric modules according to the prior art.

In the above, for the purpose of explaining the present invention, some embodiments and examples having a specific configuration have been described with reference to the accompanying drawings, but the scope of the present invention is exemplary of these. It should not be construed as being limited to embodiments and examples, and it goes without saying that modifications can be made as appropriate within the scope of claims and the matters described in the specification.

Claims (5)

A pair of substrates facing each other,
Electrodes formed at predetermined positions on opposite surfaces of the pair of substrates, and
A plurality of thermoelectric elements composed of two different types of semiconductor chips electrically connected via the electrodes formed on one substrate of the pair of substrates were formed on the other substrate of the pair of substrates. A series electric circuit formed by conducting in the same direction through the electrodes,
Two terminals for conducting both ends of the series electric circuit and the outside,
The including, in the thermoelectric module,
The two different types of semiconductor chips are the outermost circumferences in the first array, which is an array in which the two different types of semiconductor chips are alternately arranged in both of the two orthogonal axial directions of an odd number × odd number of grid-like arrays. It is an array in which one semiconductor chip of the same type as the four semiconductor chips of the same type arranged at the four corners of the first array is removed from the semiconductor chips arranged in the central region which is not a region. It is arranged so that it becomes the second array ,
Wherein two semiconductor chips having different constituting the thermoelectric elements are adjacent in one of two orthogonal axial directions of the second array,
Thermoelectric module. The thermoelectric module according to claim 1.
The bonding strength between the semiconductor chip and the electrode arranged at the corners of the grid array is different from that of the semiconductor chip arranged at the corners of the grid array. Higher than joint strength,
Thermoelectric module. The thermoelectric module according to claim 1 or 2.
The mechanical strength of the semiconductor chip arranged at the corners of the grid array is higher than the mechanical strength of the semiconductor chip of a different type from the semiconductor chip arranged at the corners of the grid array.
Thermoelectric module. The thermoelectric module according to any one of claims 1 to 3.
Nothing is arranged in the central region where the semiconductor chip is not arranged, or a member having a thermal conductivity lower than the thermal conductivity of the semiconductor chip is arranged.
Thermoelectric module. The thermoelectric module according to any one of claims 1 to 4.
The two terminals are electrically connected to the same substrate-side end faces of two different types of semiconductor chips among the semiconductor chips forming the same side of the outermost periphery of the grid array.
At least one of the two different types of semiconductor chips conductive to the two terminals is arranged outside the corners of the grid array.
Thermoelectric module.

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