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JP6940398B2 - Capacitor - Google Patents
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JP6940398B2 - Capacitor - Google Patents

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JP6940398B2
JP6940398B2 JP2017249576A JP2017249576A JP6940398B2 JP 6940398 B2 JP6940398 B2 JP 6940398B2 JP 2017249576 A JP2017249576 A JP 2017249576A JP 2017249576 A JP2017249576 A JP 2017249576A JP 6940398 B2 JP6940398 B2 JP 6940398B2
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勝義 山口
勝義 山口
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Kyocera Corp
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Description

本開示は、積層型のコンデンサに関する。 The present disclosure relates to multilayer capacitors.

積層型のコンデンサ(以下、コンデンサと表記する。)は、セラミック層と内部電極層とが交互に複数層積層されたコンデンサ本体と、そのコンデンサ本体の端面に設けられた外部電極とを備えた構成となっている(例えば、特許文献1を参照)。 A laminated capacitor (hereinafter referred to as a capacitor) includes a capacitor body in which a plurality of layers of ceramic layers and internal electrode layers are alternately laminated, and an external electrode provided on an end surface of the capacitor body. (See, for example, Patent Document 1).

特開2003−17356号公報Japanese Unexamined Patent Publication No. 2003-17356

本開示のコンデンサは、誘電体層と内部電極層とが交互に複数層積層されたコンデンサ本体を備えているコンデンサであって、前記内部電極層が、金属部と、前記内部電極層を厚み方向に貫通する貫通孔と、前記内部電極層内に存在する閉気孔とを有し、前記内部電極層の断面を、該内部電極層が延びている方向である長手方向に測定したときに、前記貫通孔の前記長手方向の長さの平均値をLopとし、前記閉気孔の前記長手方向の長さの平均値をLcpとし、前記内部電極層の前記長手方向の所定の長さLeの範囲内に含まれる前記貫通孔の前記長手方向の長さの合計をLoptとし、前記所定長さLeの範囲内に含まれる前記閉気孔の前記長手方向の長さの合計をLcptとしたときに、Lcpが0.01μm以上1μm以下、Lcpt/Leが2%以上20%以下、Lopが2μm以上20μm以下、Lopt/Leが8%以上29%以下、(Lcpt+Lopt)/Leが22%以上39%以下、およびLcpt/(Lcpt+Lopt)が5%以上71%以下である。 The capacitor of the present disclosure is a capacitor including a capacitor body in which a plurality of layers of dielectric layers and internal electrode layers are alternately laminated, and the internal electrode layer has a metal portion and the internal electrode layer in the thickness direction. a through hole penetrating in, possess a closed pores present in the internal electrode layers, the cross-section of the internal electrode layer, when measured in the longitudinal direction in which the internal electrode layer extends, the The average value of the length of the through hole in the longitudinal direction is Lop, the average value of the length of the closed hole in the longitudinal direction is Lcp, and the inside electrode layer is within the range of the predetermined length Le in the longitudinal direction. When the total length of the through hole included in the above in the longitudinal direction is Lopt and the total length of the closed hole included in the predetermined length Le is Lcpt, Lcp. Is 0.01 μm or more and 1 μm or less, Lcpt / Le is 2% or more and 20% or less, Lop is 2 μm or more and 20 μm or less, Lopt / Le is 8% or more and 29% or less, (Lcpt + Lopt) / Le is 22% or more and 39% or less, And Lcpt / (Lcpt + Lopt) is 5% or more and 71% or less.

コンデンサの一実施形態を模式的に示す斜視図である。It is a perspective view which shows one Embodiment of a capacitor schematically. 図1のii−ii線断面図である。FIG. 1 is a cross-sectional view taken along the line ii-ii of FIG. 図2のA部を拡大した断面図である。It is a cross-sectional view which enlarged the part A of FIG. 図2のiv−iv線断面図である。FIG. 2 is a cross-sectional view taken along the line iv-iv of FIG. 図2のiv−iv線断面におけるA部周辺を拡大した平面透視図である。It is a plan perspective view which enlarged the periphery of part A in the iv-iv line cross section of FIG.

近年、例えば、モバイル型の電子機器のさらなる小型化および高性能化に伴い、コンデンサは小型・高容量化とともに、耐電圧の向上が求められている。 In recent years, for example, with the further miniaturization and higher performance of mobile electronic devices, capacitors are required to be smaller and have a higher capacity and to have an improved withstand voltage.

実施形態のコンデンサは、コンデンサ本体1の対向する2つの端面にそれぞれ外部電極3を有する。コンデンサ本体1は、誘電体層5と内部電極層7とが交互に積層された構成である。コンデンサ本体1では、誘電体層5および内部電極層7の積層数を少なく図示しているが、本実施形態はこれに限らず、積層数が数百層にも及ぶ構成まで含まれる。 The capacitor of the embodiment has external electrodes 3 on two opposing end faces of the capacitor body 1. The capacitor body 1 has a structure in which the dielectric layer 5 and the internal electrode layer 7 are alternately laminated. In the capacitor main body 1, the number of layers of the dielectric layer 5 and the internal electrode layer 7 is shown to be small, but the present embodiment is not limited to this, and includes a configuration in which the number of layers reaches several hundred layers.

実施形態のコンデンサは、内部電極層7が、金属部7aとともに、当該内部電極層7を厚み方向に貫通する貫通孔9と、内部電極層7内に存在する閉気孔11とを有する。 The capacitor of the embodiment has an internal electrode layer 7 together with a metal portion 7a, a through hole 9 penetrating the internal electrode layer 7 in the thickness direction, and a closed hole 11 existing in the internal electrode layer 7.

内部電極層7内に存在する貫通孔9および閉気孔11を、図3、図4および図5を基にして説明する。図3は、図2のA部を拡大した断面図であり、コンデンサ本体1の縦断面における一部分を示した拡大図である。この場合、1層の内部電極層7が上下から2つの誘電体層5に挟まれた状態を成している。図3では、内部電極層7の断面を、その内部電極層7が延びている方向である長手方向に測定したときの所定の長さLeは、貫通孔9および閉気孔11がそれぞれ1個となっているが、実際の長さLeの範囲内には、貫通孔9および閉気孔11がそれぞれ複数個づつ含まれる。図4は、図2のiv−iv線断面図である。図4は、積層された誘電体層5と内部電極層7とを平面視した状態を示している。図5は、図2のiv−iv線断面におけるA部周辺を拡大した平面透視図である。 The through holes 9 and the closed air holes 11 existing in the internal electrode layer 7 will be described with reference to FIGS. 3, 4, and 5. FIG. 3 is an enlarged cross-sectional view of part A of FIG. 2, which is an enlarged view showing a part of the vertical cross section of the capacitor main body 1. In this case, one internal electrode layer 7 is sandwiched between two dielectric layers 5 from above and below. In FIG. 3, the predetermined length Le when the cross section of the internal electrode layer 7 is measured in the longitudinal direction, which is the direction in which the internal electrode layer 7 extends, has one through hole 9 and one closed hole 11, respectively. However, within the range of the actual length Le, a plurality of through holes 9 and a plurality of closed holes 11 are included. FIG. 4 is a cross-sectional view taken along the line iv-iv of FIG. FIG. 4 shows a state in which the laminated dielectric layer 5 and the internal electrode layer 7 are viewed in a plan view. FIG. 5 is an enlarged plan perspective view of the periphery of part A in the iv-iv line cross section of FIG.

実施形態のコンデンサにおいて、内部電極層7は貫通孔9および閉気孔11を有してい
る。貫通孔9には誘電体層5の磁器の一部が入り充填されている場合がある。閉気孔11の内部は空の状態である。
In the capacitor of the embodiment, the internal electrode layer 7 has a through hole 9 and a closed air hole 11. The through hole 9 may be filled with a part of the porcelain of the dielectric layer 5. The inside of the closed air hole 11 is empty.

内部電極層7が貫通孔9と閉気孔11とを有する場合には、内部電極層7が貫通孔9と閉気孔11とを合わせた割合と同程度に、内部電極層7が貫通孔9だけを有する場合に比較して、内部電極層7の有効面積の低下を抑えることができる。これによりコンデンサの静電容量の低下を抑えることができる。静電容量をより設計値に近い値にすることができる。また、以下に示す理由により耐電圧を高めることができる。 When the internal electrode layer 7 has a through hole 9 and a closed hole 11, the internal electrode layer 7 has only the through hole 9 as much as the ratio of the through hole 9 and the closed hole 11 combined. It is possible to suppress a decrease in the effective area of the internal electrode layer 7 as compared with the case of having. As a result, it is possible to suppress a decrease in the capacitance of the capacitor. The capacitance can be set to a value closer to the design value. In addition, the withstand voltage can be increased for the following reasons.

コンデンサに電圧が印加されると、図4に示すように、内部電極層7の全体に電子eが充電されるようになる。この場合、電子eはマイナスの電荷を持っている。このため電子eは内部電極層7内において反発し合っている。この場合、内部電極層7(金属部7a)以外の領域15(空気または誘電体層5の一部の磁器の部分)は、内部電極層7の金属部7aに比較して電子eの濃度が低くなっている。 When a voltage is applied to the capacitor, as shown in FIG. 4, electrons e are charged to the entire internal electrode layer 7. In this case, the electron e has a negative charge. Therefore, the electrons e repel each other in the internal electrode layer 7. In this case, the region 15 (air or a part of the porcelain portion of the dielectric layer 5) other than the internal electrode layer 7 (metal portion 7a) has an electron e concentration as compared with the metal portion 7a of the internal electrode layer 7. Is low.

コンデンサに十分高い電圧が印加されると、内部電極層7では電子eがそれ以上移動できないような状態になる。このため、内部電極層7に貫通孔9および閉気孔11が無く、全面が金属部7aによって構成されている場合には、電子eは、内部電極層7の中で角部7dおよびエッジ部7eに偏って分布する傾向にある。 When a sufficiently high voltage is applied to the capacitor, the electron e cannot move any further in the internal electrode layer 7. Therefore, when the internal electrode layer 7 does not have the through hole 9 and the air-closing hole 11, and the entire surface is composed of the metal portion 7a, the electron e is formed in the corner portion 7d and the edge portion in the internal electrode layer 7. It tends to be unevenly distributed in 7e.

これに対し、図5に示すように、内部電極層7の面内に貫通孔9や閉気孔11など金属部7a以外の領域15が存在すると、元々、内部電極層7の中で、角部7dおよびエッジ部7eに偏って分布していた電子eが、貫通孔9および閉気孔11などの近傍(符号7c)にも分布するようになる。つまり、内部電極層7中に存在していた電子eの偏在が緩和され、内部電極層7の角部7dおよびエッジ部7eにおける電子eの密度が低くなる。言い換えると、内部電極層7の角部7dおよびエッジ部7eにおける電束密度を低くすることができる。これにより内部電極層7の面内において電束(電気力線を束ねたもの)密度の高い部分によって生じる電気力線の出発点を分散させることができる。その結果、電束密度D/ε(比誘電率)=E(電界の強さ)の関係式から分かるように、局所的な電束密度の低下により、内部電極層7の角部7dおよびエッジ部7eにおける電界強度を低くすることができる。これによりコンデンサに局所的に生じる電界強度が低くなり、耐電圧の低下を抑えることができる。 On the other hand, as shown in FIG. 5, when the region 15 other than the metal portion 7a such as the through hole 9 and the closed air hole 11 exists in the plane of the internal electrode layer 7, the corner portion originally exists in the internal electrode layer 7. The electrons e − that were unevenly distributed in the 7d and the edge portion 7e are now distributed in the vicinity (reference numeral 7c) of the through hole 9 and the closed air hole 11. That is, the uneven distribution of the electrons e − existing in the internal electrode layer 7 is alleviated, and the density of the electrons e − in the corner portion 7d and the edge portion 7e of the internal electrode layer 7 becomes low. In other words, the electric flux density at the corner portion 7d and the edge portion 7e of the internal electrode layer 7 can be reduced. As a result, the starting point of the electric line of force generated by the portion having a high density of the electric flux (a bundle of electric lines of force) can be dispersed in the plane of the internal electrode layer 7. As a result, as can be seen from the relational expression of the electric flux density D / ε (relative permittivity) = E (electric field strength), the corner portion 7d and the edge of the internal electrode layer 7 due to the local decrease in the electric field density. The electric field strength in the part 7e can be lowered. As a result, the electric field strength locally generated in the capacitor is lowered, and the decrease in withstand voltage can be suppressed.

この場合、適用されるコンデンサとしては、誘電体層5の厚みが0.4μm以上6μm以下、内部電極層7の厚みが0.8μm以上2μm以下であり、誘電体層5および内部電極層7を1ペアとしたときの積層数が200層以上にもなる小型・高積層のコンデンサが好適なものとなる。 In this case, as the applied capacitor, the thickness of the dielectric layer 5 is 0.4 μm or more and 6 μm or less, the thickness of the internal electrode layer 7 is 0.8 μm or more and 2 μm or less, and the dielectric layer 5 and the internal electrode layer 7 are used. A small and highly laminated capacitor having 200 or more layers when one pair is formed is suitable.

また、内部電極層7の断面を、内部電極層7が延びている方向である長手方向に測定したときに、金属部7aと貫通孔9と閉気孔11とを含めた所定の長さをLeとする。貫通孔9の長手方向の長さの平均値をLopとする。閉気孔11の長手方向の長さの平均値をLcpとする。内部電極層7の長手方向の所定の長さLeの範囲内に含まれる貫通孔9の長手方向の長さの合計をLoptとし、所定長さLeの範囲内に含まれる閉気孔11の長手方向の長さの合計をLcptとする。このとき、内部電極層7に存在する貫通孔9の平均径(Lop)は2μm以上20μm以下、貫通孔9の割合(Lopt/Le)は8%以上29%以下、閉気孔11の平均径(Lcp)は0.01μm以上1μm以下、閉気孔11の割合(Lcpt/Le)は2%以上20%以下、貫通孔9と閉気孔11とを合わせた割合(Lcpt+Lopt)/Leは22%以上39%以下、貫通孔9と閉気孔11とを合わせた割合に対する閉気孔11の割合Lcpt/(Lcpt+Lopt)は5%以上71%以下であるのが良い。このとき内部電極層7の被覆率は70%以上92%以下である
のが良い。この場合、内部電極層7の被覆率は、(Le−Lopt)/Leとして求められる値である。
Further, when the cross section of the internal electrode layer 7 is measured in the longitudinal direction, which is the direction in which the internal electrode layer 7 extends, Le has a predetermined length including the metal portion 7a, the through hole 9, and the air closure hole 11. And. Let Lo be the average value of the lengths of the through holes 9 in the longitudinal direction. Let Lcp be the average value of the lengths of the closed holes 11 in the longitudinal direction. The total length of the through holes 9 included in the range of the predetermined length Le in the longitudinal direction of the internal electrode layer 7 in the longitudinal direction is Lot, and the longitudinal direction of the air-closing holes 11 included in the range of the predetermined length Le. Let Lcpt be the total length of. At this time, the average diameter (Lop) of the through holes 9 existing in the internal electrode layer 7 is 2 μm or more and 20 μm or less, the ratio (Lop / Le) of the through holes 9 is 8% or more and 29% or less, and the average diameter of the closed pores 11 (Lop). Lcp) is 0.01 μm or more and 1 μm or less, the ratio of closed holes 11 (Lcpt / Le) is 2% or more and 20% or less, and the combined ratio of through holes 9 and closed holes 11 (Lcpt + Lopt) / Le is 22% or more 39. % Or less, the ratio of the closed pores 11 to the combined ratio of the through holes 9 and the closed pores 11 Lcpt / (Lcpt + Lopt) is preferably 5% or more and 71% or less. At this time, the coverage of the internal electrode layer 7 is preferably 70% or more and 92% or less. In this case, the coverage of the internal electrode layer 7 is a value obtained as (Le-Lopt) / Le.

実施形態のコンデンサは、後述するように、上記した内部電極層7に存在する貫通孔9の平均径(Lop)、貫通孔9の割合(Lopt/Le)、閉気孔11の平均径(Lcp)、閉気孔11の割合(Lcpt/Le)、貫通孔9と閉気孔11とを合わせた割合に対する閉気孔11の割合(Lcpt/(Lcpt+Lopt)、貫通孔9と閉気孔11とを合わせた割合(Lcpt+Lopt)/Leおよび内部電極層7の被覆率を限定すると、耐電圧および静電容量を高めることができる。また、クラックなどの発生割合を低くすることができる。 As will be described later, the capacitor of the embodiment has an average diameter (Lop) of through holes 9 existing in the internal electrode layer 7 described above, a ratio of through holes 9 (Lop / Le), and an average diameter of closed pores 11 (Lcp). , The ratio of the closed holes 11 (Lcpt / Le), the ratio of the closed holes 11 to the combined ratio of the through holes 9 and the closed holes 11 (Lcpt / (Lcpt + Lopt), the combined ratio of the through holes 9 and the closed holes 11 (Lcpt / (Lcpt + Lopt)) By limiting the coverage of Lcpt + Lopt) / Le and the internal electrode layer 7, the withstand voltage and capacitance can be increased, and the rate of occurrence of cracks and the like can be reduced.

以下、貫通孔9および閉気孔11の長さおよび割合の求め方について、図3を基にして説明する。まず、コンデンサ本体1の断面から図2に示すA部に相当する領域を抽出する。この場合、抽出する領域は、金属部7aとともに、それぞれ複数の貫通孔9および閉気孔11を含むようにする。抽出する領域は、境界に貫通孔9および閉気孔11が含まれない範囲とする。領域の境界は、領域以外の貫通孔9または閉気孔11と接するようにする。抽出した所定の範囲の全体の長さをLe、貫通孔9の長さをLop、および閉気孔11の長さをLcpとする。所定長さLeの範囲内に含まれる複数の貫通孔9の長さの合計をLopt、閉気孔11の長さの合計をLcptとする。この場合、貫通孔9の長さLopおよび閉気孔11の長さLcpを求める場合には、内部電極層7の厚み方向において閉気孔11の中央部を通る位置とする。抽出した領域に含まれる貫通孔9および閉気孔11のそれぞれの長さを測定し、それぞれに平均値を求める。貫通孔9の割合は、貫通孔9の長さの合計Loptを用いて、Lopt/Leから求める。閉気孔11の割合は、閉気孔11の長さLcptを用いて、Lcpt/Leから求める。貫通孔9の割合と閉気孔11の割合とを合わせた割合は(Lcpt+Lopt)/Leから求める。貫通孔9の割合と閉気孔11の割合とを合わせた割合(Lcpt+Lopt)に対する閉気孔11の割合はLcpt/(Lcpt+Lopt)から求める。なお、上記した各値は、A部に相当する領域を複数の箇所抽出し、それらの平均値から求めても良い。 Hereinafter, how to obtain the length and ratio of the through hole 9 and the closed air hole 11 will be described with reference to FIG. First, a region corresponding to part A shown in FIG. 2 is extracted from the cross section of the capacitor body 1. In this case, the region to be extracted includes a plurality of through holes 9 and closed holes 11 together with the metal portion 7a, respectively. The region to be extracted shall be a range in which the boundary does not include the through hole 9 and the closed air hole 11. The boundary of the region should be in contact with the through hole 9 or the closed air hole 11 other than the region. Let Le be the total length of the extracted predetermined range, Lo be the length of the through hole 9, and Lcp be the length of the closed air hole 11. The total length of the plurality of through holes 9 included in the range of the predetermined length Le is defined as Lopt, and the total length of the closed pores 11 is defined as Lcpt. In this case, when the length Lop of the through hole 9 and the length Lcp of the closed hole 11 are obtained, the position is set so as to pass through the central portion of the closed hole 11 in the thickness direction of the internal electrode layer 7. The lengths of the through holes 9 and the closed holes 11 included in the extracted region are measured, and the average value is calculated for each. The ratio of the through holes 9 is obtained from Lopt / Le using the total Lopt of the lengths of the through holes 9. The ratio of the closed pores 11 is determined from Lcpt / Le using the length Lcpt of the closed pores 11. The combined ratio of the ratio of the through holes 9 and the ratio of the closed air holes 11 is obtained from (Lcpt + Lopt) / Le. The ratio of the closed pores 11 to the combined ratio (Lcpt + Lopt) of the ratio of the through holes 9 and the ratio of the closed pores 11 is obtained from Lcpt / (Lcpt + Lopt). In addition, each of the above-mentioned values may be obtained from the average value of a plurality of regions corresponding to part A extracted.

実施形態のコンデンサを構成する誘電体層5は、チタン酸バリウムを主成分とする結晶粒子9を主体として含んでいる誘電体磁器が好適である。また、内部電極層7は、銀、パラジウムあるいはこれらの合金、またはニッケル、銅、タングステン、モリブデンおよびこれらを複合させた材料が好適なものとなる。 As the dielectric layer 5 constituting the capacitor of the embodiment, a dielectric porcelain containing mainly crystal particles 9 containing barium titanate as a main component is preferable. Further, for the internal electrode layer 7, silver, palladium or an alloy thereof, or nickel, copper, tungsten, molybdenum or a composite material thereof is suitable.

次に、実施形態のコンデンサを製造する方法について説明する。このコンデンサは、内部電極層用の導体パターンを形成するための金属粉末として微粒の金属粉末を用いること、コンデンサ本体となる成形体の脱脂条件および焼成条件を後述のように制御する以外は、コンデンサの慣用的な製造方法によって作製する。この場合、脱脂条件の中では水素濃度および保持温度が主要な条件となる。焼成条件の中では水素濃度および昇温速度が主要な条件となる。 Next, a method of manufacturing the capacitor of the embodiment will be described. This capacitor uses fine metal powder as the metal powder for forming the conductor pattern for the internal electrode layer, and controls the degreasing conditions and firing conditions of the molded body, which is the main body of the capacitor, as described later. It is manufactured by the conventional manufacturing method of. In this case, the hydrogen concentration and the holding temperature are the main conditions in the degreasing conditions. Among the firing conditions, the hydrogen concentration and the rate of temperature rise are the main conditions.

この場合、コンデンサ本体となる成形体を脱脂、焼成する工程において、脱脂を比較的低い温度で行う。また、脱脂は所定の時間保持する条件を採用する。脱脂を比較的低い温度で行い、かつ所定の時間保持する条件を採用することで、焼成温度が最高温度に達する前の段階において、内部電極層7中に導体ペースト中に含まれていた有機成分(炭素)を意図的に残存させる。残存した有機成分により金属粉末同士の間にネックを形成することができる。また、焼成は昇温速度を高くした条件で行う。焼成では、内部電極層7が焼結する温度領域において、従来のコンデンサを製造する条件よりも水素の濃度を低くした条件に設定する。こうした条件で焼成を行うことにより、内部電極層7が焼結する温度領域において、脱脂後に残存していた有機成分(炭素)が内部電極層7中で気化し、内部電極
層7中に閉気孔11を形成することができる。なお、上記した条件においては、導体パターンを構成している金属粉末が局所的に集まり焼結するため、同時に貫通孔9が形成される。貫通孔9および閉気孔11の平均径および存在割合は上記した脱脂条件および焼成条件によって変化させることができる。
In this case, in the step of degreasing and firing the molded body to be the capacitor body, degreasing is performed at a relatively low temperature. In addition, degreasing adopts the condition of holding for a predetermined time. By adopting the condition that degreasing is performed at a relatively low temperature and held for a predetermined time, the organic component contained in the conductor paste in the internal electrode layer 7 before the firing temperature reaches the maximum temperature is adopted. (Carbon) is intentionally left. The remaining organic component can form a neck between the metal powders. In addition, firing is performed under conditions where the rate of temperature rise is high. In the firing, in the temperature region where the internal electrode layer 7 is sintered, the hydrogen concentration is set to be lower than the condition for manufacturing a conventional capacitor. By firing under these conditions, in the temperature range where the internal electrode layer 7 is sintered, the organic component (carbon) remaining after degreasing is vaporized in the internal electrode layer 7, and the pores are closed in the internal electrode layer 7. 11 can be formed. Under the above conditions, the metal powders constituting the conductor pattern are locally gathered and sintered, so that the through holes 9 are formed at the same time. The average diameter and abundance ratio of the through holes 9 and the closed air holes 11 can be changed according to the above-mentioned degreasing conditions and firing conditions.

以下、コンデンサの例として積層セラミックコンデンサを具体的に作製して誘電特性の評価を行った。まず、原料粉末として、純度が99.9%であり、Ba/Tiのモル比が1.005のチタン酸バリウム粉末および(Ba+Ca)/Tiのモル比が1.005のカルシウムを0.5原子%含むチタン酸バリウム粉末を準備し、これに以下の成分を添加して誘電体粉末を調製した。誘電体粉末の組成は、チタン酸バリウム粉末100モルに対して、V粉末を0.05モル、MgO粉末を0.7モル、希土類元素(Dy)の酸化物粉末を0.4モル、MnCO粉末を0.2モルとし、さらに焼結助剤(SiO=55,BaO=20,CaO=15,LiO=10(モル%)のガラス粉末)を原料粉末(チタン酸バリウム粉末またはカルシウムを含むチタン酸バリウム粉末)100質量部に対して1質量部添加したものとした。 Hereinafter, as an example of the capacitor, a monolithic ceramic capacitor was specifically manufactured and the dielectric characteristics were evaluated. First, as raw material powder, 0.5 atoms of barium titanate powder having a purity of 99.9% and a molar ratio of Ba / Ti of 1.005 and calcium having a molar ratio of (Ba + Ca) / Ti of 1.005. Barium titanate powder containing% was prepared, and the following components were added thereto to prepare a dielectric powder. Composition of the dielectric powder is against barium powder 100 moles titanate, V 2 O 5 powder with 0.05 mol, 0.7 mol of MgO powder, the oxide powder of a rare earth element (Dy 2 O 3) 0 .4 mol, MnCO 3 powder is 0.2 mol, and sintering aid (SiO 2 = 55, BaO = 20, CaO = 15, Li 2 O = 10 (mol%) glass powder) is added as a raw material powder ( 1 part by mass was added to 100 parts by mass of barium titanate powder or barium titanate powder containing calcium).

次に、得られた誘電体粉末を、ポリビニルブチラール樹脂と、トルエンおよびアルコールの混合溶媒中に投入し、直径0.5mmのジルコニアボールを用いて湿式混合してセラミックスラリを調製し、ドクターブレード法により平均厚みが6μmのセラミックグリーンシートを作製した。 Next, the obtained dielectric powder was put into a mixed solvent of polyvinyl butyral resin and toluene and alcohol, and wet-mixed using a zirconia ball having a diameter of 0.5 mm to prepare a ceramic rally, and a doctor blade method was performed. To prepare a ceramic green sheet having an average thickness of 6 μm.

次に、このセラミックグリーンシートの上面にニッケル(Ni)を主成分とする導体ペーストを矩形状の内部電極パターンとなるように複数形成した。内部電極パターンを形成するための導体ペーストは、表1に示すように平均粒径が0.15μm以上0.2μm以下のニッケル粉末を用いた。このニッケル100質量部に対してチタン酸バリウム粉末を共材として10質量部添加したものを用いた。 Next, a plurality of conductor pastes containing nickel (Ni) as a main component were formed on the upper surface of the ceramic green sheet so as to form a rectangular internal electrode pattern. As the conductor paste for forming the internal electrode pattern, nickel powder having an average particle size of 0.15 μm or more and 0.2 μm or less was used as shown in Table 1. A material obtained by adding 10 parts by mass of barium titanate powder as a co-material to 100 parts by mass of this nickel was used.

次に、内部電極パターンを印刷したセラミックグリーンシートを300枚積層し、その上下面に内部電極パターンを印刷していないセラミックグリーンシートをそれぞれ20枚積層し、プレス機を用いて温度60℃、圧力10Pa、時間10分の条件で密着させて積層体を作製し、しかる後、この積層体を、所定の寸法に切断してコンデンサ本体成形体を形成した。 Next, 300 ceramic green sheets on which the internal electrode pattern was printed were laminated, and 20 ceramic green sheets on which the internal electrode pattern was not printed were laminated on the upper and lower surfaces thereof, and the temperature was 60 ° C. and the pressure was increased using a press machine. A laminated body was produced by bringing them into close contact with each other under the conditions of 10 7 Pa and 10 minutes, and then the laminated body was cut to a predetermined size to form a capacitor main body molded body.

次に、コンデンサ本体となる生の成形体を表1に示す条件にて、脱脂および焼成を行い、コンデンサ本体を作製した。この焼成にはバッチ式焼成炉を用いた。 Next, the raw molded body to be the capacitor body was degreased and fired under the conditions shown in Table 1 to prepare the capacitor body. A batch firing furnace was used for this firing.

次に、作製したコンデンサ本体に対して再酸化処理を行った。再酸化処理の条件は、窒素雰囲気中、最高温度を1000℃に設定し、保持時間を5時間とした。 Next, the produced capacitor body was subjected to a reoxidation treatment. The conditions for the reoxidation treatment were set to a maximum temperature of 1000 ° C. and a holding time of 5 hours in a nitrogen atmosphere.

焼成後に得られたコンデンサ本体は、長さが3.2mm、幅が1.6mm、厚みが1.6mmであった。誘電体層の平均厚みは5μmであった。内部電極層の平均厚みは表2に示した。内部電極層の1層当たりの有効面積は1.78mmであった。ここで有効面積とは、コンデンサ本体の異なる端面にそれぞれ露出するように積層方向に交互に形成された内部電極層同士の重なる部分の面積のことである。 The capacitor body obtained after firing had a length of 3.2 mm, a width of 1.6 mm, and a thickness of 1.6 mm. The average thickness of the dielectric layer was 5 μm. The average thickness of the internal electrode layer is shown in Table 2. The effective area of the internal electrode layer per layer was 1.78 mm 2 . Here, the effective area is the area of the overlapping portion of the internal electrode layers formed alternately in the stacking direction so as to be exposed on different end faces of the capacitor body.

次に、コンデンサ本体をバレル研磨した後、コンデンサ本体の両端部にCu粉末とガラスとを含んだ外部電極ペーストを塗布し、850℃で焼き付けを行って外部電極を形成した。その後、電解バレル機を用いて、この外部電極3の表面に、順にNiメッキ及びSnメッキを行い、積層セラミックコンデンサを作製した。 Next, after barrel polishing the capacitor body, an external electrode paste containing Cu powder and glass was applied to both ends of the capacitor body and baked at 850 ° C. to form an external electrode. Then, using an electrolytic barrel machine, the surface of the external electrode 3 was sequentially Ni-plated and Sn-plated to prepare a multilayer ceramic capacitor.

次に、作製した積層セラミックコンデンサについて以下の評価を行った。 Next, the following evaluation was performed on the produced multilayer ceramic capacitor.

内部電極層中の貫通孔および閉気孔についての評価は、上述したように、図3に示した方法により行った。閉気孔および貫通孔の長さとその割合は、コンデンサの断面から図2に示すA部に相当する領域をコンデンサの縦断面から抽出して測定した。抽出した部分の数はコンデンサの積層方向の中段の領域でありかつ幅方向の中央部から3か所とした。この場合、抽出した各領域にはそれぞれ3〜10個の貫通孔および閉気孔が含まれていた。抽出した各領域における全体の長さをLe、貫通孔の長さをLop、および閉気孔の長さをLcpとした。貫通孔の長さの合計をLoptおよび閉気孔の長さの合計をLcptとした。この場合、貫通孔の長さLopおよび閉気孔の長さLcpを求める場合には、内部電極層の厚み方向において閉気孔の中央部を通る位置を測定した。貫通孔の割合はLopt/Leから求めた。閉気孔の割合はLcpt/Leから求めた。貫通孔の割合と閉気孔の割合とを合わせた割合は、(Lcpt+Lopt)/Leから求めた。貫通孔の割合と閉気孔の割合とを合わせた割合に対する閉気孔の割合は、Lcpt/(Lcpt+Lopt)から求めた。表2には、貫通孔の長さLop、閉気孔の長さLcpおよびこれらから求まる各割合を平均値として示した。 As described above, the evaluation of the through holes and the closed pores in the internal electrode layer was performed by the method shown in FIG. The lengths of the closed air holes and the through holes and their ratios were measured by extracting the region corresponding to the part A shown in FIG. 2 from the cross section of the condenser from the vertical cross section of the condenser. The number of extracted portions was the middle region in the capacitor stacking direction and three locations from the central portion in the width direction. In this case, each extracted region contained 3 to 10 through holes and closed pores, respectively. The total length of each extracted region was Le, the length of the through hole was Lop, and the length of the closed pore was Lcp. The total length of the through holes was defined as Lopt, and the total length of the closed pores was defined as Lcpt. In this case, when determining the length Lop of the through hole and the length Lcp of the closed pore, the position passing through the central portion of the closed hole was measured in the thickness direction of the internal electrode layer. The ratio of through holes was determined from Lopt / Le. The ratio of closed pores was determined from Lcpt / Le. The combined ratio of the ratio of through holes and the ratio of closed pores was obtained from (Lcpt + Lopt) / Le. The ratio of the closed pores to the combined ratio of the ratio of the through holes and the ratio of the closed pores was obtained from Lcpt / (Lcpt + Lopt). Table 2 shows the length Lop of the through hole, the length Lcp of the closed pore, and each ratio obtained from these as an average value.

クラックの発生率は、再酸化処理した後のコンデンサ本体をランダムに500個抜き取り、外観検査によって求めた。 The crack occurrence rate was determined by visually inspecting 500 capacitors at random after the reoxidation treatment.

静電容量は、室温(25℃)において、LCRメータを用いて、温度25℃、周波数1.0kHz、AC電圧を1.0Vrmsとして測定した。 The capacitance was measured at room temperature (25 ° C.) using an LCR meter at a temperature of 25 ° C., a frequency of 1.0 kHz, and an AC voltage of 1.0 Vrms.

耐電圧は、昇圧速度を5V/秒として測定した。試料数は30個とし、平均値を求めた。 The withstand voltage was measured with the boost speed as 5 V / sec. The number of samples was 30, and the average value was calculated.

Figure 0006940398
Figure 0006940398

Figure 0006940398
Figure 0006940398

Figure 0006940398
Figure 0006940398

内部電極層用の導体ペーストに平均粒径が0.15μm以上0.19μm以下のニッケル粉末を用い、焼成時の昇温速度を300℃/h以上1000℃/h以下として作製した試料3〜13は、いずれの試料にも内部電極層中に閉気孔が観察された。これらの試料は静電容量が4.5μF以上5.1μF以下であった。また、耐電圧が381V以上451Vであった。クラックの発生率は500個中3個以下であった。 Samples 3 to 13 prepared by using nickel powder having an average particle size of 0.15 μm or more and 0.19 μm or less as the conductor paste for the internal electrode layer and setting the rate of temperature rise during firing to 300 ° C./h or more and 1000 ° C./h or less. In all the samples, closed pores were observed in the internal electrode layer. These samples had a capacitance of 4.5 μF or more and 5.1 μF or less. Further, the withstand voltage was 381 V or more and 451 V. The crack occurrence rate was 3 out of 500 or less.

これらの試料は、内部電極層に存在する貫通孔の平均径(Lop)が2μm以上20μm以下、貫通孔の割合(Lopt/Le)が8%以上29%以下、閉気孔の平均径(Lcp)が0.01μm以上1μm以下、閉気孔の割合(Lcpt/Le)が2%以上20%以下、貫通孔と閉気孔とを合わせた割合(Lopt+Lcpt)/Leが22%以上39%以下、貫通孔と閉気孔とを合わせた割合に対する閉気孔の割合Lcpt/(Lcpt/Lcot)が5%以上71%以下であった。また、内部電極層の被覆率が70%以上92%以下であった。 In these samples, the average diameter (Lop) of through-holes existing in the internal electrode layer is 2 μm or more and 20 μm or less, the ratio of through-holes (Lopt / Le) is 8% or more and 29% or less, and the average diameter of closed pores (Lcp). Is 0.01 μm or more and 1 μm or less, the ratio of closed pores (Lcpt / Le) is 2% or more and 20% or less, the combined ratio of through holes and closed pores (Lopt + Lcpt) / Le is 22% or more and 39% or less, through holes. The ratio of the closed pores to the combined ratio of the closed pores and the closed pores Lcpt / (Lcpt / Lcot) was 5% or more and 71% or less. The coverage of the internal electrode layer was 70% or more and 92% or less.

これらの試料の中で、試料No.4〜6、9〜13は、耐電圧が400V以上451V
以下であった。これらの試料は、閉気孔の平均径(Lcp)が0.5μm以上1μm以下、貫通孔と閉気孔とを合わせた割合(Lopt+Lcpt)/Leが28%以上39%以下であった。
Among these samples, sample No. 4 to 6 and 9 to 13 have a withstand voltage of 400 V or more and 451 V.
It was as follows. In these samples, the average diameter of the closed pores (Lcp) was 0.5 μm or more and 1 μm or less, and the combined ratio of the through holes and the closed pores (Lopt + Lcpt) / Le was 28% or more and 39% or less.

さらに、これらの試料の中で、試料No.4〜6および9〜12は、耐電圧が402V以上451V以下であり、また、クラックの発生が見られなかった。これらの試料は、閉気孔の割合Lcpt/Leが2%以上16%以下、貫通孔の平均径(Lop)が3μm以上20μm以下、貫通孔の割合Lopt/Leが15%以上29%以下であった。また、内部電極層の被覆率が70%以上85%以下であった。 Furthermore, among these samples, sample No. In 4 to 6 and 9 to 12, the withstand voltage was 402 V or more and 451 V or less, and no crack was observed. In these samples, the ratio of closed pores Lcpt / Le was 2% or more and 16% or less, the average diameter of through holes (Lop) was 3 μm or more and 20 μm or less, and the ratio of through holes Lopt / Le was 15% or more and 29% or less. rice field. The coverage of the internal electrode layer was 70% or more and 85% or less.

またさらに、これらの試料の中で、試料No.4、5および9は、耐電圧が430V以上451V以下であった。これらの試料は、貫通孔の平均径(Lop)が12μm以上15μm以下、貫通孔の割合Lopt/Leが19%以上20%以下、閉気孔の平均径が0.6μm以上1μm以下、閉気孔の割合Lcpt/Leが10%以上16%以下。貫通孔と閉気孔とを合わせた割合(Lpp+Lcp)が30%以上35%以下、貫通孔と閉気孔とを合わせた割合に対する閉気孔の割合(Lcp/Lco)が34%以上46%以下であった。また、内部電極層の被覆率は80%以上81%以下であった。 Furthermore, among these samples, sample No. 4, 5 and 9 had a withstand voltage of 430 V or more and 451 V or less. In these samples, the average diameter of the through-holes (Lop) is 12 μm or more and 15 μm or less, the ratio of through-holes Lopt / Le is 19% or more and 20% or less, the average diameter of the closed pores is 0.6 μm or more and 1 μm or less, and the closed pores. Ratio Lcpt / Le is 10% or more and 16% or less. The ratio of the through hole and the closed air hole (Lpp + Lcp) is 30% or more and 35% or less, and the ratio of the closed air hole to the total ratio of the through hole and the closed air hole (Lcp / Lco) is 34% or more and 46% or less. rice field. The coverage of the internal electrode layer was 80% or more and 81% or less.

これに対し、内部電極層用の導体ペーストに平均粒径が0.2μmのニッケル粉末を用い、焼成時の昇温速度を100℃/hとして作製した試料1、2には、内部電極層中に閉気孔が観察されなかった。これらの試料は静電容量が4.5〜4.7μFであったが、耐電圧が365Vであった。また、クラックの発生率が500個中1個であった。 On the other hand, samples 1 and 2 prepared by using nickel powder having an average particle size of 0.2 μm as the conductor paste for the internal electrode layer and setting the rate of temperature rise during firing to 100 ° C./h are included in the internal electrode layer. No closed pores were observed. These samples had a capacitance of 4.5-4.7 μF, but a withstand voltage of 365 V. In addition, the crack occurrence rate was 1 in 500.

1・・・・・・・・・・コンデンサ本体
3・・・・・・・・・・外部電極
5・・・・・・・・・・誘電体層
7・・・・・・・・・・内部電極層
7a・・・・・・・・・金属部
9・・・・・・・・・・貫通孔
11・・・・・・・・・閉気孔
1 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Capacitor body 3 ・ ・ ・ ・ ・ ・ ・ ・ External electrode 5 ・ ・ ・ ・ ・ ・ ・ ・ Dielectric layer 7 ・ ・ ・ ・ ・ ・ ・ ・・ Internal electrode layer 7a ・ ・ ・ ・ ・ ・ ・ ・ ・ Metal part 9 ・ ・ ・ ・ ・ ・ ・ ・ Through hole 11 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Closed hole

Claims (4)

誘電体層と内部電極層とが交互に複数層積層されたコンデンサ本体を備えているコンデンサであって、
前記内部電極層が、金属部と、前記内部電極層を厚み方向に貫通する貫通孔と、前記内部電極層内に存在する閉気孔とを有し、
前記内部電極層の断面を、該内部電極層が延びている方向である長手方向に測定したときに、
前記貫通孔の前記長手方向の長さの平均値をLopとし、
前記閉気孔の前記長手方向の長さの平均値をLcpとし、
前記内部電極層の前記長手方向の所定の長さLeの範囲内に含まれる前記貫通孔の前記長手方向の長さの合計をLoptとし、
前記所定長さLeの範囲内に含まれる前記閉気孔の前記長手方向の長さの合計をLcptとしたときに、
Lcpが0.01μm以上1μm以下、Lcpt/Leが2%以上20%以下、
Lopが2μm以上20μm以下、Lopt/Leが8%以上29%以下、
(Lcpt+Lopt)/Leが22%以上39%以下、
およびLcpt/(Lcpt+Lopt)が5%以上71%以下である、
コンデンサ。
A capacitor having a capacitor body in which a plurality of layers of a dielectric layer and an internal electrode layer are alternately laminated.
The internal electrode layers, and organic metal portion, and a through hole penetrating the inner electrode layer in the thickness direction, and a closed pores present in the internal electrode layers,
When the cross section of the internal electrode layer is measured in the longitudinal direction, which is the direction in which the internal electrode layer extends,
The average value of the lengths of the through holes in the longitudinal direction was defined as Lop.
Let Lcp be the average value of the lengths of the closed pores in the longitudinal direction.
The total length of the through hole in the longitudinal direction included in the range of the predetermined length Le in the longitudinal direction of the internal electrode layer is defined as Lot.
When the total length of the closed pores in the longitudinal direction included in the predetermined length Le range is Lcpt,
Lcp is 0.01 μm or more and 1 μm or less, Lcpt / Le is 2% or more and 20% or less,
Lop is 2 μm or more and 20 μm or less, Lopt / Le is 8% or more and 29% or less,
(Lcpt + Lopt) / Le is 22% or more and 39% or less,
And Lcpt / (Lcpt + Lopt) is 5% or more and 71% or less.
Capacitor.
Lcpが0.5μm以上1μm以下、および(Lcpt+Lopt)/Leが28%以上39%以下である、請求項1に記載のコンデンサ。The capacitor according to claim 1, wherein the Lcp is 0.5 μm or more and 1 μm or less, and (Lcpt + Lopt) / Le is 28% or more and 39% or less. Lcpt/Leが2%以上16%以下、Lopが3μm以上20μm以下、およびLopt/Leが15%以上29%以下である、請求項2に記載のコンデンサ。The capacitor according to claim 2, wherein Lcpt / Le is 2% or more and 16% or less, Lop is 3 μm or more and 20 μm or less, and Lopt / Le is 15% or more and 29% or less. Lcpが0.6μm以上1μm以下、Lcpt/Leが10%以上16%以下、Lcp is 0.6 μm or more and 1 μm or less, Lcpt / Le is 10% or more and 16% or less,
Lopが12μm以上15μm以下、Lopt/Leが19%以上20%以下、Lop is 12 μm or more and 15 μm or less, Lopt / Le is 19% or more and 20% or less,
(Lopt+Lcpt)/Leが30%以上35%以下、およびLcpt/(Lcpt+Lopt)が34%以上46%以下である、請求項3に記載のコンデンサ。The capacitor according to claim 3, wherein (Lopt + Lcpt) / Le is 30% or more and 35% or less, and Lcpt / (Lcpt + Lopt) is 34% or more and 46% or less.
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