JP6943098B2 - How to adjust the resistance value of semiconductor memory devices and memory cells - Google Patents

Description

The disclosure of the present application relates to a method for adjusting a resistance value of a semiconductor memory device and a memory cell.

The Magnetic Tunnel Junction (MTJ) element used in the Magnetoresistive Random Access Memory (MRAM) has a fixed magnetization layer, a free magnetization layer, and a tunnel insulating film arranged between them. include. The magnetization direction of the fixed magnetization layer is fixed, and the magnetization direction of the free magnetization layer is variable. The resistance value of the MTJ element decreases when the magnetization direction of the free magnetization layer and the magnetization direction of the fixed magnetization layer are oriented in the same direction in a parallel state, and increases in an antiparallel state in which they are oriented in opposite directions. .. The parallel state and the antiparallel state may correspond to 0 and 1 of the stored data, respectively.

MRAM is classified into a write wiring type and a spin injection type from the viewpoint of a writing method. In the write wiring type, the magnetization direction of the free magnetization layer is controlled by the magnetic field generated by the current flowing through the write word line. In the spin injection type, the magnetization direction of the free magnetization layer is controlled by the spin transfer effect generated when a current is passed through the MTJ element. Currently, the spin injection type is the mainstream. This is because the spin injection type does not require write wiring, and this point is advantageous for miniaturization, which is indispensable for increasing the capacity.

In the spin injection type, the amount of current required for magnetic field reversal is determined by the current density, and the smaller the element area, the smaller the amount of reversal current required. By miniaturizing the MTJ element, the operating current can be reduced and the memory capacity can be increased, so research and development for miniaturization are being energetically carried out.

A magnetic material is used for the MTJ element, and there is a problem that it is difficult to process by reactive ion etching (hereinafter referred to as RIE) which is usually performed in microfabrication. This is because it is difficult to scrape the magnetic material with the gas used in RIE. Therefore, there is a problem that the size varies when the MTJ element is miniaturized.

For example, when comparing a cylindrical MTJ element having a diameter of 50 nm and a cylindrical MTJ element having a diameter of 20 nm, when the diameter is increased by 1 nm, the amount of increase in the area of the element cross section is 4% and 10%, respectively. Since this amount of area increase is directly linked to the amount of decrease in resistance value, the smaller the size of the MTJ element, the greater the influence of size fluctuation on the element characteristics such as resistance value.

Further, in the process of manufacturing the memory device, there is also a problem that the resistance value and the magnetic characteristics of the MTJ element change. Specifically, in the step of covering the MTJ element with an insulating film such as a silicon oxide film (SiO ₂ ), aluminum oxide (Al ₂ O ₃ ), or a silicon nitride film (Si ₃ N _{4), oxidation during insulation film formation.} Depending on the sex or reducing atmosphere, the MTJ element is oxidized or reduced to change its properties. In this case, since the MTJ element is oxidized or reduced from the outside, the effect of a large MTJ element size is small as in the case of the size fluctuation of the MTJ element described above, but as the size of the MTJ element decreases. , The impact will be non-negligible.

Japanese Patent No. 5824192 Japanese Unexamined Patent Publication No. 2016-171125

In view of the above, a semiconductor memory device capable of reducing characteristic fluctuations in a memory element whose characteristics change due to a redox reaction is desired.

The semiconductor memory device includes a memory element whose characteristics change due to an oxidation-reduction reaction, a first electrode provided on the upper surface of the memory element, a second electrode provided on the lower surface of the memory element, the first electrode, and the first electrode. An amorphous carbon film that covers the entire side surface of the memory element between the two electrodes, an interlayer insulating film provided around the amorphous carbon film, and oxidation during formation between the amorphous carbon film and the interlayer insulating film. Includes a cover insulating film made of a material that does not use atmosphere.

The method of adjusting the resistance value of the memory cell is as follows: the magnetic tunnel coupling element, the first electrode provided on the upper surface of the magnetic tunnel coupling element, the second electrode provided on the lower surface of the magnetic tunnel coupling element, and the magnetic tunnel coupling. In a memory cell including an amorphous carbon film covering the side surface of the element, the magnetic tunnel coupling element is heated by passing an electric current through the first electrode and the second electrode to the magnetic tunnel coupling element, and the heating is performed. This includes each step of lowering the resistance value of the amorphous carbon film by diffusing the elements constituting the magnetic tunnel coupling element into the amorphous carbon film.

According to at least one embodiment, it is possible to reduce the characteristic fluctuation in the memory device whose characteristics change due to the redox reaction.

It is a figure which shows the basic structure and operation of a magnetic tunnel junction. It is a figure which shows an example of the structure of the semiconductor memory apparatus in the Example which used the MTJ element as a memory element. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows each stage of the manufacturing process in the Example of the manufacturing method of the semiconductor memory apparatus. It is a figure which shows the modification of the semiconductor memory apparatus shown in FIG. It is a figure which compares and shows the element resistance value distribution of the semiconductor memory apparatus which used an amorphous carbon film, and the semiconductor memory apparatus which used a silicon oxide film. It is a figure which shows an example of the adjustment method of the resistance value of the memory cell including the MTJ element. It is a figure which shows the effect that the resistance value of a memory cell is reduced by heating by applying an electric current. It is a figure which shows the effect that the reversal current value of an MTJ element is reduced by heating by applying a current.

In the following description, the same or corresponding components will be referred to by the same or corresponding number, and the description thereof will be omitted as appropriate.

FIG. 1 is a diagram showing a basic configuration and operation of a magnetic tunnel junction (MTJ). The MTJ shown in FIGS. 1A and 1B includes a free magnetization layer 11, a tunnel insulating film 12, and a fixed magnetization layer 13. The MTJs shown in FIGS. 1A and 1B are perpendicular magnetization type MTJs, and the magnetization direction is directed not in the direction parallel to the surface of each layer but in the direction perpendicular to the surface of each layer (that is, the thickness direction of the layer). ing.

In the state shown in FIG. 1A, the magnetization direction of the free magnetization layer 11 points downward as indicated by an arrow in the layer, and the magnetization direction of the fixed magnetization layer 13 points upward as indicated by an arrow in the layer. It is suitable. In this way, when the magnetization direction of the free magnetization layer 11 and the magnetization direction of the fixed magnetization layer 13 are antiparallel (a state in which they face opposite directions), the MTJ is in a high resistance state showing a high resistance value. In the state shown in FIG. 1B, the magnetization direction of the free magnetization layer 11 points upward as indicated by an arrow in the layer, and the magnetization direction of the fixed magnetization layer 13 points upward as indicated by an arrow in the layer. It is suitable. In this way, when the magnetization direction of the free magnetization layer 11 and the magnetization direction of the fixed magnetization layer 13 are parallel (a state in which they face the same direction), the MTJ is in a low resistance state showing a low resistance value. Information can be stored in the MTJ by setting the MTJ to a low resistance state or a high resistance state.

The magnetization of the free magnetization layer 11 can be reversed by spin injection magnetization reversal using spin-polarized electron torque (STT). For example, in the state of the magnetization direction shown in FIG. 1A, a voltage is applied so as to connect the free magnetization layer 11 to the positive electrode side and the fixed magnetization layer 13 to the negative electrode side. With this voltage application, electrons flow from the fixed magnetization layer 13 side to the free magnetization layer 11 side (that is, electrons flow toward the upper side of the drawing). While the probability that electrons having a spin in the direction opposite to the magnetization direction of the fixed magnetization layer 13 will pass through the fixed magnetization layer 13 is low, electrons having a spin in the same direction as the magnetization direction of the fixed magnetization layer 13 have a high probability of being fixedly magnetized. It passes through the layer 13 and reaches the free magnetization layer 11. Due to the influence of electrons having spins in the same direction as the magnetization direction of the fixed magnetization layer 13, the magnetization direction of the free magnetization layer 11 is reversed, and the state has magnetization in the same direction as the magnetization direction of the fixed magnetization layer 13 (FIG. 1). The free magnetization layer 11 is set in the state shown in (b)).

Further, in the state of the magnetization direction shown in FIG. 1B, a voltage is applied so as to connect the fixed magnetization layer 13 to the positive electrode side and the free magnetization layer 11 to the negative electrode side. With this voltage application, electrons flow from the free magnetization layer 11 side to the fixed magnetization layer 13 side (that is, electrons flow downward in the drawing). Electrons having a spin in the same direction as the magnetization direction of the fixed magnetization layer 13 pass through the fixed magnetization layer 13 with high probability, while some electrons having a spin in the direction opposite to the magnetization direction of the fixed magnetization layer 13 are fixedly magnetized. It is reflected by the layer 13 and affects the free magnetization layer 11. Due to the influence of electrons having spins in the direction opposite to the magnetization direction of the fixed magnetization layer 13, the magnetization direction of the free magnetization layer 11 is reversed, and the magnetization is in the direction opposite to the magnetization direction of the fixed magnetization layer 13 (FIG. 1 (a). The free magnetization layer 11 is set in the state shown in).

In order to determine whether the MTJ is in a parallel state (low resistance state) or an antiparallel state (high resistance state), a read voltage is applied to the MTJ, and the amount of current flowing through the MTJ is a predetermined threshold current amount. It may be determined whether it is larger or smaller. As the threshold current amount, the amount of current flowing through another MTJ element as a reference can be used. The read-out voltage applied when determining the state of the MTJ is lower than the voltage applied to set the magnetization direction of the MTJ as described above. Further, the voltage applied to set the magnetization direction of the MTJ is equal to or higher than the inversion voltage required to invert the magnetization state of the free magnetization layer 11.

Hereinafter, examples of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a diagram showing an example of a configuration of a semiconductor memory device in an embodiment in which an MTJ element is used as a memory element. The semiconductor memory device shown in FIG. 2 includes a free magnetization layer 11, a tunnel insulating film 12, a fixed magnetization layer 13, a lower electrode 20, an upper electrode 21, an interlayer insulating film 22, an amorphous carbon film 23, a wiring 24, and a wiring 25. ..

The free magnetization layer 11, the tunnel insulating film 12, and the fixed magnetization layer 13 are MTJ elements, which function as memory elements for storing 1-bit information. The free magnetized layer 11 and the fixed magnetized layer 13 include a layer formed of a magnetic material such as CoFe or CoFeB, and may appropriately include a layer formed of Ta, CoPt, Ru or the like. The tunnel insulating film 12 is a layer formed of an insulating material such as MgO (magnesium oxide).

Each of the lower electrode 20 and the upper electrode 21 is a metal layer formed of a metal material, and functions as an electrode for applying a voltage to the MTJ element. Each of the lower electrode 20 and the upper electrode 21 may include a layer formed of Ta, a layer formed of Ru, and a layer formed of Ta from the lower side to the upper side, as described later.

The interlayer insulating film 22 may be formed of an insulating material such as a _{silicon oxide film (SiO 2 film).} The amorphous carbon film 23 is a cover insulating film formed of carbon (amorphous carbon: C) in an amorphous state. The wiring 24 and the wiring 25 may be made of a metal material such as Al or Cu.

A potential on one polar side of the applied voltage is applied to the free magnetization layer 11 side of the MTJ element via the wiring 24 and the upper electrode 21. Further, the potential on the other polar side of the applied voltage is applied to the free magnetization layer 11 side of the MTJ element via the wiring 25 and the lower electrode 20. This makes it possible to write information and read information from the MTJ element.

In the above semiconductor memory device, an amorphous carbon film 23 that covers the side surface of the MTJ element, which is a memory element whose characteristics change due to a redox reaction, is provided. In the conventional magnetoresistive change memory device, the cover insulating film covering the side surface of the MTJ element includes a silicon oxide film (SiO ₂ ), aluminum oxide (Al ₂ O ₃ ), or a silicon nitride film (Si ₃ N ₄ ). Is used. However, in the step of covering the MTJ element with these insulating films, an oxidizing or reducing atmosphere is used at the time of forming the insulating film, so that the MTJ element is oxidized or reduced to change its characteristics. More specifically, the magnetic properties deteriorate due to the oxidation of metals such as Fe and Co used as magnetic materials. Further, the reduction of MgO in the tunnel insulating film 12 changes the characteristics of the memory element.

On the other hand, in the semiconductor memory device shown in FIG. 2, in the step of covering the side surface of the MTJ element with the amorphous carbon film 23, the amorphous carbon film is applied to the side surface of the MTJ element and the upper surface of the lower electrode 20 by a sputtering method targeting the amorphous carbon. 23 may be formed. Therefore, the MTJ device is not exposed to an oxidizing or reducing atmosphere, and the characteristics of the MTJ device are not changed. Further, since the MTJ element is covered by the amorphous carbon film 23, it is possible to prevent water, oxygen, hydrogen, etc. from entering from the interlayer insulating film 22 and deteriorating the MTJ element in the subsequent manufacturing process or after manufacturing.

Unlike graphite, which has high conductivity, amorphous carbon has a very high resistance value and can be regarded as a substantially insulator. Since the resistance value of the amorphous carbon is very high as described above, even if the amorphous carbon film 23 is provided on the side surface of the MTJ element, it does not interfere with the resistance value measurement that changes according to the storage state of the MTJ element.

Further, as will be described later, the MTJ is heated by passing a sufficiently large current through the MTJ element, and the elements constituting the MTJ element are diffused in the amorphous carbon film 23 by this heat to reduce the resistance value of the amorphous carbon film 23. It is possible to make it. That is, in the magnetic resistance change memory device, it is possible to adjust so as to lower the overall resistance value of the memory cell in which the MTJ element and the amorphous carbon film 23 are combined. Hereinafter, a memory element such as an MTJ element and a peripheral element of the memory element such as an amorphous carbon film are collectively referred to as a memory cell. By measuring the resistance value of each memory cell after manufacturing the memory device, identifying the memory cell whose resistance value is higher than the desired value based on the measurement result, and heating the specified memory cell by passing a sufficiently large current. , The overall resistance value of the memory cell may be lowered. As a result, the width of the resistance value distribution of the plurality of memory cells of the magnetic resistance change memory device can be narrowed, and a large margin can be secured at the time of 0/1 determination.

Further, as will be described later, the above heat treatment also has an effect of reducing the reversal current value required for the MTJ element to reverse the state. This effect is due to the fact that the magnetism in the peripheral part of the MTJ element is broken by carbon diffusion from the amorphous carbon film 23, resulting in an MTJ element with a substantially small cross-sectional area, and the peripheral part of the magnetization layer is heated by an electric current due to carbon diffusion. It is caused by the fact that it is generated and easily reverses magnetically.

An embodiment of a method for manufacturing a semiconductor memory device will be described below. In the following description, for example, an example of manufacturing a semiconductor memory device including an MTJ element as a memory element as shown in FIG. 2 will be described, but the device to be manufactured is not limited to the magnetoresistive change memory device. For example, as will be described later, a ferroelectric memory device may be manufactured by the same method for a ferroelectric memory element.

3 to 19 are diagrams showing each stage of the manufacturing process in the embodiment of the manufacturing method of the semiconductor memory device. Hereinafter, examples of a method for manufacturing a semiconductor memory device will be described with reference to FIGS. 3 to 19.

As shown in FIG. 3, the silicon substrate 30 is prepared. The silicon substrate 30 is a plate-shaped component on which circuit elements such as MTJ elements, electrodes, and wiring as shown in FIG. 2 are formed.

As shown in FIG. 4, a silicon oxide film 31 is formed on the upper surface of the silicon substrate 30. In order to form the silicon oxide film 31, the silicon oxide film 31 may be grown on the surface of the silicon substrate 30 by thermal oxidation, or the surface of the silicon substrate 30 may be subjected to a CVP (Chemical Vapor Deposition: CVD) method or the like. You may deposit SiO _{2 and the like as a result.}

As shown in FIG. 5, the lower electrode layer 32 is formed on the silicon oxide film 31. Specifically, as the lower electrode layer 32, a tantalum (Ta) layer, a ruthenium (Ru) layer, and a tantalum (Ta) layer are formed in this order by a sputtering method. Tantalum layer, due to poor adhesion between the Ru and SiO _2, a contact layer provided between the Ru and SiO ₂ in order to adhere. The ruthenium layer is a layer provided for lowering the resistance value of the lower electrode layer 32. The tantalum layer is an etching stopper layer for processing the MTJ element provided on the upper surface of the lower electrode layer 32. The lower electrode layer 32 is a layer corresponding to the lower electrode 20 in FIG.

As shown in FIG. 6, a fixed magnetization layer 33, an insulating layer 34, a free magnetization layer 35, and an upper electrode layer 36 are formed on the lower electrode layer 32 in this order. The fixed magnetization layer 33, the insulating layer 34, and the free magnetization layer 35, which are the respective layers of the MTJ element, may be formed by a sputtering method. The fixed magnetization layer 33 may be, for example, a layer formed of CoFeB (cobalt iron boron) and having a thickness of 1 nm. The insulating layer 34 may be, for example, a layer formed of MgO and having a thickness of 0.8 nm. The free magnetization layer 35 may be, for example, a layer formed of CoFeB and having a thickness of 1.5 nm. As the upper electrode layer 36, a tantalum layer, a ruthenium layer, and a tantalum layer may be formed in this order. The tantalum layer, ruthenium layer, and tantalum layer may have film thicknesses of, for example, 1 nm, 10 nm, and 40 nm, respectively. The ruthenium layer is a layer provided for lowering the resistance value of the upper electrode layer 36. The upper electrode layer 36 is a layer corresponding to the upper electrode 21 in FIG.

As shown in FIG. 7, an insulating layer 37 formed _{of SiO 2} is formed on the upper surface of the upper electrode layer 36. The insulating layer 37 may be deposited by, for example, a CVD method or a sputtering method. The film thickness of the insulating layer 37 may be, for example, 70 nm. The material of the insulating layer 37 _{is not limited to SiO 2} , and may be, for example, silicon nitride (Si ₃ N ₄ ), aluminum oxide (Al ₂ O ₃ ), or the like.

As shown in FIG. 8, the resist pattern 38 is formed on the upper surface of the insulating layer 37 by exposing the photoresist layer formed on the upper surface of the insulating layer 37 with a desired pattern. The resist material may be an organic material containing a compound as a photosensitizer in a novolak resin or the like as a base resin.

In FIG. 9, the insulating layer 37 is processed by performing RIE using the resist pattern 38 (see FIG. 8) as a mask to form the pattern 37A formed of the _{insulating material (SiO 2 in this example).} The etching gas may be, for example _{, a mixed gas of carbon tetrafluoride (CF 4} ) and argon (Ar). The resist pattern 38 is removed by ashing after etching. When the MTJ element is processed by RIE later, the resist pattern 38 may be left. This is because the RIE of the MTJ element is performed by an oxidizing gas, so that the resist is quickly removed. By this treatment, a pattern formed _{of an insulating material (SiO 2 in} this example) on the upper surface of a metal layer (in this example, the uppermost tantalum layer of the upper electrode layer 36) formed of a metal material (Ta in this example). Form 37A. This pattern 37A functions as a mask in subsequent ion milling or RIE.

As shown in FIG. 10, a pattern formed by etching a metal layer (the uppermost tantalum layer of the upper electrode layer 36) by performing RIE using the pattern 37A as a mask and forming the metal of the metal layer. Form 36A. The etching gas at this time may be, for example _{, a mixed gas of CF 4} and Ar, or may be only _{CF 4.} When the etching of this tantalum layer is completed, the etching by RIE is stopped. This is to suppress the influence of the magnetic film by a CF ₄ gas. The metal layer such as the ruthenium layer (the second layer from the top of the upper electrode layer 36) under the tantalum layer is processed together with the MTJ element by the RIE forming the MTJ element described below.

As shown in FIG. 11, the magnetic layer and the like of MTJ are etched by performing RIE using the patterns 36A and 37A created in FIG. 10 as masks. The etching gas at this time needs to be a gas that reacts with the material of the MTJ element layer, and a mixed gas of _{carbon monoxide (CO) and ammonia (NH 3 ) or methanol (CH 3} OH) may be used. .. As a result, the free magnetization layer 35A, the insulation layer 34A, and the fixed magnetization layer 33A remain as MTJ elements under the pattern 36A. Further, the pattern 36A becomes the upper electrode (upper electrode 21 in FIG. 2) as it is.

As shown in FIG. 12, an amorphous carbon film 40 made of amorphous carbon as a cover insulating film is formed by a sputtering method. The amorphous carbon film 40 covers the upper surface of the lower electrode layer 32, the side surface of the MTJ element, and the side surface and the upper surface of the upper electrode 36A. The film thickness may be, for example, 30 nm. Graphite containing carbon as an element is known to have conductivity, but the carbon film constituting the amorphous carbon film 40 has a different crystal state from graphite and is considered to have substantially insulating properties. be able to. When a film is formed by a sputtering method targeting amorphous carbon, a film in an amorphous state is usually obtained. The amorphous carbon film 40 is a layer corresponding to the amorphous carbon film 23 in FIG.

As shown in FIG. 13, the resist pattern 41 is formed on the upper surface of the amorphous carbon film 40 by exposing the photoresist layer formed on the upper surface of the amorphous carbon film 40 with a desired pattern. The resist material may be an organic material containing a compound as a photosensitizer in a novolak resin or the like as a base resin.

In FIG. 14, the amorphous carbon film 40 and the lower electrode layer 32 are processed by performing RIE using the resist pattern 41 (see FIG. 13) as a mask. As the etching gas at this time, for example, carbon may be processed with _{oxygen (O 2 ) first, and then a mixed gas of CF 4} and Ar may be used. When oxygen is used, the resist is depleted, but since the resist film is thicker than the carbon film, the effect of the depletion can be minimized. The resist pattern 41 is removed by ashing after etching. By this treatment, a part of the amorphous carbon film 40 remains as the amorphous carbon film 40A, and a part of the lower electrode layer 32 remains as the lower electrode 32A (lower electrode 20 in FIG. 2).

As shown in FIG. 15, an interlayer insulating film 50 made of _{SiO 2} is formed so as to cover the upper surface of the silicon oxide film 31 and the entire upper surface and all side surfaces of the structure located above the silicon oxide film 31. In FIG. 15, for convenience of illustration, the above-mentioned silicon oxide film 31 and the newly formed _{interlayer insulating film 50 of SiO 2} are shown as a group.

As shown in FIG. 16, the upper surface of the interlayer insulating film 50, the amorphous carbon film 40A on the upper electrode 36A, and the entire upper surface formed by the upper electrode 36A are subjected to a CMP (Chemical Mechanical Polishing) method or a RIE full surface etchback method. Flatten by such means.

As shown in FIG. 17, the resist pattern 60 is formed on the flattened surface by exposing the photoresist layer formed on the flattened surface with a desired pattern. The resist material may be an organic material containing a compound as a photosensitizer in a novolak resin or the like as a base resin.

In FIG. 18, by performing reactive ion etching using the resist pattern 60 (see FIG. 17) as a mask, a through hole 50A extending from the upper surface of the interlayer insulating film 50 to the lower electrode 32A is formed in the interlayer insulating film 50. .. The etching gas at this time may be, for example, a mixed gas of _{CF 4 and Ar, and O 2} may be used for processing carbon. The resist pattern 60 is removed by ashing after etching.

As shown in FIG. 19, the wiring 61 is formed so as to be in contact with the upper surfaces of the upper electrode 36A and the amorphous carbon film 40A, and the wiring 62 extending from the upper surface of the lower electrode 32A to the upper surface of the interlayer insulating film 50 is formed. The material of the wirings 61 and 62 may be Al or Cu. The wiring forming method may be a method usually used for forming wiring of each material.

From the above, a semiconductor memory device including an MTJ element can be obtained. In the semiconductor memory device shown in FIG. 19, the entire side surface of the MTJ element and the upper electrode 36A is covered with the amorphous carbon film 40. By providing the amorphous carbon film 40 as the cover insulating film in this way, it is possible to minimize fluctuations in the characteristics of the MTJ element. The amorphous carbon film 40 easily reacts with oxygen to become carbon dioxide. Therefore, _{when SiO 2} to be the interlayer insulating film 50 is deposited by the CVP method by the reaction between _{SiH 4 and an oxide gas such as O 2} , the amorphous carbon film 40 may be worn out. Therefore, before forming the interlayer insulating film 50, it is conceivable to protect the surface of the interlayer insulating film 50 with another cover insulating film.

FIG. 20 is a diagram showing a modified example of the semiconductor memory device shown in FIG. The semiconductor memory apparatus shown in FIG. 20 further includes a cover insulating film 70 formed between the amorphous carbon film 40A and the interlayer insulating film 50 with a material that does not use an oxidizing atmosphere at the time of formation. Different from the device. The cover insulating film 70 may be formed of a material that does not require an oxidizing atmosphere at the time of formation, for example, a silicon nitride film (Si ₃ N ₄ ) or the like. By covering the outer surface of the amorphous carbon film 40 (the surface opposite to the MTJ element side) with the cover insulating film 70 in this way, it is possible to avoid wear of the amorphous carbon film 40 when the interlayer insulating film 50 is formed or the like. ..

FIG. 21 is a diagram showing a comparison of element resistance value distribution between a semiconductor memory device using an amorphous carbon film as a cover insulating film and a semiconductor memory device using a silicon oxide film as a cover insulating film. The horizontal axis indicates the element resistance value (kΩ), and the vertical axis indicates the number of MTJ elements having the element resistance value in a low resistance state with respect to each element resistance value on the horizontal axis.

The left bar of the bar graph in FIG. 21 shows the characteristics of the MTJ element covered with the silicon oxide film, and the right bar of the bar graph shows the characteristics of the MTJ element covered with the amorphous carbon film (MTJ element having the configuration shown in FIG. 2 or FIG. 19). be. These characteristic values are obtained by measurement of the actually produced MTJ element. Compared with the conventional cover film made of silicon oxide, the configuration using the cover insulating film made of amorphous carbon has a smaller number of elements with high resistance, and the distribution width is narrowed as a whole. You can see that there is. Compared with the conventional configuration using a cover film made of silicon oxide as a material, the configuration using a cover insulating film made of amorphous carbon suppresses fluctuations in the characteristics of the MTJ device and has a resistance distribution. The variation can be reduced.

The method of adjusting the resistance value of the memory cell including the MTJ element will be described below. As described above, in the case of a miniaturized MTJ element, there is a problem that the size varies. If the MTJ device is made smaller than the standard, it may not be possible to achieve the desired device characteristics simply by suppressing the characteristic fluctuation with the carbon film. Hereinafter, a method of reducing the resistance value of the MTJ element whose resistance is higher than the standard value will be described.

FIG. 22 is a diagram showing an example of a method of adjusting the resistance value of the memory cell including the MTJ element. Note that, in FIG. 22, the execution order of each step described in the flowchart is merely an example, and the technical scope intended by the present application is not limited to the execution order described. For example, even if it is described in the present application that the B step is executed after the A step, not only the B step can be executed after the A step, but also the A step is executed after the B step. It may be physically and logically possible to do so. In this case, if all the results affecting the processing of the flowchart are the same regardless of the order in which the steps are executed, for the purpose of the technique disclosed in the present application, step B is followed by step A. Is self-evident that may be performed. Even if it is explained in the present application that the B step is executed after the A step, it is not intended to exclude the above-mentioned obvious cases from the technical scope intended by the present application, and such a case is not intended. If it is self-evident, it naturally falls within the technical scope intended by the present application.

In step S1, the magnetization direction of the free magnetization layer is set so as to be in a low resistance state for the MTJ elements of a plurality of memory cells to be adjusted in the semiconductor memory device. The plurality of memory cells to be adjusted may be, for example, all the memory cells built in the semiconductor memory device. At this time, a magnetic field may be applied to each MTJ element by an external magnetic field generator to set the magnetization direction, or a current may be passed through each MTJ element to set the magnetization direction by spin injection magnetization reversal. ..

In step S2, the memory cell to be read is selected. That is, the memory cell for which the resistance value is to be measured is selected. For example, a plurality of memory cells to be measured may be selected in a predetermined order.

In step S3, the read operation for the selected memory cell is executed. Specifically, a read voltage (for example, 20 mV) is applied to the selected memory cell, and the current value flowing through the memory cell is measured. The resistance value of the memory cell is calculated by dividing the read voltage by the measured current value. This read-out voltage is lower than the inverting voltage required to invert the magnetization direction of the free magnetization layer.

In step S4, it is determined whether or not the resistance value calculated in step S3 is within the standard. This determination process may basically be a threshold value process for determining whether or not the calculated resistance value is equal to or less than a predetermined resistance value. More specifically, it may be determined whether or not the calculated resistance value is within the range of the resistance value required for the memory cell in the low resistance state. If the resistance value is within the standard, the process proceeds to step S5, and if the resistance value is not within the standard, the process proceeds to step S7.

In step S7, it is determined whether or not the memory cell whose resistance value has been measured is in a high resistance state. That is, it is determined whether or not the calculated resistance value is within the range of the resistance value required for the memory cell in the high resistance state. Examples of memory cells that are not in the high resistance state include memory cells in which the flowing current value is substantially zero and in a substantially isolated state, and memory cells in which the amount of flowing current is extremely large and in a substantially short-circuited state. These memory cells are not memory cells that can be recovered by adjusting the resistance value. If the resistance is not high, the process proceeds to step S9, and the memory cell is rejected. The failed memory cell may be registered as a defective memory cell and appropriately subject to redundant processing or the like. The determination executed in steps S4 and S7 is a determination to specify the memory cell to be the target of the resistance value correction processing described below, and as a basic principle, the calculated resistance value is larger than the predetermined resistance value. It may be a determination to identify a high memory cell. At that time, as more detailed settings in the determination, as described specifically in steps S4 and S7, whether or not the resistance value is within the standard in the low resistance state and the resistance value within the standard in the high resistance state. May be determined.

If it is determined in step S7 that the resistance is high, the process proceeds to step S8. In step S8, the resistance value correction process of the memory cell determined to be in the high resistance state is executed. Specifically, a voltage (for example, 1.0 V) higher than the read voltage (for example, 20 mV) and lower than the element destruction voltage (for example, 1.2 V) is applied to the memory cell for a predetermined time. That is, for example, a voltage of 1.0 V is applied between the upper electrode 21 and the lower electrode 20 via the wirings 24 and 25 shown in FIG. This voltage application may be executed only once or may be executed a plurality of times. By applying this voltage, the MTJ element is heated by passing a current through the upper electrode 21 and the lower electrode 20 to the MTJ element. By this heating, the elements constituting the MTJ element are diffused in the amorphous carbon film 23, thereby lowering the resistance value of the amorphous carbon film 23. The amount of decrease in the resistance value can be controlled by the applied voltage, the pulse voltage width (voltage application time), the number of applications, and the like. After step S8, the procedure returns to step S3, and the process after the read process is repeated.

If it is determined in step S4 above that the measured resistance value of the memory cell is a resistance value within the standard, the process proceeds to step S5, and the memory cell is accepted.

In step S6, it is determined whether or not to measure another memory cell. That is, it is determined whether or not there is a memory cell whose resistance value has not yet been measured among the plurality of memory cells to be adjusted. If there are still memory cells to be measured, the process returns to step S2, and the memory cell selection process and the subsequent processes are repeated. When no other memory cell is measured, the resistance value adjustment process of the memory cell including the MTJ element is terminated. In the memory device, the element that fails in S9 may be replaced with another spare memory element for redundancy.

FIG. 23 is a diagram showing the effect of reducing the resistance value of the memory cell by heating by applying a current. The horizontal axis indicates the element resistance value (kΩ), and the vertical axis indicates the number of memory cells having the element resistance value in a low resistance state with respect to each element resistance value on the horizontal axis.

The left bar of the bar graph in FIG. 23 is the characteristic of the memory cell before the resistance value adjustment, and the right bar of the bar graph is the characteristic of the memory cell after the resistance value adjustment. These characteristic values are obtained by measurement of the actually created memory cell. In FIG. 23, the resistance value adjusting process was executed for the memory cell having the element resistance value of 2.5 kΩ or more. By executing the resistance value adjustment process for a memory cell having a resistance higher than a predetermined resistance value in this way, the resistance value of the memory cell having a relatively high resistance value is reduced, and the width of the resistance value distribution of the memory cell is widened. Is narrowed, and it can be seen that the shape of the resistance value distribution is improved. When the memory element covered with the amorphous carbon film is an MTJ element that records information as a change in resistance value, the information recording characteristics of the memory cell are adjusted by adjusting the overall resistance value of the memory cell in this way. It becomes possible to do.

The above heat treatment also has the effect of reducing the inversion current value required for the MTJ element to invert the state. Due to carbon diffusion from the amorphous carbon film, the magnetism in the peripheral part of the MTJ element is broken and the MTJ element has a substantially small cross-sectional area. It is caused by making it easier. As the cross-sectional area of the MTJ element becomes substantially smaller, the current density increases, so that the inverting current value required for inverting the magnetization direction decreases. Further, the magnetization layer is divided into small magnetic domains, and when one magnetic domain is inverted, the surrounding magnetic domains are easily inverted. Therefore, when the magnetic domain in the peripheral portion is easily magnetized and inverted due to heat, the magnetic domain in the peripheral portion is inverted before the magnetic domain in the central portion when a certain current is applied, and the magnetic domain in the peripheral portion is inverted in the magnetic domain in the central portion. The magnetic domain in the center is also reversed.

FIG. 24 is a diagram showing the effect of reducing the inverting current value of the MTJ element by heating by applying a current. The horizontal axis represents the inverting current value (μA), and the vertical axis represents the number of MTJ elements that require the inverting current value for inverting with respect to each inverting current value on the horizontal axis.

The left bar of the bar graph in FIG. 24 is the characteristic of the MTJ element before the resistance value adjustment, and the right bar of the bar graph is the characteristic of the MTJ element after the resistance value adjustment. These characteristic values are obtained by measurement of the actually produced MTJ element. As a result of the heat treatment at the time of adjusting the resistance value, the inverting current value of the MTJ element is reduced, and the MTJ element that requires the inverting current of, for example, 175 μA and 200 μA is eliminated. As described above, it can be seen that the resistance value adjusting process also has an effect of reducing the inverting current value required for the MTJ element to invert the state.

In the above embodiment, the magnetoresistive memory device including the MTJ element has been described as an example, but as described above, the element to which the amorphous carbon film can be applied is not limited to the MTJ element. For example, a ferroelectric memory element having an amorphous carbon film as a cover insulating film may be processed and manufactured by using the method for manufacturing a semiconductor memory device of the present application.

In the case of a ferroelectric memory, the memory element layer (ferroelectric layer) is formed of a ferroelectric material such as lead zirconate titanate (PZT). A lower electrode made of Pt (platinum), Ti (titanium), IrOx (iridium oxide) or the like is formed on the lower surface side of the memory element layer. An upper electrode made of Pt, IrOx, or the like is formed on the upper surface side of the memory element layer. Since the ferroelectric material is an oxide in the ferroelectric memory having such a configuration, for example, when a silicon nitride film or the like is used as the cover film, the ferroelectric material is reduced by the reducing action of hydrogen atoms at the time of forming the cover film. The characteristics will fluctuate. On the other hand, if an amorphous carbon film made of amorphous carbon is formed as the cover insulating film by the sputtering method as in the step shown in FIG. 12, the characteristics of the ferroelectric material are deteriorated or changed. I won't let you.

Although the present invention has been described above based on the examples, the present invention is not limited to the above examples, and various modifications can be made within the scope of the claims.

11 Free magnetized layer 12 Tunnel insulating film 13 Fixed magnetized layer 20 Lower electrode 21 Upper electrode 22 Interlayer insulating film 23 Amorphous carbon film 24 Wiring 25 Wiring

Claims (3)

A memory element whose characteristics change due to a redox reaction,
A first electrode provided on the upper surface of the memory element and
A second electrode provided on the lower surface of the memory element and
An amorphous carbon film covering the entire side surface of the memory element between the first electrode and the second electrode,
An interlayer insulating film provided on the periphery of the amorphous carbon film,
A semiconductor memory device including a cover insulating film formed between the amorphous carbon film and the interlayer insulating film with a material that does not use an oxidizing atmosphere at the time of formation. A magnetic tunnel coupling element, a first electrode provided on the upper surface of the magnetic tunnel coupling element, a second electrode provided on the lower surface of the magnetic tunnel coupling element, and an amorphous carbon film covering the side surface of the magnetic tunnel coupling element. In the including memory cell
The magnetic tunnel coupling element is heated by passing an electric current through the first electrode and the second electrode to the magnetic tunnel coupling element.
A method for adjusting the resistance value of a memory cell, which comprises each step of lowering the resistance value of the amorphous carbon film by diffusing the elements constituting the magnetic tunnel coupling element into the amorphous carbon film by the heating. The process of setting the magnetic tunnel coupling element to a low resistance state is executed, and the process is performed.
The resistance value of the memory cell after the process of setting the low resistance state is measured, and the resistance value is measured.
The method for adjusting the resistance value of a memory cell according to claim 2, wherein the heating step is executed when the resistance value is higher than a predetermined resistance value.

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