JP6949441B2 - Vector optimization device and vector optimization program - Google Patents

Description

The present invention relates to a vector optimization device and a vector optimization program.

In digital verification, an input file called a vector is created for the RTL to be verified, and it is confirmed whether the RTL is operating normally. Normally, vectors are created manually by humans. Execution log can be obtained by executing the vector.

Patent Document 1 states that conventional verification methods using circuits and test vectors require a huge amount of verification time, and it is extremely difficult for a designer / verifier to consider and verify all cases. Has been done. Therefore, an operation proposition verification system that verifies whether or not the operation proposition (property) and the logic circuit to be verified (Device Under Test, hereinafter referred to as DUT) match is introduced. However, the current situation is insufficient, and a system for automatically creating an operation proposition from time-series signal value data without human intervention has been disclosed.

Further, Patent Document 2 discloses that in the conventional hardware design, a hardware specification is first created, and then RTL (register transfer level, an abbreviation for Register Transfer Level) design is performed based on the created specification. Next, it is stated that the logical specification verification will be performed. In the logical specification verification, it is disclosed that a verification sequence and an expected value are created, and whether or not the operation matches the expected value is confirmed by a logical simulation.

Further, in Patent Document 3, when the test vector data is manually created, it takes time and effort to create the test vector data, and as a result, it is extremely difficult to create sufficient test vector data in a short design period. It is disclosed that it is.

Therefore, in Patent Document 3, original test vector data describing an input signal input to the circuit to be inspected is stored, and from this stored original test vector data, generation test vector data different from the original test vector data is stored. Is disclosed to generate. Further, an output unit that outputs test vector data to be input to the circuit to be inspected, an error occurrence rate storage unit that stores the error occurrence rate of the input signal described in the original test vector data, and a random number that generates random number data. The generator is used.

Using these, the error occurrence rate of the input signal stored in the error occurrence rate storage unit is compared with the random number data, and the vector output unit generates test vector data when the random number data is smaller than the error occurrence rate of the input signal. Is output, and when the random number data is larger than the error occurrence rate of the input signal, the original test vector data is output.

2008-97504 2009-110417 2010-203037

As described above, although there is a device for optimizing the vector as described above, there is no device from the viewpoint of reducing duplicate description. However, in most cases, the vector is created manually, and the technology related to the vector has not been provided from the viewpoint of modifying the vector created first to perform digital verification more efficiently, which is extremely inconvenient. Met.

The present invention has been made to solve such problems in digital verification, and an object of the present invention is to provide a vector optimization device that reduces duplicate descriptions and leads to the creation of new and efficient multiple vectors. It is to be.

The vector optimization device according to the present invention inputs a plurality of vectors for performing the operation verification operation to the digital verification device for verifying the operation of the state machine, executes the verification operation, and obtains a log corresponding to the plurality of the vectors. There are a log collecting means, a duplicate sequence detecting means for inspecting logs corresponding to a plurality of the vectors to detect duplicate sequences, and a duplicate sequence when a duplicate sequence is detected by the duplicate sequence detecting means. It is characterized by comprising a warning display processing means for displaying a warning indicating that the device is to be used.

The vector optimization device according to the present invention is characterized by comprising a duplicate sequence deleting means for deleting the description of the duplicate sequence when the duplicate sequence exists.

In the vector optimization device according to the present invention, the duplicate sequence deleting means deletes the duplicate sequence by leaving the duplicate sequence description having the earliest time when the duplicate sequence exists.

In the vector optimization device according to the present invention, the warning display processing means displays a description of overlapping sequences and identification information of the overlapping vectors to display a warning.

In the vector optimization device according to the present invention, the warning display processing means displays the description of the duplicate sequence and the identification information of the duplicate vector, and displays a warning requesting an instruction to describe the sequence to be deleted. The deletion means is characterized in that the deletion is performed based on the above instruction.

In the vector optimization device according to the present invention, the duplicate sequence detecting means finds a log in which the state change of the state machine is the same and determines that the sequence is a duplicate.

In the vector optimization device according to the present invention, the duplicate sequence detecting means finds a log corresponding to the change of a predetermined signal of the state machine within a certain time and determines that the sequence is duplicate. It is characterized by.

In the vector optimization device according to the present invention, the duplication sequence detecting means finds a log corresponding to the repeated change of a predetermined signal of the state machine within a predetermined time, and determines that the duplication sequence is present. It is characterized by doing.

The vector optimization program according to the present invention corresponds to the plurality of vectors by inputting a plurality of vectors for causing the computer to perform the operation verification operation to the digital verification device for verifying the operation of the state machine and executing the verification operation. A log collecting means for obtaining a log to be performed, a duplicate sequence detecting means for inspecting logs corresponding to a plurality of the vectors to detect a duplicate sequence, and a duplicate sequence detecting means for detecting a duplicate sequence when the duplicate sequence detecting means detects a duplicate sequence. It is characterized in that it functions as a warning display processing means for displaying a warning indicating the existence of.

The vector optimization program according to the present invention is characterized in that the computer further functions as a duplicate sequence deleting means for deleting the description of the duplicate sequence when the duplicate sequence exists.

The vector optimization program according to the present invention is characterized in that the computer functions as the duplicate sequence deletion means so as to leave and delete the duplicate sequence description having the earliest time when the duplicate sequence exists. And.

The vector optimization program according to the present invention is characterized in that the computer is used as the warning display processing means to display a description of a duplicate sequence and identification information of the duplicate vector to display a warning. And.

In the vector optimization program according to the present invention, the computer is used as the warning display processing means to display the description of the duplicate sequence and the identification information of the duplicate vector, and request an instruction to describe the sequence to be deleted. It is characterized in that it functions to display a warning, and the computer is used as a deletion means to function to perform deletion based on the instruction.

The vector optimization program according to the present invention is characterized in that the computer functions as the duplicate sequence detecting means so as to find the same log and determine that the state change of the state machine is a duplicate sequence. do.

In the vector optimization program according to the present invention, the computer is used as the duplication sequence detection means, and a log corresponding to the change of a predetermined signal of the state machine within a certain period of time is found and the duplication sequence is used. It is characterized by making it function so as to judge that it exists.

In the vector optimization program according to the present invention, the computer is used as the duplication sequence detection means, and a log corresponding to the fact that the change repetition of the predetermined signal of the state machine is performed within a predetermined time is found and the duplication sequence is found. It is characterized in that it functions so as to determine that.

According to the present invention, it is possible to reduce duplicate descriptions and create a new and efficient plurality of vectors.

The block diagram which shows the 1st Embodiment of the vector optimization apparatus which concerns on this invention. The figure which shows the log obtained by executing the 1st vector in embodiment of the vector optimization apparatus which concerns on this invention. The figure which shows the log obtained by executing the second vector in the embodiment of the vector optimization apparatus which concerns on this invention. The block diagram which shows the 2nd Embodiment of the vector optimization apparatus which concerns on this invention. The block diagram which shows the 3rd Embodiment of the vector optimization apparatus which concerns on this invention.

Hereinafter, embodiments of the vector optimization device and the vector optimization program according to the present invention will be described with reference to the accompanying drawings. In each figure, the same components are designated by the same reference numerals, and duplicate description will be omitted. In this embodiment, digital verification devices 1-1, 1-2, ..., 1-N for verifying the operation of the state machine are used. The digital verification devices 1-1, 1-2, ..., 1-N can be configured by a simulator. The digital verification devices 1-1, 1-2, ..., 1-N can be configured by N computer systems, or can be provided in one computer.

Vector 2-1 is input to the digital verification device 1-1, vector 2-2 is input to the digital verification device 1-2, ..., Vector 2 is input to the digital verification device 1-N. Enter −N. Vectors 2-1, 2-2, ..., 2-N are files describing the input signals input to the circuit to be inspected, and may be created for each different verification category. can. As the vectors 2-1, 2-2, ..., 2-N, those stored in the database 23 can be used.

The digital verification device 1 is executed by inputting the vectors 2-1, 2-2, ..., 2-N into the digital verification devices 1-1, 1-2, ..., 1-N, respectively. Logs 3-1, 3-2, ..., 3-N are output from -1, 1-2, ..., 1-N.

The logs 3-1, 3-2, ..., 3-N are collected by the log collecting means 11 of the vector generation device 10 according to the present embodiment. The number of log collecting means 11 can be one, but may be N corresponding to logs 3-1, 3-2, ..., 3-N.

The output of the log collecting means 11 is sent to the duplicate sequence detecting means 12. The duplicate sequence detecting means 12 detects duplicate sequences by inspecting logs 3-1, 3-2, ..., 3-N corresponding to the plurality of vectors. It is assumed that the log 3-1 of the vector 2-1 is as shown in FIG. 2, and the log 3-2 of the vector 2-2 is as shown in FIG.

The log is updated when the state machine changes. In FIGS. 2 and 3, P_A_CS indicates the state (present) of A_CS before the change, and N_A_CS indicates the state (next) of A_CS after the change. The example of FIG. 2 shows that the state of A_CS changed from IDLE_s to ACTIVE_s at time = 1000ns. Also, at time = 2000ns, the next state of time = 1000ns becomes present, indicating that B_CS has changed from IDLE_s to ACTIVE_s. The log is updated every time the state machine changes in this way. Since the vectors operate differently, the output formats of FIGS. 2 and 3 are the same, but the contents are different.

The duplicate sequence detecting means 12 finds a log in which the state change of the state machine is the same, and determines that the sequence is a duplicate. Specifically, the information X of time = 1000ns in FIG. 2 and the information Y of time = 4000ns in FIG. 3 are the same. In this case, if the state state of the RTL to be verified is the same, it can be detected that the description of the vector sequence is the same and the sequence is duplicated. Based on the fact that there is no problem if it is covered by either one, it is a pre-stage process for deleting. Since the more vectors to be input to the digital verification device, the more the same information is available in the duplicate states, a lean vector can be created by deleting the sequence corresponding to these duplicate states.

The duplication sequence detecting means 12 finds a log corresponding to the change of the predetermined signal of the state machine within a certain period of time, and determines that the duplication sequence is present. This change is called a change within a certain period of time. That is, the change pattern of the predetermined signal is constant not in the contents of the log at one time when the log is updated (for example, the log from time = 1000ns to time = 2000ns) but in the contents of the log at a plurality of consecutive times. If it is done in time, a change in time is detected. If the contents of the changes within a certain period of time are the same, an overlapping sequence of changes within a certain period of time is detected.

Further, the duplicate sequence detecting means 12 finds a log corresponding to the fact that the change repetition of the predetermined signal of the state machine is performed within the predetermined time, and determines that the sequence is duplicate. This change will be called a repetitive change. The repetitive change is not the content of the log at one time when the log is updated (for example, the log from time = 1000ns to time = 2000ns), but the change of a predetermined signal is repeated at the contents of the log at a plurality of consecutive times. Is detected when is performed in a cycle of a predetermined time. As described above, in the present embodiment, the overlapping sequence between a plurality of vectors is detected based on the state in the log.

In detecting the duplicate sequence, the duplicate sequence detecting means 12 includes a description (text) of the duplicate sequence and identification information (unique information such as a file name assigned to the vector) of the duplicate vector. Shall be detected. This information is called detection information.

The detection information detected by the duplicate sequence detecting means 12 is sent to the warning display processing means 13. When the duplicate sequence detecting means 12 detects a duplicate sequence, the warning display processing means 13 displays a warning indicating that the duplicate sequence exists. The display is performed on the display unit 22 which is a display device such as an LED or an LCD. The display contents can be a warning message that duplication has occurred, a description of the duplication sequence, and identification information of the duplication vector. In addition, instead of the description of the overlapping sequence, the position information (what line) in the corresponding vector may be used.

The above warning display will be visually confirmed by the operator, and the desired overlapping sequence can be deleted by using the computer unit 24 and the input unit 21. That is, it is possible to give a command or the like from the input unit 21 to read the corresponding vector from the database 23 to the computer unit 24, refer to the content of the warning display, delete it, and register it in the database 23 as a new vector. Is. The computer unit 24, the input unit 21, and the vector optimization device according to the present embodiment can be configured by one computer system.

The configuration of the vector optimization device according to the second embodiment is shown in FIG. In the present embodiment, the duplicate sequence deleting means 14 is provided for the configuration of the first embodiment. The duplicate sequence deleting means 14 includes a duplicate sequence deleting means for deleting the description of the duplicate sequence when the duplicate sequence exists.

Specifically, when the above-mentioned duplicate sequence exists, the duplicate sequence description having the earliest time is left and deleted. As described above, the information of time = 1000ns in FIG. 2 and the information of time = 4000ns in FIG. 2 are the same, and vector 2-1 and vector 2-2 have duplicate sequences having the same sequence description. The presence is detected by the duplicate sequence detecting means 12. Therefore, when time is detected, time = 1000ns for vector 2-1 and time = 4000ns for vector 2-2, so the description of the duplicate sequence of vector 2-2 is deleted while leaving the description of vector 2-1. .. The deleted and new vector is registered in the database 23. Even in the case of three or more duplicates, the duplicate sequence description having the earliest time is left and deleted.

FIG. 5 shows a block diagram of the third embodiment. In the present embodiment, the warning display processing means 13 displays the description of the overlapping sequence and the identification information of the overlapping vector, and performs a warning display requesting an instruction to describe the sequence to be deleted. The response to this is made from the input unit 21. The response can simply be to "remove duplicates" without telling which vector duplicate sequence to remove. When such an instruction is given, the duplicate sequence description having the earliest time is deleted as in the second embodiment.

On the other hand, when an instruction for describing the sequence to be deleted is input, the duplicate sequence deleting means 14 deletes the sequence based on the above instruction. That is, in order to facilitate the above instruction, the identification information of the vector having the duplicate sequence and the description of the sequence may be displayed as deletion candidates and may be selected and input. When the input is made in this way, the duplicate sequence deleting means 14 deletes the corresponding duplicate sequence description in the vector related to the input. The deleted and new vector is registered in the database 23.

Since the vector to be input to the digital verification device will be created according to the purpose of verification, the more vectors there are, the more duplicate sequences will be. Therefore, by deleting the duplicate sequences based on these duplicate states, It is possible to create a database 23 in which lean vectors are stored.

1-11-1-N Digital Verification Device 2-1-2-N Vector 3-1 to 2-3-N Log 11 Log Collection Means 12 Duplicate Sequence Detection Means 13 Warning Display Processing Means 14 Duplicate Sequence Deletion Means 21 Input Unit 22 Display Department 23 Database 24 Computer Department

Claims (16)

A log collecting means for inputting a plurality of vectors for performing an operation verification operation to a digital verification device for verifying the operation of a state machine and executing the verification operation to obtain a log corresponding to the plurality of vectors.
A duplicate sequence detection means for inspecting logs corresponding to a plurality of the vectors to detect duplicate sequences, and
A vector optimization device including a warning display processing means that displays a warning indicating that a duplicate sequence exists when a duplicate sequence is detected by the duplicate sequence detection means. The vector optimization apparatus according to claim 1, further comprising a duplicate sequence deleting means for deleting the description of the duplicate sequence when the duplicate sequence exists. The vector optimization device according to claim 2, wherein the duplicate sequence deleting means deletes the duplicate sequence description with the earliest time when the duplicate sequence exists. The vector optimization according to any one of claims 1 to 3, wherein the warning display processing means displays the description of the overlapping sequence and the identification information of the overlapping vector to display a warning. Device. The warning display processing means displays the description of the duplicate sequence and the identification information of the duplicate vector, and performs a warning display requesting an instruction to describe the sequence to be deleted.
The vector optimization device according to any one of claims 1 to 4, wherein the deletion means performs deletion based on the above instruction. The vector optimization device according to any one of claims 1 to 5, wherein the duplicate sequence detecting means finds the same log and determines that the state change of the state machine is a duplicate sequence. .. Claims 1 to 6 are characterized in that the duplicate sequence detecting means finds a log corresponding to the change of a predetermined signal of the state machine within a fixed time and determines that the sequence is a duplicate. The vector optimization device according to any one of the above items. The overlapping sequence detecting means is characterized in that it finds a log corresponding to the repeated change of a predetermined signal of the state machine within a predetermined time and determines that the sequence is duplicated. 7. The vector optimization device according to any one of 7. Computer,
A log collecting means for inputting a plurality of vectors for performing an operation verification operation to a digital verification device for verifying the operation of a state machine and executing the verification operation to obtain a log corresponding to the plurality of vectors.
Duplicate sequence detection means for inspecting logs corresponding to a plurality of the vectors to detect duplicate sequences,
A vector optimization program characterized by functioning as a warning display processing means for displaying a warning indicating that a duplicate sequence exists when a duplicate sequence is detected by the duplicate sequence detection means. Further, the computer
The vector optimization program according to claim 9, further comprising functioning as a duplicate sequence deletion means for deleting the description of the duplicate sequence when the duplicate sequence exists. The vector optimization according to claim 10, wherein the computer functions as the duplicate sequence deletion means so as to delete the duplicate sequence description having the earliest time when the duplicate sequence exists. Program for. Any one of claims 9 to 11, wherein the computer functions as the warning display processing means to display the description of the duplicate sequence and the identification information of the duplicate vector to display the warning. The vector optimization program described in the section. Using the computer as the warning display processing means, the computer is made to function so as to display the description of the duplicate sequence and the identification information of the duplicate vector and perform a warning display requesting an instruction to describe the sequence to be deleted.
The vector optimization program according to any one of claims 9 to 12, wherein the computer is used as a deletion means to function to perform deletion based on the instruction. One of claims 9 to 13, wherein the computer functions as the duplicate sequence detecting means so as to detect the same log and determine that the state change of the state machine is a duplicate sequence. The vector optimization program described in. It is characterized in that the computer is used as the duplicate sequence detecting means to find a log corresponding to a change in a predetermined signal of the state machine within a certain period of time and determine that the sequence is a duplicate. The vector optimization program according to any one of claims 9 to 14. Using the computer as the duplicate sequence detecting means, the computer is made to function so as to find a log corresponding to the repeated change of a predetermined signal of the state machine within a predetermined time and determine that the sequence is a duplicate. The vector optimization program according to any one of claims 9 to 15, which is characterized.

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