JP6957901B2 - Frequency ratio measuring device and physical quantity sensor - Google Patents

Description

The present invention relates to a decimation filter, a measuring device and a physical quantity sensor.

A frequency counter that generates a delta sigma modulated signal, which is a signal corresponding to the ratio of the frequency of the reference signal (reference clock) to the frequency of the signal to be measured, is known.
This frequency counter has a frequency delta sigma modulator (hereinafter referred to as "FDSM (Frequency Delta Sigma Modulator)"), and the FDSM uses one of the reference signal and the signal to be measured and the other is the frequency delta sigma. Modulates to generate and output a delta sigma modulated signal.
A low-pass filter is provided on the output side of the FDSM. With such a configuration, the noise shape function, which is one of the features of FDSM, is exhibited (noise shape effect), so that noise can be shifted to the high frequency side, and the noise component is reduced by the low-pass filter. Can be done, and the accuracy can be improved.

Further, Patent Document 1 discloses a frequency measuring device including a counter unit and a low-pass filter unit provided on the output side of the counter unit and having a plurality of stages of moving average filters. In the low-pass filter section, the output of at least one moving average filter is downsampled. As a result, the configuration of the low-pass filter unit can be simplified, the frequency of circuit operation can be reduced, and the power consumption can be reduced as compared with the case where downsampling is not performed.

Japanese Unexamined Patent Publication No. 2011-80836

In the apparatus described in Patent Document 1, since the portion driven at a frequency higher than the sampling frequency finally required occupies most of the circuit, the configuration of the low-pass filter portion can be further simplified and the power consumption can be further simplified. Is difficult to further reduce.

An object of the present invention is to provide a decimation filter, a measuring device, and a physical quantity sensor capable of reducing the circuit scale and reducing the power consumption.

The present invention has been made to solve at least a part of the above-mentioned problems, and can be realized as the following forms or application examples.
The decimation filter of the present invention is a decimation filter that downsamples and outputs a signal indicating an input measured value.
A time calculation unit that calculates the time to sampling timing based on the measurement timing,
An impulse response calculation unit that obtains an impulse response at the sampling timing based on the time until the sampling timing.
A multiplication unit for obtaining the product of the measured value and the impulse response value,
It is characterized by including an integrating unit that integrates the products to obtain an integrated value.
According to the present invention, the noise component included in the signal indicating the measured value can be removed or reduced, and the measurement accuracy can be improved.
Further, since the convolution integral may be executed at the sampling frequency finally required, the amount of calculation can be reduced, whereby the circuit scale can be reduced and the power consumption can be reduced.

In the decimation filter of the present invention, the interval between the measurement timings is preferably constant.
Thereby, the measurement accuracy can be further improved.

In the decimation filter of the present invention, the measurement timing is preferably input as a time stamp.
As a result, the absolute time information can be accurately obtained.

In the decimation filter of the present invention, the integrating unit outputs the integrated value and resets the integrated value when the time stamp matches the sampling timing or after the time stamp exceeds the sampling timing. Is preferable.
This makes it possible to perform integration up to the measurement timing immediately before the measurement timing exceeds the sampling timing.

In the decimation filter of the present invention, it is preferable that the integration unit performs the integration up to the measurement timing immediately before the measurement timing exceeds the sampling timing.
As a result, the integration can be performed without omission or duplication, and the measurement accuracy can be improved.

In the decimation filter of the present invention, the impulse response is finite and is preferably expressed as a function.
Thereby, the desired impulse response can be easily and accurately expressed, and the value of the impulse response can be obtained.

In the decimation filter of the present invention, the function is preferably a linear function of time or a quadratic function of time.
Thereby, the desired impulse response can be easily and accurately expressed, and the value of the impulse response can be obtained.

In the decimation filter of the present invention, the measured value is a count value of a pulse signal which is a signal to be measured.
The gate time used to obtain the count value is preferably defined by a reference signal.
This makes it possible to adopt the direct counting method.

In the decimation filter of the present invention, the measured value is a count value of a pulse signal which is a reference signal.
The gate time used to obtain the count value is preferably defined by the signal to be measured.
This makes it possible to adopt the reciprocal counting method.

In the decimation filter of the present invention, it is preferable that the time calculation unit uses the count value obtained by counting the reference signal or the signal to be measured as a time stamp.
As a result, it is not necessary to separately prepare a circuit for generating a time stamp, and the circuit configuration can be simplified.

The measuring device of the present invention includes the decimation filter of the present invention.
It is characterized in that measurement is performed using the decimation filter.
According to the present invention, the noise component included in the signal indicating the measured value can be removed or reduced, and the measurement accuracy can be improved.
Further, since the convolution integral may be executed at the sampling frequency finally required, the amount of calculation can be reduced, whereby the circuit scale can be reduced and the power consumption can be reduced.

The measuring device of the present invention includes the decimation filter of the present invention.
It is characterized in that the frequency ratio of the signal to be measured and the reference signal is measured by using the decimation filter.
According to the present invention, the noise component included in the signal indicating the measured value can be removed or reduced, and the measurement accuracy can be improved.
Further, since the convolution integral may be executed at the sampling frequency finally required, the amount of calculation can be reduced, whereby the circuit scale can be reduced and the power consumption can be reduced.

The physical quantity sensor of the present invention includes a detection unit that detects a physical quantity and
It is characterized by including a measuring device of the present invention in which a signal to be measured output from the detection unit is input.
According to the present invention, the noise component included in the signal indicating the measured value can be removed or reduced, and the measurement accuracy can be improved.
Further, since the convolution integral may be executed at the sampling frequency finally required, the amount of calculation can be reduced, whereby the circuit scale can be reduced and the power consumption can be reduced.

It is a block diagram which shows the embodiment of the frequency ratio measuring apparatus which is an example of the measuring apparatus of this invention. It is a block diagram which shows the decimation filter of the frequency ratio measuring apparatus shown in FIG. It is a block diagram which shows the structural example of the frequency delta sigma modulation part of the frequency ratio measuring apparatus shown in FIG. It is a block diagram which shows the structural example of the frequency delta sigma modulation part of the frequency ratio measuring apparatus shown in FIG. It is a graph which shows the impulse response. It is a timing chart for demonstrating the operation of the decimation filter of the frequency ratio measuring apparatus shown in FIG. It is a flowchart which shows the operation flow of the decimation filter of the frequency ratio measuring apparatus shown in FIG. It is a figure which shows the internal structure of the detection part in embodiment of the acceleration sensor which is an example of the physical quantity sensor of this invention. FIG. 5 is a cross-sectional view taken along the line AA in FIG.

Hereinafter, the decimation filter, the measuring device, and the physical quantity sensor of the present invention will be described in detail based on the embodiments shown in the accompanying drawings.

<First Embodiment>
FIG. 1 is a block diagram showing an embodiment of a frequency ratio measuring device which is an example of the measuring device of the present invention. FIG. 2 is a block diagram showing a decimation filter of the frequency ratio measuring device shown in FIG. FIG. 3 is a block diagram showing a configuration example of a frequency delta sigma modulation unit of the frequency ratio measuring device shown in FIG. FIG. 4 is a block diagram showing a configuration example of a frequency delta sigma modulation unit of the frequency ratio measuring device shown in FIG. FIG. 5 is a graph showing an impulse response. FIG. 6 is a timing chart for explaining the operation of the decimation filter of the frequency ratio measuring device shown in FIG. FIG. 7 is a flowchart showing the operation flow of the decimation filter of the frequency ratio measuring device shown in FIG.
In the following description, the case where the signal level is "Low" is also referred to as "0", and the case where the signal level is "High" is also referred to as "1".

The frequency ratio measuring device 1 shown in FIG. 1, which is an example of the measuring device of the present invention, includes a decimation filter 4 and performs measurement using the decimation filter 4, that is, the frequency ratio between the signal to be measured and the reference signal. To measure.
According to this frequency ratio measuring device 1, the noise component included in the signal indicating the measured value can be removed or reduced, and the measurement accuracy can be improved. Further, since the convolution integral may be executed at the sampling frequency finally required by the decimation filter 4, the amount of calculation can be reduced, which can reduce the circuit scale and reduce the power consumption. can do. Hereinafter, a specific description will be given.

The frequency ratio measuring device 1 (measuring device) shown in FIG. 1 has a value (or the above-mentioned value) corresponding to the ratio (frequency ratio) between the frequency of the reference signal (reference clock) whose frequency is known and the frequency of the signal to be measured. It is a device (circuit) that generates a count value (a signal indicating the count value), which is a value used for generation). That is, the measured value (output) of the frequency ratio measuring device 1 is the count value.
Further, in the frequency ratio measuring device 1, both the direct counting method and the reciprocal counting method can be adopted.

That is, when the direct counting method is adopted, the measured value is the count value of the pulse signal which is the signal to be measured, and the gate time used to obtain the count value is defined by the reference signal. In this way, it is possible to adopt the direct counting method.

When the reciprocal counting method is adopted, the measured value is the count value of the pulse signal which is the reference signal, and the gate time used to obtain the count value is defined by the measured signal. In this way, it is possible to adopt the reciprocal counting method. In the following, a direct counting method will be typically described as an example. In the reciprocal counting method, the reference signal and the measured signal may be reversed in the direct counting method.

As shown in FIG. 1, the frequency ratio measuring device 1 includes a frequency delta sigma modulator 2 (hereinafter referred to as “FDSM (Frequency Delta Sigma Modulator)”), an up counter 3 (counter), and a decimation filter 4. I have. The FDSM2 is an example of a frequency ratio measuring unit that measures the frequency ratio between the reference signal and the signal to be measured, and the frequency ratio measuring unit may have another configuration.
Further, in the frequency ratio measuring device 1, the decimation filter 4 is connected to the output side (second stage) of the FDSM 2 and the up counter 3.
Further, the signal to be measured is input to the FDSM2, and the reference signal (reference clock) whose frequency is known is input to the FDSM2 and the up counter 3.

Further, the FDSM2 has a function of frequency-delta-sigma-modulating the signal to be measured based on the reference signal (using the reference signal) and generating a frequency delta-sigma-modulated signal (direct counting method). The reference signal may be frequency-delta-sigma-modulated based on the signal to be measured (using the signal to be measured) (reciprocal counting method).
The FDSM2 includes, for example, an FDSM that outputs an output signal in a bitstream format (hereinafter, also referred to as "FDSM having a bitstream configuration (bitstream type FDSM)"), and an FDSM that outputs an output signal in a data stream format (hereinafter, "" FDSM (data stream type FDSM) of data stream configuration) and the like can be used.
When using an FDSM having a bitstream configuration, other signal processing circuits can be simplified. Further, when the FDSM having a data stream configuration is used, it is possible to cope with a case where the frequency fluctuation is large.

Next, the FDSM2 having a data stream configuration and the FDSM2 having a bitstream configuration will be described. First, the FDSM2 having a data stream configuration will be described.
As shown in FIG. 3, the FDSM2 having a data stream configuration has an up counter 21 that counts the rising edge of the signal to be measured and outputs count data Dc indicating the count value, and count data synchronized with the rising edge of the reference signal. The first latch 22 that latches Dc and outputs the first data D1, the second latch 23 that latches the first data D1 and outputs the second data D2 in synchronization with the rising edge of the reference signal, and the first A subtractor 24 for generating output data OUT by subtracting the second data D2 from the data D1 is provided. The first latch 22 and the second latch 23 are composed of, for example, a D flip-flop circuit or the like.

The FDSM2 in this example is also called a first-order frequency delta-sigma modulator, which latches the count value of the measured signal twice by the reference signal, and uses the rising edge of the reference signal as a trigger to set the count value of the measured signal. Hold sequentially. In this example, it is assumed that the latch operation is performed at the rising edge, but the latch operation may be performed at both the falling edge and the rising / falling edge. Further, the subtractor 24 calculates the difference between the two held count values, and outputs the increment of the count value of the measured signal observed during one cycle of the reference signal with the passage of time without a dead period. When the frequency of the signal to be measured is fx and the frequency of the reference signal is fc, the frequency ratio is fx / fc. The FDSM2 outputs a frequency delta-sigma modulation signal (a signal indicating the measured value Si shown in FIG. 1) indicating a frequency ratio as a digital signal sequence.
This digital signal string is called a data string / data stream. A digital signal string represented by one bit, which will be described later, is called a bit string / bit stream.

Next, FDSM2 having a bitstream configuration will be described.
As shown in FIG. 4, the FDSM2 having a bit stream configuration synchronizes with the first latch 22 that latches the signal to be measured and outputs the first data d1 in synchronization with the rising edge of the reference signal, and synchronizes with the rising edge of the reference signal. Then, the second latch 23 that latches the first data d1 and outputs the second data d2, and the exclusive logic that calculates the exclusive logical sum of the first data d1 and the second data d2 to generate the output data OUT. A sum circuit 25 is provided. The first latch 22 and the second latch 23 are composed of, for example, a D flip-flop circuit or the like.

The difference between this FDSM2 and the FDSM2 having the data stream configuration is that in the FDSM2 having the data stream configuration, the count data Dc is held by the first latch 22, and the measured signal observed during one cycle of the reference signal. While the increment of the count data Dc obtained by counting the rising edge of is output as the output data OUT, in this FDSM2, the high or low state of the signal to be measured is held by the first latch 22, and the reference signal becomes a reference signal. The point is that the evenness and oddness of the number of inversions during one cycle transition is output as output data OUT (0 is output if the number of inversions is even, and 1 is output if the number of inversions is odd).

By the way, since one cycle of the measured signal is composed of two inversion transitions of High and Low, the degree of change of the change of the measured signal with respect to the reference signal on the output data OUT is determined by the FDSM2 of the data stream configuration. It is twice as much as the case where the count value is held in. Therefore, the behavior of the idle tone in the FDSM2 having the bitstream configuration matches the behavior when the signal under test having twice the frequency is input to the FDSM2 in the FDSM2 having the data stream configuration. Regarding the operation of the FDSM2 having a bitstream configuration, the frequency fx of the signal to be measured may be replaced with the frequency 2fx as necessary in consideration of the above-mentioned properties.

Next, the decimation filter 4 will be described.
The decimation filter 4 shown in FIG. 2 is a circuit (device) that downsamples and outputs a signal indicating an input measured value.
As shown in FIG. 2, the decimation filter 4 is based on the time calculation unit 41 that obtains the time (ri) until the sampling timing based on the measurement timing (time stamp ti) and the time (ri) until the sampling timing. The impulse response calculation unit 42 for obtaining the impulse response (impulse response value) at the sampling timing, the multiplication unit 43 for obtaining the product of the measured value (Si) and the impulse response value F (ri), and the measured value (Si). It is provided with an integration unit 44 that integrates the product with the impulse response value F (ri) to obtain the integrated value. In the decimation filter 4, the impulse response calculation unit 42 is connected to the output side of the time calculation unit 41, the multiplication unit 43 is connected to the output side of the impulse response calculation unit 42, and the integration unit 44 is connected to the output side of the multiplication unit 43. Has been done. The multiplication unit 43 and the integration unit 44 may be integrated.

With the decimation filter 4 having such a configuration, it is possible to remove or reduce the noise component contained in the signal output from the FDSM2. To explain in detail, first, the noise can be shifted to the high frequency side by exerting the noise shape function (noise shape effect), which is one of the features of the FDSM2. Then, the decimation filter 4 can remove or reduce the noise component and improve the measurement accuracy.
Further, by providing the decimation filter 4 as a filter, the convolution integral may be executed at the sampling frequency finally required, so that the amount of calculation can be reduced, and thus the circuit scale can be reduced. , Power consumption can be reduced.

The time calculation unit 41 has a function of calculating (obtaining) the time until the sampling timing based on the measurement timing. In the present embodiment, the time calculation unit 41 subtracts the time stamp ti of the current measurement timing from the time stamp at the sampling timing, and calculates the time ri from the current measurement timing to the sampling timing. Note that FIG. 6 shows r11, r12, r21, r22, r23, r31, and r32 as an example of the time ri.

Further, the measurement timing is the timing at which the measurement is performed, and in the present embodiment, as shown in FIG. 4, it is the rising edge of the pulse signal indicating the measurement timing. This measurement timing is input as a time stamp ti (absolute time). Note that FIG. 6 shows t1, t2, and t3 as an example of the time stamp ti at the measurement timing.
The sampling timing is the timing at which sampling is performed, and is shown in FIG. 6 in the present embodiment. Note that FIG. 6 shows P1, P2, and P3 as an example of sampling timing.

Further, the time calculation unit 41 uses the count value obtained by counting the reference signal or the measured signal as the time stamp ti. In the present embodiment, the time calculation unit 41 uses the count value obtained by counting the reference signal as the time stamp ti. As a result, it is not necessary to separately prepare a circuit for generating a time stamp, and the circuit configuration can be simplified.

The impulse response calculation unit 42 has a function of calculating (obtaining) the impulse response at the sampling timing based on the time ri from the current measurement timing to the sampling timing. Further, the impulse response calculation unit 42 can be configured by, for example, an FIR (Finite Impulse Response) filter or the like.

Also, the impulse response is finite and is represented by a function. This function is not particularly limited, but is preferably a linear function of time or a quadratic function of time. As shown in FIG. 5, in this embodiment, the impulse response is finite and is represented by a quadratic function of time. The start point of this impulse response is "0", and the end point is "d3". Further, d1 and d2 are inflection points of the quadratic function expressing the impulse response, respectively. In this way, a desired impulse response can be easily and accurately expressed, and the value of the impulse response can be obtained.
Further, since the waveform of the impulse response is the same as the waveform of the output of the low-pass filter in the present embodiment, the noise component contained in the signal output from the FDSM2 is removed or reduced by the decimation filter 4 as described above. can do.

Specifically, the impulse response is expressed by the following equations (1), (2), and (3), and the impulse response is expressed by using the equations (1), (2), and (3). Find the value. When 0 ≦ ri <d1, the formula (1) is used, when d1 ≦ ri ≦ d2, the formula (2) is used, and when d2 <ri ≦ d3, the formula (3) is used. The start point of the impulse response is "0", and the end point is "d3". Further, d1 and d2 are inflection points of the quadratic function expressing the impulse response, respectively.

R (ri) = a1, ri ² + b1, ri + c1 (0 ≤ ri <d1) ... (1)
R (ri) = a2 · ri ² + b2 · ri + c2 (d1 ≤ ri ≤ d2) ... (2)
R (ri) = a3 ・ ri ² + b3 ・ ri + c3 (d2 <ri ≦ d3) ・ ・ ・ (3)
Note that a1, a2, a3, b1, b2, b3, c1, c2, and c3 are coefficients, respectively.
Further, the arithmetic expressions (functions) for obtaining the impulse response value, that is, the equations (1), (2), and (3) are obtained in advance and stored in a storage unit (not shown) of the impulse response calculation unit 42. Remember.

Here, to give an example, when the waveform of the impulse response was designed using a quadratic function so that the cutoff frequency of the decimation filter 4 was 200 Hz, the period of the impulse response was 2.7 msec. Therefore, when the output of the decimation filter 4, that is, the interval T (see FIG. 6) between two adjacent sampling timings is 1 msec, the impulse response is used for measurement at only two or three points. As a result, the amount of calculation can be reduced, whereby the circuit scale can be reduced and the power consumption can be reduced.

The multiplication unit 43 has a function of calculating (obtaining) the product of the output value of the FDSM2, that is, the measured value Si and the impulse response value.
The integration unit 44 has a function of integrating the product of the measured value and the impulse response value, that is, a function of calculating (obtaining) the integrated value of the product of the measured value and the impulse response value. Further, the integrating unit 44 has a storage unit (not shown) for storing various information such as integrated values.

Next, the operation of the frequency ratio measuring device 1 will be described.
As shown in FIG. 1, the FDSM2 outputs a signal (hereinafter, referred to as “measured value Si”) indicating a measured value corresponding to the frequency ratio of the reference signal and the signal to be measured. The measured value Si is input to the multiplication unit 43 of the decimation filter 4.

Further, the up counter 3 counts the rising edge of the reference signal and outputs the count value as the measurement timing, that is, the time stamp ti. The time stamp ti is input to the time calculation unit 41 of the decimation filter 4. Not limited to this, for example, the rising edge of the signal to be measured may be counted and the count value may be output as a time stamp ti.

In this way, the measurement timing is input to the time calculation unit 41 as a time stamp (ti). As a result, the absolute time information can be accurately obtained.

Moreover, the interval of the measurement timing (time stamp ti) is constant. Thereby, the measurement accuracy can be further improved.

Next, the operation of the decimation filter 4 of the frequency ratio measuring device 1 will be described. Here, in order to facilitate understanding, the time stamps t1, t2, and t3 are taken as examples as the time stamp ti, and the times r11, r12, r21, r22, and r31 are taken as examples as the time ri, and the sampling timing is taken. As an example, sampling timings P1 and P2 will be described.

As shown in FIGS. 2 and 6, in the decimation filter 4, the time calculation unit 41 changes from the time stamp at the sampling timing P1 to the time stamp of the current measurement timing at the first measurement timing (time stamp t1) in FIG. Subtract t1 to calculate the time r11 from the current measurement timing to the sampling timing P1. Further, the time calculation unit 41 similarly calculates the time r12 from the current measurement timing to the sampling timing P2. The times r11 and r12 are output from the time calculation unit 41 and input to the impulse response calculation unit 42.

Further, the time calculation unit 41 subtracts the time stamp t2 of the current measurement timing from the time stamp at the sampling timing P1 at the second measurement timing (time stamp t2) in FIG. 6, and the sampling timing is obtained from the current measurement timing. The time r21 to P1 is calculated. Further, the time calculation unit 41 similarly calculates the time r22 from the current measurement timing to the sampling timing P2. Further, the time calculation unit 41 similarly calculates the time r23 from the current measurement timing to the sampling timing P3. The times r21, r22, and r23 are output from the time calculation unit 41 and input to the impulse response calculation unit 42.

Next, the impulse response calculation unit 42 uses the corresponding equations from the equations (1), (2), and (3) to obtain the impulse response values F (r11), F (r12), and F ( r21), F (r22), and F (r22) are calculated. The impulse response values F (r11), F (r12), F (r21), F (r22), and F (r23) are output from the impulse response calculation unit 42 and input to the multiplication unit 43.

Next, the multiplication unit 43 calculates the product of the measured value Si and the impulse response value F (ri), that is, Si · F (ri). As the measured value Si, the impulse response values F (r11) and F (r12) are the measured values at the first measurement timing (time stamp t1) in FIG. 6, and the impulse response values F (r21) and F (r12) are used. For F (r22) and F (r23), the measured values at the second measurement timing (time stamp t2) in FIG. 6 are used. Each Si · F (ri) is output from the multiplication unit 43 and input to the integration unit 44.

Next, the integrating unit 44 integrates Si · F (r11) and Si · F (r21) to obtain the integrated value Σ1. The integrated value Σ1 is output from the integrating unit 44 at a predetermined timing when the time stamp (ti) coincides with the sampling timing P1 or after the time stamp (ti) exceeds the sampling timing P1. Then, the integrated value Σ1 is reset when the time stamp (ti) coincides with the sampling timing P1 or after that. The integration is performed up to the measurement timing immediately before the measurement timing exceeds the sampling timing P1.

Similarly, the integrating unit 44 integrates Si · F (r12), Si · F (r22), and Si · F (r31) to obtain the integrated value Σ2. The integrated value Σ2 is output from the integrating unit 44 at a predetermined timing when the time stamp (ti) coincides with the sampling timing P2 or after the time stamp (ti) exceeds the sampling timing P2. Then, the integrated value Σ2 is reset when the time stamp (ti) coincides with the sampling timing P2 or after that. The integration is performed up to the measurement timing immediately before the measurement timing exceeds the sampling timing P2.

In this way, the integration unit 44 outputs the integrated value and resets the integrated value when the time stamp (ti) matches the sampling timing or after the time stamp (ti) exceeds the sampling timing. For example, when the sampling timing is P1, the integrating unit 44 determines that the current time indicated by the time stamp (ti) coincides with the sampling timing P1 or exceeds the sampling timing P1 (for example, the time stamp t3). The integrated value Σ1 is output. This makes it possible to perform integration up to the measurement timing immediately before the measurement timing exceeds the sampling timing.

Further, the integration unit 44 integrates up to the measurement timing (for example, time stamp t2) immediately before the measurement timing (time stamp ti) exceeds the sampling timing (for example, P1). As a result, the integration can be performed without omission or duplication, and the measurement accuracy can be improved.

Next, the operation of the decimation filter 4 will be described from another angle based on the flowchart shown in FIG. 7.
As shown in FIG. 7, first, the integration unit 44 stores an initial value as an integration value (step S101).
Next, the measured value Si and the time stamp ti of the current measurement timing are acquired (step S102).

Next, the time calculation unit 41 calculates the time ri from the current measurement timing to the corresponding sampling timing (step S103).
Next, the impulse response calculation unit 42 calculates the impulse response value F (ri) using the corresponding equation from the equations (1), (2), and (3) (step S104).
Next, it is determined whether or not the time stamp ti of the current measurement timing exceeds the sampling timing (step S105), and if it is determined that the time stamp ti does not exceed the sampling timing, the multiplication unit 43 determines the measured value Si and the impulse response value F. The product with (ri), that is, Si · F (ri) is calculated, and the integrating unit 44 integrates Si · F (ri) to obtain the integrated value (step S107).

On the other hand, if it is determined in step S105 that the time stamp ti of the current measurement timing exceeds the sampling timing, the integration unit 44 outputs the integrated value and resets the integrated value (step S106). Next, the multiplication unit 43 calculates the product of the measured value Si and the impulse response value F (ri), that is, Si · F (ri), and the integration unit 44 integrates the Si · F (ri). Obtain the integrated value (step S107).
Next, it is determined whether or not the measurement is completed (step S108), and if it is determined that the measurement is not completed, the process returns to step S102, and steps S102 and subsequent steps are executed again. On the other hand, if it is determined in step S108 that the measurement is completed, the operation is stopped.

Such a frequency ratio measuring device 1 can be configured by hardware that realizes the functions corresponding to the above-mentioned parts. Further, the frequency ratio measuring device 1 can also be configured by software by a program, a module, or the like that realizes the functions corresponding to the above-mentioned parts. Further, the frequency ratio measuring device 1 can be configured by combining hardware and software that realize the functions corresponding to the above-mentioned parts.

As described above, according to the frequency ratio measuring device 1, the decimation filter 4 can remove or reduce the noise component included in the signal output from the FDSM2, and can improve the measurement accuracy. In this case, it is possible to obtain the same measurement accuracy as when the moving average filter has a plurality of stages, and if the impulse response waveform is designed, the desired filter characteristics can be realized.

Further, by providing the decimation filter 4 as a filter, the convolution integral may be executed at the sampling frequency finally required, so that the amount of calculation can be reduced, and thus the circuit scale can be reduced. , Power consumption can be reduced.

In the present embodiment, one FDSM2 is provided as the frequency ratio measuring unit, but the present invention is not limited to this, and for example, a plurality of FDSM2s may be provided. In this case, for example, the FDSM2s are connected in parallel, and for the signal to be measured, a signal to be measured that is in phase or has a different phase from each other is input to each FDSM2. Alternatively, the reference signal may be configured so that reference signals having the same phase or different phases from each other are input to each FDSM2. Alternatively, the measured signals may be configured such that the measured signals having the same phase or different phases from each other are input to each FDSM2, and the reference signals having the same phase or different phases from each other are input to each FDSM2. As a result, the idle tone superimposed on the output signal of each FDSM2 can be dispersed in time. That is, the influence of quantization noise such as idle tone can be suppressed, and the measurement accuracy can be improved.

<Physical quantity sensor embodiment>
FIG. 8 is a diagram showing an internal structure of a detection unit in an embodiment of an acceleration sensor, which is an example of a physical quantity sensor of the present invention. FIG. 9 is a cross-sectional view taken along the line AA in FIG.
Hereinafter, an embodiment of an acceleration sensor, which is an example of a physical quantity sensor, will be described focusing on differences from the above-described embodiment, and the same matters will be omitted.

As shown in FIGS. 8 and 9, the acceleration sensor 100 (physical quantity sensor) of the present embodiment is output from the detection unit 200 that detects acceleration, which is an example of a physical quantity (physical quantity related to vibration), and the detection unit 200. It is provided with a frequency ratio measuring device 1 (measuring device) into which a signal to be measured is input. The detection unit 200 and the frequency ratio measuring device 1 are electrically connected. That is, the output of the detection unit 200 is input to the frequency ratio measuring device 1 as a signal to be measured by the frequency ratio measuring device 1. The frequency ratio measuring device 1 may be built in the detection unit 200 or may be externally attached. Since the frequency ratio measuring device 1 has already been described with reference to FIGS. 1, 2, and the like, the description thereof will be omitted.

The detection unit 200 includes a flat plate-shaped base portion 210, a substantially rectangular flat plate-shaped movable portion 212 connected to the base portion 210 via a joint portion 211, and a physical quantity spanned between the base portion 210 and the movable portion 212. It includes an acceleration detection element 213, which is an example of a detection element, and a package 220 that houses at least each of the above components.

The detection unit 200 receives a drive signal applied to the excitation electrode of the acceleration detection element 213 via the external terminals 227 and 228, the internal terminals 224 and 225, the external connection terminals 214e and 214f, the connection terminals 210b and 210c, and the like. The vibrating beams 213a and 213b of the acceleration detection element 213 oscillate (resonate) at a predetermined frequency. Then, the detection unit 200 outputs the resonance frequency of the acceleration detection element 213, which changes according to the applied acceleration, as a signal to be measured (detection signal).
This measured signal is input to the frequency ratio measuring device 1, and the frequency ratio measuring device 1 operates as described in the above embodiment.

The number of detection units 200 is one in the present embodiment, but is not limited to this, and may be, for example, two or three. By providing three detection units 200 and crossing the detection axes of each detection unit 200 with each other, it is possible to detect the acceleration in each of the three detection axes orthogonal to each other.

Even with the acceleration sensor 100 as described above, the frequency ratio measuring device 1 included in the acceleration sensor 100 can exert the same effect as that of the above-described embodiment. As a result, the acceleration sensor 100 can accurately detect the acceleration.

The decimation filter, the measuring device, and the physical quantity sensor of the present invention have been described above based on the illustrated embodiment, but the present invention is not limited to this, and the configuration of each part is arbitrary having the same function. It can be replaced with the one of the configuration. Further, any other constituents may be added.

Further, in the above-described embodiment, the frequency ratio measuring device has been described as an example of the measuring device, but in the present invention, the measuring device is not limited to this, and is applied to any measuring device to which a decimation filter can be provided. It is possible. Specific examples include, for example, an AD converter and the like.

Further, in the above-described embodiment, the acceleration sensor has been described as an example of the physical quantity sensor, but in the present invention, the physical quantity sensor can be used as long as it can detect the change in the physical quantity as the frequency change. In addition, the present invention includes, for example, a mass sensor, an ultrasonic sensor, an angular acceleration sensor, a capacitance sensor, and the like.

Further, the physical quantity sensor of the present invention is, for example, various electronic devices such as an inclinometer, a seismometer, a navigation device, an attitude control device, a game controller, a mobile phone, a smartphone, a digital still camera, and various moving objects such as an automobile. Etc. can be applied. That is, in the present invention, it is possible to provide an electronic device provided with the physical quantity sensor of the present invention, a moving body provided with the physical quantity sensor of the present invention, and the like.

1 ... Frequency ratio measuring device, 2 ... FDSM (frequency delta sigma modulator), 3 ... Up counter, 4 ... Decimation filter, 21 ... Up counter, 22 ... 1st latch, 23 ... 2nd latch, 24 ... Subtractor, 25 ... Exclusive OR circuit, 41 ... Time calculation unit, 42 ... Impulse response calculation unit, 43 ... Multiplication unit, 44 ... Integration unit, 100 ... Accelerometer, 200 ... Detection unit, 210 ... Base unit, 210b ... Connection terminal , 210c ... Connection terminal, 211 ... Joint part, 212 ... Movable part, 213 ... Accelerometer detection element, 213a ... Vibration beam, 213b ... Vibration beam, 214e ... External connection terminal, 214f ... External connection terminal, 220 ... Package, 224 ... Internal terminal, 225 ... Internal terminal, 227 ... External terminal, 228 ... External terminal, S101 to S108 ... Step

Claims (9)

A frequency ratio measuring device that measures the frequency ratio between the measured signal and the reference signal based on the measured signal and the reference signal.
The reference signal and the measured signal are input, and one of the input reference signal and the measured signal is used for frequency delta sigma modulation of the other to generate a frequency delta sigma modulated signal indicating a measured value. Frequency delta sigma modulator and
A decimation filter that downsamples and outputs the frequency delta-sigma modulation signal is provided.
The decimation filter includes a time calculation unit that obtains the time until the sampling timing based on the measurement timing, and a time calculation unit.
An impulse response calculation unit that obtains an impulse response at the sampling timing based on the time until the sampling timing.
A multiplication unit for obtaining the product of the measured value and the impulse response value,
It is provided with an integration unit that integrates the product to obtain the integrated value.
A frequency ratio measuring device characterized in that the impulse response is finite and has a waveform that removes or reduces a noise component shifted to a high frequency side by a noise shape effect. The frequency ratio measuring device according to claim 1, wherein the measurement timing interval is constant. The frequency ratio measuring device according to claim 1 or 2, wherein the measurement timing is input as a time stamp. The frequency according to claim 3, wherein the integrating unit outputs the integrated value and resets the integrated value when the time stamp coincides with the sampling timing or after the time stamp exceeds the sampling timing. Ratio measuring device. The frequency ratio measuring device according to any one of claims 1 to 4, wherein the integrating unit performs the integration up to the measurement timing immediately before the measurement timing exceeds the sampling timing. The measured value is a count value of a pulse signal which is the signal to be measured.
The frequency ratio measuring device according to any one of claims 1 to 5 , wherein the gate time used to obtain the count value is defined by the reference signal. The measured value is a count value of a pulse signal which is the reference signal.
The frequency ratio measuring device according to any one of claims 1 to 6 , wherein the gate time used to obtain the count value is defined by the signal to be measured. The frequency ratio measuring device according to claim 6 or 7 , wherein the time calculation unit uses a count value obtained by counting the reference signal or the measured signal as a time stamp. A detector that detects physical quantities and
A physical quantity sensor comprising the frequency ratio measuring device according to any one of claims 1 to 8 , wherein a signal to be measured output from the detection unit is input.

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