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JP6969533B2 - Multilayer boards and electronics - Google Patents
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JP6969533B2 - Multilayer boards and electronics - Google Patents

Multilayer boards and electronics Download PDF

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JP6969533B2
JP6969533B2 JP2018204606A JP2018204606A JP6969533B2 JP 6969533 B2 JP6969533 B2 JP 6969533B2 JP 2018204606 A JP2018204606 A JP 2018204606A JP 2018204606 A JP2018204606 A JP 2018204606A JP 6969533 B2 JP6969533 B2 JP 6969533B2
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coil
base material
conductor
openings
connecting conductor
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JP2020072163A (en
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晃史 鎌田
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Description

本発明は、複数の基材層を積層してなる積層体に形成されたコイルと、上記積層体の実装面に形成される実装電極とを備える多層基板、および上記多層基板を有する電子機器に関する。 The present invention relates to a multilayer substrate including a coil formed in a laminate formed by laminating a plurality of substrate layers, a mounting electrode formed on a mounting surface of the laminate, and an electronic device having the multilayer substrate. ..

従来、複数の基材層を積層してなる積層体と、積層体に形成され、複数の基材層の積層方向に巻回軸を有したコイルと、積層体の実装面に形成された実装電極(他の回路基板等への実装用の電極)と、を備えた多層基板が知られている(特許文献1)。 Conventionally, a laminate formed by laminating a plurality of substrate layers, a coil formed in the laminate and having a winding axis in the lamination direction of the plurality of substrate layers, and a mounting formed on the mounting surface of the laminate. A multilayer board provided with an electrode (an electrode for mounting on another circuit board or the like) is known (Patent Document 1).

国際公開第2015/037374号International Publication No. 2015/033744

しかし、特許文献1に記載の構成では、次のような問題によって、コイルのインダクタンスの低下を抑制しつつ、多層基板の実装性を向上させることは難しい。 However, in the configuration described in Patent Document 1, it is difficult to improve the mountability of the multilayer board while suppressing the decrease in the inductance of the coil due to the following problems.

(a)多層基板の実装性を向上させるため、実装面に大面積の実装電極を設けた場合には、大面積の実装電極によってコイルからの磁束が妨げられ、コイルのインダクタンスが低下する虞がある。また、実装電極に流れる渦電流による損失が増大する虞がある。 (A) When a large-area mounting electrode is provided on the mounting surface in order to improve the mountability of the multilayer substrate, the magnetic flux from the coil may be hindered by the large-area mounting electrode, and the inductance of the coil may decrease. be. In addition, there is a risk that the loss due to the eddy current flowing through the mounting electrode will increase.

(b)また、多層基板の実装先である他の回路基板のランドとの関係で、実装面に同電位の複数の実装電極を設ける場合もある。しかし、実装面の広範囲に亘って同電位の実装電極が配置されていると、同電位の実装電極同士を接続する接続用導体が必要となり、この接続用導体によってコイルからの磁束が妨げられる虞もある。 (B) Further, in relation to the land of another circuit board to which the multilayer board is mounted, a plurality of mounting electrodes having the same potential may be provided on the mounting surface. However, if the mounting electrodes having the same potential are arranged over a wide range of the mounting surface, a connecting conductor for connecting the mounting electrodes having the same potential is required, and this connecting conductor may hinder the magnetic flux from the coil. There is also.

本発明の目的は、実装面に形成される実装電極の配置の自由度を高めつつ、積層体に形成されるコイルのインダクタンスの低下および渦電流による損失を抑制できる多層基板を提供することにある。また、その多層基板を備える電子機器を提供することにある。 An object of the present invention is to provide a multilayer substrate capable of suppressing a decrease in inductance of a coil formed in a laminated body and a loss due to an eddy current while increasing the degree of freedom in arranging mounting electrodes formed on the mounting surface. .. Another object of the present invention is to provide an electronic device including the multilayer board.

本発明の多層基板は、
実装面を有し、複数の基材層を積層してなる積層体と、
前記積層体に形成され、前記複数の基材層の積層方向に巻回軸を有するコイルと、
前記実装面に形成される実装電極と、
前記積層体に形成され、複数の開口を有する接続用導体と、
を備え、
前記複数の開口は、前記接続用導体を構成する導体で囲まれた長尺状であり、
前記実装電極は、前記実装面に露出する前記接続用導体の一部であることを特徴とする。
The multilayer board of the present invention is
A laminated body having a mounting surface and laminating a plurality of base material layers,
A coil formed in the laminated body and having a winding axis in the laminating direction of the plurality of base materials,
The mounting electrode formed on the mounting surface and
A connecting conductor formed in the laminated body and having a plurality of openings,
Equipped with
The plurality of openings have a long shape surrounded by conductors constituting the connecting conductor.
The mounting electrode is characterized by being a part of the connecting conductor exposed on the mounting surface.

また、本発明の多層基板は、
実装面を有し、複数の基材層を積層してなる積層体と、
前記積層体に形成され、前記複数の基材層の積層方向に巻回軸を有するコイルと、
前記実装面に形成される実装電極と、
前記積層体に形成され、複数の開口を有する接続用導体と、
を備え、
前記複数の開口は、前記実装電極を構成する導体で囲まれた長尺状であり、
前記実装電極は、前記接続用導体に接続されることを特徴とする。
Further, the multilayer board of the present invention is
A laminated body having a mounting surface and laminating a plurality of base material layers,
A coil formed in the laminated body and having a winding axis in the laminating direction of the plurality of base materials,
The mounting electrode formed on the mounting surface and
A connecting conductor formed in the laminated body and having a plurality of openings,
Equipped with
The plurality of openings have a long shape surrounded by conductors constituting the mounting electrode.
The mounting electrode is characterized in that it is connected to the connecting conductor.

この構成によれば、コイルからの磁束が、接続用導体に設けられた複数の開口の両方を通過した場合、複数の開口で挟まれる導体部分には上記磁束を相殺する向きの渦電流は流れ難い。すなわち、接続用導体に複数の開口を設けることにより、接続用導体に大きな開口が形成されている場合と同様の作用効果を得ることができ、接続用導体に大きな開口を設けることなく、コイルからの磁束が接続用導体で妨げられることを抑制できる。したがって、この構成により、実装面に形成される実装電極の配置の自由度を高めつつ(実装電極を任意の形状にした場合や、実装電極の面積を大きくした場合、または実装面に同電位の複数の実装電極を配置した場合でも)、コイルのインダクタンスの低下や接続用導体に流れる渦電流による損失を抑制できる。 According to this configuration, when the magnetic flux from the coil passes through both of the plurality of openings provided in the connecting conductor, an eddy current in a direction canceling the magnetic flux flows in the conductor portion sandwiched between the plurality of openings. hard. That is, by providing a plurality of openings in the connecting conductor, the same effect as in the case where a large opening is formed in the connecting conductor can be obtained, and the coil can be used without providing a large opening in the connecting conductor. It is possible to prevent the magnetic flux of the above from being obstructed by the connecting conductor. Therefore, with this configuration, while increasing the degree of freedom in arranging the mounting electrodes formed on the mounting surface (when the mounting electrode has an arbitrary shape, when the area of the mounting electrode is increased, or when the mounting surface has the same potential). Even when a plurality of mounting electrodes are arranged), it is possible to suppress a decrease in the inductance of the coil and a loss due to the eddy current flowing through the connecting conductor.

本発明によれば、積層体に形成されたコイルのインダクタンスの低下および渦電流による損失を抑制しつつ、実装面に形成される実装電極の配置の自由度を高めた多層基板、およびその多層基板を備える電子機器を実現できる。 According to the present invention, a multilayer substrate having an increased degree of freedom in the arrangement of mounting electrodes formed on the mounting surface while suppressing a decrease in inductance of the coil formed in the laminate and a loss due to eddy current, and a multilayer substrate thereof. It is possible to realize an electronic device equipped with.

図1(A)は第1の実施形態に係る多層基板101の外観斜視図であり、図1(B)は多層基板101を別の視点から視た外観斜視図である。FIG. 1A is an external perspective view of the multilayer board 101 according to the first embodiment, and FIG. 1B is an external perspective view of the multilayer board 101 as viewed from another viewpoint. 図2は、多層基板101の分解平面図である。FIG. 2 is an exploded plan view of the multilayer board 101. 図3(A)は多層基板101の平面図であり、図3(B)は図1(A)におけるA−A断面図である。3A is a plan view of the multilayer board 101, and FIG. 3B is a cross-sectional view taken along the line AA in FIG. 1A. 図4は、第1の実施形態に係る電子機器301の主要部の断面図である。FIG. 4 is a cross-sectional view of a main part of the electronic device 301 according to the first embodiment. 図5(A)は多層基板101のうち、接続用導体41,42が形成された層を示す平面図であり、図5(B)は比較例である多層基板100のうち、接続用導体41A,42Aが形成された層を示す平面図である。FIG. 5A is a plan view showing a layer in which the connecting conductors 41 and 42 are formed in the multilayer board 101, and FIG. 5B is a connecting conductor 41A in the multilayer board 100 which is a comparative example. , 42A is a plan view showing a layer formed. 図6(A)は第2の実施形態に係る多層基板102の外観斜視図であり、図6(B)は多層基板102の別の視点から視た外観斜視図である。FIG. 6A is an external perspective view of the multilayer board 102 according to the second embodiment, and FIG. 6B is an external perspective view of the multilayer board 102 as viewed from another viewpoint. 図7は、多層基板102の分解平面図である。FIG. 7 is an exploded plan view of the multilayer board 102. 図8は、図6(A)におけるB−B断面図である。FIG. 8 is a cross-sectional view taken along the line BB in FIG. 6 (A). 図9(A)は第3の実施形態に係る多層基板103の外観斜視図であり、図9(B)は多層基板103の別の視点から視た外観斜視図である。9 (A) is an external perspective view of the multilayer board 103 according to the third embodiment, and FIG. 9 (B) is an external perspective view of the multilayer board 103 as viewed from another viewpoint. 図10は、多層基板103の分解平面図である。FIG. 10 is an exploded plan view of the multilayer board 103. 図11は、図9(A)におけるC−C断面図である。11 is a cross-sectional view taken along the line CC in FIG. 9A.

以降、図を参照して幾つかの具体的な例を挙げて、本発明を実施するための複数の形態を示す。各図中には同一箇所に同一符号を付している。要点の説明または理解の容易性を考慮して、便宜上実施形態を分けて示すが、異なる実施形態で示した構成の部分的な置換または組み合わせが可能である。第2の実施形態以降では第1の実施形態と共通の事柄についての記述を省略し、異なる点についてのみ説明する。特に、同様の構成による同様の作用効果については実施形態毎には逐次言及しない。 Hereinafter, a plurality of embodiments for carrying out the present invention will be shown with reference to the drawings with reference to some specific examples. The same reference numerals are given to the same parts in each figure. Although the embodiments are shown separately for convenience in consideration of the explanation of the main points or the ease of understanding, partial replacement or combination of the configurations shown in different embodiments is possible. In the second and subsequent embodiments, the description of matters common to the first embodiment will be omitted, and only the differences will be described. In particular, the same action and effect due to the same configuration will not be mentioned sequentially for each embodiment.

《第1の実施形態》
図1(A)は第1の実施形態に係る多層基板101の外観斜視図であり、図1(B)は多層基板101を別の視点から視た外観斜視図である。図2は、多層基板101の分解平面図である。図3(A)は多層基板101の平面図であり、図3(B)は図1(A)におけるA−A断面図である。図2では、構造を分かりやすくするため、コイル導体パターン31,32,33,34をドットパターンで示している。また、図3(A)では、コイル導体パターン31,32,33,34をドットパターンで示しており、開口SL11,SL12,SL21,SL22をハッチングで示している。
<< First Embodiment >>
FIG. 1A is an external perspective view of the multilayer board 101 according to the first embodiment, and FIG. 1B is an external perspective view of the multilayer board 101 as viewed from another viewpoint. FIG. 2 is an exploded plan view of the multilayer board 101. 3A is a plan view of the multilayer board 101, and FIG. 3B is a cross-sectional view taken along the line AA in FIG. 1A. In FIG. 2, the coil conductor patterns 31, 32, 33, and 34 are shown as dot patterns in order to make the structure easy to understand. Further, in FIG. 3A, the coil conductor patterns 31, 32, 33, 34 are shown by dot patterns, and the openings SL11, SL12, SL21, and SL22 are shown by hatching.

多層基板101は、積層体10、コイル3(後に詳述する)、複数の実装電極P1,P2および接続用導体41,42等を備える。 The multilayer substrate 101 includes a laminate 10, a coil 3 (described in detail later), a plurality of mounting electrodes P1 and P2, connecting conductors 41 and 42, and the like.

積層体10は、長手方向がX軸方向に一致する直方体であり、互いに対向する第1主面VS1および第2主面VS2を有する。コイル3は積層体10の内部に形成されており、複数の実装電極P1,P2は積層体10の第1主面VS1に形成されている(露出している)。本実施形態では、第1主面VS1が本発明の「実装面」に相当する。 The laminated body 10 is a rectangular parallelepiped whose longitudinal direction coincides with the X-axis direction, and has a first main surface VS1 and a second main surface VS2 facing each other. The coil 3 is formed inside the laminated body 10, and the plurality of mounting electrodes P1 and P2 are formed (exposed) on the first main surface VS1 of the laminated body 10. In the present embodiment, the first main surface VS1 corresponds to the "mounting surface" of the present invention.

積層体10は、保護層1および複数の基材層15,14,13,12,11をこの順に積層して形成される。複数の基材層11,12,13,14,15は、樹脂材料(熱可塑性樹脂)からなる、長手方向がX軸方向に一致する矩形の平板である。複数の基材層11,12,13,14,15は、例えば液晶ポリマー(LCP)またはポリエーテルエーテルケトン(PEEK)を主材料とするシートである。 The laminated body 10 is formed by laminating the protective layer 1 and a plurality of base material layers 15, 14, 13, 12, 11 in this order. The plurality of base material layers 11, 12, 13, 14, and 15 are rectangular flat plates made of a resin material (thermoplastic resin) whose longitudinal directions coincide with the X-axis direction. The plurality of substrate layers 11, 12, 13, 14, 15 are sheets mainly made of, for example, a liquid crystal polymer (LCP) or a polyetheretherketone (PEEK).

基材層11の裏面には、コイル導体パターン31が形成されている。コイル導体パターン31は、基材層11の中央付近に配置される約3ターンの矩形スパイラル状の導体パターンである。コイル導体パターン31は、例えばCu箔等の導体パターンである。 A coil conductor pattern 31 is formed on the back surface of the base material layer 11. The coil conductor pattern 31 is a rectangular spiral conductor pattern having about 3 turns arranged near the center of the base material layer 11. The coil conductor pattern 31 is a conductor pattern such as a Cu foil.

基材層12の裏面には、コイル導体パターン32が形成されている。コイル導体パターン32は、基材層12の中央付近に配置される約3ターンの矩形スパイラル状の導体パターンである。コイル導体パターン32は、例えばCu箔等の導体パターンである。 A coil conductor pattern 32 is formed on the back surface of the base material layer 12. The coil conductor pattern 32 is a rectangular spiral conductor pattern having about 3 turns arranged near the center of the base material layer 12. The coil conductor pattern 32 is a conductor pattern such as a Cu foil.

基材層13の裏面には、コイル導体パターン33が形成されている。コイル導体パターン33は、基材層13の中央付近に配置される約3ターンの矩形スパイラル状の導体パターンである。コイル導体パターン33は、例えばCu箔等の導体パターンである。 A coil conductor pattern 33 is formed on the back surface of the base material layer 13. The coil conductor pattern 33 is a rectangular spiral conductor pattern having about 3 turns arranged near the center of the base material layer 13. The coil conductor pattern 33 is a conductor pattern such as a Cu foil.

基材層14の裏面には、コイル導体パターン34が形成されている。コイル導体パターン34は、基材層14の中央付近に配置される約3ターンの矩形スパイラル状の導体パターンである。コイル導体パターン34は、例えばCu箔等の導体パターンである。 A coil conductor pattern 34 is formed on the back surface of the base material layer 14. The coil conductor pattern 34 is a rectangular spiral conductor pattern having about 3 turns arranged near the center of the base material layer 14. The coil conductor pattern 34 is a conductor pattern such as a Cu foil.

基材層15の裏面には、接続用導体41,42が形成されている。接続用導体41は、基材層15の第1辺(図2における基材層15の左辺)付近に配置される矩形の導体パターンである。接続用導体42は、基材層15の第2辺(図2における基材層15の右辺)付近に配置される矩形の導体パターンである。接続用導体41,42は、基材層15の表面の大部分(例えば1/2以上)を占める大面積の導体パターンである。接続用導体41,42は、例えばCu箔等の導体パターンである。 Connection conductors 41 and 42 are formed on the back surface of the base material layer 15. The connecting conductor 41 is a rectangular conductor pattern arranged near the first side of the base material layer 15 (the left side of the base material layer 15 in FIG. 2). The connecting conductor 42 is a rectangular conductor pattern arranged near the second side of the base material layer 15 (the right side of the base material layer 15 in FIG. 2). The connecting conductors 41 and 42 are large-area conductor patterns that occupy most of the surface of the base material layer 15 (for example, 1/2 or more). The connecting conductors 41 and 42 are conductor patterns such as Cu foil.

接続用導体41は、接続用導体41を構成する導体で囲まれた長尺状の開口SL11,SL12を有する。開口SL11,SL12は、いずれもY軸方向に長手方向を有する矩形の導体非形成部であり、X軸方向に配列されている。接続用導体42は、接続用導体42を構成する導体で囲まれた長尺状の開口SL21,SL22を有する。開口SL21,SL22は、いずれもY軸方向に長手方向を有する矩形の貫通孔であり、X軸方向に配列されている。 The connecting conductor 41 has elongated openings SL11 and SL12 surrounded by conductors constituting the connecting conductor 41. The openings SL11 and SL12 are both rectangular conductor non-forming portions having a longitudinal direction in the Y-axis direction, and are arranged in the X-axis direction. The connecting conductor 42 has elongated openings SL21 and SL22 surrounded by conductors constituting the connecting conductor 42. The openings SL21 and SL22 are both rectangular through holes having a longitudinal direction in the Y-axis direction, and are arranged in the X-axis direction.

なお、本明細書中における「長尺状の開口」とは、任意の第1方向(例えば、Y軸方向)の長さが、第1方向に直交する第2方向(例えば、X軸方向)の長さよりも長い形状の開口のことを言う。 The term "long opening" in the present specification means a second direction (for example, the X-axis direction) in which the length in an arbitrary first direction (for example, the Y-axis direction) is orthogonal to the first direction. An opening with a shape longer than the length of.

保護層1は、平面形状が基材層15と略同じであり、基材層15の裏面に積層される保護膜である。保護層1は、例えばカバーレイフィルムやソルダーレジスト膜、エポキシ樹脂膜等である。 The protective layer 1 has a planar shape substantially the same as that of the base material layer 15, and is a protective film laminated on the back surface of the base material layer 15. The protective layer 1 is, for example, a coverlay film, a solder resist film, an epoxy resin film, or the like.

保護層1は複数の開口AP1,AP2を有する。複数の開口AP1は、保護層1の第1辺(図2における保護層1の左辺)寄りの位置に配置される矩形の貫通孔である。複数の開口AP2は、保護層1の第2辺(図2における保護層1の右辺)寄りの位置に配置される矩形の貫通孔である。そのため、基材層15の裏面に保護層1が形成された場合でも、複数の開口AP1から接続用導体41の一部が外部に露出し、複数の開口AP2から接続用導体42の一部が外部に露出する。本実施形態に係る実装電極P1は、複数の開口AP1から第1主面VS1に露出する接続用導体41の一部である。また、本実施形態に係る実装電極P2は、複数の開口AP2から第1主面VS1に露出する接続用導体42の一部である。そのため、複数の実装電極P1はいずれも同電位であり、複数の実装電極P2はいずれも同電位である。 The protective layer 1 has a plurality of openings AP1 and AP2. The plurality of openings AP1 are rectangular through holes arranged at positions near the first side of the protective layer 1 (the left side of the protective layer 1 in FIG. 2). The plurality of openings AP2 are rectangular through holes arranged at positions near the second side of the protective layer 1 (the right side of the protective layer 1 in FIG. 2). Therefore, even when the protective layer 1 is formed on the back surface of the base material layer 15, a part of the connecting conductor 41 is exposed to the outside from the plurality of openings AP1, and a part of the connecting conductor 42 is exposed from the plurality of openings AP2. Exposed to the outside. The mounting electrode P1 according to the present embodiment is a part of the connecting conductor 41 exposed from the plurality of openings AP1 to the first main surface VS1. Further, the mounting electrode P2 according to the present embodiment is a part of the connecting conductor 42 exposed from the plurality of openings AP2 to the first main surface VS1. Therefore, the plurality of mounting electrodes P1 are all at the same potential, and the plurality of mounting electrodes P2 are all at the same potential.

図2等に示すように、複数の実装電極P1(接続用導体41)は、基材層12,13,14,15に形成された層間接続導体V1を介して、コイル導体パターン31の一端に接続される。コイル導体パターン31の他端は、基材層12に形成された層間接続導体V2を介して、コイル導体パターン32の一端に接続される。コイル導体パターン32の他端は、基材層13に形成された層間接続導体V3を介して、コイル導体パターン33の一端に形成される。コイル導体パターン33の他端は、基材層14に形成された層間接続導体V4を介して、コイル導体パターン34の一端に接続される。コイル導体パターン34の他端は、基材層15に形成される層間接続導体V5を介して、複数の実装電極P2(接続用導体42)に接続される。これら層間接続導体は、例えば基材層に設けた貫通孔に、Cu,Snのうち1以上の金属もしくはそれらの合金の金属粉と樹脂成分を含む導電性ペーストを配設した後、積層プロセスにおける加熱プレス処理により固化させることにより設けられたビア導体である。 As shown in FIG. 2 and the like, the plurality of mounting electrodes P1 (connecting conductors 41) are attached to one end of the coil conductor pattern 31 via the interlayer connecting conductors V1 formed in the base material layers 12, 13, 14, and 15. Be connected. The other end of the coil conductor pattern 31 is connected to one end of the coil conductor pattern 32 via the interlayer connecting conductor V2 formed on the base material layer 12. The other end of the coil conductor pattern 32 is formed at one end of the coil conductor pattern 33 via the interlayer connecting conductor V3 formed on the base material layer 13. The other end of the coil conductor pattern 33 is connected to one end of the coil conductor pattern 34 via the interlayer connecting conductor V4 formed on the base material layer 14. The other end of the coil conductor pattern 34 is connected to a plurality of mounting electrodes P2 (connecting conductors 42) via an interlayer connecting conductor V5 formed on the base material layer 15. For these interlayer connection conductors, for example, a conductive paste containing a metal powder of one or more metals of Cu and Sn or an alloy thereof and a resin component is disposed in a through hole provided in a base material layer, and then in a laminating process. It is a via conductor provided by solidifying by heat pressing treatment.

このように、コイル導体パターン31,32,33,34および層間接続導体V2,V3,V4によって、基材層11,12,13,14,15の積層方向(Z軸方向)に巻回軸を有する約12ターンのコイル3が構成される。また、コイル3の一端は、接続用導体41(複数の実装電極P1)に接続されており、コイル3の他端は、接続用導体42(複数の実装電極P2)に接続されている。 In this way, the coil conductor patterns 31, 32, 33, 34 and the interlayer connecting conductors V2, V3, V4 are used to provide the winding shaft in the stacking direction (Z-axis direction) of the base material layers 11, 12, 13, 14, and 15. A coil 3 having about 12 turns is configured. Further, one end of the coil 3 is connected to a connecting conductor 41 (a plurality of mounting electrodes P1), and the other end of the coil 3 is connected to a connecting conductor 42 (a plurality of mounting electrodes P2).

上述したように、実装電極P1は、第1主面VS1に露出する接続用導体41の一部であり、実装電極P2は、第1主面VS1に露出する接続用導体42の一部である。そのため、接続用導体41,42が大面積であれば、任意の形状の実装電極P1,P2を形成しやすいうえ、大面積の実装電極P1,P2も形成しやすく、第1主面VS1の様々な位置に同電位の複数の実装電極P1,P2を配置しやすい。つまり、接続用導体41,42を大面積にすることで、第1主面VS1に形成される実装電極P1,P2の配置の自由度が高まる。 As described above, the mounting electrode P1 is a part of the connecting conductor 41 exposed to the first main surface VS1, and the mounting electrode P2 is a part of the connecting conductor 42 exposed to the first main surface VS1. .. Therefore, if the connecting conductors 41 and 42 have a large area, it is easy to form mounting electrodes P1 and P2 having an arbitrary shape, and it is also easy to form mounting electrodes P1 and P2 having a large area. It is easy to arrange a plurality of mounting electrodes P1 and P2 having the same potential at various positions. That is, by increasing the area of the connecting conductors 41 and 42, the degree of freedom in arranging the mounting electrodes P1 and P2 formed on the first main surface VS1 is increased.

また、図3(B)に示すように、接続用導体41,42は、Z軸方向から視て、コイル3に重なっている。また、本実施形態では、図3(B)に示すように、実装電極P1,P2(接続用導体41,42)の一部は、複数の基材層11,12,13,14,15のうち、最も第1主面VS1側に位置する基材層15に埋まっている。 Further, as shown in FIG. 3B, the connecting conductors 41 and 42 overlap the coil 3 when viewed from the Z-axis direction. Further, in the present embodiment, as shown in FIG. 3B, a part of the mounting electrodes P1 and P2 (connecting conductors 41 and 42) has a plurality of base material layers 11, 12, 13, 14 and 15. Of these, it is buried in the base material layer 15 located on the VS1 side of the first main surface.

さらに、本実施形態では、図3(A)および図3(B)等に示すように、複数の開口SL11,SL12,SL21,SL22は、コイル導体パターン31,32,33,34に重ならず、コイル導体パターン31,32,33,34に沿って配置されている。 Further, in the present embodiment, as shown in FIGS. 3A and 3B, the plurality of openings SL11, SL12, SL21, SL22 do not overlap the coil conductor patterns 31, 32, 33, 34. , Are arranged along the coil conductor patterns 31, 32, 33, 34.

ここで、本発明における「コイル導体パターンに沿って配置されている」とは、例えば、接続用導体の開口の延伸方向と、コイル導体パターンの延伸方向とのなす角度が−30°から+30°の範囲内である場合を言う。 Here, "arranged along the coil conductor pattern" in the present invention means, for example, that the angle between the stretching direction of the opening of the connecting conductor and the stretching direction of the coil conductor pattern is -30 ° to + 30 °. Say if it is within the range of.

本実施形態に係る多層基板101は、例えば次に示す製造方法によって製造される。ここでは、説明の都合上ワンチップ(個片)での製造工程で説明するが、実際の多層基板101の製造工程は集合基板状態で行われる。なお、「集合基板」とは、複数の多層基板101を含んだマザー基板である。 The multilayer board 101 according to this embodiment is manufactured by, for example, the following manufacturing method. Here, for convenience of explanation, the manufacturing process with one chip (individual piece) will be described, but the actual manufacturing process of the multilayer board 101 is performed in the state of an assembled board. The "aggregate substrate" is a mother substrate including a plurality of multilayer boards 101.

(1)まず、複数の基材層11,12,13,14,15を準備する。基材層11,12,13,14,15は、例えば液晶ポリマー(LCP)またはポリエーテルエーテルケトン(PEEK)等の熱可塑性樹脂を主材料とするシートである。 (1) First, a plurality of base material layers 11, 12, 13, 14, and 15 are prepared. The base material layers 11, 12, 13, 14, and 15 are sheets mainly made of a thermoplastic resin such as a liquid crystal polymer (LCP) or a polyetheretherketone (PEEK).

その後、複数の基材層11,12,13,14,15に、それぞれコイル導体パターン31,32,33,34および接続用導体41,42を形成する。具体的には、集合基板状態の基材層11,12,13,14,15の片側主面(裏面)に金属箔(例えばCu箔)をラミネートし、その金属箔をフォトリソグラフィでパターンニングする。これにより、基材層11の裏面にコイル導体パターン31を形成し、基材層12の裏面にコイル導体パターン32を形成し、基材層13の裏面にコイル導体パターン33を形成し、基材層14の裏面にコイル導体パターン34を形成し、基材層15の裏面に接続用導体41,42を形成する。 After that, the coil conductor patterns 31, 32, 33, 34 and the connecting conductors 41, 42 are formed on the plurality of base material layers 11, 12, 13, 14, and 15, respectively. Specifically, a metal foil (for example, Cu foil) is laminated on one side main surface (back surface) of the substrate layers 11, 12, 13, 14, and 15 in the assembled substrate state, and the metal foil is patterned by photolithography. .. As a result, the coil conductor pattern 31 is formed on the back surface of the base material layer 11, the coil conductor pattern 32 is formed on the back surface of the base material layer 12, and the coil conductor pattern 33 is formed on the back surface of the base material layer 13. The coil conductor pattern 34 is formed on the back surface of the layer 14, and the connecting conductors 41 and 42 are formed on the back surface of the base material layer 15.

なお、接続用導体41には、複数の開口SL11,SL12が設けられている。開口SL11,SL12は、接続用導体41を構成する導体で囲まれた長尺状(矩形)の貫通孔である。また、接続用導体42には、複数の開口SL21,SL22が設けられている。開口SL21,SL22は、接続用導体42を構成する導体で囲まれた長尺状(矩形)の貫通孔である。 The connecting conductor 41 is provided with a plurality of openings SL11 and SL12. The openings SL11 and SL12 are long (rectangular) through holes surrounded by conductors constituting the connecting conductor 41. Further, the connecting conductor 42 is provided with a plurality of openings SL21 and SL22. The openings SL21 and SL22 are long (rectangular) through holes surrounded by conductors constituting the connecting conductor 42.

また、複数の基材層12,13,14,15には、層間接続導体V1,V2,V3,V4,V5が形成される。層間接続導体は、基材層12,13,14,15にレーザー等で貫通孔を設けた後、Cu,Sn等のうち1以上もしくはそれらの合金を含む導電性ペーストを配設し、後の加熱プレスで硬化させることによって設けられる。 Further, the interlayer connection conductors V1, V2, V3, V4, V5 are formed on the plurality of base material layers 12, 13, 14, and 15. For the interlayer connection conductor, after forming through holes in the base material layers 12, 13, 14, and 15 with a laser or the like, a conductive paste containing one or more of Cu, Sn, etc. or an alloy thereof is arranged, and later. It is provided by curing with a heating press.

(2)次に、複数の基材層15,14,13,12,11をこの順に積層し、積層方向(Z軸方向)に向かって、積層した複数の基材層11,12,13,14,15を加熱プレスして集合基板状態の積層体を形成する。 (2) Next, a plurality of base material layers 15, 14, 13, 12, 11 are laminated in this order, and the plurality of base material layers 11, 12, 13, which are laminated in the stacking direction (Z-axis direction). 14 and 15 are heat-pressed to form a laminated body in an aggregate substrate state.

その後、積層体の裏面(基材層15の裏面)に保護層1を積層して、集合基板状態の積層体10を形成する。なお、保護層1は複数の開口を有する。そのため、保護層1を積層体の裏面に形成した場合でも、接続用導体41,42の一部が外部に露出する。保護層1の上記開口から露出する接続用導体41の一部が実装電極P1であり、保護層1の上記開口から露出する接続用導体42の一部が実装電極P2である。 After that, the protective layer 1 is laminated on the back surface of the laminated body (the back surface of the base material layer 15) to form the laminated body 10 in the assembled substrate state. The protective layer 1 has a plurality of openings. Therefore, even when the protective layer 1 is formed on the back surface of the laminated body, a part of the connecting conductors 41 and 42 is exposed to the outside. A part of the connecting conductor 41 exposed from the opening of the protective layer 1 is the mounting electrode P1, and a part of the connecting conductor 42 exposed from the opening of the protective layer 1 is the mounting electrode P2.

(3)最後に、集合基板状態の積層体10を個片に分離して、個別の多層基板101を得る。 (3) Finally, the laminated body 10 in the assembled substrate state is separated into individual pieces to obtain individual multilayer substrates 101.

上記製造方法によれば、複数の基材層11,12,13,14,15を積層して加熱プレス(一括プレス)することにより、多層基板101を容易に形成できるため、多層基板101の製造工程が削減され、コストを低く抑えることができる。 According to the above manufacturing method, the multilayer substrate 101 can be easily formed by laminating a plurality of substrate layers 11, 12, 13, 14, and 15 and heat-pressing (batch pressing), so that the multilayer substrate 101 can be manufactured. The number of processes can be reduced and the cost can be kept low.

また、上記製造方法によれば、基材層に設けた孔に導電性ペーストを配設し、加熱プレス(一括プレス)によって導電性ペーストを固化させることができるため、層間接続導体を形成する工程が削減できる。 Further, according to the above manufacturing method, the conductive paste can be arranged in the holes provided in the base material layer, and the conductive paste can be solidified by a heating press (collective press), so that a step of forming an interlayer connection conductor can be formed. Can be reduced.

本発明の多層基板は、例えば以下に示すように用いられる。図4は、第1の実施形態に係る電子機器301の主要部の断面図である。 The multilayer board of the present invention is used, for example, as shown below. FIG. 4 is a cross-sectional view of a main part of the electronic device 301 according to the first embodiment.

電子機器301は、多層基板101および回路基板201等を備える。回路基板201は例えばガラス/エポキシ基板である。なお、電子機器301は、上記以外の構成も備えるが、図4では図示省略している。 The electronic device 301 includes a multilayer board 101, a circuit board 201, and the like. The circuit board 201 is, for example, a glass / epoxy board. The electronic device 301 also has a configuration other than the above, but is not shown in FIG.

多層基板101は回路基板201に実装されている。具体的には、多層基板101の実装電極P1は、はんだ等の導電性接合材5を介して、回路基板201の第1面S1に形成された外部電極EP1に接合されている。また、多層基板101の実装電極P2は、導電性接合材5を介して、回路基板201の第1面S1に形成された外部電極EP2に接合されている。 The multilayer board 101 is mounted on the circuit board 201. Specifically, the mounting electrode P1 of the multilayer board 101 is bonded to the external electrode EP1 formed on the first surface S1 of the circuit board 201 via a conductive bonding material 5 such as solder. Further, the mounting electrode P2 of the multilayer board 101 is bonded to the external electrode EP2 formed on the first surface S1 of the circuit board 201 via the conductive bonding material 5.

次に、接続用導体が複数の開口を有することによる利点について、比較例を挙げて説明する。図5(A)は多層基板101のうち、接続用導体41,42が形成された層を示す平面図であり、図5(B)は比較例である多層基板100のうち、接続用導体41A,42Aが形成された層を示す平面図である。 Next, the advantages of having a plurality of openings in the connecting conductor will be described with reference to comparative examples. FIG. 5A is a plan view showing a layer in which the connecting conductors 41 and 42 are formed in the multilayer board 101, and FIG. 5B is a connecting conductor 41A in the multilayer board 100 which is a comparative example. , 42A is a plan view showing a layer formed.

比較例である多層基板100は、接続用導体41A,42Aが1つの開口を有する点で、多層基板101と異なる。具体的には、接続用導体41Aには開口SL10が形成されており、接続用導体42Aは開口SL20が形成されている。多層基板100の他の構成については、多層基板101と同じである。 The multilayer board 100, which is a comparative example, is different from the multilayer board 101 in that the connecting conductors 41A and 42A have one opening. Specifically, the opening SL10 is formed in the connecting conductor 41A, and the opening SL20 is formed in the connecting conductor 42A. Other configurations of the multilayer board 100 are the same as those of the multilayer board 101.

多層基板が大面積の接続用導体を備えている場合には、コイルから生じる磁束が接続用導体で妨げられ、コイルのインダクタンスが低下してしまう。しかし、図5(B)に示す比較例の多層基板100のように、接続用導体に大きな開口SL10,SL20が形成されている場合には、コイルから生じる磁束の一部(磁束φ0)が、接続用導体41A,42Aで妨げられることなく、開口SL10,SL20を通過する。なお、開口SL10,SL20を磁束φ0が通過する場合に、この磁束φ0を相殺する向きに渦電流i0が生じるが、開口SL10,SL20の面積が大きいため、磁束φ0は、完全には相殺されずに開口SL10,SL20を通過する。また、この構成によれば、接続用導体に大きな開口が設けられていない場合に比べ、接続用導体41A,42Aに生じる渦電流を小さくでき、損失を小さくできる。 When the multilayer board includes a large-area connecting conductor, the magnetic flux generated from the coil is obstructed by the connecting conductor, and the inductance of the coil is lowered. However, when the large openings SL10 and SL20 are formed in the connecting conductor as in the multilayer board 100 of the comparative example shown in FIG. 5B, a part of the magnetic flux generated from the coil (magnetic flux φ0) is generated. It passes through the openings SL10 and SL20 without being hindered by the connecting conductors 41A and 42A. When the magnetic flux φ0 passes through the openings SL10 and SL20, an eddy current i0 is generated in a direction that cancels the magnetic flux φ0, but the magnetic flux φ0 is not completely canceled because the areas of the openings SL10 and SL20 are large. Passes through the openings SL10 and SL20. Further, according to this configuration, the eddy current generated in the connecting conductors 41A and 42A can be reduced and the loss can be reduced as compared with the case where the connecting conductor is not provided with a large opening.

一方、本実施形態に係る多層基板101は、複数の開口SL11,SL12を有する接続用導体41、および複数の開口SL21,SL22を有する接続用導体42を備える。例えば、コイルから生じる磁束の一部(図5(A)における磁束φ1)が、接続用導体41の複数の開口SL11,SL12の両方を通過した場合には、磁束φ1を相殺する向きに渦電流が生じる(図5(A)における電流i11,i12)。このとき、複数の開口SL11,SL12で挟まれた導体部分には、反対方向の渦電流が誘起されるため、渦電流は流れ難い。このため、接続用導体41に複数の開口SL11,SL12が形成されている場合には、比較例の多層基板100のように接続用導体に大きな開口が形成されている場合と同様の効果を奏する。このことは接続用導体42でも同じである。すなわち、接続用導体に複数の開口を設けることにより、接続用導体に大きな開口を設けることなく、コイルからの磁束が接続用導体で妨げられることを抑制できる。 On the other hand, the multilayer substrate 101 according to the present embodiment includes a connecting conductor 41 having a plurality of openings SL11 and SL12, and a connecting conductor 42 having a plurality of openings SL21 and SL22. For example, when a part of the magnetic flux generated from the coil (magnetic flux φ1 in FIG. 5A) passes through both of the plurality of openings SL11 and SL12 of the connecting conductor 41, the eddy current cancels out the magnetic flux φ1. (Currents i11, i12 in FIG. 5A). At this time, since an eddy current in the opposite direction is induced in the conductor portion sandwiched between the plurality of openings SL11 and SL12, it is difficult for the eddy current to flow. Therefore, when a plurality of openings SL11 and SL12 are formed in the connecting conductor 41, the same effect as in the case where a large opening is formed in the connecting conductor as in the multilayer board 100 of the comparative example is obtained. .. This also applies to the connecting conductor 42. That is, by providing a plurality of openings in the connecting conductor, it is possible to prevent the magnetic flux from the coil from being obstructed by the connecting conductor without providing a large opening in the connecting conductor.

したがって、本実施形態に係る構成を採用することで、第1主面VS1に形成される実装電極P1,P2の配置の自由度を高めつつ、コイル3のインダクタンスの低下および接続用導体に流れる渦電流による損失を抑制した多層基板を実現できる。また、上記構成によれば、接続用導体に大きな開口を設ける場合に比べて、接続用導体の導体部分の面積を大きくできるため、接続用導体の電位が安定化し、接続用導体内での電位差を生じ難くできる。 Therefore, by adopting the configuration according to the present embodiment, the degree of freedom in the arrangement of the mounting electrodes P1 and P2 formed on the first main surface VS1 is increased, the inductance of the coil 3 is reduced, and the eddy current flowing through the connecting conductor is increased. It is possible to realize a multilayer board that suppresses loss due to current. Further, according to the above configuration, the area of the conductor portion of the connecting conductor can be increased as compared with the case where a large opening is provided in the connecting conductor, so that the potential of the connecting conductor is stabilized and the potential difference in the connecting conductor is increased. Can be less likely to occur.

また、本実施形態では、積層体10が、熱可塑性樹脂からなる複数の基材層11,12,13,14,15を積層して形成される。この構成によれば、積層した複数の基材層11,12,13,14,15を加熱プレス(一括プレス)することにより、積層体10を容易に形成できるため、多層基板101の製造工程が削減され、コストを低く抑えることができる。また、この構成により、容易に塑性変形が可能で、且つ、所望の形状を維持(保持)できる多層基板を実現できる。 Further, in the present embodiment, the laminated body 10 is formed by laminating a plurality of base material layers 11, 12, 13, 14, and 15 made of a thermoplastic resin. According to this configuration, the laminated body 10 can be easily formed by heat-pressing (collectively pressing) a plurality of laminated base material layers 11, 12, 13, 14, and 15, so that the manufacturing process of the multilayer substrate 101 can be performed. It can be reduced and the cost can be kept low. Further, with this configuration, it is possible to realize a multilayer substrate that can be easily plastically deformed and can maintain (retain) a desired shape.

本実施形態のように、積層体を構成する複数の基材層が樹脂材料からなる場合、所定の温度以上の熱を受けると、その一部が熱分解され、CO等の気体および水を生じる。このような気体および水を多層基板中に残したまま、多層基板を加熱すると、ガス(気体や蒸気)が膨張し、層間剥離(デラミネーション)が発生しやすい。そのため、通常は、多層基板の製造時に、減圧下において加熱プレスを実施して、所定の予熱工程を設けることで加熱プレス中にガスを積層体外へ排出させている。 When a plurality of base material layers constituting the laminate are made of a resin material as in the present embodiment, when heat of a predetermined temperature or higher is received, a part of the base layer is thermally decomposed to release gas such as CO 2 and water. Occurs. When the multilayer board is heated while such gas and water are left in the multilayer board, the gas (gas or steam) expands and delamination is likely to occur. Therefore, usually, at the time of manufacturing a multilayer substrate, a heating press is performed under reduced pressure, and a predetermined preheating step is provided to discharge gas to the outside of the laminate during the heating press.

そして、多層基板が、面積の大きな金属パターン(例えば、接続用導体41,42等の導体パターン)を有していると、ガスはこの金属パターンを透過できない。したがって、ガスの生じた場所によっては、多層基板外へのガスの排出経路が、導体パターンを有さない場合よりも長くなって、多層基板内にガスが残留する虞がある。一方、本実施形態では、接続用導体41,42に複数の開口(SL11,SL12,SL21,SL22)が設けられているため、多層基板の加熱時に内部に生じるガスが、これらの開口を通じて短い排出経路を通って排出される。すなわち、この構成によれば、多層基板内に残留するガス量が低減され、加熱時(多層基板の製造段階、使用段階での加熱時)における多層基板の層間剥離が低減され、コイル等の特性の均一性が保たれる。また、ガスの残留に起因する多層基板の表面の凹凸や湾曲の発生が抑制され、多層基板の平坦性が高まるため、多層基板の回路基板等への実装性が高まる。 If the multilayer substrate has a metal pattern having a large area (for example, a conductor pattern such as connecting conductors 41 and 42), the gas cannot pass through this metal pattern. Therefore, depending on the location where the gas is generated, the gas discharge path to the outside of the multilayer board may be longer than that in the case where the conductor pattern is not provided, and the gas may remain in the multilayer board. On the other hand, in the present embodiment, since the connecting conductors 41 and 42 are provided with a plurality of openings (SL11, SL12, SL21, SL22), the gas generated inside when the multilayer board is heated is discharged shortly through these openings. It is discharged through the route. That is, according to this configuration, the amount of gas remaining in the multilayer board is reduced, delamination of the multilayer board during heating (during heating at the manufacturing stage and use stage of the multilayer board) is reduced, and the characteristics of the coil and the like are reduced. Uniformity is maintained. In addition, the occurrence of unevenness and bending on the surface of the multilayer board due to residual gas is suppressed, and the flatness of the multilayer board is improved, so that the mountability of the multilayer board on a circuit board or the like is improved.

さらに、本実施形態では、積層体に形成される層間接続導体V1,V2,V3,V4,V5が、樹脂材料を含む導電性ペーストを固化してなるビア導体である。これらビア導体は、複数の基材層11,12,13,14の加熱プレス処理で同時に形成されるため、形成が容易である。また、導電性ペーストに樹脂材料が含まれるため、樹脂を主材料とする基材層と層間接続導体との高い接合性が得られる。なお、上記導電性ペーストに含まれる樹脂材料は、基材層の樹脂材料と同種であることが好ましい。 Further, in the present embodiment, the interlayer connecting conductors V1, V2, V3, V4, V5 formed in the laminated body are via conductors formed by solidifying a conductive paste containing a resin material. Since these via conductors are simultaneously formed by heat pressing the plurality of base material layers 11, 12, 13, and 14, they are easy to form. Further, since the conductive paste contains a resin material, high bondability between the base material layer containing the resin as the main material and the interlayer connecting conductor can be obtained. The resin material contained in the conductive paste is preferably the same as the resin material of the base material layer.

但し、樹脂材料を含んだビア導体は加熱時に生じるガスの量が多く、このようなビア導体を備える多層基板は、加熱時(製造段階、使用段階における加熱時)に層間剥離や、多層基板の表面の凹凸、湾曲等が生じやすい。そのため、層間接続導体V1,V2,V3,V4,V5が樹脂材料を含んだビア導体である場合には、接続用導体41,42の開口をこれら層間接続導体の近傍に設けることが好ましい。これにより、多層基板の加熱時にビア導体から生じたガスを効率良く排出でき、多層基板の層間剥離を抑制し、多層基板の平坦性を向上させることができる。 However, the via conductor containing the resin material has a large amount of gas generated during heating, and the multilayer substrate provided with such a via conductor is delaminated during heating (during heating in the manufacturing stage and the stage of use) and is a multilayer substrate. Surface irregularities, curves, etc. are likely to occur. Therefore, when the interlayer connecting conductors V1, V2, V3, V4, and V5 are via conductors containing a resin material, it is preferable to provide openings of the connecting conductors 41 and 42 in the vicinity of these interlayer connecting conductors. As a result, the gas generated from the via conductor when the multilayer board is heated can be efficiently discharged, delamination of the multilayer board can be suppressed, and the flatness of the multilayer board can be improved.

また、本実施形態では、図3(B)に示すように、実装電極P1,P2(接続用導体41,42)の一部が基材層15に埋まっている。この構成によれば、接続用導体41,42に複数の開口SL11,SL12,SL21,SL22が設けられた構造でも、第1主面VS1の平坦性を高めることができる。そのため、多層基板の回路基板等への実装性が高めることができる。なお、本実施形態のように、熱可塑性樹脂からなる複数の基材層11,12,13,14を加熱プレスして積層体を形成する場合には、実装電極P1,P2の一部が基材層に埋まった構造の多層基板を容易に実現できる。 Further, in the present embodiment, as shown in FIG. 3B, a part of the mounting electrodes P1 and P2 (connecting conductors 41 and 42) is embedded in the base material layer 15. According to this configuration, the flatness of the first main surface VS1 can be improved even in a structure in which the connecting conductors 41 and 42 are provided with a plurality of openings SL11, SL12, SL21, SL22. Therefore, the mountability of the multilayer board on a circuit board or the like can be improved. When a plurality of substrate layers 11, 12, 13, 14 made of a thermoplastic resin are heat-pressed to form a laminated body as in the present embodiment, a part of the mounting electrodes P1 and P2 is used as a base. A multilayer substrate with a structure embedded in a material layer can be easily realized.

コイル導体パターンの一部が接続用導体に設けられた開口に重なっている場合、加熱プレス時における樹脂の流動が不規則になり、コイル導体パターンの位置ずれ(または変形)や、積層体の表面に凹凸が生じる虞がある。一方、本実施形態では、接続用導体41,42に最も近接するコイル導体パターン34が、Z軸方向から視て、複数の開口SL11,SL12,SL21,SL22に重なっておらず、且つ、複数の開口SL11,SL12,SL21,SL22に沿って配置されている。この構成によれば、加熱プレス時における樹脂の流動の規則性が保たれ、加熱プレス時におけるコイル導体パターンの位置ずれ等が抑制される。なお、本実施形態のように複数のコイル導体パターン31,32,33,34を備える場合には、複数のコイル導体パターン31,32,33,34全てが、Z軸方向から視て、複数の開口SL11,SL12,SL21,SL22に重なっておらず、且つ、複数の開口SL11,SL12,SL21,SL22に沿って配置されていることが好ましい。 When a part of the coil conductor pattern overlaps the opening provided in the connecting conductor, the flow of the resin becomes irregular during the heating press, and the coil conductor pattern is misaligned (or deformed) or the surface of the laminated body is formed. There is a risk of unevenness. On the other hand, in the present embodiment, the coil conductor pattern 34 closest to the connecting conductors 41 and 42 does not overlap the plurality of openings SL11, SL12, SL21 and SL22 when viewed from the Z-axis direction, and a plurality of openings SL11, SL12, SL21 and SL22 are not overlapped with each other. It is arranged along the openings SL11, SL12, SL21, and SL22. According to this configuration, the regularity of the flow of the resin during the heating press is maintained, and the misalignment of the coil conductor pattern during the heating press is suppressed. When a plurality of coil conductor patterns 31, 32, 33, 34 are provided as in the present embodiment, all of the plurality of coil conductor patterns 31, 32, 33, 34 are a plurality when viewed from the Z-axis direction. It is preferable that the openings SL11, SL12, SL21, and SL22 do not overlap with each other and are arranged along a plurality of openings SL11, SL12, SL21, and SL22.

《第2の実施形態》
第2の実施形態では、第1の実施形態とはコイルの形状が異なる多層基板を示す。
<< Second Embodiment >>
The second embodiment shows a multilayer substrate having a coil shape different from that of the first embodiment.

図6(A)は第2の実施形態に係る多層基板102の外観斜視図であり、図6(B)は多層基板102の別の視点から視た外観斜視図である。図7は、多層基板102の分解平面図である。図8は、図6(A)におけるB−B断面図である。 FIG. 6A is an external perspective view of the multilayer board 102 according to the second embodiment, and FIG. 6B is an external perspective view of the multilayer board 102 as viewed from another viewpoint. FIG. 7 is an exploded plan view of the multilayer board 102. FIG. 8 is a cross-sectional view taken along the line BB in FIG. 6 (A).

多層基板102は、コイル3Aを備える点で、第1の実施形態に係る多層基板101と異なる。コイル3Aは、ループ状のコイル導体パターン31a,32a,33a,34aを有する点で、多層基板101が備えるコイル3と異なる。多層基板102の他の構成については、多層基板101と実質的に同じである。 The multilayer board 102 is different from the multilayer board 101 according to the first embodiment in that the coil 3A is provided. The coil 3A differs from the coil 3 included in the multilayer substrate 101 in that it has loop-shaped coil conductor patterns 31a, 32a, 33a, 34a. Other configurations of the multilayer board 102 are substantially the same as those of the multilayer board 101.

以下、第1の実施形態に係る多層基板101と異なる部分について説明する。 Hereinafter, a portion different from the multilayer board 101 according to the first embodiment will be described.

コイル導体パターン31aは、基材層11の裏面に形成されるループ状の導体パターンであり、基材層11の中央付近に配置されている。コイル導体パターン32aは、基材層12の裏面に形成されるループ状の導体パターンであり、基材層12の中央付近に配置されている。コイル導体パターン33aは、基材層13の裏面に形成されるループ状の導体パターンであり、基材層13の中央付近に配置されている。コイル導体パターン34aは、基材層14の裏面に配置されるループ状の導体パターンであり、基材層14の中央付近に配置されている。コイル導体パターン31a,32a,33a,34aは、例えばCu箔等の導体パターンである。 The coil conductor pattern 31a is a loop-shaped conductor pattern formed on the back surface of the base material layer 11, and is arranged near the center of the base material layer 11. The coil conductor pattern 32a is a loop-shaped conductor pattern formed on the back surface of the base material layer 12, and is arranged near the center of the base material layer 12. The coil conductor pattern 33a is a loop-shaped conductor pattern formed on the back surface of the base material layer 13, and is arranged near the center of the base material layer 13. The coil conductor pattern 34a is a loop-shaped conductor pattern arranged on the back surface of the base material layer 14, and is arranged near the center of the base material layer 14. The coil conductor patterns 31a, 32a, 33a, 34a are conductor patterns such as Cu foil.

図7等に示すように、複数の実装電極P1(接続用導体41)は、層間接続導体V1を介して、コイル導体パターン31aの一端に接続される。コイル導体パターン31aの他端は、層間接続導体V2を介してコイル導体パターン32aの一端に接続される。コイル導体パターン32aの他端は、層間接続導体V3を介して、コイル導体パターン33aの一端に接続される。コイル導体パターン33aの他端は、層間接続導体V4を介して、コイル導体パターン34aの一端に接続される。コイル導体パターン34aの他端は、層間接続導体V5を介して、複数の実装電極P2(接続用導体42)に接続される。 As shown in FIG. 7 and the like, the plurality of mounting electrodes P1 (connecting conductors 41) are connected to one end of the coil conductor pattern 31a via the interlayer connecting conductor V1. The other end of the coil conductor pattern 31a is connected to one end of the coil conductor pattern 32a via the interlayer connection conductor V2. The other end of the coil conductor pattern 32a is connected to one end of the coil conductor pattern 33a via the interlayer connection conductor V3. The other end of the coil conductor pattern 33a is connected to one end of the coil conductor pattern 34a via the interlayer connection conductor V4. The other end of the coil conductor pattern 34a is connected to a plurality of mounting electrodes P2 (connecting conductor 42) via the interlayer connection conductor V5.

このように、コイル導体パターン31a,32a,33a,34aおよび層間接続導体V2,V3,V4によって、Z軸方向に巻回軸を有する約3.5ターンの矩形ヘリカル状のコイル3Aが構成される。 As described above, the coil conductor patterns 31a, 32a, 33a, 34a and the interlayer connecting conductors V2, V3, V4 form a rectangular helical coil 3A having about 3.5 turns having a winding axis in the Z-axis direction. ..

このような構成であっても、多層基板102の基本的な構成は、第1の実施形態に係る多層基板101と同じであり、多層基板101と同様の作用効果を奏する。 Even with such a configuration, the basic configuration of the multilayer board 102 is the same as that of the multilayer board 101 according to the first embodiment, and has the same effect as that of the multilayer board 101.

《第3の実施形態》
第3の実施形態では、実装電極が、層間接続導体を介して接続用導体に接続された構造の多層基板を示す。
<< Third Embodiment >>
In the third embodiment, a multilayer substrate having a structure in which the mounting electrodes are connected to the connecting conductor via the interlayer connecting conductor is shown.

図9(A)は第3の実施形態に係る多層基板103の外観斜視図であり、図9(B)は多層基板103の別の視点から視た外観斜視図である。図10は、多層基板103の分解平面図である。図11は、図9(A)におけるC−C断面図である。図10では、構造を分かりやすくするため、コイル導体パターン31bをドットパターンで示している。 9 (A) is an external perspective view of the multilayer board 103 according to the third embodiment, and FIG. 9 (B) is an external perspective view of the multilayer board 103 as viewed from another viewpoint. FIG. 10 is an exploded plan view of the multilayer board 103. 11 is a cross-sectional view taken along the line CC in FIG. 9A. In FIG. 10, the coil conductor pattern 31b is shown as a dot pattern in order to make the structure easy to understand.

多層基板103は、積層体10B、コイル3B、複数の実装電極P1B,P2Bおよび接続用導体41B,42B等を備える。 The multilayer board 103 includes a laminated body 10B, a coil 3B, a plurality of mounting electrodes P1B and P2B, connecting conductors 41B and 42B, and the like.

コイル3Bは、コイル導体パターン31bで構成される点で、第1の実施形態に係る多層基板101が備えるコイル3と異なる。また、実装電極P1B,P2Bは、接続用導体の一部ではない点で、多層基板101が備える実装電極P1,P2と異なる。多層基板103の他の構成については、多層基板101と実質的に同じである。 The coil 3B is different from the coil 3 included in the multilayer substrate 101 according to the first embodiment in that the coil 3B is composed of the coil conductor pattern 31b. Further, the mounting electrodes P1B and P2B are different from the mounting electrodes P1 and P2 included in the multilayer board 101 in that they are not a part of the connecting conductor. Other configurations of the multilayer board 103 are substantially the same as those of the multilayer board 101.

以下、第1の実施形態に係る多層基板101と異なる部分について説明する。 Hereinafter, a portion different from the multilayer board 101 according to the first embodiment will be described.

積層体10Bは、複数の基材層14b,13b,12b,11bをこの順に積層して形成される。基材層11b,12b,13b,14bは、第1の実施形態で説明した基材層11,12,13,14と実質的に同じものである。 The laminated body 10B is formed by laminating a plurality of base material layers 14b, 13b, 12b, 11b in this order. The base material layers 11b, 12b, 13b, 14b are substantially the same as the base material layers 11, 12, 13, 14 described in the first embodiment.

基材層11の裏面には、コイル導体パターン31bが形成されている。コイル導体パターン31bは、基材層11bの中央付近に配置される約2.5ターンの矩形スパイラル状の導体パターンである。コイル導体パターン31bは、例えばCu箔等の導体パターンである。 A coil conductor pattern 31b is formed on the back surface of the base material layer 11. The coil conductor pattern 31b is a rectangular spiral conductor pattern having about 2.5 turns arranged near the center of the base material layer 11b. The coil conductor pattern 31b is a conductor pattern such as a Cu foil.

基材層12bの裏面には、導体21が形成されている。導体21は、基材層12bの中央付近から第2辺(図10における基材層12bの左辺)に向かってX軸方向に延伸する線状の導体パターンである。導体21は、例えばCu箔等の導体パターンである。 A conductor 21 is formed on the back surface of the base material layer 12b. The conductor 21 is a linear conductor pattern extending in the X-axis direction from the vicinity of the center of the base material layer 12b toward the second side (the left side of the base material layer 12b in FIG. 10). The conductor 21 is a conductor pattern such as a Cu foil.

基材層13bの裏面には、接続用導体41B,42Bが形成されている。接続用導体41Bは、基材層13bの第1辺(図10における基材層13bの左辺)付近に配置される矩形の導体パターンである。接続用導体42Bは、基材層13bの第2辺(図10における基材層13bの右辺)付近に配置される矩形の導体パターンである。 Connection conductors 41B and 42B are formed on the back surface of the base material layer 13b. The connecting conductor 41B is a rectangular conductor pattern arranged near the first side of the base material layer 13b (the left side of the base material layer 13b in FIG. 10). The connecting conductor 42B is a rectangular conductor pattern arranged near the second side of the base material layer 13b (the right side of the base material layer 13b in FIG. 10).

接続用導体41Bは、接続用導体41Bを構成する導体で囲まれた長尺状の開口SL11,SL12Bを有する。接続用導体42Bは、接続用導体42Bを構成する導体で囲まれた長尺状の開口SL21,SL22Bを有する。開口SL11,SL21は、第1の実施形態で説明したものと同じである。開口SL12Bは、屈曲部を有し、二方向(+Y方向および+X方向)に延伸するL字形の貫通孔である。開口SL22Bは、屈曲部を有し、二方向(+Y方向および−X方向)に延伸するL字形の貫通孔である。 The connecting conductor 41B has elongated openings SL11 and SL12B surrounded by conductors constituting the connecting conductor 41B. The connecting conductor 42B has long openings SL21 and SL22B surrounded by conductors constituting the connecting conductor 42B. The openings SL11 and SL21 are the same as those described in the first embodiment. The opening SL12B is an L-shaped through hole that has a bent portion and extends in two directions (+ Y direction and + X direction). The opening SL22B is an L-shaped through hole that has a bent portion and extends in two directions (+ Y direction and −X direction).

基材層14bの裏面には、複数の実装電極P1B,P2Bが形成されている。実装電極P1Bは、基材層14bの第1辺(図10における基材層14bに左辺)寄りに配置される矩形の導体パターンである。実装電極P2Bは、基材層14bの第2辺(図10における基材層14bの右辺)寄りに配置される矩形の導体パターンである。実装電極P1B,P2Bは、例えばCu箔等の導体パターンである。 A plurality of mounting electrodes P1B and P2B are formed on the back surface of the base material layer 14b. The mounting electrode P1B is a rectangular conductor pattern arranged near the first side (left side of the base material layer 14b in FIG. 10) of the base material layer 14b. The mounting electrode P2B is a rectangular conductor pattern arranged near the second side (the right side of the base material layer 14b in FIG. 10) of the base material layer 14b. The mounting electrodes P1B and P2B are conductor patterns such as Cu foil.

図10および図11等に示すように、複数の実装電極P1Bは、基材層14bに形成される層間接続導体V11を介して、それぞれ接続用導体41Bに接続される。接続用導体41Bは、基材層12b,13bに形成される層間接続導体V1を介して、コイル導体パターン31bの一端に接続される。コイル導体パターン31bの他端は、基材層12bに形成される層間接続導体V2を介して、導体21の一端に接続される。導体21の他端は、基材層13bに形成される層間接続導体V3を介して、接続用導体42Bに接続される。接続用導体42Bは、基材層14bに形成される層間接続導体V12を介して、それぞれ複数の実装電極P2Bに接続される。 As shown in FIGS. 10 and 11 and the like, the plurality of mounting electrodes P1B are each connected to the connecting conductor 41B via the interlayer connecting conductor V11 formed on the base material layer 14b. The connecting conductor 41B is connected to one end of the coil conductor pattern 31b via the interlayer connecting conductor V1 formed on the base material layers 12b and 13b. The other end of the coil conductor pattern 31b is connected to one end of the conductor 21 via the interlayer connecting conductor V2 formed on the base material layer 12b. The other end of the conductor 21 is connected to the connecting conductor 42B via the interlayer connecting conductor V3 formed on the base material layer 13b. The connecting conductor 42B is connected to a plurality of mounting electrodes P2B via the interlayer connecting conductor V12 formed on the base material layer 14b.

本実施形態では、コイル導体パターン31bがコイル3Bを構成する。コイル3Bの一端は、複数の実装電極P1Bに接続されており、コイル3Bの他端は、複数の実装電極P2Bに接続されている。 In this embodiment, the coil conductor pattern 31b constitutes the coil 3B. One end of the coil 3B is connected to a plurality of mounting electrodes P1B, and the other end of the coil 3B is connected to a plurality of mounting electrodes P2B.

また、本実施形態では、複数の実装電極P1Bが接続用導体41Bに接続され、複数の実装電極P2Bが接続用導体42Bに接続されている。すなわち、本実施形態に係る実装電極P1B,P2Bは、接続用導体(41B,42B)の一部ではなく、別体である。 Further, in the present embodiment, the plurality of mounting electrodes P1B are connected to the connecting conductor 41B, and the plurality of mounting electrodes P2B are connected to the connecting conductor 42B. That is, the mounting electrodes P1B and P2B according to the present embodiment are not a part of the connecting conductors (41B and 42B), but are separate bodies.

このような構成であっても、多層基板103の基本的な構成は、第1の実施形態に係る多層基板101と同じであり、多層基板101と同様の作用効果を奏する。 Even with such a configuration, the basic configuration of the multilayer board 103 is the same as that of the multilayer board 101 according to the first embodiment, and has the same effect as that of the multilayer board 101.

なお、本実施形態で示したように、接続用導体に設けられる開口は、屈曲部を有し、少なくとも二方向に延伸する形状でもよい。接続用導体に設けられる開口の数・形状・配置は、本発明の作用・効果を奏する範囲において適宜変更可能である。開口の平面形状は、長尺状であれば、例えばU字形、円弧形、クランク形等でもよい。 As shown in the present embodiment, the opening provided in the connecting conductor may have a bent portion and may have a shape extending in at least two directions. The number, shape, and arrangement of the openings provided in the connecting conductor can be appropriately changed within the range in which the action and effect of the present invention are exhibited. The planar shape of the opening may be, for example, U-shaped, arc-shaped, crank-shaped, or the like as long as it is long.

また、本実施形態で示したように、本発明の多層基板において、積層体の第1主面VS1に形成される保護層は必須ではない。 Further, as shown in the present embodiment, in the multilayer substrate of the present invention, the protective layer formed on the first main surface VS1 of the laminated body is not essential.

《その他の実施形態》
以上に示した各実施形態では、多層基板が、他の回路基板等に実装される電子部品である例を示したが、本発明の多層基板はこれに限定されるものではない。本発明の多層基板は、二つの部材間を接続するケーブル、または他の回路基板と部品との間を接続するケーブルなどでもよい。また、多層基板の積層体は、一部分のみに屈曲部を有する構造でもよい。
<< Other Embodiments >>
In each of the embodiments shown above, an example is shown in which the multilayer board is an electronic component mounted on another circuit board or the like, but the multilayer board of the present invention is not limited thereto. The multilayer board of the present invention may be a cable connecting two members, a cable connecting another circuit board and a component, or the like. Further, the laminated body of the multilayer board may have a structure having a bent portion only in a part thereof.

以上に示した各実施形態では、積層体10,10Bが矩形の平板である例を示したが、この構成に限定されるものではない。積層体の形状は、本発明の作用・効果を奏する範囲において適宜変更可能である。積層体の平面形状は、例えば多角形、L字形、クランク形、T字形、Y字形等であってもよい。 In each of the above embodiments, an example in which the laminated bodies 10 and 10B are rectangular flat plates is shown, but the present invention is not limited to this configuration. The shape of the laminated body can be appropriately changed as long as the action / effect of the present invention is exhibited. The planar shape of the laminated body may be, for example, polygonal, L-shaped, crank-shaped, T-shaped, Y-shaped, or the like.

また、以上に示した各実施形態では、4または5の基材層を積層してなる積層体の例を示したが、本発明の積層体はこれに限定されるものではない。積層体を形成する基材層の層数は、本発明の作用・効果を奏する範囲において適宜変更可能である。 Further, in each of the above-described embodiments, an example of a laminated body in which 4 or 5 base material layers are laminated is shown, but the laminated body of the present invention is not limited to this. The number of layers of the base material layer forming the laminate can be appropriately changed within the range in which the action and effect of the present invention are exhibited.

以上に示した各実施形態では、積層体が、熱可塑性樹脂からなる平板である例を示したが、この構成に限定されるものではない。積層体は、例えば、熱硬化性樹脂からなる平板でもよく、低温同時焼成セラミックス(LTCC)の誘電体セラミックであってもよい。また、積層体は、複数の樹脂の複合積層体であってもよく、例えばガラス/エポキシ基板等の熱硬化性樹脂シートと、熱可塑性樹脂シートとが積層されて形成される構成でもよい。さらに、積層体は、複数の基材層を加熱プレス(一括プレス)してその表面同士を融着するものに限らず、各基材層間に接着材層を有する構成でもよい。 In each of the above embodiments, the laminated body is an example of a flat plate made of a thermoplastic resin, but the present invention is not limited to this configuration. The laminate may be, for example, a flat plate made of a thermosetting resin, or a dielectric ceramic of low-temperature co-fired ceramics (LTCC). Further, the laminate may be a composite laminate of a plurality of resins, or may be formed by laminating a thermosetting resin sheet such as a glass / epoxy substrate and a thermoplastic resin sheet. Further, the laminate is not limited to one in which a plurality of base material layers are heat-pressed (collectively pressed) to fuse the surfaces thereof, and may have a structure in which an adhesive layer is provided between the layers of each base material.

なお、本実施形態では、層間接続導体V1,V2,V3,V4,V5,V11,V12が導電性ペーストを固化してなるビア導体である例を示したが、この構成に限定されるものではない。積層体に形成される層間接続導体は、例えば、スルーホールめっき(内壁にCu等のめっき膜が形成されたスルーホール)でもよい。この場合には、層間接続導体が樹脂成分を含むビア導体である場合に比べて、ガスの発生量を少なくできる。 In this embodiment, an example is shown in which the interlayer connecting conductors V1, V2, V3, V4, V5, V11, and V12 are via conductors formed by solidifying a conductive paste, but the present invention is not limited to this configuration. No. The interlayer connecting conductor formed in the laminated body may be, for example, through-hole plating (through-hole in which a plating film such as Cu is formed on the inner wall). In this case, the amount of gas generated can be reduced as compared with the case where the interlayer connecting conductor is a via conductor containing a resin component.

また、多層基板に形成される回路構成は、以上に示した各実施形態の構成に限定されるものではなく、本発明の作用・効果を奏する範囲において適宜変更可能である。多層基板に形成される回路は、例えば導体パターンで形成されるキャパシタ、各種フィルタ(ローパスフィルタ、ハイパスフィルタ、バンドパスフィルタ、バンドエリミネーションフィルタ)等の周波数フィルタが形成されていてもよい。また、多層基板には、例えば他の各種伝送線路(マイクロストリップライン、ミアンダ、コプレーナ等)等が、形成されていてもよい。さらに多層基板には、チップ部品等の各種電子部品が実装または埋設されていてもよい。 Further, the circuit configuration formed on the multilayer board is not limited to the configuration of each embodiment shown above, and can be appropriately changed as long as the operation and effect of the present invention are exhibited. The circuit formed on the multilayer substrate may be formed with a frequency filter such as a capacitor formed by a conductor pattern and various filters (low-pass filter, high-pass filter, band-pass filter, band-elimination filter). Further, for example, other various transmission lines (microstrip line, mianda, coplanar, etc.) may be formed on the multilayer board. Further, various electronic components such as chip components may be mounted or embedded in the multilayer board.

また、以上に示した各実施形態では、平面形状が矩形の2つの接続用導体を備える多層基板の例を示したが、本発明はこの構成に限定されるものではない。接続用導体の個数・形状・配置等は、本発明の作用・効果を奏する範囲において適宜変更可能である。接続用導体の平面形状は、例えば多角形、L字形、クランク形、T字形、Y字形、円形、楕円形等でもよい。 Further, in each of the above-described embodiments, an example of a multilayer substrate including two connecting conductors having a rectangular planar shape is shown, but the present invention is not limited to this configuration. The number, shape, arrangement, etc. of the connecting conductors can be appropriately changed within the range in which the action and effect of the present invention are exhibited. The planar shape of the connecting conductor may be, for example, polygonal, L-shaped, crank-shaped, T-shaped, Y-shaped, circular, elliptical, or the like.

さらに、以上に示した各実施形態では、平面形状が矩形の3つの実装電極P1、および平面形状が矩形の3つの実装電極P2を備える多層基板の例を示したが、本発明はこの構成に限定されるものではない。実装電極の個数・形状・配置等は、本発明の作用・効果を奏する範囲において適宜変更可能である。実装電極の平面形状は、例えば多角形、L字形、L字形、クランク形、T字形、Y字形、円形、楕円形等でもよい。また、実装電極は、例えば、第1主面VS1および第2主面VS2にそれぞれ設けられていてもよい。 Further, in each of the above-described embodiments, an example of a multilayer substrate including three mounting electrodes P1 having a rectangular planar shape and three mounting electrodes P2 having a rectangular planar shape is shown. Not limited. The number, shape, arrangement, etc. of the mounting electrodes can be appropriately changed within the range in which the action and effect of the present invention are exhibited. The planar shape of the mounting electrode may be, for example, polygonal, L-shaped, L-shaped, crank-shaped, T-shaped, Y-shaped, circular, elliptical, or the like. Further, the mounting electrodes may be provided on, for example, the first main surface VS1 and the second main surface VS2, respectively.

最後に、上述の実施形態の説明は、すべての点で例示であって、制限的なものではない。当業者にとって変形および変更が適宜可能である。本発明の範囲は、上述の実施形態ではなく、特許請求の範囲によって示される。さらに、本発明の範囲には、特許請求の範囲内と均等の範囲内での実施形態からの変更が含まれる。 Finally, the description of the embodiments described above is exemplary in all respects and not restrictive. Modifications and changes can be made as appropriate for those skilled in the art. The scope of the invention is indicated by the claims, not by the embodiments described above. Further, the scope of the present invention includes modifications from the embodiments within the scope of the claims and within the scope of the claims.

AP1,AP2…開口
EP1…回路基板の外部電極
P1,P1B,P2,P2B…実装電極
S1…回路基板の第1面
SL10,SL11,SL12,SL12B,SL20,SL21,SL22,SL22B…開口
V1,V2,V3,V4,V5,V11,V12…層間接続導体
VS1…積層体の第1主面
VS2…積層体の第2主面
1…保護層
3,3A,3B…コイル
5…導電性接合材
10,10B…積層体
11…基材層
11,12,13,14…基材層
11,11b,12,12b,13,13b,14,14b,15…基材層
21…導体
31,31a,31b,32,32a,33,33a,34,34a…コイル導体パターン
41,41A,41B,42,42A,42B…接続用導体
100,101,102,103…多層基板
201…回路基板
301…電子機器
AP1, AP2 ... Opening EP1 ... External electrodes P1, P1B, P2, P2B of the circuit board ... Mounting electrodes S1 ... First surface of the circuit board SL10, SL11, SL12, SL12B, SL20, SL21, SL22, SL22B ... Openings V1, V2 , V3, V4, V5, V11, V12 ... Interlayer connection conductor VS1 ... First main surface of laminated body VS2 ... Second main surface of laminated body 1 ... Protective layer 3, 3A, 3B ... Coil 5 ... Conductive bonding material 10 , 10B ... Laminated 11 ... Base material layer 11, 12, 13, 14 ... Base material layer 11, 11b, 12, 12b, 13, 13b, 14, 14b, 15 ... Base material layer 21 ... Conductor 31, 31a, 31b , 32, 32a, 33, 33a, 34, 34a ... Coil conductor pattern 41, 41A, 41B, 42, 42A, 42B ... Connection conductor 100, 101, 102, 103 ... Multilayer board 201 ... Circuit board 301 ... Electronic equipment

Claims (8)

実装面を有し、複数の基材層を含んだ積層体と、
前記積層体に形成され、前記複数の基材層の積層方向に巻回軸を有するコイルと、
前記実装面に形成される実装電極と、
前記積層体に形成され、複数の開口を有する接続用導体と、
を備え、
前記複数の開口は、前記接続用導体を構成する導体で囲まれた長尺状であり、
前記接続用導体は、前記積層方向から視て、前記コイルに重なり、
前記実装電極は、前記実装面に露出する前記接続用導体の一部である、多層基板。
A laminate having a mounting surface and containing a plurality of base material layers,
A coil formed in the laminated body and having a winding axis in the laminating direction of the plurality of base materials,
The mounting electrode formed on the mounting surface and
A connecting conductor formed in the laminated body and having a plurality of openings,
Equipped with
The plurality of openings have a long shape surrounded by conductors constituting the connecting conductor.
The connecting conductor overlaps the coil when viewed from the stacking direction.
The mounting electrode is a multilayer substrate that is a part of the connecting conductor exposed on the mounting surface.
実装面を有し、複数の基材層を含んだ積層体と、
前記積層体に形成され、前記複数の基材層の積層方向に巻回軸を有するコイルと、
前記実装面に形成される実装電極と、
前記積層体に形成され、複数の開口を有する接続用導体と、
を備え、
前記複数の開口は、前記実装電極を構成する導体で囲まれた長尺状であり、
前記実装電極は、前記接続用導体に接続される、多層基板。
A laminate having a mounting surface and containing a plurality of base material layers,
A coil formed in the laminated body and having a winding axis in the laminating direction of the plurality of base materials,
The mounting electrode formed on the mounting surface and
A connecting conductor formed in the laminated body and having a plurality of openings,
Equipped with
The plurality of openings have a long shape surrounded by conductors constituting the mounting electrode.
The mounting electrode is a multilayer substrate connected to the connecting conductor.
前記複数の開口は、屈曲部を有し、少なくとも二方向に延伸する、請求項1または2に記載の多層基板。 The multilayer substrate according to claim 1 or 2, wherein the plurality of openings have a bent portion and extend in at least two directions. 前記複数の基材層は樹脂材料からなる、請求項1から3のいずれかに記載の多層基板。 The multilayer substrate according to any one of claims 1 to 3, wherein the plurality of substrate layers are made of a resin material. 前記樹脂材料は熱可塑性樹脂である、請求項4に記載の多層基板。 The multilayer substrate according to claim 4, wherein the resin material is a thermoplastic resin. 前記実装電極の一部は、前記複数の基材層のうち最も前記実装面側に位置する基材層に埋まっている、請求項4または5に記載の多層基板。 The multilayer substrate according to claim 4 or 5, wherein a part of the mounting electrodes is embedded in a base material layer located closest to the mounting surface side among the plurality of base material layers. 前記コイルは、前記複数の基材層の少なくとも一つに形成されるコイル導体パターンを有し、
前記複数の開口は、前記積層方向から視て、前記コイル導体パターンに重ならず、前記コイル導体パターンに沿って配置される、請求項4から6のいずれかに記載の多層基板。
The coil has a coil conductor pattern formed on at least one of the plurality of substrate layers.
The multilayer substrate according to any one of claims 4 to 6, wherein the plurality of openings do not overlap with the coil conductor pattern when viewed from the stacking direction, and are arranged along the coil conductor pattern.
請求項1から7のいずれかに記載の多層基板と、
回路基板と、
を備え、
前記実装電極は、導電性接合材を介して前記回路基板に接合される、電子機器。
The multilayer board according to any one of claims 1 to 7.
With the circuit board
Equipped with
The mounting electrode is an electronic device that is bonded to the circuit board via a conductive bonding material.
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