JP6979670B2 - Wafer level package manufacturing method - Google Patents

Description

The present invention relates to a method for manufacturing a wafer level package in which various device elements are hermetically sealed by a laminated structure of a plurality of wafer base materials.

As an electronic component package for airtightly sealing various device elements, a laminated plate with a plurality of various device elements built in is manufactured by laminating a wafer base material such as polished crystal, glass, and silicon on a parallel flat plate. However, a wafer level package (WLP) is known in which the laminated plate is divided and formed by dicing or the like.

Patent Documents 1 to 3 disclose a crystal device formed by WLP. This type of crystal device is a functional substrate composed of a crystal vibrating piece of various vibration modes and a support member whose one end is supported so as to surround the crystal vibrating piece, and a pair of sealings for sealing the crystal vibrating piece. It is formed by punching a substrate from a crystal wafer by etching or the like, sandwiching the functional substrate between a pair of sealing substrates, and airtightly sealing the substrate.

Further, as the electrodes formed on the device element, a main metal such as gold (Au), which has high conductivity and is chemically stable, is often used, and such a main metal is used as a wafer base material such as crystal or silicon. Adhesion strength is not good. Therefore, a contact metal such as chromium (Cr) having high oxidizing power and good bondability is first formed on the wafer base material, and a main metal such as Au is formed on the contact metal to form a two-layer electrode. It forms a layer (Patent Document 4).

Japanese Unexamined Patent Publication No. 2004-328442 Japanese Patent No. 4770221 Japanese Unexamined Patent Publication No. 2016-167661 Japanese Unexamined Patent Publication No. 2003-101372

Generally, when a plurality of wafer base materials using crystal, glass, silicon, etc. are laminated and bonded to realize WLP, a contact metal such as Cr having good adhesion is formed between the Au film to be the bonding layer and the wafer base material. used. On the other hand, in order to make the solid phase diffusion bonding more stable, appropriate heating and pressurization are required at the time of bonding. Further, in order to realize an airtight space having a high degree of vacuum, it is necessary to degas unnecessary water and volatile gas at a high temperature as a pretreatment for joining.

However, when such a high temperature heating step is required, the contact metal diffuses into the main metal (Au) and alloying occurs. Due to this alloying, contact metal is deposited on the bonding surface of the wafer base material, which causes an oxide film to be formed, which causes a problem that the bonding property is significantly deteriorated. As described above, there are many problems in realizing a hollow airtight space in which the device element is enclosed in a high vacuum.

In particular, among the device elements, in the case of a crystal device typified by a crystal oscillator or a crystal oscillator, the equivalent series resistance (R1) can be reduced by this high vacuum depending on the vibration mode, and the crystal device can be used. It is also known that the contact metal diffuses to the main metal and is alloyed by heating or aging, so that the elastic coefficient of the electrode changes and the oscillation frequency fluctuates.

On the other hand, in order to suppress the influence of the diffusion, it has been confirmed by experiments that the film thickness of the contact metal is reduced to improve the film thickness. , It was also the cause of the large R1 value.

In particular, in the tuning fork type vibrator having a groove in the vibrating arm, the thickness of the wall portion of the groove decreases with the miniaturization, which tends to narrow the distance between the electrodes. For this reason, the total thickness of the electrode and the thickness of the groove wall of the crystal vibrating arm become close to each other, and the fluctuation of the elastic modulus of the electrode alloyed by diffusion has a large influence on the oscillation frequency. In addition, in the case of a thickness-sliding oscillator, the thickness of the crystal blank becomes thinner as the frequency increases, so the effect of fluctuations in the elastic modulus of the electrodes alloyed by diffusion on fluctuations in the oscillation frequency tends to increase. rice field.

As described above, since the oscillation frequency characteristics change slightly depending on the material and structure of the electrode formed on the crystal blank, the performance requirement may not be satisfied simply by adopting the conventional electrode structure. In addition, when packaging a quartz device, a high vacuum is required depending on the vibration mode, but if the aging resistance is not improved, the annealing degassing step cannot be sufficiently performed in the manufacturing process, so the required vacuum degree is required. Since it did not reach the above level, the vibration characteristics as designed could not be obtained, causing a decrease in the yield of the product.

Therefore, an object of the present invention is to suppress the diffusion phenomenon of the contact metal into the main metal by forming the structure of the bonding portion between the wafer base materials into at least three layers of the contact metal, the diffusion suppression layer and the main metal. It is an object of the present invention to provide a method for manufacturing a wafer level package capable of realizing stable solid phase diffusion bonding even if heat treatment or the like is added before bonding.

In order to solve the above problems, the method for manufacturing a wafer level package of the present invention has a plurality of wafer base materials, and an airtight space having a device element inside is formed by joining the bonding surfaces provided on each wafer base material. In the method for manufacturing a wafer level package to be formed, a contact metal, a diffusion suppression layer formed on the contact metal, and a main metal formed on the diffusion suppression layer are formed on the bonding surface of each wafer base material. bonded layer composed of at least three layers is formed between, the diffusion suppressing layer is ruthenium, the contact metal is chromium, the main metal is gold or Rannahli, than the melting point of the bonding faces the main metal of each wafer substrate By pressurizing at a low temperature, the main metals of each bonding layer are diffusion bonded.

According to the method for manufacturing a wafer level package of the present invention, the bonding layer has at least a three-layer structure consisting of a contact metal, a diffusion suppressing layer formed on the contact metal, and a main metal formed on the diffusion suppressing layer. By forming the contact metal, diffusion of the contact metal into the main metal can be suppressed, and the precipitation of contact metal such as chromium (Cr) on the surface of the main metal such as gold (Au) due to alloying can be suppressed. The bonding surfaces of a plurality of wafer substrates can be firmly bonded by solid phase diffusion bonding. On the other hand, due to the above-mentioned effect, the alloying of the bonding layer due to heating before bonding is suppressed, so that unnecessary moisture and volatile gas can be sufficiently degassed by heating at a high temperature, and the device element is sealed. It is possible to form an airtight space with a high vacuum to stop.

It is sectional drawing of the wafer level package of this invention, and is the enlarged sectional view of the junction portion. It is an exploded perspective view seen from the lid substrate side of the crystal device formed by a wafer level package. It is an exploded perspective view seen from the base substrate side of the said wafer level package. 1A is a cross-sectional view taken along the line AA shown in FIGS. 1 and 2, and is an enlarged cross-sectional view of the electrode layer. It is a graph which shows the diffusion coefficient of various metals. It is a table which shows various evaluation results of the metal used for the diffusion suppression layer. It is a graph which shows the relationship between the Cr film thickness and the frequency change amount. It is a graph which shows the relationship between Cr film thickness and equivalent series resistance (R1). It is a graph which shows the relationship between various metals and equivalent series resistance (R1). It is a graph which shows the relationship between the heating time of various metals and the amount of frequency change. It is a graph which shows the temperature characteristic of the tuning fork type oscillator when Pt is used for the diffusion suppression layer. It is a graph which shows the temperature characteristic of the tuning fork type oscillator when Ru is used for the diffusion suppression layer. It is a graph which shows the temperature characteristic which compared the thickness of Ru used for the diffusion suppression layer with 150Å and 250Å. It is a graph which shows the relationship between the degree of vacuum in a package, and the equivalent series resistance.

Hereinafter, an embodiment of the wafer level package of the present invention will be described. The present invention is not limited to the examples shown below, and the various materials are not limited to quartz. A wafer level package (hereinafter referred to as WLP) is made by laminating polished wafer-shaped crystals, glass, silicon, etc. on a parallel plate to form a hollow airtight space in which one or more device elements are housed. , It is formed by dividing a plurality of laminated wafer base materials by dicing or the like.

In FIG. 1, a functional substrate 32 on which various device elements are integrally formed is sandwiched between a pair of sealing substrates (base substrate 33 and lid substrate 34), laminated, and solid-phase diffusion bonded to encapsulate the device element. It shows the cross-sectional structure of the WLP 31 in which the airtight space 44 is formed. 2 to 4 show, as an example, the internal structure of the WLP 31 in which the device element is composed of the crystal vibration piece 11.

As shown in FIG. 1, in the WLP 31 of the present invention, a bonding layer 40 is formed on each bonding surface of the functional substrate 32, the base substrate 33, and the lid substrate 34. The bonding layer 40 has a laminated structure of at least three layers including a contact metal E1, a diffusion suppressing layer E2 formed on the contact metal E1, and a main metal E3 formed on the diffusion suppressing layer E2. It has become. As the contact metal E1, a metal material having high adhesion to a wafer base material such as quartz, silicon, and glass is used. The material is formed of chromium (Cr), nickel (Ni), titanium (Ti) or an alloy containing preferably 50% or more of these metals. Further, as the main metal E3, a metal material having high conductivity is used. As the material, gold (Au), silver (Ag), palladium (Pd), thus formed on the aluminum (Al).

As the diffusion suppressing layer E2, a metal material having an effect of suppressing diffusion from the contact metal E1 to the main metal E3 is used. As such a metal material, a noble metal having a diffusion coefficient lower than that of the main metal E3 or a base metal having a diffusion coefficient lower than that of the contact metal E1 can be selected. Precious metals include ruthenium (Ru), platinum (pt), palladium (Pd), rhodium (Rh), iridium (Ir), osmium (Os) and the like, and base metals include molybdenum (Mo) and tungsten (Tungsten (Mo)). W) and so on.

The precious metals do not have the same diffusion coefficient unless the temperature rises by 500 degrees or more as compared with Au. This indicates that the diffusion of precious metals is less likely to proceed than that of Au, and in the manufacturing process of a crystal unit that does not normally heat at 300 ° C. or higher, the diffusion is sufficiently suppressed. Can be done. Further, even if Au and these metals, which are also platinum groups, are alloyed, a highly stable state is maintained, and adverse effects such as diffusion of Cr do not occur.

Further, the base metals have a lower diffusion coefficient than Cr, and do not have the same diffusion coefficient unless the temperature rises by 1000 degrees or more as compared with Au. Therefore, the effect of suppressing diffusion is enhanced even between Cr or Au. In addition, in the case of a noble metal, even if it is alloyed with Au and precipitated, it has high acid resistance, and in the case of a base metal, the gold on the surface is difficult to alloy, so that oxidation is suppressed in both cases.

The bonding layer 40 is continuously formed on the surface of the wafer substrate by sputtering, vapor deposition, or CVD in the order of the contact metal E1, the diffusion suppression layer E2, and the main metal E3.

FIG. 5 shows the relationship between the temperature of various metals and the diffusion coefficient D for self-metals. From the data shown in FIG. 5, for noble metals with excellent acid resistance, Pt, Ru, Pd, Ag having a diffusion coefficient equal to or less than that of the main metal E3, and for base metals, the diffusion coefficient is equal to or less than that of the contact metal E1. Ni, Mo, and W were selected and various evaluations shown in FIG. 6 were performed. The evaluation was performed on the joint strength, ease of processing, and various characteristics after manufacturing, and was shown in four stages of ⊚ (best), 〇 (good), Δ (possible), and × (impossible). According to this evaluation test, Ru is the most suitable material for the diffusion suppression layer E2 among precious metals. Further, it can be seen that Pt, Pd and the like can be applied in addition to Ru. On the other hand, Mo is the most suitable for base metals. It can also be seen that W can be applied in addition to Mo. Examples of non-metal materials such as the precious metal and the base metal include a barrier dielectric film, a barrier oxide film, ZnO, TiO ² , and BaO. As a comparative example, an experiment was conducted using Ni and Ag for the diffusion suppression layer E2.

Next, WLP31 in which the device element is composed of the crystal vibration piece 11 will be described with reference to FIGS. 2 to 4. The WLP 31 is formed of a plurality of wafer base materials including a functional substrate 32 and a pair of sealing substrates (base substrate 33 and lid substrate 34) that sandwich and seal the functional substrate 32 from both upper and lower surfaces. Each of the substrates forms the functional substrate 32, the base substrate 33 and the lid substrate 34 by etching and dicing the wafer substrate, and the electrode layers 19 and 20 and the bonding layer are formed on the surfaces of the respective substrates under a reduced pressure environment. 40 is formed.

In the functional substrate 32, the XY plane is rotated by -7 to +7 degrees by X-axis rotation in the Cartesian coordinate system of the rough crystal with the electric axis as the X-axis, the mechanical axis as the Y-axis, and the optical axis as the Z-axis. It is formed by slicing thinly into a plate at the cut angle. Then, a tuning fork-shaped crystal vibrating piece 11 composed of a base portion 12 and a pair of vibrating arm portions 13 and 14 extending in parallel from the base portion 12 by forming a mask pattern by a photolithic step and performing crystal etching is performed. A rectangular support frame 36 that surrounds the outer periphery of the crystal vibration piece 11 and a connecting portion 37 that connects one end of the support frame 36 and one end of the base portion 12 are formed. As described above, the crystal vibrating piece 11 is arranged via the connecting portion 37 in the flat hollow portion 35 provided between the crystal vibrating piece 11 and the support frame 36.

The vibrating arm portions 13 and 14 are a pair of elongated quadrangular prisms extending in the Y-axis direction from one end of the base portion 12 and parallel to the X-axis direction, and are on the front surface side (+ Z surface) and the back surface side (-Z surface). Grooves 15 and 16 are provided along the respective Y-axis directions. The groove portions 15 and 16 are provided with the + Z planes of the vibrating arm portions 13 and 14 along the longitudinal (Y-axis) direction and the −Z plane along the longitudinal (Y-axis) direction. By providing the groove portions 15 and 16, a pair of wall portions 17 and 18 facing the front surface side and the back surface side are formed on the vibrating arm portions 13 and 14. Further, electrode layers 19 and 20 are formed on the inner side surfaces of the wall portions 17 and 18 and the bottom surfaces of the groove portions 15 and 16.

Similarly, the base substrate 33 and the lid substrate 34 are also etched to form a rectangular outer peripheral frame 41 and a recess 43 for accommodating the crystal vibration piece 11. The shapes of the functional substrate 32, the base substrate 33, and the lid substrate 34 can also be formed by cutting or punching using a laser or a powder beam suitable for microfabrication.

The functional substrate 32, bonding of the base substrate 33 and the lid substrate 34, both sides of the support frame 36, the base substrate 33 and the solid respective bonding layers 40 each other are formed on the entire peripheral surface of the outer peripheral frame 41 of the lid substrate 34 This is done by phase diffusion bonding.

The bonding layer 40 is formed on the bonding surface of each of the support frame 36 of the functional substrate 32, the base substrate 33, and the lid substrate 34. The bonding layer 40 is integrally formed with the upper and lower surfaces of the support frame 36 of the functional substrate 32 and the outer peripheral frames 41 of the base substrate 33 and the lid substrate 34 facing the upper and lower surfaces of the support frame 36, respectively, via an insulating region. ing. Further, the pair of electrode layers 19 and 20 formed along the outer peripheral surfaces of the pair of vibrating arm portions 13 and 14 of the crystal vibrating piece 11 extend along the surface of the support frame 36 via the base portion 12 and further extend along the surface of the support frame 36. The surfaces of the outer peripheral frame 41 of the base substrate 33 and the lid substrate 34 are quadrupolarized by the insulating portion 45 and connected to the back surface side of the base substrate 33 as a pad pattern. As shown in FIG. 3, the base substrate 33 is provided with ground electrodes GND1 and GND2 via the side terminal 46. As shown in FIG. 2, the GND1 is provided as a shield pattern on the upper surface of the lid substrate 34, and has the same effect as the metal lid. The four pad patterns of GND1, GND2, 19, and 20 provided on the upper surface of the base substrate 33 are independent of each other via the side terminal 46s at the four corners partially insulated by the insulating portion 45. Further, at least the functional board 32 is formed and plated with the GND1 and the side terminal 46 connected to the GND1, the four pad patterns provided on the upper surface of the base substrate 33, and the side terminals 46 connected to the pad pattern. This is performed after joining the base substrate 33 and the lid substrate 34.

As shown in FIG. 4, the electrode layers 19 and 20 have a three-layer structure of a contact metal E1, a diffusion suppression layer E2, and a main metal E3, similarly to the above-mentioned bonding layer 40.

Next, the experimental results when Pt or Ru is used for the diffusion suppression layer E2 in WLP31 having the above configuration are shown. As a comparative example, FIGS. 7 and 8 show the relationship between the heat resistance and the equivalent series resistance (R1) of the electrode having a two-layer structure of the contact metal E1 and the main metal E3 with the film thickness t1 of the contact metal E1. Here, Cr is used as the contact metal and Au is used as the main metal. As shown in FIG. 7, regarding the heat resistance, it can be seen that the frequency fluctuation is reduced and the heat resistance is improved by reducing the Cr film thickness t1 from 100 Å to 50 Å or less. As shown, on the contrary, it becomes larger and worse with respect to R1.

In FIG. 9, R1 and Pt or Ru in a conventional two-layered electrode layer made of Cr having a film thickness t1 of 50 Å, which can obtain an effect of improving heat resistance in the case of a general tuning fork type crystal oscillator, are diffused. Experimental data comparing R1 with the three-layered electrode layer as the inhibitory layer are shown. In the graph shown in FIG. 9, the average value of the equivalent series resistance (R1) is shown by dots, and the standard deviation is shown by the width. According to this experimental data, R1 is as high as about 75 KΩ in the conventional two-layer structure electrode layer, whereas R1 is as low as 60 KΩ or less in the three-layer structure electrode layer using Pt or Ru as a diffusion suppression layer, and R1. It can be seen that is good. As described above, Pt and Ru have substantially the same R1. However, as will be described later, Ru is superior in terms of heat resistance and ease of processing.

Next, the transition of the frequency change amount of the crystal unit in the heat resistance test when the film thickness t1 of Cr was set to 50 Å and the film was placed in a constant temperature bath at 125 ° C. for up to 1000 hours was shown in the conventional two-layer structure. The results of comparison with the electrodes are shown in FIG. The frequency was measured here after being left in a constant temperature bath at room temperature and humidity for 1 hour or more. The change amount of the frequency - expressed by (frequency after on time frequency before the up) / before-frequency × 10 6 ^[ppm].

In the case of a conventional crystal unit having an electrode having a two-layer structure of Cr-Au, the film thickness t1 of Cr is usually set to 100 Å ± 50%, and the film thickness t3 of Au is set to 1000 Å ± 50%. .. Under this condition, when the diffusion suppression layer E2 made of four kinds of metal materials Pt, Ru, Mo, and W is formed between Cr and Au, the film thickness t2 of each is set to 150 Å ± 50%. The amount of frequency change can be suppressed to about one-third as compared with the conventional two-layer electrode structure of Cr-Au. This indicates that the diffusion of Au, which is the main metal E3, is suppressed by the diffusion suppression layer E2 by the metal material.

As shown in FIG. 10, according to the data of the heat resistance test at 125 ° C., among the precious metals, Ru has a smaller frequency change amount than Pt and is excellent in heat resistance. On the other hand, among the base metals, W has the lowest frequency change amount and is excellent in terms of heat resistance, but Mo is preferable in consideration of ease of processing, as will be described later.

Further, it is known that the tuning fork type oscillator has a secondary temperature characteristic. FIG. 11 shows the secondary temperature characteristics of a tuning fork type oscillator having an electrode layer having a three-layer structure using Pt for the diffusion suppression layer E2, and FIG. 12 shows three layers using Ru for the diffusion suppression layer E2. It shows the secondary temperature characteristic of the tuning fork type oscillator having the electrode layer of the structure. From the results shown in FIGS. 11 and 12, by setting the thickness of the diffusion suppression layer E2 in the range of 150 Å ± 50%, the temperature becomes 25.4 ° C. when the apex temperature is Pt, and 25 when the apex temperature is Ru. It becomes 1 ° C. This is within the range of the apex temperature of 25 ± 5 ° C., which is generally said to be good, but it can be said that Ru has slightly better frequency temperature characteristics than Pt.

FIG. 13 compares the secondary temperature characteristics of a tuning fork type oscillator having an electrode layer having a three-layer structure when the thickness of Ru used for the diffusion suppression layer E2 is 150 Å and 250 Å. From this characteristic, it can be seen that when the diffusion suppression layer E2 is made thicker, the apex temperature tends to decrease. As described above, since 250 Å is out of the range of 25 ± 5 ° C., it is preferable to set it in the range of 150 Å ± 50%.

Next, a method for manufacturing the WLP 31 provided with the electrode layers 19 and 20 and the bonding layer 40 will be described. As shown in FIGS. 2 and 3, the functional substrate 32, the base substrate 33, and the lid substrate 34 are each shaped by etching or the like from the wafer substrate, and are parallel to each other at predetermined intervals in the chamber for evacuation. Place in. In this state, the inert gas is injected into the chamber and the inside of the chamber is heated to a predetermined temperature. By this heating, each substrate and jig in the chamber can be sufficiently heated to a high temperature, and after vaporizing the adhering water and volatile gas, the inside of the chamber is evacuated and the injected inert gas and vaporized water are vaporized. Etc. are discharged to the outside. After the inside of the chamber is set to a predetermined degree of vacuum in this way, the functional substrate 32 is sandwiched between the base substrate 33 and the lid substrate 34 and pressurized under a predetermined temperature range. By this pressurization, the main metal E3 on the surface of the bonding layer 40 formed on the bonding surface of each substrate is solid-phase diffusion bonded, so that the crystal vibration piece 11 formed on the functional substrate 32 is placed in high vacuum. Can be hermetically sealed with.

Since the conventional WLP joint surface has a two-layer structure of contact metal and main metal, the contact metal precipitates on the surface of the main metal by heating at 200 ° C or higher before joining. , The bonding strength between the main metals of each substrate was insufficient. Further, when the heating temperature is less than 200 ° C., the drying of moisture and the like becomes insufficient, and the vacuum degree in the package after joining is limited to about 100 Pa.

On the other hand, in the present invention, since it is a three-layer bonding layer including a diffusion suppression layer between the contact metal and the main metal, the temperature applied to the functional substrate 32, the base substrate 33 and the lid substrate 34 is conventionally set. It can be set higher than that, and the heating time can be set longer. As a result, the gas in the chamber can be sufficiently discharged, and the degree of vacuum in the package after the solid phase diffusion bonding of the functional substrate by the base substrate and the lid substrate can be reduced to 20 Pa or less.

FIG. 14 shows the relationship between the degree of vacuum (Pa) in the airtight space 44 of WLP31 shown in FIGS. 1 to 3 and the equivalent series resistance (R1). According to this, it can be seen that R1 increases as the degree of vacuum in the airtight space 44 deteriorates (the atmospheric pressure rises). Especially for crystal devices such as tuning fork type oscillators and width vertical / length vertical oscillators, it is known that the degree of vacuum has a great influence on R1, and the degree of vacuum also has a great influence on the frequency characteristics. It has been known.

As described above, according to the wafer level package of the present invention, the main metal is alloyed by forming an electrode layer in which a diffusion suppression layer such as Pt or Ru is laminated between the contact metal and the main metal. It is possible to suppress the change in elastic modulus caused by the above, and to suppress the frequency change even with a load due to aging, reflow, or the like. Further, since the film thickness of the contact metal can be increased, the adhesion between the electrode layer and the wafer base material is improved, and the electrical characteristics such as the equivalent series resistance (R1) are improved.

In the electrode layers 19 and 20 thus formed, the change in the elastic modulus due to the diffusion of the main metal E3 is suppressed, so that the crystal vibration piece 11 having less fluctuation in the oscillation frequency can be formed. In particular, the WLP 31 provided with the crystal vibrating piece 11 needs to be sealed in a high vacuum in order to maximize the performance of the crystal vibrating piece 11 formed on the functional substrate 32. .. For this purpose, when the functional substrate 32 is joined by the base substrate 33 and the lid substrate 34, a step of heating the inside of the vacuum chamber where the joining work is performed to a high temperature and discharging the injected gas to the outside is required. By forming the bonding layer 40 having a three-layer structure including the diffusion suppressing layer E2, the heating temperature and heating time when joining each substrate are compared with the conventional bonding layer having a two-layer structure without the diffusion suppressing layer. It can be set high and long. As a result, the inside of the chamber can be set to a high temperature and the gas can be sufficiently discharged, so that each substrate can be diffusively bonded in an environment where a high degree of vacuum is maintained.

In the present embodiment, the device element formed on the functional substrate 32 is a tuning fork type crystal vibration piece 11, but bending, stretching (vertical), width vertical / length vertical coupling, thickness slip, and elastic surface other than the tuning fork type. The same effect can be obtained even with a crystal vibration piece in a vibration mode such as a wave or a Lamb wave. In particular, a WLP according to the configuration of the present invention is particularly effective for a crystal vibration piece having a vibration mode of bending, stretching, and vertical / length vertical coupling, because a high vacuum is required.

E1 contact metal E2 diffusion suppression layer E3 main metal t1, t2, t3 film thickness GND1, GND2 ground electrode 11 crystal vibration piece 12 base 13,14 vibrating arm 15,16 groove 17,18 wall 19,20 electrode layer 31 WLP (Wafer level package)
32 Functional board 33 Base board 34 Lid board 35 Hollow part 36 Support frame 37 Connecting part 40 Joining layer 41 Outer frame frame 43 Recessed 44 Airtight space 45 Insulation part 46 Side terminal

Claims (4)

In a method for manufacturing a wafer level package having a plurality of wafer base materials and forming an airtight space having a device element inside by joining the bonding surfaces provided on each wafer base material.
On the bonding surface of each wafer base material, a bonding layer having at least three layers of a contact metal, a diffusion suppressing layer formed on the contact metal, and a main metal formed on the diffusion suppressing layer is formed. Formed,
The diffusion suppressing layer of ruthenium, the contact metal is chromium, the main metal is gold or Rannahli,
A method for manufacturing a wafer level package in which the main metals of each bonding layer are diffusion-bonded by pressurizing the bonding surfaces of the wafer substrates at a temperature lower than the melting point of the main metal. The wafer substrate has a pair of encapsulating substrates and at least one functional substrate sandwiched between the pair of encapsulating substrates and integrated with a device element.
The method for manufacturing a wafer level package according to claim 1, wherein the sealed substrate and the functional substrate are bonded via the bonding layer formed on the respective bonding surfaces. The method for manufacturing a wafer level package according to claim 2, wherein the functional substrate is integrally formed by a device element and a support frame that supports at least one end of the device element. The method for manufacturing a wafer level package according to claim 2, wherein the sealing substrate has a recess in which the device element is hermetically sealed.

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