JP6981040B2 - Encapsulation structures, electronic devices, electronic devices, and mobiles - Google Patents

Description

The present invention relates to a sealing structure, an electronic device having a sealing structure, an electronic device, and a mobile body.

Conventionally, it has been desired to realize a compact and thin electronic device, and for example, an electronic device containing a functional element using silicon MEMS (Micro Electro Electro Mechanical System) technology has been developed.

As such an electronic device, for example, Patent Document 1 has a covering structure that separates a cavity (internal space) in which a functional element arranged above the substrate is housed, and the covering structure is the first. The first through hole provided in one coating layer and each communicating with the cavity and the second through hole larger than the first through hole are closed by the second coating layer arranged above the first coating layer. An electronic device (electronic device) having a peeling sealing structure is described.

Further, for example, Patent Document 2 includes a movable body (functional element) mounted on a substrate and a lid for covering the movable body so as to be arranged inside the cavity, and allows the movable body to pass through the inside and the outside of the cavity. A MEMS device having a sealing structure for sealing by filling a through hole provided in a lid with a sealing film is described.

Japanese Unexamined Patent Publication No. 2013-45893 Japanese Unexamined Patent Publication No. 2007-210083

However, in the sealing structure in which the first through hole and the second through hole are closed by the second coating layer arranged above the first coating layer as described in Patent Document 1, the first through hole and the first through hole are closed. Since the second coating layer is arranged only on the opening surface of the two through holes, the desired sealing effect must be obtained unless the second coating layer arranged at the openings of the first through hole and the second through hole is sufficiently thick. There was a risk that it could not be obtained. Further, in the sealing structure in which the through hole provided in the lid is filled with the sealing film as described in Patent Document 2, since the sealing film is arranged in the entire through hole, the seal is sealed with the lid. Stress could not be sufficiently released due to the difference in linear expansion coefficient from the film, and there was a risk that the reliability of sealing would be impaired.

The present invention has been made to solve at least a part of the above-mentioned problems, and can be realized as the following form or application example.

[Application Example 1] The sealing structure according to the present application example includes a substrate and a through hole penetrating the substrate, and the through hole communicates with a second hole portion and the second hole portion. The communication portion between the first hole portion and the second hole portion includes the first hole portion having the first opening width narrower than the second opening width of the second hole portion. It is characterized in that it is sealed by a sealing film disposed on the second hole side.

According to this application example, the communication portion between the second hole portion and the first hole portion having the first opening width narrower than the second opening width of the second hole portion is the second. It is sealed by a sealing film disposed on the hole side. In this way, the sealing film disposed on the second hole side closes the first hole having a narrow opening width, so that the first hole having a narrow opening width is halfway through. The sealing film can reach and easily form the sealing film. In other words, since the sealing film is filled up to a part of the first hole to perform sealing, a desired sealing effect can be easily obtained. Further, since the first hole is not filled with the sealing film, the stress generated by the difference in the linear expansion coefficient between the substrate and the sealing film is easily released, and the deterioration of the sealing reliability is suppressed. can do.

[Application Example 2] In the sealing structure described in the above application example, it is preferable that the sealing film includes a first layer and a second layer.

According to this application example, the film forming conditions of the first layer and the film forming conditions of the second layer can be changed. In other words, when the first layer and the second layer are formed by, for example, a vacuum vapor deposition method or a sputtering method, the crystals of the respective film forming layers differ depending on the temperature conditions and the film forming environment (vacuum degree, etc.). The growth of grain boundaries is different. Therefore, by providing the film forming layer including the first layer and the second layer, when the first layer is arranged on the first hole side, the first hole is affected and the first layer is affected. Defects in the sealing film that may occur in the second layer are canceled and do not occur in the second layer due to differences in the growth of crystal grain boundaries of the film-forming layer. As described above, by forming the sealing film into at least two layers including the first layer and the second layer, it is possible to easily suppress the appearance of defects in the sealing film, and the sealing reliability is further improved. Can be enhanced.

[Application Example 3] In the sealing structure described in the above application example, the first base layer may be disposed between the inner surface of the first hole and the first layer. preferable.

According to this application example, the inner surface of the first hole and the first layer are brought into close contact with each other by the first base layer disposed between the inner surface of the first hole and the first layer. The property can be improved, and the reliability of sealing can be improved.

[Application Example 4] In the sealing structure described in the above application example, it is preferable that a second base layer is disposed between the first layer and the second layer.

According to this application example, the second base layer disposed between the first layer and the second layer enhances the adhesion between the first layer and the second layer, and at the same time, the second layer. It is possible to make it difficult for defects in the sealing film that may occur in the first layer or the second layer to occur due to the influence of the pore portion of 1.

[Application Example 5] In the sealing structure described in the above application example, the aspect ratio of the depth to the first opening width of the first hole portion is in the range of 1 or more and 100 or less. preferable.

According to this application example, the dimension of the depth of the first hole is preferably 2 μm to 10 μm in view of the desired thickness of the sealing structure and the like. Further, as for the dimension of the first opening width, when the dimension in which the first hole can be machined is 0.1 μm or more and the dimension of the first opening width exceeds 2 μm, the sealing reliability of the sealing film is reliable. May decrease. From these, by setting the ratio of the depth of the first hole to the width of the first opening to 1 or more and 100 or less, a sealing structure that does not impair the reliability of sealing can be obtained.

[Application Example 6] In the sealing structure described in the above application example, the first hole portion has an aspect ratio of the depth to the first opening width within a range of 2.5 or more and 100 or less. It is preferable to have.

According to this application example, the rigidity of the substrate is further increased by setting the depth of the first hole to 5 μm to 10 μm and setting the aspect ratio to 2.5 or more and 100 or less. It is possible to obtain a sealing structure in which the rigidity of the structure can be obtained in addition to the reliability of the sealing.

[Application Example 7] In the sealing structure described in the above application example, the first hole portion is located in the central portion of the second hole portion in a plan view and is 1 / of the second opening width. It is preferably disposed within an arrangement region having a width of 10.

According to this application example, in the film formation of the sealing film inside the second hole portion, the central portion of the second hole portion in a plan view, which is a portion that is not easily affected by the wall surface of the second hole portion. The first hole is disposed in the arrangement region which is located at 1/10 of the width of the second opening. As a result, when the sealing film that closes the first hole is formed, it is less likely to be affected by the wall surface of the second hole, and the sealing film at the center of the second hole is the peripheral portion. Since the thickness is thicker and more solid than that, the sealing film can be stably formed.

[Application Example 8] In the sealing structure described in the above application example, it is preferable that a hole width adjusting layer is disposed between the sealing film and the inner surface of the first hole portion.

According to this application example, a hole width adjusting layer is provided after forming a first hole portion having a relatively wide opening width, which requires a narrowing of the first opening width as the opening width of the through hole. The desired opening width (first opening width) can be obtained. In this way, the first hole can be easily set to a desired narrow opening width.

[Application Example 9] In the sealing structure described in the above application example, the substrate has a support substrate and an element substrate laminated on the support substrate via an oxide film, and the second hole portion is formed. The support substrate and the oxide film are penetrated, the first hole portion penetrates the element substrate, and the communication portion includes a back surface portion which is a surface of the element substrate on the support substrate side. Is preferable.

According to this application example, the back surface portion where the communication portion between the second hole portion penetrating the support substrate and the oxide film and the first hole portion penetrating the element substrate is the surface of the element substrate on the support substrate side. Therefore, the surface area on which the sealing film that closes the first hole is arranged can be increased, and the bonding strength of the sealing film can be increased, so that the sealing reliability can be improved. can.

[Application Example 10] In the sealing structure described in the above application example, the element substrate has an element adjustment layer on the surface facing the back surface portion, and the first hole portion is the element substrate and the element. It is preferable that it penetrates the adjusting layer.

According to this application example, by providing an element adjusting layer on the surface of the element substrate through which the first hole portion penetrates, it is possible to easily perform processing in consideration of the temperature characteristic of the resonance frequency of the element substrate. It will be possible.

[Application Example 11] The electronic device according to this application example has an internal space that is connected to the substrate, the functional element mounted on the substrate, and can contain the functional element between the substrate. It is characterized by having a sealing structure according to any one of the above application examples, including a lid body to be configured.

According to this application example, the functional element is stored in the internal space composed of the substrate and the lid connected to the substrate, and the storage space can be easily and surely sealed. By applying the structure, it is possible to obtain an electronic device with improved reliability.

[Application Example 12] The electronic device according to the present application example is characterized by including the electronic device described in the above application example.

According to this application example, it is high because it is provided with an electronic device whose reliability is improved by applying a sealing structure that can easily and surely seal the storage space for storing the functional element. It is possible to obtain an electronic device capable of maintaining reliability for a long period of time.

[Application Example 13] The mobile body according to the present application example is characterized by including the electronic device described in the above application example.

According to this application example, it is high because it is provided with an electronic device whose reliability is improved by applying a sealing structure that can easily and surely seal the storage space for storing the functional element. It is possible to obtain a mobile body capable of maintaining reliability for a long period of time.

The schematic plan view which shows the structure of the MEMS element which concerns on 1st Embodiment. FIG. 2 is a schematic cross-sectional view taken along the line P1-P1 of FIG. The enlarged view which shows the Q1 part of FIG. 2A. The enlarged view which shows the Q2 part of FIG. 2A. The enlarged view which shows the example of the plane arrangement of the 1st hole part and the 2nd hole part which constitutes a through hole. The graph which shows the correlation between the "thickness of a film-forming layer" formed in the bottom of a 2nd hole, and "the width of a 2nd opening / the depth of a 2nd hole". It is a diagram for explaining a film defects with a possibility occurring sealing film, enlarged view corresponding to FIG. 2 C. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the manufacturing process of the MEMS element which concerns on this embodiment. The schematic cross-sectional view corresponding to the position of the P1-P1 line of FIG. 1 which shows the structure of the MEMS element which concerns on 2nd Embodiment. The perspective view which shows the structure of the mobile type (or notebook type) personal computer as the electronic device which comprises the MEMS element of this invention. The perspective view which shows the structure of the mobile phone as the electronic device which comprises the MEMS element of this invention. The perspective view which shows the structure of the digital camera as the electronic device which comprises the MEMS element of this invention. The perspective view which shows the structure of the automobile as the moving body which comprises the MEMS element of this invention.

Hereinafter, embodiments embodying the present invention will be described with reference to the drawings. The following is an embodiment of the present invention and does not limit the present invention. In addition, in each of the following figures, in order to make the explanation easy to understand, it may be described on a scale different from the actual one.

(First Embodiment)
[MEMS element]
First, the MEMS element 1 according to the first embodiment will be described with reference to FIGS. 1, 2A, 2B, 2C, and 2D. FIG. 1 is a schematic plan view showing the configuration of the MEMS element 1 according to the first embodiment, and FIG. 2A is a schematic cross-sectional view taken along the line P1-P1 shown in FIG. FIG. 2B is an enlarged view showing a Q1 portion of FIG. 2A. FIG. 2C is an enlarged view showing a Q2 portion of FIG. 2A. FIG. 2D is an enlarged view showing an example of a planar arrangement of the first hole portion and the second hole portion constituting the through hole. Note that FIG. 1 illustrates a state in which the lid portion 5 is removed for convenience of explaining the internal configuration of the MEMS element 1. Further, in FIGS. 2A, 2B, and 2C, the line indicating the background of the cross section is omitted.

As shown in FIGS. 1, 2A, 2B, and 2C, the MEMS element 1 as an example of the electronic device according to the present embodiment airtightly seals the element 20 and has a lid as a lid that can be sealed. The unit 5 includes an SOI (Silicon on Insulator) substrate 10 as a substrate on which the element 20 is formed.

The lid portion 5 as a lid body is made of single crystal silicon or the like, and has a concave cavity 7 that opens on the SOI substrate 10 side. The lid portion 5 is joined to the SOI substrate 10 by bringing the surface on the side where the cavity 7 is provided into contact with the surface on the side where the element 20 of the SOI substrate 10 is formed.

The SOI substrate 10 as a substrate is a substrate in which a silicon layer 11, a BOX (Buried Oxide) layer 12, and a surface silicon layer 13 are laminated in this order. For example, the silicon layer 11 and the surface silicon layer 13 are composed of single crystal silicon, and the BOX layer 12 is composed of a _{silicon oxide layer (SiO 2 and the like).} In this embodiment, the silicon layer 11 corresponds to a support substrate, the BOX layer 12 corresponds to an oxide film, and the surface silicon layer 13 corresponds to an element substrate.

The SOI substrate 10 as a substrate includes an element 20 made of silicon on the surface silicon layer 13, an electrode pad 50 formed on the surface silicon layer 13, and an element electrode and an electrode pad 50 for driving the element 20. A first wire that draws out an electrode to a plurality of wirings 46 (see FIG. 2A, not shown in FIG. 1) and an outer surface 11r that is connected to the electrode pad 50 and is opposite to the side on which the element 20 is formed. A first wiring through hole 52 and a second through hole 52 for forming the wiring electrode 56 and the second wiring electrode 57 and the wiring electrode 58, and the first wiring electrode 56 and the second wiring electrode 57 and the wiring electrode 58. A through hole 54 for wiring and a through hole for airtightly sealing the internal space formed by the cavity 7 of the lid 5 and the cavity 8 formed in the SOI substrate 10 are arranged.

In the present embodiment, a through hole for airtightly sealing the internal space composed of the SOI substrate 10, the lid 5, the cavity 7 of the lid 5, and the cavity 8 formed in the SOI substrate 10. The first hole portion 60 communicating with the second hole portion 62 and the second hole portion 62 constituting the above, and the first hole portion 60 and the second hole disposed on the side of the second hole portion 62. The configuration including at least the first wiring electrode 56 as the first layer of the sealing film that closes the communication portion with the portion 62 corresponds to an example of the sealing structure according to the present invention.

The element 20 has a base portion 21 supported by the BOX layer 12 and a vibrating portion 22 separated from surrounding silicon other than the base portion 21 by a groove 13a on the region from which the BOX layer 12 has been removed. .. The element 20 exemplified in this embodiment has three vibrating portions 22. The silicon layer 11 and the BOX layer 12 at positions facing the vibrating portion 22 are provided with a cavity 8 constituting an internal space. Further, on the upper surface 13f of the surface silicon layer 13 which is the surface of the element 20 on the lid 5 side, silicon is arranged in a predetermined region of the element 20 and an outer peripheral region of a through hole for airtightly sealing the internal space. An element adjusting layer 30 which is an oxide film and a piezoelectric driving unit 40 covering at least a part of the element adjusting layer 30 are provided.

The element adjusting layer 30 is provided to correct the temperature characteristic of the resonance frequency of the vibrating portion 22. Silicon has a resonance frequency that decreases as the temperature rises, while silicon oxide film has a resonance frequency that rises as the temperature rises. Therefore, by disposing the element adjusting layer 30 which is a silicon oxide film on the silicon element 20, the temperature characteristic of the resonance frequency of the composite composed of the vibrating portion 22 of the element 20 and the element adjusting layer 30 is flattened. Can be approached to.

The piezoelectric drive unit 40 includes a first protective film 41, a first electrode 42, a piezoelectric layer 43, and a second electrode 44. In this embodiment, the first electrode 42 and the second electrode 44 correspond to element electrodes.

The first protective film 41 is made of polysilicon that is not doped with impurities, but may be made of amorphous silicon. Further, the first protective film 41 may be a laminated film of polysilicon and amorphous silicon. In the present embodiment, the first protective film 41 is provided so as to cover the element adjusting layer 30 arranged on the element 20. As described above, by having the element adjusting layer 30 between the first protective film 41 and the element 20, the first protective film 41 is an element adjusting layer from the etching of the silicon oxide film around the piezoelectric drive unit 40. 30 can be protected.

The first electrode 42 and the second electrode 44 are arranged so as to sandwich the piezoelectric layer 43. In the example shown in this embodiment, three sets of the first electrode 42, the piezoelectric layer 43, and the second electrode 44 are arranged corresponding to the three vibrating portions 22.

The plurality of wirings 46 are electrically connected to the first electrode 42 and the second electrode 44 so as to vibrate the adjacent vibrating portions 22 in opposite phases. Further, the plurality of wirings 46 are electrically connected to the electrode pads 50, and are adjacent to each other by applying a voltage from the outside via the first wiring electrode 56 and the wiring electrodes 58 between the two electrode pads 50. The matching vibrating portions 22 can be vibrated in opposite phases.

As materials constituting these, for example, the piezoelectric layer 43 is made of aluminum nitride (AlN) or the like, and the first electrode 42 and the second electrode 44 are made of titanium nitride (TiN) or the like. The plurality of wirings 46 and the electrode pads 50 are made of aluminum (Al), copper (Cu), or the like.

When a voltage is applied between the first electrode 42 and the second electrode 44 via the two electrode pads 50, the piezoelectric layer 43 expands and contracts and the vibrating portion 22 vibrates. The vibration is greatly excited at the inherent resonance frequency and the impedance is minimized. As a result, by connecting the MEMS element 1 to the oscillation circuit, it oscillates at an oscillation frequency mainly determined by the resonance frequency of the vibration unit 22.

As shown in FIG. 1, the first wiring through hole 52 is arranged one by one on both sides of the element 20 in the region of the cavity 7 of the lid portion 5 in a plan view, and is an electrode of the surface silicon layer 13. It is arranged at a position overlapping with the pad 50. Further, the second wiring through hole 54 communicates with the first wiring through hole 52 and is arranged in the silicon layer 11 and the BOX layer 12.

The electrode pad 50 is a first wiring electrode 56 arranged in the first wiring through hole 52 and the second wiring through hole 54 at a position overlapping with the first wiring through hole 52 in a plan view. (Second wiring electrode 57) and the wiring electrode 58 are arranged so as to be electrically connected via the wiring 46. Further, the electrode pad 50 is arranged on the surface silicon layer 13 via the element adjusting layer 30, the first protective film 41, and the wiring 46 at a position where the electrode pad 50 does not overlap with the first wiring through hole 52. With such a configuration, the electrode pad 50 is electrically connected to the first wiring electrode 56 (second wiring electrode 57) and the wiring electrode 58, and the first electrode 42 and the second electrode 44 are made of silicon. It can be pulled out to the outer surface 11r on the side opposite to the side on which the element 20 of the layer 11 is formed. The material constituting the first wiring electrode 56 (second wiring electrode 57) and the wiring electrode 58 is made of titanium (Ti), tungsten (W), copper (Cu), or the like. The wiring electrode 56 and the second wiring electrode 57 are a spatter layer formed by a spatter method, the wiring electrode 58 is a plating layer formed by a plating method, and the spatter layer (second wiring electrode 57) is a plating layer. (Wiring electrode 58) are laminated.

The through hole that functions as a sealing hole for airtightly sealing the internal space composed of the cavity 7 of the lid portion 5 and the cavity 8 of the SOI substrate 10 is used as a silicon layer 11 as a support substrate and an oxide film. The second hole portion 62 penetrating the BOX layer 12 and the first hole portion 60 penetrating the surface silicon layer 13 as an element substrate and communicating with the second hole portion 62 are included. .. Hereinafter, the details of the through hole and the sealing structure of the through hole will be described with reference to FIGS. 2C and 2D.

The through hole is arranged in the region of the cavity 7 of the lid portion 5 on the side opposite to the side where the vibrating portion 22 is provided with respect to the base portion 21 in a plan view. The second hole portion 62 constituting the through hole is arranged at a position overlapping with the first hole portion 60 provided in the surface silicon layer 13. Further, the first hole portion 60 constituting the through hole is arranged in the silicon layer 13 so as to communicate with the second hole portion 62.

The second hole portion 62 penetrates the silicon layer 11 and the BOX layer 12 from the outer surface 11r of the silicon layer 11. In the opening opened by the second hole 62 on the side opposite to the outer surface 11r side, the back surface portion 13r of the surface silicon layer 13 included in the communication portion between the first hole portion 60 and the second hole portion 62 is provided. Facing each other. The first hole portion 60 has a substantially rectangular slit-shaped opening shape having a first opening width W1 in the lateral direction and an opening length L in the longitudinal direction in a plan view, and is an internal space of the surface silicon layer 13. The side (cavity 7 side) and the second hole 62 are penetrated so as to be communicated with each other.

As described above, the communication between the second hole portion 62 penetrating the silicon layer 11 as the support substrate and the BOX layer 12 as the oxide film and the first hole portion 60 penetrating the surface silicon layer 13 as the element substrate. Since the portion includes the back surface portion 13r which is the surface of the front surface silicon layer 13 on the silicon layer 11 side, the first wiring electrode 56 described later, which is a sealing film for closing the first hole portion 60, is arranged. The surface area can be increased. As a result, the bonding strength of the sealing film (first wiring electrode 56) can be increased, so that the sealing reliability can be improved.

As shown in FIG. 2D, the first hole 60 has a first opening width W1 smaller than the second opening width (inner diameter) W2 of the second hole 62, and is viewed in plan with the second hole 62. It is arranged at the position where it overlaps with. In the present embodiment, two slit-shaped first hole portions 60 are provided in parallel so as to face each other in the longitudinal direction. In this embodiment, an example in which two first hole portions 60 are arranged is shown, but the present invention is not limited to this, and the number of the first hole portions 60 may be one or more. ..

Further, as shown in FIG. 2D, the first hole portion 60 is located at the central portion of the second hole portion 62 in a plan view, and has a width (inner diameter) W3 that is 1/10 of the second opening width W2. It is preferable that the components are arranged in the arrangement area R having the above. Here, the arrangement region R located at the center of the second hole 62 includes the center G of the second hole 62, and is a region substantially concentric with the second hole 62 centered on the center G. be. A film-forming layer (in this embodiment, corresponding to a sealing film, for example, a first wiring electrode) formed on the bottom of a hole having a large aspect ratio of the hole diameter and the hole width, such as the second hole 62. The thickness of 56) is said to be about 1/2 to 1/10 of the thickness of the film-forming layer formed on the surface around the opening of the hole. FIG. 3 shows the “thickness of the film-forming layer” formed at the bottom of the second hole 62 (the back surface 13r as the communication portion) and the “second opening width W2 / depth of the second hole”. It is a graph showing the correlation with "Sa", and as shown in FIG. 3, for example, when the ratio of the plate thickness and the opening width of the silicon layer 11 in which the second hole 62 is formed is 40%. It can be seen that the thickness of the film-forming layer formed on the bottom of the hole and the thickness of the film-forming layer formed on the surface around the opening of the hole are about 1/10 (10%). The second hole 62 is formed so as to penetrate the silicon layer 11 and the BOX layer 12. Therefore, the depth of the second hole 62 is the sum of the thickness of the film-forming layer formed on the bottom of the hole and the thickness of the film-forming layer formed on the surface around the opening of the hole. Since the thickness of the silicon layer 11 is larger than the thickness of the BOX layer 12 (100 times or more in this example), only the thickness of the silicon layer 11 (plate thickness) was used for the calculation of the ratio with the opening width.

When a sealing film (first wiring electrode 56 or second wiring electrode 57) described later is formed inside the second hole 62 by a sputtering method or the like, the film flies toward the inside of the second hole 62. Due to the influence of the wall surface of the second hole 62, the particles of the metal material tend to adhere to the central portion of the second hole 62, and hardly adhere to the portion close to the wall surface. As a result, the sealing film becomes thicker at the center of the second hole 62. Therefore, the first hole 60 is located in the central portion of the second hole 62 in a plan view, and is located in the arrangement region R having a width (inner diameter) W3 that is 1/10 of the second opening width W2. By arranging the hole 60 of 1, the thickness of the sealing film that closes the first hole 60 can be made thicker than that of the peripheral edge, and the sealing film can be made firm. The enhanced sealing film can be stably configured. In this example, the peripheral edge portion is a portion outside the arrangement region R. Further, in the drawings referred to in the description of the present embodiment, the description of the difference between the film thickness in the central portion and the film thickness in the peripheral portion is omitted for the sealing film in order to avoid the complexity of the drawings.

Further, as shown in FIG. 2C, in the first hole portion 60, the aspect ratio between the depth t, which is the thickness dimension of the surface silicon layer 13 penetrating, and the first opening width W1 is 1 or more and 100. It is preferable that the configuration is within the following range.

The dimension of the depth t of the first hole portion 60 is preferably 2 μm to 10 μm in view of the desired thickness of the sealing structure and the maintenance of the performance of the functional element. Further, in the formation of the first hole portion 60, it is preferable that the dimension of the first opening width W1 of the first hole portion 60 is 0.02 μm or more. However, if the dimension W1 of the first opening width exceeds 2 μm, the size of the holes is too large and the stability related to the formation (deposition) of the sealing film constituting the sealing portion is lowered, and the sealing reliability is lowered. May decrease. In other words, the sealing film (first) that closes the first hole 60 by forming the first hole 60 with the dimension of the first opening width W1 being 0.02 μm or more and 2 μm or less. The wiring electrode 56 and the second wiring electrode 57) can be stably arranged. From these, as described above, by setting the aspect ratio between the depth t and the first opening width W1 to 1 or more and 100 or less, the desired thickness is secured and the reliability of sealing is impaired. It is possible to obtain a sealing structure that does not occur.

The first hole 60 has an aspect ratio of the depth t, which is the thickness dimension of the surface silicon layer 13 to penetrate, and the first opening width W1 within a range of 2.5 or more and 100 or less. It is more preferable to configure it.

In this way, the thickness of the surface silicon layer 13 that can obtain higher rigidity without changing the first opening width W1, that is, the depth t of the first hole 60 is set to 5 μm to 10 μm, and the depth is set. By setting the aspect ratio between t and the first opening width W1 to 2.5 or more and 100 or less, the reliability of sealing can be ensured and the rigidity of the sealing structure can be further increased.

The first opening width W1 of the first hole 60 described above indicates the width (width dimension) of the slit-shaped first hole 60 in the lateral direction, but the long side and the length facing each other. When the sides are not parallel or the long side is not a straight line, the width dimension of the position where the distance between the opposite long side and the long side is the smallest is shown. Further, when the first hole 60 is not slit-shaped, for example, the opening width is circular, the opening width is the diameter of a circle, or when the first hole 60 is not a perfect circle, the opening width indicates the dimension at the position where the distance between the inner peripheral edges is the smallest. It may be that.

As shown in FIGS. 2A and 2C, the inner surface of the first hole 60, the inner surface of the second hole 62, and the back surface 13r of the front surface silicon layer 13 have a silicon oxide film 32 as a hole width adjusting layer. Is provided. Further, a first base layer 56u is disposed on the inner surface (surface) of the silicon oxide film 32. The first hole 60 has a first opening width W1 in order to facilitate film formation when a sealing film (first wiring electrode 56 or second wiring electrode 57) is formed by a sputtering method or the like. However, it is difficult to form a through hole with a narrow opening width. However, by providing the silicon oxide film 32 as the pore width adjusting layer, the first pore portion 60 is formed with a relatively wide opening width, and then the opening width is narrowed by disposing the silicon oxide film 32, which is desired. Can be the opening width (first opening width W1). By arranging the silicon oxide film 32 in this way, the first opening width W1 of the first hole 60 can be easily set to the desired narrow opening width.

A first wiring electrode 56 made of a sputter layer is arranged as a first layer on the surface of the back surface portion 13r of the front surface silicon layer 13 and the surface of the base layer 56u arranged inside the first hole portion 60. Further, a sealing film in which a second wiring electrode 57 made of a sputter layer is laminated as a second layer is disposed on the first wiring electrode 56. Then, the first wiring electrode 56 and the second wiring electrode 57 laminated on the first base layer 56u are composed of the cavity 7 of the lid portion 5 and the cavity 8 formed on the SOI substrate 10. The internal space is airtightly sealed. That is, the sealing film includes a first wiring electrode 56 as a first layer and a second wiring electrode 57 as a second layer. In the second hole 62, a wiring electrode 58 made of a plating layer laminated in the second wiring electrode 57 is arranged.

The first wiring electrode 56 provided as a sealing film on the front surface of the back surface portion 13r of the front surface silicon layer 13 and the inside of the first hole portion 60 has a first opening to the back surface portion 13r of the front surface silicon layer 13. The film is formed so as to close the hole 60 of the above. Here, since the first opening width W1 of the first hole 60 is narrower than the second opening width W2 of the second hole 62, the first wiring electrode 56 makes the first opening width W1. The opening of the hole 60 can be easily closed (sealed). Further, in the film formation of the first wiring electrode 56, since the first opening width W1 of the first hole portion 60 is narrow, the invasion of the film-formed metal into the first hole portion 60 is hindered, and the first hole portion 60 is formed. The wiring electrode 56 of 1 is provided with an embedded portion 56p arranged halfway through the first hole portion 60. As described above, since the embedded portion 56p in which the first wiring electrode 56 is filled is provided in a part of the first hole portion 60, a desired sealing effect can be easily obtained. Further, since the first hole portion 60 has an unfilled portion of the first wiring electrode 56, the stress caused by the difference in the linear expansion coefficient between the surface silicon layer 13 and the first wiring electrode 56 is released. It becomes easy to do so, and it is possible to suppress a decrease in sealing reliability.

In this embodiment, the second wiring electrode 57 as the second layer of the sealing film is laminated inside the first wiring electrode 56 as the first layer of the sealing film. By providing the two layers of the first wiring electrode 56 and the second wiring electrode 57 in this way, the reliability of sealing can be further improved. Hereinafter, this will be described in detail with reference to FIG. Incidentally, FIG. 4 is a diagram for explaining a film defects with a possibility occurring sealing film due to the presence of the first hole portion 60 (first wiring electrode 56), corresponding to FIG. 2 C It is an enlarged view to be done.

As shown in FIG. 4, in the formation of the first wiring electrode 56 as the sealing film described above, as shown in FIG. 4, the first hole portion 60 having one opening in the back surface portion 13r of the front surface silicon layer 13 The film is formed so as to close the film. However, in the film formation of the first wiring electrode 56, it is usually possible to easily form a film so as to close the first hole portion 60, but depending on specific film formation conditions and the like, the first hole portion 60 can be formed. Due to the presence of the above, there is a possibility that a defective portion D as an incomplete portion of the sealing film may be formed on the first wiring electrode 56 at a position overlapping the first hole portion 60. The defective portion D may communicate from the internal space side of the first wiring electrode 56 to the internal space side of the second hole portion 62. In this case, the defective portion D causes the cavity 7 and the cavity 8 to communicate with each other. There is a risk that an air leak phenomenon with the constituent internal space will occur, and the desired airtight sealing cannot be performed.

In order to prevent such a defective portion D from communicating from the first hole portion 60 to the internal space of the second hole portion 62, the space of the second hole portion 62 of the first wiring electrode 56 is used. It is preferable to stack the second wiring electrode 57 on the side, which will be described in detail below. The second wiring electrode 57 provided inside the first wiring electrode 56 can be formed under different film forming conditions from those of the first wiring electrode 56. That is, the film forming conditions of the first wiring electrode 56 and the film forming conditions of the second wiring electrode 57 can be changed.

In other words, when the first wiring electrode 56 and the second wiring electrode 57 as the film forming layer are formed into a film by, for example, a vacuum vapor deposition method or a sputtering method, the temperature conditions and the film forming environment (vacuum degree, etc.) The growth of the crystal grain boundaries of each film-forming layer differs depending on the difference. Therefore, when the layer of the first wiring electrode 56 is arranged on the side of the first hole 60 by providing the film-forming layer including the first wiring electrode 56 and the second wiring electrode 57, the first The defective portion D as an incomplete portion of the film formation that may occur in the first wiring electrode 56 due to the influence of the hole portion 60 of the second wiring electrode 57 is the growth of the crystal grain boundary of the film-forming layer in the second wiring electrode 57. It will be canceled due to a difference and will not occur. As a result, the appearance of defects in the sealing film can be easily suppressed by forming the sealing film into a laminated structure having at least two layers, such as the first wiring electrode 56 and the second wiring electrode 57. Is possible, and the sealing reliability can be further improved.

In addition, between the inner surface of the first hole 60 and the second hole 62 and the first wiring electrode 56, in the present embodiment, on the inner surface of the first hole 60 and the second hole 62. A first base layer 56u is disposed between the provided silicon oxide film 32 and the first wiring electrode 56. By disposing the first base layer 56u in this way, the silicon oxide film 32 disposed on the inner surface of the first hole portion 60 and the second hole portion 62, and the first wiring. Adhesion with the electrode 56 can be improved. That is, the adhesion between the inner surfaces of the first hole 60 and the second hole 62 and the first wiring electrode 56 as the first layer can be improved, and the reliability of sealing is improved. be able to.

Further, by providing the first base layer 56u having different film forming conditions from the first wiring electrode 56, a sealing film (which may be affected by the first hole 60 and may be formed on the first wiring electrode 56). The appearance of defects in the metal layer) can be suppressed, and a desired sealing effect can be obtained even in a configuration in which the first wiring electrode 56 is provided as the sealing film.

Further, a second base layer 57u is disposed between the first wiring electrode 56 and the second wiring electrode 57. By disposing the second base layer 57u in this way, the adhesion between the first wiring electrode 56 and the second wiring electrode 57 can be improved, and the first hole portion 60 is affected. Therefore, it is possible to prevent the influence of the defect of the sealing film (metal layer) that may occur on the first wiring electrode 56 on the second wiring electrode 57.

The material constituting the first base layer 56u and the second base layer 57u is a metal such as titanium (Ti), tungsten (W), nickel (Ni), chromium (Cr), or titanium-tungsten (TiW). ) And other alloys. The first base layer 56u and the second base layer 57u can be formed by a sputtering method, a vapor deposition method, or the like.

As described above, according to the MEMS element 1 having the sealing structure according to the present embodiment, the second hole portion 62 and the second opening width W2 of the second hole portion 62 are narrower than those of the second hole portion 62. A first wiring electrode in which the opening of the first hole 60 is a sealing film disposed on the second hole 62 side in the communication portion with the first hole 60 having the opening width W1 of 1. It is sealed by 56, or a first wiring electrode 56 and a second wiring electrode 57. In this way, the sealing film disposed on the side of the second hole 62 can easily close (seal) the opening of the first hole 60 having the narrow first opening width W1. Further, in the film formation of the first wiring electrode 56 as the sealing film, since the first opening width W1 is narrow, the invasion of the film-formed metal into the first hole 60 is hindered. As a result, the first wiring electrode 56 is arranged halfway through the first hole portion 60 (the embedded portion 56p shown in FIG. 2C), and the first wiring electrode 56 is provided in a part of the first hole portion 60. Since it is filled, the desired sealing effect can be easily obtained. Further, since the first hole portion 60 has an unfilled portion of the first wiring electrode 56, the stress caused by the difference in the linear expansion coefficient between the surface silicon layer 13 and the first wiring electrode 56 is released. Since the influence of stress related to sealing can be reduced, it is possible to suppress a decrease in sealing reliability. As described above, it is possible to provide the MEMS element 1 having a sealing structure capable of easily realizing airtight sealing of the internal space.

Further, since the silicon layer 11 and the BOX layer 12 are provided with the second hole portion 62 communicating with the first hole portion 60, the mechanical strength of the surface silicon layer 13 on which the element 20 is formed is increased. The internal space can be sealed in this state. Further, after joining the surface silicon layer 13 and the lid portion 5, the internal space can be hermetically sealed, which facilitates manufacturing without the need for expensive equipment.

Further, since the first hole 60 is sealed by the same metal layer as the first wiring electrode 56, the first wiring is made in the first wiring through hole 52 and the second wiring through hole 54. When the electrode 56 is arranged, the first hole 60 can be closed at the same time, and the internal space can be sealed in an airtight space, for example, a vacuum atmosphere (decompression atmosphere).

In the embodiment of the present specification, the first wiring electrode 56 as the first layer and the second wiring electrode 57 as the second layer are laminated as the sealing film of the first hole 60. Although the description has been made with the configuration of the two metal layers, the present invention is not limited to this. As the sealing structure of the first hole portion 60, the first wiring electrode 56 (first wiring electrode 56) as the first layer without providing the second wiring electrode 57 as the sealing film of the first hole portion 60. The first hole 60 may be hermetically sealed only by (including the base layer 56u of 1).

Further, both the first base layer 56u and the second base layer 57u do not have to be provided, and at least one of the first base layer 56u and the second base layer 57u is provided. May be good.

[Production method]
Next, the manufacturing process of the MEMS element 1 including the sealing structure according to the present embodiment will be described with reference to FIGS. 5A to 5R. 5A-5R are schematic cross-sectional views corresponding to the positions of the P1-P1 lines of FIG. 1 showing the manufacturing process of the MEMS element 1 according to the present embodiment. The line indicating the background of the cross section is omitted.

First, as a preparatory step, a lid portion 5 having an SOI substrate 10 and a cavity 7 in which a silicon layer 11, a BOX layer 12, and a surface silicon layer 13 are laminated in this order is prepared (see FIG. 2A). The SOI substrate 10 may be manufactured by forming the BOX layer 12 on the silicon layer 11 and forming the surface silicon layer 13 on the BOX layer 12.

In the first step, as shown in FIG. 5A, a trench in the surface silicon layer 13 of the SOI substrate 10 that separates the region to be the vibrating portion 22 of the element 20 from the surrounding silicon other than the region to be the base 21 of the element 20. 13b and the first hole 60 are formed. At that time, the slit 13c may be formed in the region separated from the vibrating portion 22 of the element 20 by the trench 13b of the surface silicon layer 13 of the SOI substrate 10. By providing such a slit 13c, it is possible to facilitate later release etching of silicon around the vibrating portion 22 in a wide region of the groove 13a (see FIG. 1).

The trench 13b and the first hole 60 are formed by applying a resist 14 on the surface silicon layer 13, forming a mask pattern by a photolithography method, and etching the surface silicon layer 13 using the resist 14 as a mask. As shown in FIG. 5A, a trench 13b and a first hole portion 60 are formed in the surface silicon layer 13 to separate the region serving as the vibrating portion 22 of the element 20 from the surrounding silicon other than the region serving as the base portion 21 of the element 20. do. A silicon oxide film is formed by thermally oxidizing the surface of the surface silicon layer 13 of the SOI substrate 10, a mask made of the silicon oxide film is formed by a photolithography method, and the surface silicon layer 13 is etched to form a trench. 13b and the first hole 60 may be formed.

In the second step, as shown in FIG. 5B, the element adjusting layer 30 which is a silicon oxide film is formed on the upper surface of the surface silicon layer 13, the side wall in the trench 13b, and the side wall in the first hole 60. For example, by thermally oxidizing the surface silicon layer 13 of the SOI substrate 10, a thermal oxide film (silicon oxide film) is formed on the upper surface of the surface silicon layer 13, the side wall in the trench 13b, and the side wall in the first hole 60. It is formed. The thickness of the thermal oxide film is, for example, about 0.2 μm to 0.3 μm. This thermal oxide film serves as a protective wall that protects the vibrating portion 22 and the piezoelectric driving portion 40 from the release etching of silicon around the vibrating portion 22 that is performed later.

Next, a silicon oxide film that fills the trench 13b of the surface silicon layer 13 and the first hole 60 is formed by a CVD (Chemical Vapor Deposition) method. At that time, even if "su" is generated in the silicon oxide film in the trench 13b and the first hole 60, there is no problem because the thermal oxide film is strong. Further, since the trench 13b and the first hole 60 of the surface silicon layer 13 formed by the processing are filled with the silicon oxide film and the surface becomes almost flat, the adverse effect due to the step on the subsequent photolithography process is eliminated. can do.

Therefore, the thermal oxide film formed by thermally oxidizing the surface silicon layer 13 and the silicon oxide film formed by the CVD method form the element adjusting layer 30 shown in FIG. 2A. In the second step, a silicon oxide film may be formed by a thermal CVD method without forming a thermal oxide film, or silicon may be formed by a two-step CVD method of a thermal CVD method and a plasma CVD method. An oxide film may be formed.

In the third step, a resist is applied on the element adjusting layer 30 to form a mask pattern that protects a predetermined area such as the element 20 including the first hole portion 60 and the vibrating portion 22 by a photolithography method. By etching the element adjusting layer 30 with the resist as a mask, a trench 13d reaching the surface silicon layer 13 is formed. After that, as shown in FIG. 5C, the first protective film 41 is formed on the upper surface of the element adjusting layer 30 and the trench 13d by the CVD method.

In the fourth step, a resist is applied on the first protective film 41, a mask pattern is formed by a photolithography method, and the first protective film 41 is etched using the resist as a mask. As a result, as shown in FIG. 5D, the first protective film 41 is formed in the region including the side surface of the element adjusting layer 30 formed in the predetermined region of the element 20 including the vibrating portion 22.

The first protective film 41 covers the element adjusting layer 30 with the element 20, and the thickness of the first protective film 41 is, for example, about 0.2 μm. Since the embedding property of the first protective film 41 by the CVD method is good, the strong first protection that protects the element adjusting layer 30 from the release etching of the silicon oxide film around the vibrating portion 22 and the piezoelectric driving portion 40 that is performed later. The wall of the film 41 can be formed with a small thickness.

In the fifth step, as shown in FIG. 5E, the first electrode 42, the piezoelectric layer 43, and the second electrode 44 are placed on the first protective film 41 formed in a predetermined region of the element 20. It is formed by the photolithography method in this order. The first protective film 41 to the second electrodes 44 constitute the piezoelectric drive unit 40. Further, when forming the first electrode 42 and the second electrode 44, the wiring 46 for connecting the first electrode 42 and the electrode pad 50 and the second electrode 44 and the electrode pad 50 are connected. Wiring 46 for this is also formed at the same time.

In the sixth step, the silicon oxide film 33 is formed on the SOI substrate 10 on which the piezoelectric drive unit 40 is formed by the CVD method. After that, as shown in FIG. 5F, a mask pattern in which the position where the electrode pad 50 is formed is opened is formed by a photolithography method, and aluminum (Al) or copper (Cu) or the like is formed by a sputtering method using the silicon oxide film 33 as a mask. A film is formed at a position where the electrode pad 50 is formed, and the electrode pad 50 is formed.

In the seventh step, as shown in FIG. 5G, the silicon oxide film 34 is formed on the SOI substrate 10 on which the electrode pad 50 and the silicon oxide film 33 are formed by the CVD method. After that, a resist is applied on the silicon oxide film 34, a mask pattern is formed by a photolithography method, and the silicon oxide film 34 is etched using the resist as a mask. As a result, the silicon oxide film 34 in which a predetermined region corresponding to the trench 13d reaching the surface silicon layer 13 opens is formed.

In the eighth step, as shown in FIG. 5H, a resist 16 is applied onto the silicon oxide film 34, a mask pattern is formed by a photolithography method, and the resist 16 is used as a mask to form a silicon oxide film 34 corresponding to the trench 13d. , The element adjustment layer 30 and the BOX layer 12 are etched in this order. As a result, the depth reaches the silicon layer 11 in a shape that surrounds the vibrating portion 22 while leaving the silicon oxide film 34 and the element adjusting layer 30 that protect the vibrating portion 22, the piezoelectric driving portion 40, and the electrode pad 50. Form an opening. At this time, the trench 13d facing the surface silicon layer 13 and the first protective film 41 formed on the trench 13d protect the vibrating portion 22, the piezoelectric driving portion 40, and the like from side etching by the etching solution. Has a function as a protective film.

In the ninth step, as shown in FIG. 5I, after the resist 16 is peeled off, the silicon around the vibrating portion 22 is removed through the openings of the silicon oxide film 34, the element adjusting layer 30, the surface silicon layer 13, and the BOX layer 12. Etch (release etching). At that time, a part of the silicon of the silicon layer 11 is etched to form the cavity 8 in the silicon layer 11 below the vibrating portion 22. In the ninth step, wet etching is performed, and for example, TMAH (tetramethylammonium hydroxide) is used as the etching solution.

In the tenth step, as shown in FIG. 5J, the vibrating portion 22, the piezoelectric drive portion 40, the electrode pad 50, the silicon oxide film 34 around the first hole portion 60, the element adjusting layer 30, and the BOX layer 12 are etched. Be done (release etching). As a result, the element adjusting layer 30 remains on the vibrating portion 22. In the tenth step, wet etching is performed, and for example, BHF (buffered hydrofluoric acid) is used as the etching solution. After that, a surface having the cavity 7 of the lid portion 5 is arranged on the surface (upper surface of the surface silicon layer 13) on which the element 20 of the SOI substrate 10 is formed, and the surface is joined. As a joining method, there are a direct joining method in which the joining surface is activated, a method using a joining member such as low melting point glass, and the like.

In the eleventh step, as shown in FIG. 5K, a second wiring through hole 54 and a second hole portion 62 are formed in the silicon layer 11 and the BOX layer 12 of the SOI substrate 10. The second wiring through hole 54 and the second hole portion 62 are formed by thermally oxidizing the surface of the SOI substrate 10 on the side opposite to the side where the BOX layer 12 is arranged. The oxide film 36 is formed, a mask made of the silicon oxide film 36 is formed by a photolithography method, and the silicon layer 11 and the BOX layer 12 are etched.

In the twelfth step, as shown in FIG. 5L, the film resist 18 is attached onto the silicon oxide film 36, a pattern for opening the second wiring through hole 54 is formed by a photolithography method, and the surface silicon layer 13 is formed. Etching is performed to form the first wiring through hole 52.

In the thirteenth step, as shown in FIG. 5M, after removing the film resist 18, the element adjusting layer 30 exposed to the first wiring through hole 52 and the first hole portion 60 is etched.

In the fourteenth step, as shown in FIG. 5N, the surface of the silicon layer 11 opposite to the side on which the BOX layer 12 is arranged, the first wiring through hole 52, and the second wiring are used by the CVD method. A silicon oxide film 32 is formed on the through hole 54, the side wall in the first hole 60 and the second hole 62. After that, the silicon oxide film 32 formed on the first protective film 41 of the first wiring through hole 52 and the first hole 60 is anisotropy such as reactive ion etching (RIE). Removed by sex dry etching.

In the fifteenth step, as shown in FIG. 5O, in a pretreatment chamber such as a sputtering apparatus, a first exposed through hole 52 for wiring and a first hole 60 in a vacuum (decompression) atmosphere. The protective film 41 is etched. As a result, the first protective film 41 on the first wiring through hole 52 is removed, and the wiring 46 is exposed in the first wiring through hole 52. Further, the first protective film 41 on the first hole 60 is removed, and a through hole is created in the first protective film 41 on the first hole 60. After that, the internal space composed of the cavities 7 and 8 is set to the same pressure as the pretreatment chamber, and titanium becomes the first base layer 56u (not shown in FIG. 5O: see FIGS. 2B and 2C) by continuous treatment. Metal layers such as (Ti), tungsten (W), nickel (Ni), chromium (Cr), titanium-tungsten (TiW), and titanium (Ti), tungsten (W), and copper as the first wiring electrode 56. Sputter a metal layer such as (Cu).

In the sixteenth step, as shown in FIG. 5P, the internal space further composed of the cavities 7 and 8 has a pressure equivalent to that of the pretreatment chamber, and the surface of the first wiring electrode 56 is subjected to continuous treatment. Metals such as titanium (Ti), tungsten (W), nickel (Ni), chromium (Cr), and titanium-tungsten (TiW) that form the base layer 57u (not shown in FIG. 5P: see FIGS. 2B and 2C) of 2. The layer and the metal layer such as titanium (Ti), tungsten (W), and copper (Cu) to be the second wiring electrode 57 are sputtered.

The first wiring electrode 56 connected to the first electrode 42 and the second electrode 44 on the outer surface 11r of the silicon layer 11 opposite to the side on which the element 20 is formed by the fifteenth and sixteenth steps. And a wiring electrode including a second wiring electrode 57 can be formed. Further, in this step, since the first wiring electrode 56 and the second wiring electrode 57 close the first hole portion 60, the internal space formed by the cavities 7 and 8 in which the element 20 is formed is evacuated. It can be sealed in an atmosphere (vacuum atmosphere). Therefore, the step of forming the first wiring electrode 56 and the second wiring electrode 57 in the first wiring through hole 52 and the second wiring through hole 54, and the first wiring electrode 56 and the second wiring. The step of closing the first hole 60 with the electrode 57 and airtightly sealing the internal space can be performed at the same time.

In the 17th step, as shown in FIG. 5Q, a metal layer equivalent to the metal layer used for the second wiring electrode 57 is laminated on the surface of the second wiring electrode 57 by a plating method or the like to prepare the wiring electrode 58. do. By completely closing the first wiring through hole 52, the second wiring through hole 54, and the second hole portion 62, the airtight sealing property, the continuity, the mechanical strength, and the reliability are improved. do. It can be said that the first wiring electrode 56 and the second wiring electrode 57 are a sputter layer, and the wiring electrode 58 is a plating layer.

In the eighteenth step, as shown in FIG. 5R, the surface of the SOI substrate 10 opposite to the surface to which the lid 5 is joined is flattened by a polishing device or the like to improve the airtight sealing property. A highly reliable MEMS element 1 having a sealing structure is completed.

In the above description of the manufacturing method, the two film forming layers of the first wiring electrode 56 (including the first base layer 56u) and the second wiring electrode 57 (including the second base layer 57u) are provided. Although the step of providing is illustrated and described, the present invention is not limited to this. The film forming layer may be one, and in that case, the above-mentioned 16th step becomes unnecessary, and in the above-mentioned 15th step, the first wiring electrode 56 (first base layer) is used as the film forming layer. 56u) may be formed, and then the process may proceed to the above-mentioned 17th step.

(Second Embodiment)
[MEMS element]
Next, the MEMS element 1a according to the second embodiment of the present invention will be described with reference to FIG. FIG. 6 is a schematic cross-sectional view corresponding to the position of the P1-P1 line in FIG. 1 showing the configuration of the MEMS element 1a according to the second embodiment. The differences from the above-described embodiments will be mainly described, and the same reference numerals are given to the same configurations, and the description thereof will be omitted for the same matters.

The MEMS element 1a as an example of the electronic device according to the second embodiment has a different structure between the second wiring through hole 54a and the second hole portion 62a as compared with the MEMS element 1 according to the first embodiment. ..

In the MEMS element 1a of the present embodiment, as shown in FIG. 6, the second wiring through hole 54a and the second hole portion 62a arranged in the silicon layer 11 and the BOX layer 12 are formed in the silicon layer 11 and the BOX. The surface of the layer 12 has a tapered portion extending toward a surface facing the surface supporting the silicon layer 13. In the present embodiment, the tapered portion is provided on the silicon layer 11 and the BOX layer 12, but the silicon layer 11 alone may be used. Further, it may be provided from the middle of the silicon layer 11.

As described above, according to the MEMS element 1a according to the present embodiment, since the second wiring through hole 54a has a tapered portion extending toward the surface facing the surface silicon layer 13, the first The first wiring electrode 56 can be easily arranged in the wiring 46 connected to the wiring through hole 52 and the electrode pad 50. Further, since the second hole portion 62a has a similar tapered portion, the first wiring electrode 56 serving as a sealing film reaches the first hole portion 60, which facilitates sealing.

Also in the MEMS element 1a according to the present embodiment, as a sealing film disposed in the second wiring through hole 54a and the second hole portion 62a, in addition to the first wiring electrode 56, the above-mentioned description is performed. Similar to the first embodiment, the second wiring electrode 57 can be provided. Further, it is possible to have a configuration in which at least one of the first base layer 56u and the second base layer 57u is provided.

[Electronics]
Next, an electronic device to which the MEMS elements 1 and 1a according to the embodiment of the present invention are applied will be described with reference to FIGS. 7, 8 and 9. In the following, a configuration to which the MEMS element 1 is applied will be described as an example.

FIG. 7 is a perspective view showing an outline of the configuration of a mobile (or notebook) personal computer as an electronic device including the MEMS element 1 according to the present embodiment. In this figure, the personal computer 1100 is composed of a main body portion 1104 provided with a keyboard 1102 and a display unit 1106 provided with a display 1000, and the display unit 1106 rotates with respect to the main body portion 1104 via a hinge structure portion. It is supported as much as possible. Such a personal computer 1100 has a built-in MEMS element 1 that functions as a reference clock or the like.

FIG. 8 is a perspective view showing an outline of the configuration of a mobile phone (including a PHS (Personal Handyhone System) and a smartphone) as an electronic device including the MEMS element 1 according to the embodiment of the present invention. In this figure, the mobile phone 1200 includes a plurality of operation buttons 1202, earpiece 1204, and earpiece 1206, and a display 1000 is arranged between the operation button 1202 and the earpiece 1204. Such a mobile phone 1200 has a built-in MEMS element 1 that functions as a reference clock or the like.

FIG. 9 is a perspective view showing an outline of the configuration of a digital steel camera as an electronic device including the MEMS element 1 according to the embodiment of the present invention. It should be noted that this figure also briefly shows the connection with an external device. The digital still camera 1300 generates an image pickup signal (image signal) by photoelectrically converting an optical image of a subject by an image pickup device such as a CCD (Charge Coupled Device).

A display 1000 is provided on the back surface of the case (body) 1302 of the digital still camera 1300, and is configured to display based on an image pickup signal by a CCD. The display 1000 serves as a finder for displaying a subject as an electronic image. Function. Further, on the front side (back side in the drawing) of the case 1302, a light receiving unit 1304 including an optical lens (imaging optical system), a CCD, and the like is provided.

In the digital still camera 1300, when the photographer confirms the subject image displayed on the display 1000 and presses the shutter button 1306, the image pickup signal of the CCD at that time is transferred and stored in the memory 1308. Further, in the digital still camera 1300, a video signal output terminal 1312 and an input / output terminal 1314 for data communication are provided on the side surface of the case 1302. Then, as shown in the figure, a television monitor 1330 is connected to the video signal output terminal 1312, and a personal computer 1340 is connected to the input / output terminal 1314 for data communication, respectively, as needed. Further, the image pickup signal stored in the memory 1308 is output to the television monitor 1330 or the personal computer 1340 by a predetermined operation. Such a digital still camera 1300 has a built-in MEMS element 1 that functions as a reference clock or the like.

As described above, by utilizing the highly reliable MEMS element 1 for the electronic device, it is possible to provide a higher performance electronic device.

In addition to the personal computer 1100 (mobile personal computer) in FIG. 7, the mobile phone 1200 in FIG. 8, and the digital still camera 1300 in FIG. 9, the MEMS element 1 according to the embodiment of the present invention is, for example, an inkjet. Ejection device (for example, inkjet printer), laptop personal computer, TV, video camera, car navigation device, pager, electronic notebook (including communication function), electronic dictionary, calculator, electronic game device, workstation, videophone , Security TV monitors, electronic binoculars, POS (Point of Sale) terminals, medical equipment (eg electronic thermometers, blood pressure monitors, blood glucose meters, electrocardiogram measuring devices, ultrasonic diagnostic devices, electronic endoscopes), fish finder, various types It can be applied to electronic devices such as measuring devices, instruments (for example, instruments for vehicles, aircraft, and ships), flight simulators, and the like.

[Mobile]
Next, a moving body to which the MEMS elements 1 and 1a according to the embodiment of the present invention are applied will be described with reference to FIG. FIG. 10 is a perspective view schematically showing an automobile 1400 as an example of the moving body of the present invention. In the following, a configuration to which the MEMS element 1 is applied will be described as an example.

The MEMS element 1 is mounted on the automobile 1400. The MEMS element 1 includes a keyless entry, an immobilizer, a navigation system, an air conditioner, an antilock braking system (ABS), an airbag, a tire pressure monitoring system (TPMS), an engine control, a hybrid vehicle, and electricity. It can be widely applied to an electronic control unit (ECU) 1410 such as a battery monitor of an automobile and a vehicle body attitude control system.

As described above, by utilizing the highly reliable MEMS element 1 for the moving body, it is possible to provide a moving body having higher performance.

The MEMS element 1, 1a, the electronic device (1100, 1200, 1300), and the moving body (1400) of the present invention have been described above based on the illustrated embodiments, but the present invention is limited thereto. Instead, the configuration of each part can be replaced with any configuration having similar functions. Further, any other constituent may be added to the present invention. In addition, each of the above-described embodiments may be combined as appropriate.

Further, in the above-described embodiment, the element 20 is described in an example in which the element 20 is arranged so that the base portion 21 and the vibrating portion 22 extend along the diagonal direction of one of the rectangular SOI substrates 10 in a plan view. However, it is not limited to this. As another example of arrangement, in a plan view, the element 20 is arranged so that the base portion 21 and the vibrating portion 22 extend along the outer edge of any one of the rectangular SOI substrates 10. It is also good.

Further, in the above description, as an example of the electronic device, the MEMS elements 1 and 1a including the element 20 as a functional element including the base 21 and the vibrating unit 22 have been described, but the present invention is not limited to this. Other electronic devices having the above-mentioned sealing structure include an acceleration sensor element having an acceleration detection function as a functional element, an angular velocity sensor element having an angular velocity detection function, and a pressure having a pressure detection function. It may be a MEMS element (sensor device) including a sensor element, a weight sensor element having a weight detection function, a composite sensor in which these functional elements are combined, and the like. Further, the electronic device may be an oscillator, an oscillator, a frequency filter or the like having a vibration element as a functional element.

1,1a ... MEMS element as an electronic device, 5 ... lid as a lid, 7,8 ... cavity, 10 ... SOI substrate as a substrate, 11 ... silicon layer as a support substrate, 11r ... outer surface, 12 ... BOX layer as an oxide film, 13 ... Surface silicon layer as an element substrate, 13a ... Groove, 13b ... Trench, 13c ... Slit, 13f ... Top surface, 13r ... Back surface portion, 14, 16 ... Resist, 18 ... Film resist, 20 ... element, 21 ... base, 22 ... vibrating part, 30 ... element adjustment layer, 32, 33, 34, 36 ... silicon oxide film, 40 ... piezoelectric drive unit, 41 ... first protective film, 42 ... first electrode , 43 ... piezoelectric layer, 44 ... second electrode, 46 ... wiring, 50 ... electrode pad, 52 ... first wiring through hole, 54, 54a ... second wiring through hole, 56 ... sealing film First wiring electrode as the first layer, 56p ... Embedded portion, 56u ... First base layer, 57 ... Second wiring electrode as the second layer of the sealing film, 57u ... Second bottom Formation, 58 ... Wiring electrode, 60 ... First hole, 62, 62a ... Second hole, 1000 ... Display, 1100 ... Personal computer, 1200 ... Mobile phone, 1300 ... Digital steel camera, 1400 ... Automobile, W1 ... First opening width, W2 ... Second opening width, W3 ... Width (inner diameter), R ... Arrangement region, D ... Defect portion.

Claims (12)

With the board
With a through hole penetrating the substrate,
The through hole is
The second hole and the first hole communicating with the second hole and having a first opening width narrower than the second opening width of the second hole are included.
The communication portion between the first hole portion and the second hole portion is sealed by a sealing film disposed on the second hole portion side .
The sealing membrane comprises a first layer and a second layer.
A sealing structure characterized in that a second base layer is disposed between the first layer and the second layer. Wherein the first hole portion of the inner surface, between said first layer, the sealing structure according to claim 1, wherein the first base layer is disposed. The sealing structure according to claim 2 , wherein a hole width adjusting layer is disposed between the sealing film and the inner surface of the first hole portion. The first hole portion is according to any one of claims 1 to 3 , wherein the aspect ratio between the depth and the first opening width is within the range of 1 or more and 100 or less. The sealing structure described. The sealing structure according to claim 4 , wherein the first hole portion has an aspect ratio of the depth to the first opening width within a range of 2.5 or more and 100 or less. It is determined that the first hole portion is located in the central portion of the second hole portion in a plan view and is arranged in an arrangement region having a width of 1/10 of the second opening width. The sealing structure according to any one of claims 1 to 5, which is characteristic. The substrate has a support substrate and an element substrate laminated on the support substrate via an oxide film.
The second hole penetrates the support substrate and the oxide film, and penetrates the support substrate and the oxide film.
The first hole portion penetrates the element substrate and penetrates.
The sealing structure according to any one of claims 1 to 6 , wherein the communication portion includes a back surface portion which is a surface of the element substrate on the support substrate side. With the board
With a through hole penetrating the substrate,
The through hole is
It communicates with the second hole and the second hole, and is narrower than the second opening width of the second hole.
Includes a first hole with a first opening width
A sealing film in which the communication portion between the first hole portion and the second hole portion is arranged on the second hole portion side.
Is sealed by
The substrate has a support substrate and an element substrate laminated on the support substrate via an oxide film.
,
The second hole penetrates the support substrate and the oxide film, and penetrates the support substrate and the oxide film.
The first hole portion penetrates the element substrate and penetrates.
The communication portion includes a back surface portion which is a surface of the element substrate on the support substrate side.
A sealing structure characterized by that. The element substrate has an element adjusting layer on the surface facing the back surface portion.
The sealing structure according to claim 7 or 8 , wherein the first hole portion penetrates the element substrate and the element adjusting layer. With the board
The functional elements mounted on the substrate and
A lid that is connected to the substrate and constitutes an internal space in which the functional element can be enclosed between the substrate and the substrate is included.
An electronic device comprising the sealing structure according to any one of claims 1 to 9. An electronic device comprising the electronic device according to claim 10. A mobile body comprising the electronic device according to claim 10.

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