JP7084050B2 - Pachinko machine - Google Patents

Description

The present invention relates to a gaming machine that determines by lottery whether or not to give a gaming benefit to a player.

In a slot machine as a gaming machine, a winning combination is drawn in response to a bet of a medal (game medium) and an operation of a start switch by a player, and a plurality of reels on which various symbols are written are rotated. Then, the reels are sequentially stopped according to the lottery result and the operation of the stop switch by the player, and when the symbol combination corresponding to the winning combination is displayed on the effective line on the line to be paid out, the predetermined number of reels is displayed. A game profit (hereinafter, simply referred to as a game profit) will be given to the player, such as the medals being paid out.

In such a gaming machine, it is desired to effectively utilize a finite storage area in the memory in order to improve the playability. For example, a technique is known in which a control value is associated with control information of a data set table and a memory is effectively used (for example, Patent Document 1).

Japanese Unexamined Patent Publication No. 2016-214339

In the gaming machine, a program related to the gaming control process for controlling the progress of the game must be arranged in the used area (control area 4.5 kbytes + data area 3.0 kbytes) in the ROM of the main control board. However, when a winning type including a winning combination with a large game profit (selected winning combination) is won, the operation mode of the stop switch, which is a winning condition for the selected winning combination, is notified to correspond to the selected winning combination. When the main control board manages the AT effect state in which the so-called AT (assist time) is executed, in which the player can easily display the symbol combination to be performed on the effective line, or the reel unit is used in various modes. When the so-called reel effect rotated by the main control board is managed by the main control board, the processing may put pressure on the used area, particularly the control area.

In view of such a problem, it is an object of the present invention to provide a gaming machine capable of securing a capacity of a control area for performing a gaming control process.

In order to solve the above problems, the gaming machine of the present invention controls the rotation of a plurality of reels and stops and controls the reels corresponding to the operated stop switches in response to the operation of any of the plurality of stop switches. Then, regarding the operation of the predetermined stop switch, the stop reel information indicating the reel whose stop is controlled in response to the operation of the stop switch and the processing reel information indicating the stop switch being operated are used. Based on this, a logical operation is executed, and an operation value, which is a one-digit value that can specify the operation order in which the stop switch is operated, is derived.

By bit-manipulating the operation value, a first stop value that can identify the first operated stop switch may be derived.

According to the present invention, it is possible to secure the capacity of the control area for performing the game control process.

It is an external view for demonstrating the schematic mechanical structure of a slot machine. It is an external view with the front door open for explaining the schematic mechanical structure of a slot machine. It is a figure explaining the symbol arrangement and effective line of a reel. It is a block diagram which showed the schematic electric structure of a slot machine. It is explanatory drawing for demonstrating the winning combination. It is a figure which shows the lottery table of a winning type. It is a figure which shows the lottery table of a winning type. It is explanatory drawing for demonstrating transition of a game state. It is explanatory drawing for demonstrating transition of a staging state. It is a flowchart explaining the CPU initialization process in a main control board. It is a flowchart explaining the cold start process in a main control board. It is a flowchart explaining the error stop processing in a main control board. It is a flowchart explaining the setting value switching process in a main control board. It is a flowchart explaining the initialization start process in a main control board. It is a flowchart explaining the state return process in a main control board. It is a flowchart explaining the game start process in a main control board. It is a flowchart explaining the game medal insertion process in the main control board. It is a flowchart explaining the internal lottery process in a main control board. It is a flowchart explaining the symbol code setting process in a main control board. It is a flowchart explaining the execution flag setting process in the main control board 200. It is a flowchart explaining the non-advantageous section processing executed in the module execution processing by state. It is a flowchart explaining the normal staging state process which is executed in the module execution process by state. It is a flowchart explaining the CZ staging state process which is executed in the module execution process for each state. It is a flowchart explaining the non-advantageous standby effect state process and the advantageous standby effect state process executed in the module execution process for each state. It is a flowchart explaining the process during rotation of a rotating cylinder in a main control board. It is a flowchart explaining the rotation cylinder stop processing in a main control board. It is a flowchart explaining the display determination process in a main control board. It is a flowchart explaining the payout process in a main control board. It is a flowchart explaining the game transition process in a main control board. It is a flowchart explaining the normal AT staging state process which is executed in the module execution process by state. It is a flowchart explaining the evacuation process at the time of power-off in a main control board. It is a flowchart explaining the timer interrupt processing in a main control board. It is a figure for demonstrating the electrical connection around the main CPU. It is a block diagram which showed the internal structure of a CPU core. It is a figure explaining the structure of a register. It is explanatory drawing which shows the memory map. It is explanatory drawing for demonstrating the change mode of the stop rotation bit. It is a flowchart which showed the specific process of a SET_REL module. It is a figure which showed an example of the specific command of the SET_REL module. It is explanatory drawing explaining the derivation mode of the operation value based on the batting order. It is a figure which showed the basis of operation value derivation. It is a figure which showed an example of the specific command for deriving the 1st stop value. It is explanatory drawing explaining the derivation mode of the 1st stop value based on an operation value.

Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The dimensions, materials, other specific numerical values, etc. shown in the embodiment are merely examples for facilitating the understanding of the invention, and do not limit the present invention unless otherwise specified. In the present specification and the drawings, elements having substantially the same function and configuration are designated by the same reference numerals to omit duplicate description, and elements not directly related to the present invention are not shown. do.

(Mechanical configuration of slot machine 100)
As shown in the external views of FIGS. 1 and 2, the slot machine 100 as a gaming machine has a housing 102 having an open front surface and a front surface rotatably arranged vertically on one end of the front surface of the housing 102. An upper door 104 and a front lower door 106 are provided. A colorless and transparent design display window 108 made of a glass plate, a transparent resin plate, or the like is provided in the lower center of the front upper door 104 at a position corresponding to the design display window 108 in the housing 102. Three reels 110 (left reel 110a, middle reel 110b, right reel 110c) are provided independently and rotatably. As shown in the symbol arrangement of FIG. 3A, a plurality of types of symbols are arranged in each region equally divided into 20 on the outer peripheral surfaces of the left reel 110a, the middle reel 110b, and the right reel 110c. Through the symbol display window 108, the player can visually recognize three consecutive symbols of the left reel 110a, the middle reel 110b, and the right reel 110c located in the upper, middle, and lower stages, for a total of nine symbols.

An operation unit installation table 112 is formed on the upper part of the front lower door 106, and the operation unit installation table 112 is provided with a medal insertion unit 114, a bet switch 116, a start switch 118, a stop switch 120, an effect switch 122, and the like. There is. The medal insertion unit 114 accepts the insertion of medals as a game value through the medal insertion slot 114a. The bet switch 116 inserts (bets) a specified number of medals required for one game among the medals electrically stored inside the slot machine 100 (hereinafter, simply referred to as credits).

The start switch 118 is composed of, for example, a lever capable of detecting a tilting operation, and detects a game start operation by a player. The stop switch 120 (stop switch 120a, stop switch 120b, stop switch 120c) is provided corresponding to each of the left reel 110a, the middle reel 110b, and the right reel 110c, and detects the player's stop operation. It should be noted that the first stop operation by the player of any of the stop switch 120a, the stop switch 120b, and the stop switch 120c while the stop switch 120 can be stopped is called the first stop, and the first stop is performed. After that, the stop operation of any of the two stop switches 120 that have not been stopped is called the second stop, and the stop operation of the last remaining stop switch 120 after the second stop is called the third stop. .. The effect switch 122 is composed of, for example, a pressing switch and a jog dial switch rotatably arranged around the pressing switch, and detects a pressing operation or a rotation operation of a player.

A liquid crystal display unit 124 for displaying various images accompanying the effect is provided at substantially the center of the upper part of the front upper door 104. Further, on the upper portion and the left and right of the front upper door 104, for example, a staging lamp 126 composed of a high-luminance light emitting diode (LED) is provided. Further, speakers 128 are provided at the left and right positions of the liquid crystal display unit 124 on the back surface of the front upper door 104 and at the left and right positions on the back surface of the front lower door 106 to produce an auditory effect by sound effects, musical sounds, and the like.

The operation unit installation table 112 is provided with a main credit display unit 130 and a main payout display unit 132. Further, a sub-credit display unit 134 and a sub-payout display unit 136 are provided between the symbol display window 108 and the operation unit installation table 112. The number of medals credited (number of credits) is displayed on the main credit display unit 130 and the sub-credit display unit 134, and the number of medals paid out is displayed on the main payout display unit 132 and the sub-payout display unit 136. ..

Below the reel 110 in the housing 102, a medal payout device (medal hopper) 142 for paying out medals from the medal discharge port 140a is provided. Further, in the lower part of the front surface of the front lower door 106, a saucer portion 140 for storing medals paid out from the medal discharge port 140a is provided. Further, a power switch 144 is provided in the housing 102. The power switch 144 is operated by an administrator who manages the slot machine 100, and is used to switch between two states, a power off state and a power on state.

Further, in the housing 102, a setting key and a setting change switch (collectively referred to as a setting value setting means), which are not shown, are provided on the main control board 200, which will be described later. In the slot machine 100, when a predetermined key (operation key) is inserted into the setting key and the power is turned on via the power switch 144 in a state of being rotated from the OFF position to the ON position, the slot machine 100 shifts to the setting change mode. , The setting value can be changed (also simply called setting change). The set value indicates the degree of advantage (machine discount) of the player in stages, and is represented by, for example, 6 stages from 1 to 6. Generally, the larger the value of the set value, the higher the degree of advantage of the game as a whole. It is set to be high (the expected number of acquisitions is high). Then, each time the setting change switch is pressed in a state where the setting can be changed, the setting value is added by 1, for example, the setting value is changed to one of the 6-step setting values, and the start switch 118 is operated. Then, the set value is confirmed, and by returning the setting key to the original position (OFF position), the setting change mode ends and the game becomes possible. The setting can be changed only for a certain period after the power switch 144 is operated and the power is turned on.

In the slot machine 100, the game can be started, and when a predetermined number of medals are bet, the effective line A is activated and the operation on the start switch 118 becomes effective. Here, as for the bet, the case where the medal credited through the operation of the bet switch 116 is inserted, the case where the medal is inserted through the medal insertion unit 114, and the case where the replay combination described in detail will be described in detail are displayed on the effective line A. This includes all cases where medals are automatically inserted based on the above. Further, the effective line A is a line for determining the winning combination of the winning combination, and is one in the present embodiment. As shown in FIG. 3B, the effective line A is the upper stage of the left reel 110a and the middle stage of the middle reel 110b among the nine symbols (3 reels x 3 stages of upper, middle and lower) facing the symbol display window 108. It is set to a line connecting the positions corresponding to the symbols stopped at the lower stage of the right reel 110c. The invalid line is used for the winning judgment of the winning combination, which displays another symbol combination that makes it easy to grasp the winning combination when it is difficult to grasp the winning combination only by the symbol combination displayed on the valid line A. It is a line other than the valid line A, and in the present embodiment, the four invalid lines B1, B2, B3, and C shown in FIG. 3B are assumed.

Then, when the start switch 118 is operated by the player, the game is started, the left reel 110a, the middle reel 110b, and the right reel 110c are rotated, and the winning type lottery or the like is executed. After that, the corresponding left reel 110a, middle reel 110b, and right reel 110c are stopped, respectively, according to the operation of the stop switches 120a, 120b, and 120c. Then, depending on the combination of the lottery result of the winning type lottery and the symbol displayed on the valid line A, if the winning combination that can receive the medal payout wins, the medal is paid out and the winning type that can receive the medal payout. If the medal is not won, or if the medal is won but the medal is not won, the game ends when the left reel 110a, the middle reel 110b, and the right reel 110c all stop.

In this embodiment, in the above one game, a medal is inserted through the medal insertion unit 114, a credited medal is inserted through the operation of the bet switch 116, or a replay combination is displayed on the effective line A. After any of the automatic medals are inserted based on the above, the left reel 110a, the middle reel 110b, and the right reel 110c are rotationally controlled and the winning type lottery is executed according to the operation of the start switch 118 by the player. The left reel 110a, the middle reel 110b, and the right reel corresponding to the operated stop switches 120a, 120b, 120c according to the lottery result of the winning type lottery and the operation of the plurality of stop switches 120a, 120b, 120c by the player. When each of the 110c is stopped and controlled and the winning combination who can receive the payout of the medal wins a prize, it means a game until the payout of the medal is executed. In addition, if the winning type that can receive the payout of medals is not won, or if the winning is not won, one game ends when the left reel 110a, the middle reel 110b, and the right reel 110c all stop. However, the start of one game may be read as the operation of the start switch 118 by the player instead of inserting the above medal or winning the replay combination. Further, the number of times such one game is repeated is defined as the number of games.

FIG. 4 is a block diagram showing a schematic electrical configuration of the slot machine 100. As shown in FIG. 4, the slot machine 100 includes a main control board 200 (main control unit) that controls the progress of the game and a sub control board 202 (sub control unit) that controls the effect according to the progress of the game. A control board including the control board is provided. Further, the transmission of electrical signals between the main control board 200 and the sub control board 202 is limited to only one direction from the main control board 200 to the sub control board 202 from the viewpoint of fraud prevention and the like.

(Main control board 200)
The main control board 200 has a semiconductor integrated circuit including a main CPU 200a which is a central processing unit, a main ROM 200b in which a program or the like is stored, a main RAM 200c which functions as a work area, and the like, and controls the entire slot machine 100 in an integrated manner. .. Even when the power is turned off, the main RAM 200c is retained without erasing the data unless the setting is changed and the RAM is cleared.

Further, the main control board 200 functions by the main CPU 200a cooperating with the main RAM 200c based on the program stored in the main ROM 200b, the initialization means 300, the betting means 302, and the winning type lottery means (lottery means) 304. , Reel control means 306, determination means 308, payout control means 310, game state control means 312, staging state control means (state control means, section control means) 314, command transmission means 316, and the like.

The main control board 200 receives various detection signals from the insertion medal detection unit 414b, the bet switch 116, the start switch 118, and the stop switches 120a, 120b, 120c for detecting the insertion of medals into the medal insertion port 114a. The main CPU 200a executes various processes based on the received detection signal.

The initialization means 300 executes the initialization process on the main control board 200. The betting means 302 bets medals for use in the game. Based on the operation of the start switch 118, the winning type lottery means 304 performs a winning type lottery to determine whether or not the winning combination is won or not, and more specifically, whether or not the winning type including the winning combination is won or not.

The reel control means 306 controls the rotation of the left reel 110a, the middle reel 110b, and the right reel 110c according to the operation of the start switch 118, and corresponds to the rotating left reel 110a, middle reel 110b, and right reel 110c, respectively. The corresponding left reel 110a, middle reel 110b, and right reel 110c are stopped and controlled according to the operation of the stop switches 120a, 120b, and 120c. Further, the reel control means 306 is operated by the player to display the lottery result of the winning type lottery after the operation of the stop switches 120a, 120b, 120c is enabled in the previous game in response to the operation of the start switch 118. The time until the operation of the stop switches 120a, 120b, 120c is enabled (disabled by the completion of the operation of the stop switches 120a, 120b, 120c in the previous game) is extended from the specified time, and the reel 110a is in the meantime. , 110b, 110c may be rotated in various modes to perform a reel effect (freeze effect). In the reel effect, any switch that should be originally enabled is not enabled for a predetermined time, the processing that should be originally executed is suspended for a predetermined time, and the signal of any switch that should be originally transmitted / received is transmitted or received for a predetermined time. It can be realized by not having it.

Further, a reel drive control unit 150 is connected to the main control board 200. The reel drive control unit 150 drives the stepping motor 152 based on the rotation start signals of the left reel 110a, the middle reel 110b, and the right reel 110c transmitted from the reel control means 306 in response to the operation signal of the start switch 118. do. Further, the reel drive control unit 150 detects the stop signals of the left reel 110a, the middle reel 110b, and the right reel 110c and the rotation position detection circuit 154 transmitted from the reel control means 306 in response to the operation signal of the stop switch 120. The drive of the stepping motor 152 is stopped based on the signal.

The determination means 308 determines whether or not the symbol combination corresponding to the winning combination is displayed on the valid line A. Here, displaying the symbol combination corresponding to the winning combination on the valid line A may be simply referred to as winning. The payout control means 310 pays out medals by the number (value amount) corresponding to the winning combination based on the fact that the symbol combination corresponding to the winning combination is displayed on the valid line A (winning). Further, a medal payout device 142 is connected to the main control board 200, and the payout control means 310 ejects medals while counting the number of medals to be paid out.

The game state control means 312 refers to the result of the winning type lottery and the determination result of the determination means 308, and shifts the game state to any of a plurality of types of game states. Further, the effect state control means 314 refers to the result of the winning type lottery, the determination result of the determination means 308, and the transition information of the game state, and shifts the effect state to any of a plurality of types of effect states.

The command transmission means 316 is a command related to the game associated with the operation of the bet means 302, the winning type lottery means 304, the reel control means 306, the determination means 308, the payout control means 310, the game state control means 312, the effect state control means 314, and the like. Are sequentially determined, and the determined commands are sequentially transmitted to the sub-control board 202.

Further, the main control board 200 is provided with a random number generator (random number generation means) 200d. The random number generator 200d sequentially increments the count value, loops within a predetermined numerical range, and extracts the count value at a predetermined time point to obtain a random number. The random number generated by the random number generator 200d of the main control board 200 (hereinafter referred to as a winning type lottery random number) is used to give a game profit to the player, for example, the winning type lottery means 304 determines the winning type. ..

(Sub-control board 202)
Further, the sub control board 202 has various semiconductor integrated circuits including a sub CPU 202a which is a central processing device, a sub ROM 202b in which a program or the like is stored, a sub RAM 202c which functions as a work area, and the like, like the main control board 200. , In particular, the effect is controlled based on the command from the main control board 200. Further, a backup power supply (not shown) is connected to the sub RAM 202c as well as the main RAM 200c, and even when the power is turned off, the data is retained without being erased. Similar to the main control board 200, the sub control board 202 is also provided with a random number generator (random number generation means) 202d, and the random numbers generated by the random number generator 202d (hereinafter referred to as effect lottery random numbers) are mainly used. It is used to determine the mode of production.

Further, in the sub control board 202, the sub CPU 202a functions by cooperating with the sub RAM 202c based on the program stored in the sub ROM 202b, such as the initialization determination means 330, the command receiving means 332, and the staging control means 334. It has a functional part.

The initialization determining means 330 executes the initialization process on the sub-control board 202. The command receiving means 332 receives a command from another control board such as the main control board 200, and processes the command. The effect control means 334 receives the detection signal from the effect switch 122, and determines the effect of the game performed by each device of the liquid crystal display unit 124, the speaker 128, and the effect lamp 126 based on the received command. Specifically, the effect control means 334 is an electric display for effect through an image data displayed on the liquid crystal display unit 124 and an electric decoration device such as an effect lamp 126, a sub credit display unit 134, and a sub payout display unit 136. The decoration data is determined, and the audio data constituting the audio to be output from the speaker 128 is determined. Then, the effect control means 334 executes the effect of the determined game. The staging also includes an auxiliary staging. In the winning type lottery, when the correct answer combination and the incorrect answer combination are won in the overlapping selection winning type, the auxiliary effect notifies the correct answer operation mode of the stop switches 120a, 120b, and 120c, which are the winning conditions for the correct answer combination. It is a production. With such an auxiliary effect, the player can easily display the symbol combination corresponding to the correct answer combination on the effective line A. The effect state in which such an auxiliary effect is executed is referred to as an AT (assist time) effect state. In addition, a so-called ART game state in which the AT effect state and the RT (replay time) game state in which the winning probability of the replay combination is high progress in parallel may be used.

In the following, the notification managed by a board other than the main control board 200 including the sub control board 202 such as the liquid crystal display unit 124, the effect lamp 126, the speaker 128, the sub credit display unit 134, and the sub payout display unit 136. The means may be referred to as another notification means. On the other hand, the notification means managed by the main control board 200, such as the main credit display unit 130 and the main payout display unit 132, may be referred to as a main notification means (instruction monitor). In addition, the main notification means and other notification means capable of executing the auxiliary effect may be collectively referred to as the auxiliary effect execution means. The effect state control means 314 causes the auxiliary effect execution means to execute the auxiliary effect in the AT effect state.

(Table used in the main control board 200)
FIG. 5 is an explanatory diagram for explaining the winning combination, and FIGS. 6 and 7 are explanatory diagrams for explaining the winning type lottery table.

As will be described in detail later, the slot machine 100 is provided with a plurality of types of gaming states and staging states, and the gaming states and staging states are shifted according to the progress of the game. In the main control board 200, a plurality of winning type lottery tables and the like corresponding to the game states managed and controlled by the game state control means 312 are stored in the main ROM 200b. The winning type lottery means 304 sets the corresponding winning type lottery table in the main ROM 200b according to the current set value (which shows the easiness of obtaining the game profit stepwise) stored in the main RAM 200c and the current game state. Based on the winning type lottery table extracted from, it is determined which winning type in the winning type lottery table the winning type lottery random number acquired according to the operation signal of the start switch 118 corresponds to.

Here, the winning combination constituting the winning type extracted in the winning type lottery table includes a replay combination, a small combination, and a bonus combination. The replay combination is a combination in which, when the symbol combination corresponding to the replay combination is displayed on the effective line A, the game can be executed again without making a new bet of the medal by the player. The small winning combination is a combination in which a predetermined number of medals can be paid out according to the symbol combination by displaying the symbol combination corresponding to the small winning combination on the effective line A. Further, in the bonus combination, the symbol combination corresponding to the bonus combination is displayed on the effective line A, so that the gaming state managed by the gaming state control means 312 is changed to the bonus gaming state (game state during RBB operation, which will be described later). It is a role that can be transferred to.

As shown in FIG. 5, the winning combination in the present embodiment is provided with the winning combination “RBB” as a bonus combination. Further, as the replay role, the winning roles "replay 1" to "replay 7" are provided. Further, as small roles, winning combinations "small role 1" to "small role 45" are provided. In FIG. 5, each of the left reel 110a, the middle reel 110b, and the right reel 110c is associated with one or a plurality of symbols constituting each winning combination. In the following, the winning roles "small role 1" to "small role 17" are the winning role "15-card role", the winning role "small role 18" is the winning role "14-card role", and the winning role "small role 19". , "Small role 20" may be abbreviated as the winning combination "3 card role", and the winning combination "small role 21" to "small role 45" may be abbreviated as the winning combination "1 card role".

Here, in the present embodiment, when the stop switch 120 is operated by the player, if the symbol constituting the symbol combination corresponding to the winning combination that can be won is on the effective line A, the reel control means. By 306, stop control is performed so that the symbol stops on the effective line A. Further, when the stop switch 120 is operated, there is no symbol on the effective line A that constitutes a symbol combination corresponding to the winning combination that can be won, but four symbols in the direction opposite to the rotation direction of the reel 110. If it exists within the range corresponding to the minute (pull-in range), the number of distant symbols becomes the number of sliding frames by the reel control means 306, and the symbols constituting the symbol combination corresponding to the winning combination are effective. The stop control is performed so as to stop after maintaining the rotation for the number of slip frames so as to be pulled onto the line A. Further, if there are a plurality of symbols corresponding to the winning combinations that can be won in the reel 110 and all of them are within the pull-in range of the reel 110, any of the symbols is valid line A according to a predetermined priority. It is determined whether to pull it up, and stop control is performed so that the prioritized symbol is pulled onto the effective line A and the rotation is maintained for the number of slip frames and then stopped. When the stop switch 120 is pressed, if a symbol constituting a symbol combination corresponding to a winning combination other than the winning combination that can be won is on the effective line A, the symbol is controlled by the reel control means 306. The so-called kicking process, which prevents the reel from stopping on the effective line A, is also executed in parallel. Further, as will be described later, when an operation mode (operation order or operation timing) is set as a winning condition for the winning combination included in the winning type, the reel control means 306 is a winning combination according to the operation mode of the player. The symbol combination corresponding to the above is stopped and controlled so that it can be displayed on the effective line A.

Then, for example, the symbols constituting the symbol combination corresponding to the winning combination "replay 1" and the winning combination "small combination 17" can be always displayed on the effective line A on each reel 110 by the above stop control. Are arranged in. Such a winning combination may be expressed as PB = 1. On the other hand, for example, the symbols constituting the symbol combinations corresponding to the winning combination "replay 2", the winning combination "small combination 1" to "small combination 16", and the winning combination "RBB" are the above-mentioned stop control in each reel 110. Therefore, it is not always arranged so that it can be displayed on the effective line A, so that so-called omission may occur. Such a winning combination may be expressed as PB ≠ 1.

As shown in FIGS. 6 and 7, in the winning type lottery table, a plurality of winning areas are divided, and the winning type to be the target of the lottery differs depending on each game state, and the presence or absence of unwinning (loss) differs. Or something. In FIGS. 6 and 7, the winning area assigned to each gaming state (non-internal gaming state (non-internal), RBB internal medium gaming state (RBB internal), RBB operating gaming state (RBB operating)). The winning type) is represented by "◎" or "○", but in reality, the winning type lottery table corresponding to each of the plurality of gaming states is stored in the main ROM 200b. In addition, "◎" indicates that the lottery for the advantageous section can be performed, and "○" indicates that the lottery for the advantageous section cannot be performed. It indicates that it is a winning type.

In the winning type lottery table, each of the divided winning areas is associated with a predetermined number (winning range value), which is a numerical value indicating the winning range, and the winning type, and all assigned to each gaming state. The total number of winning areas is the total number of winning type lottery random numbers (65536). Therefore, the probability that each winning type is determined is a value obtained by dividing the number of places associated with the winning area by the total number of winning type lottery random numbers. Based on the game state at that time, the winning type lottery means 304 sequentially acquires the number from the highest number among the plurality of winning areas in the winning type lottery table, and uses the number as the winning type lottery random number. When the value after subtraction becomes less than 0 by subtracting from, the winning type associated with the winning area at that time is used as the lottery result of the winning type lottery. In addition, if the number of all winning areas in the winning area 1 or higher is subtracted from the winning type lottery random numbers and the value after subtraction is 0 or more, the winning type "loss" in the winning area 0 is the winning type lottery. Will be the result of the lottery.

Here, the winning combination "RBB" constituting the winning type "RBB" will be supplemented. The predetermined type 1 special bonus RB is a bonus that increases the number of combinations of symbols related to winning for each specified number, or increases the probability that the condition device related to winning for each specified number will operate, and is predetermined. It operates when it is played, and can continue to operate until the result of the game is obtained not more than 12 times. Here, the conditional device is a device whose operation is a necessary condition for displaying a combination of symbols related to a prize, a replay, an accessory, or an operation of the accessory continuous operation device, and is a device in which the winning type lottery (winning type lottery) It means the one that operates when the lottery by the computer performed in the game machine) is won, that is, the winning flag. Then, the bonus continuous operation device (winning combination "RBB") related to the first-class special bonus that constitutes the winning type "RBB" is a device that can continuously operate the first-class special bonus RB. Yes, it operates when a specific combination of symbols is displayed, and ends the operation when a predetermined combination is displayed.

According to the winning type lottery tables of FIGS. 6 and 7, for example, the winning area 0 is associated with the winning type “loss”, and when the winning type is won, any of the winning combinations shown in FIG. 5 is used. The corresponding symbol combination is not displayed on the valid line A, and the medal is not paid out.

Further, the winning area 1 is associated with the winning type "small winning combination ALL" in which the winning winning combinations "small winning combination 1" to "small winning combination 45" are duplicated (winning), and the winning combination 2 is associated with the winning combination. , Winning combination "Small role 19" and "Small role 20" are included in duplicate. Winning type "3 sheets ALL" is associated, and winning combination "Small role 21" to "Small role 21" is associated with the winning area 3. The winning type "1 sheet ALL" in which the "role 45" is duplicated is associated.

Further, the winning areas 4 to 7 are associated with the winning types "replay 1" to "replay 4" in which the winning combinations "replay 1" to "replay 7" are duplicated. In the following, the four winning types of the winning areas 4 to 7 may be simply abbreviated as the winning type "replay".

In addition, in the winning areas 8 to 31, one of the correct batting orders (winning batting order "small winning combination 1" to "small batting order 16") in which the number of payouts is 15, and the incorrect batting order in which the number of payouts is one (winning combination). Selection winning type (winning type "batting order bell A blue 1" to "batting order bell A blue 4", "batting order bell A red 1") that overlaps with any one of "small winning combination 21" to "small winning combination 40") -"Batting Order Bell A Red 4", "Batting Order Bell B Blue 1"-"Batting Order Bell B Blue 4", "Batting Order Bell B Red 1"-"Batting Order Bell B Red 4", "Batting Order Bell A1"-"Batting Order Bell A1" "A4", "Batting order bell B1" to "Batting order bell B4") are associated with each other. In the following, the 24 winning types in the winning areas 8 to 31 may be simply abbreviated as the winning type "batting order bell".

Further, in the winning areas 32 to 41, the winning combination "small winning combination 18" having 14 payouts, the winning combination "small winning combination 17" having 15 payouts, and the winning combination with 1 payout number. Any of the roles "small role 21", "small role 22", "small role 27", "small role 28", "small role 35", "small role 36", and "small role 43" are included in duplicate. The winning types "Batting Order Chance 1" to "Batting Order Chance 10" are associated with each other. In the following, the 10 winning types in the winning areas 32 to 41 may be simply abbreviated as the winning type "batting order chance".

Further, in the winning areas 42 and 43, the winning combination "small combination 20" in which the number of payouts is three, and the winning combination "small combination 25", "small combination 26", and "small combination" in which the number of payouts is one. The winning types "common 3 cards 1" and "common 3 cards 2", which are duplicated with any of "27" and "small winning combination 28", are associated with each other. In the following, the two winning types of the winning areas 42 and 43 may be simply abbreviated as the winning type "common 3 cards".

In addition, the winning area 44 includes the winning combination "RBB" and the small winning combination "small winning combination 21", "small winning combination 23", "small winning combination 24", and "small winning combination 45" in duplicate. "Common one" is associated. Further, the winning area 45 is associated with a winning type "watermelon" in which the winning combination "RBB" and the small combination "small combination 43" are included in an overlapping manner. Further, the winning area 46 is associated with a winning type "chance eye A" in which the winning combination "RBB" and the small combination "small combination 44" are included in an overlapping manner. Further, the winning area 47 is associated with a winning type "chance eye B" in which the winning combination "RBB" and the small combination "small combination 19" are included in an overlapping manner. In the following, the two winning types of the winning areas 46 and 47 may be simply abbreviated as the winning type "chance eye".

Further, the winning area 48 is associated with a winning type "weak cherry" in which the winning combination "RBB" and the small combination "small combination 41" are included in an overlapping manner. Further, the winning area 49 is associated with a winning type "strong cherry" in which the winning combination "RBB" and the small combination "small combination 42" are included in an overlapping manner. Further, the winning area 50 is associated with a winning type "RBB" in which the winning combination "RBB" is independently included. If the winning areas 44 to 49 are won in the RBB internal middle game state, only the small winning combination will be won.

Then, when a winning combination including a plurality of winning combinations is won in duplicate, a winning condition regarding which symbol combination corresponding to the winning combination is preferentially displayed on the valid line A, for example, a stop. The order in which the switches 120a, 120b, 120c are operated and the operation timing of the stop switches 120b, 120c (the operation position of the reel 110) are set.

In the following description, the operation of the stop switches 120a, 120b, 120c for stopping the reels in the order of the left reel 110a, the middle reel 110b, and the right reel 110c is defined as "beating order 1", and the left reel 110a, the right reel 110c, and the middle reel 110b are operated. The operation of the stop switches 120a, 120b, 120c that stop the reels in order is defined as "beating order 2", and the operation of the stop switches 120a, 120b, 120c that stop the reels in the order of the middle reel 110b, the left reel 110a, and the right reel 110c is "beating order". 3 ”, the operation of the stop switches 120a, 120b, 120c that stop the reels in the order of the middle reel 110b, the right reel 110c, and the left reel 110a is set to“ striking order 4 ”, and the right reel 110c, the left reel 110a, and the middle reel 110b are in that order. The operation of the stop switches 120a, 120b, 120c for stopping the reels is set to "beating order 5", and the operation of the stop switches 120a, 120b, 120c for stopping the reels in the order of the right reel 110c, the middle reel 110b, and the left reel 110a is set to "beating order 6". ".

Further, in the "batting order 3", the stop switch 120b is operated at the timing when the symbols of the symbols 1 to 10 arranged on the middle reel 110b are located on the effective line A. Is blue) ”, that the stop switch 120b is operated at the timing when the symbols of symbol numbers 0, 11 to 19 arranged on the middle reel 110b are located on the effective line A,“ batting order 3 red (in the figure, in the figure). Red) ". Similarly, in "batting order 4", "batting order 4 blue" indicates that the stop switch 120b is operated at the timing when the symbols of symbol numbers 1 to 10 arranged on the middle reel 110b are located on the effective line A. The operation of the stop switch 120b at the timing when the symbols 0, 11 to 19 arranged on the middle reel 110b are located on the effective line A is defined as "batting order 4 red". Further, in "batting order 5" and "batting order 6", the stop switch 120c is operated at the timing when the symbols of symbol numbers 1 to 10 arranged on the right reel 110c are located on the effective line A, respectively. "Batting order 5 blue", "Batting order 6 blue", the stop switch 120c is operated at the timing when the symbols of symbol numbers 0 and 11 to 19 arranged on the right reel 110c are located on the effective line A, respectively. The batting order is 5 red and the batting order is 6 red.

For example, in the RBB internal middle game state described later, when the winning type "batting order bell A blue 1" in the winning area 8 is won and the operation is performed according to the correct answer operation mode (batting order 3 blue), the number of payouts is 15. Stop control is performed so that the symbol combination corresponding to the winning combination "small combination 1", which is the correct answer combination, is preferentially displayed on the effective line A. In addition, when the operations in batting order 1 and batting order 2 are performed, the symbol combination corresponding to the winning combination "1 piece combination", which is an incorrect answer of 1 payout number, is preferentially displayed on the effective line A. When the stop control is made to the batting order 3 red and the batting order 4 (batting order 4 blue, batting order 4 red) is performed, the symbol corresponding to the winning combination "1 piece combination" which is an incorrect answer of 1 payout number. If the stop control is performed so that the combination is preferentially displayed on the valid line A with a probability of 1/2, and the operation is performed in the batting order 5 or 6, the winning combination is an incorrect answer of one payout number. Stop control is performed so that the symbol combination corresponding to the "single piece combination" is preferentially displayed on the effective line A with a probability of 1/4.

It should be noted that the winning probabilities (numbers) of each winning type in the winning areas 8 to 23 are set to be equal. Further, the winning probabilities (numbers) of each winning type in the winning areas 24 to 31 are set to be equal. Since the player cannot usually know which winning type is won, it is difficult to win the correct answer by providing the winning areas 8 to 31 as described above. Further, as described above, even if the stop switches 120a, 120b, and 120c are operated in the operation mode in which the incorrect answer is preferentially displayed, the symbol combination corresponding to the incorrect answer is not necessarily displayed on the effective line A. Since it is not always possible, omission may occur depending on the operation mode (PB ≠ 1).

When any of the above-mentioned winning types is won, the internal winning flag corresponding to each winning type is established (ON), and the stop control of each reel 110 is performed according to the establishment status of the internal winning flag. The Rukoto. At this time, if the winning type including the small winning combination is won, but the symbol combination corresponding to these winning combinations cannot be displayed on the valid line A in the game, after the end of the game. The internal winning flag is turned off. That is, the right to win a small winning combination is limited to the game in which the winning type including the small winning combination is won, and the right cannot be carried over to the next game. On the other hand, when the winning type including the winning combination "RBB" is won, the RBB internal winning flag is established (ON), and the symbol combination corresponding to the winning combination "RBB" is on the valid line A. The RBB internal winning flag is carried over across the game until it is displayed. If the internal winning flag corresponding to the winning type including the replay combination is established, the symbol combination corresponding to any of the replay combinations included in the winning type is always on the valid line A. It is displayed, and after the processing necessary for performing the next game without requiring a medal is performed, the internal winning flag is turned off.

(Transition of game state)
Here, the transition of the gaming state will be described with reference to FIG. Here, a plurality of gaming states such as a non-internal gaming state, an RBB internal medium gaming state, and an RBB operating gaming state are prepared. As will be described later, each game state is changed according to the winning of the bonus combination, the winning (operation), and the end.

The non-internal gaming state is a gaming state corresponding to the initial state in a plurality of gaming states. In such a non-internal gaming state, the winning probability of the replay combination is set to about 1 / 7.3. Further, in the non-internal gaming state, the winning combination "RBB" is determined with a predetermined probability (for example, about 1/10).

The game state control means 312 changes the game state according to the winning of the winning combination “RBB”. For example, in a game in which the winning combination "RBB" is won, when the symbol combination corresponding to the winning combination "RBB" is displayed on the effective line A, the game state control means 312 changes the game state to the game state during RBB operation. Migrate (1).

In the gaming state during RBB operation, the winning probability of the replay combination is set to 0. In the game state during the RBB operation, the winning type "small role ALL" is in the winning area 1, the winning type "3 cards ALL" is in the winning area 2, and the winning type "1" is in the winning area 3. Sheet ALL "is set. If you win the winning type "Small role ALL", the symbol combination corresponding to any of the winning combination "Small role 1" to "Small role 45" is displayed on the valid line A, and you win the winning type "3 cards ALL". Then, the symbol combination corresponding to either the winning combination "small combination 19" or "small combination 20" is displayed on the valid line A, and when the winning type "1 piece ALL" is won, the winning combination "small combination 21" is displayed. The stop control is performed so that the symbol combination corresponding to any of the "small winning combination 45" is displayed on the effective line A. Here, the expected number of sheets to be acquired per unit game in the game state during RBB operation is lowered due to the configuration of such a small winning combination.

When the end condition of the gaming state during RBB operation is satisfied, that is, when the acquired number reaches a predetermined number, the gaming state control means 312 shifts the gaming state to the non-internal gaming state (2).

On the other hand, in the game in which the winning combination "RBB" is won, if the symbol combination corresponding to the winning combination "RBB" cannot be displayed on the effective line A, the game state control means 312 displays the game state inside the RBB. Shift to the middle game state (3).

In the RBB internal middle game state, the winning probability of the replay combination is set to about 1 / 5.9. In addition, in the RBB internal middle game state, the winning type "loss" is not won. In other words, if the symbol combination corresponding to the winning combination "RBB" cannot be displayed on the valid line A in the winning game of the winning combination "RBB", after that, a smaller role or a smaller role than the winning combination "RBB" Since the replay combination is preferentially stopped and controlled on the effective line A, the symbol combination corresponding to the winning combination "RBB" cannot be displayed on the effective line A. Therefore, once the gaming state shifts to the RBB internal medium gaming state, the RBB internal medium gaming state is maintained without the subsequent transition of the gaming state. Here, while maintaining the RBB internal medium gaming state, the AT effect state is realized in the RBB internal medium gaming state.

Here, in the RBB internal middle game state, since a plurality of types of correct answer combinations are won without overlapping each other, it is possible to increase the chances that the correct answer combination can be won, and as a result, for example, the RBB internal middle game. AT effect in the state By performing the auxiliary effect in the state, it is possible to easily obtain a medal. On the other hand, in the game state during RBB operation, since multiple types of correct answer combinations are won in duplicate, there are few chances that the correct answer combination can be won, so the correct answer combination is won more than the AT production state in other game states. The chances of being able to do it are reduced, making it difficult to increase the number of medals owned by the player. Therefore, while having the function of the RBB operating game state in which the winning probability of the winning combination is higher than that of the RBB internal medium game state, the RBB internal game state is changed to the RBB internal medium game state in terms of medal acquisition performance. It is possible to realize a specification that is inferior (accelerator RBB).

(Transition of production state)
FIG. 9 is an explanatory diagram for explaining the transition of the staging state. Hereinafter, the staging state transitioned by the staging state control means 314 on the main control board 200 will be described in detail. In the following, a case where the gaming state is the RBB internal medium gaming state will be described.

Here, in order to comprehensively and uniformly determine whether or not the game state in which the medal acquisition performance is high is biased, a game section having performance related to the instruction function, that is, an auxiliary effect (instruction function) is executed. A game section that is advantageous to the player, including a game section, is defined as an advantageous section. In the advantageous section, for example, when the auxiliary effect is activated as a result of performing a lottery related to the operation of the auxiliary effect on the main control board 200, the content of the instruction can be identified on the main control board 200, for example, the main notification. Only when it is displayed on the means, it is a game section in which information indicating the content of the instruction may be transmitted to a peripheral board such as the sub-control board 202. Further, unlike the advantageous section, the game section in which the auxiliary effect (instruction function) cannot be executed is defined as the non-advantageous section. Therefore, the plurality of effect states belong to either the advantageous section or the non-advantageous section, which is the game section. In the present embodiment, almost all the effect states belong to the advantageous section, and the non-advantageous section is realized in a part of the effect states (here, the first game in the non-advantageous standby effect state).

In addition, in the winning mode in which the correct answer role is missed if there is no auxiliary effect in the advantageous section, the assistance to assist the winning of the correct answer role in the selected winning type in which the payout of the correct answer role is the maximum (here, 15 cards). When performing an effect (auxiliary effect that can obtain the maximum number of payouts), for example, the section display 160 must be turned on to notify the effect.

Further, in the non-advantageous section, it is possible to make the winning probability of the winning type different for each set value, but the probability of determining the transition to the effect state (AT effect state) accompanied by the auxiliary effect in the same winning type. Must not be different for each set value. On the other hand, in the advantageous section, if both the winning probability of the winning type and the probability of determining the transition (or addition) to the effect state (AT effect state) accompanied by the auxiliary effect in the same winning type are different for each set value. It is possible to make it.

Therefore, the effect state control means 314 manages the transition between the non-advantageous section and the advantageous section in addition to the management of the transition of the effect state. In addition, the advantageous section is forcibly terminated when the following termination conditions are satisfied, regardless of such management. For example, it is forcibly terminated based on the fact that the value counted in the advantageous section reaches a predetermined value (for example, the number of staying games reaches 1500 games or the net increase number exceeds 2400). In any case, the staging state control means 314 resets all the information updated in the advantageous section (all variables affecting the performance related to the instruction function) by shifting from the advantageous section to the non-advantageous section. ..

(Non-AT production state, AT production state)
In the non-AT effect state, the execution frequency of the auxiliary effect is extremely low and the auxiliary effect is hardly performed as compared with the AT effect state, so that the number of medals that can be obtained is limited. Here, as the non-AT effect state, six effect states such as a normal effect state, a CZ effect state (chance zone effect state), a specialized zone effect state, an advantageous standby effect state, a non-advantageous standby effect state, and a pullback effect state are provided. Has been done.

In the AT effect state, by having the auxiliary effect executing means execute the auxiliary effect at the time of winning the selected winning type, it is possible to acquire many medals while suppressing the consumption of medals. Therefore, the player can advance the game advantageously by shifting to the AT effect state as compared with the non-AT effect state. Here, as the AT effect state, four effect states such as an OP effect state (opening effect state), a normal AT effect state, a continuous effect state, and a special special zone effect state are provided. Hereinafter, each effect state will be described individually.

(Each production state)
The normal effect state is an effect state corresponding to the initial state among the plurality of effect states. The effect state control means 314 performs a CZ lottery in a normal effect state. The CZ lottery is a lottery that determines the transition to the CZ effect state, and the effect state control means 314 performs the CZ lottery with a different probability for each winning type determined by the winning type lottery, as will be described in detail later. Then, when the CZ lottery is won in the normal effect state, the effect state control means 314 shifts the effect state to the CZ effect state (1).

In the CZ effect state, the effect state control means 314 performs an AT lottery. The AT lottery is a lottery that determines the transition to the AT effect state (normal AT effect state), and the effect state control means 314 performs an AT lottery with a different probability for each winning type determined by the winning type lottery. Then, when the AT lottery is won in the CZ effect state, the effect state control means 314 shifts the effect state to the OP effect state, which is the AT effect state (2). It can be said that the CZ effect state is more advantageous than the normal effect state because the transition to the normal AT effect state in which the auxiliary effect is executed may be determined.

On the other hand, the effect state control means 314 shifts the effect state to the normal effect state when a predetermined end condition (for example, passing a predetermined number of games without winning the AT lottery) is satisfied in the CZ effect state (for example, the effect state shifts to the normal effect state). 3).

Further, without shifting to the OP effect state or the special special zone effect state, the predetermined ceiling conditions (for example, the normal effect state, the CZ effect state, and the pullback effect state (these are collectively referred to as the first)) in the normal effect state or the CZ effect state. When (the so-called ceiling arrival) is established (so-called ceiling arrival), the effect state control means 314 shifts the effect state to the OP effect state. (2), (4).

In the OP effect state, the auxiliary effect is executed until a predetermined end condition (for example, the correct answer winning type is won 5 times and the auxiliary effect is executed 5 times) is satisfied. Then, when the predetermined end condition is satisfied in the OP effect state, the effect state control means 314 shifts the effect state to the special zone effect state (5). In the special zone production state, the difference number (net increase number) that can be obtained in the normal AT production state that will be transferred later is determined by lottery. For example, the special zone effect state continues for 15 games, and when 15 games have elapsed, the effect state control means 314 shifts the effect state to the normal AT effect state (6).

In the normal AT effect state (second state), the auxiliary effect is executed until a predetermined end condition (for example, acquiring a difference number of medals determined in the special zone) is satisfied. That is, the normal AT effect state is the AT effect state of the difference number management type. Then, when a predetermined end condition is satisfied in the normal AT effect state, the effect state control means 314 shifts the effect state to the standby effect state indicated by the alternate long and short dash line (7), (8).

The standby effect state is provided with an advantageous standby effect state, which is an advantageous section, and a non-advantageous standby effect state, which is a non-advantageous section. Although a detailed explanation will be described later, in the final game of the normal AT effect state, the effect state control means 314 performs a continuous lottery as to whether or not to shift (continue) to the normal AT effect state again. Then, when the continuous lottery is won, the effect state control means 314 continues the advantageous section and temporarily shifts the effect state to the advantageous standby effect state (7). Further, the effect state control means 314 performs an advantageous continuous lottery when a specific condition is satisfied even if the continuous lottery is not won, and if the advantageous continuous lottery is won, the advantageous continuous lottery is continued and the effect state is achieved. To the advantageous standby effect state (7). On the other hand, if the continuous lottery is not won and the specific condition is not satisfied, or if the advantageous continuous lottery is not won even if the specific condition is satisfied, the staging state control means 314 temporarily sets the advantageous section. While shifting to the non-advantageous section, the effect state is shifted to the non-advantageous standby effect state (8).

In the standby effect state, two games are continued regardless of whether the standby effect state is the advantageous standby effect state or the non-advantageous standby effect state. When the continuous lottery is won and the state is shifted to the advantageous standby effect state, the effect state control means 314 shifts the effect state to the continuous effect state after two games have elapsed (9).

Further, when the continuous lottery is not won and the advantageous continuous lottery is won and the transition to the advantageous standby effect state is entered, the effect state control means 314 performs the continuous lottery in each of the two games. Then, when the two games have elapsed, the effect state control means 314 shifts the effect state to the continuous effect state regardless of whether the continuous lottery is won or not (9).

On the other hand, in the case of shifting to the non-advantageous standby effect state, in the first game, the effect state control means 314 performs an advantageous section transition lottery for determining whether or not to shift to the advantageous section. In addition, the advantageous section transition lottery of this embodiment is always won. Therefore, the effect state control means 314 shifts the game section to the advantageous section when the first game in the non-advantageous standby effect state ends. Further, when the transition to the non-advantageous standby effect state is entered, the effect state control means 314 performs a continuous lottery in each of the two games. Then, when the two games have elapsed, the effect state control means 314 shifts the effect state to the continuous effect state regardless of whether the continuous lottery is won or not (10).

The continuous effect state continues until a predetermined end condition (for example, the progress of 10 games) is satisfied, during which the effect control means 334 notifies the lottery result of the continuous lottery. Then, if the continuous lottery is won, the effect state control means 314 shifts to the special zone effect state again (11). On the other hand, if the continuous lottery is not won, the effect state control means 314 shifts the effect state to the pull-back effect state (12). In the continuous staging state, a so-called rewriting lottery may be performed in which the transition to the normal AT staging state is determined by the lottery when the continuous lottery is not won.

The pull-back effect state continues until a predetermined end condition (for example, the passage of 30 games) is satisfied, during which the effect state control means 314 performs a pull-back lottery for the normal AT effect state. Then, when the pull-back lottery is won, the effect state control means 314 shifts the effect state to the special zone effect state (13). On the other hand, if the end condition is satisfied without winning the pull-back lottery, the effect state control means 314 shifts the effect state to the normal effect state (14).

By the way, in the normal effect state, the CZ effect state, and the pullback effect state shown by the broken line, when a predetermined winning type (for example, the winning type "replay 3", "replay 4") is won by the winning type lottery, The effect state control means 314 determines by lottery whether or not the reel effect (freeze effect) of the lock 3, which will be described in detail, can be executed. When it is decided to execute the reel effect of the lock 3, the reel control means 306 executes the reel effect of the lock 3, and the effect state control means 314 sets the effect state to the next game in the special special zone effect state. (15).

The special zone production state is more advantageous to the player than the special zone production state. Specifically, in the special special zone production state, the difference number (net increase number) that can be obtained in the normal AT production state that will be transferred later is determined by lottery, as in the special zone production state. It is easy for the determined difference number to be determined to be a larger value than the special zone production state. For example, in the special special zone production state, the maximum net increase of 2400 sheets that can be obtained in one advantageous section is determined in total. In addition to the case where the execution of the reel effect of the lock 3 is decided, the special special zone effect state may be shifted to the case where the specific condition described in detail later is satisfied.

Then, when the special special zone effect state ends, the effect state control means 314 shifts the effect state to the normal AT effect state (16).

Hereinafter, specific processing in the main control board 200 and the sub control board 202 will be described with reference to the flowchart.

(CPU initialization process of main control board 200)
FIG. 10 is a flowchart illustrating a CPU initialization process in the main control board 200. When power is supplied from the power supply board, a system reset occurs in the main CPU 200a, and the main CPU 200a performs the following CPU initialization process (S100).

(Step S100-1)
The main CPU 200a reads the boot program from the main ROM 200b as the initial setting process in response to the power-on, and also performs the setting process necessary for executing various processes.

(Step S100-3)
The main CPU 200a sets the wait processing time in the timer counter.

(Step S100-5)
The main CPU 200a determines whether or not the power supply cutoff warning signal is detected. The main control board 200 is provided with a power supply cutoff detection circuit, and when the power supply voltage becomes a predetermined value or less, a power supply cutoff warning signal is output from the power supply cutoff detection circuit. If the power cutoff warning signal is detected, the process is moved to step S100-3, and if the power cutoff notice signal is not detected, the process is moved to step S100-7.

(Step S100-7)
The main CPU 200a determines whether or not the wait processing time set in step S100-3 has elapsed. As a result, if it is determined that the wait processing time has elapsed, the process is transferred to step S100-9, and if it is determined that the wait processing time has not elapsed, the process is transferred to step S100-5.

(Step S100-9)
The main CPU 200a executes a process necessary for permitting access to the main RAM 200c.

(Step S100-11)
The main CPU 200a executes the checksum confirmation process. Here, the main CPU 200a calculates a checksum, and determines whether the calculated checksum does not match the checksum saved when the power is turned off (abnormal), and whether the backup is abnormal. Then, when the main CPU 200a determines that either one or both of the backup and the checksum are abnormal, the backup error flag is turned on, and when it is determined that both the backup and the checksum are not abnormal, the backup error flag is set. Turn off.

(Step S100-13)
The main CPU 200a determines whether the backup error flag is on. As a result, if it is determined that the backup error flag is on, the process is transferred to step S110, and if it is determined that the backup error flag is not on, the process is transferred to step S120.

(Step S110)
The main CPU 200a executes a cold start process. The cold start process will be described later.

(Step S120)
The main CPU 200a executes a set value switching process for switching the set value. The setting value switching process will be described later.

(Step S130)
The main CPU 200a executes a state return process for returning to the state immediately before the power is turned off. The state return process will be described later.

FIG. 11 is a flowchart illustrating a cold start process (S110) in the main control board 200.

(Step S110-1)
The main CPU 200a clears the used area in the main RAM 200c and executes a used area RAM check process for detecting an abnormality in the used area.

(Step S110-3)
The main CPU 200a clears another area (unused area) in the main RAM 200c, and executes another area RAM check process for detecting an abnormality in the other area. When an abnormality is detected in another area in the other area RAM check process, the main CPU 200a turns on the RAM read / write error flag.

(Step S110-5)
The main CPU 200a sets an error code "EA" indicating an abnormality in the main RAM 200c.

(Step S110-7)
The main CPU 200a determines whether or not an abnormality has been detected in step S110-1. As a result, if it is determined that an abnormality has been detected in step S110-1, the process is transferred to step S112, and if it is determined that no abnormality has been detected in step S110-1, the process proceeds to step S110-9. Move the process.

(Step S110-9)
The main CPU 200a acquires a RAM read / write error flag that is turned on when an abnormality is detected in step S110-3.

(Step S110-11)
The main CPU 200a determines whether the RAM read / write error flag is on. As a result, if it is determined that the RAM read / write error flag is on, the process is transferred to step S112, and if it is determined that the RAM read / write error flag is not on, the process is transferred to step S120.

(Step S120)
The main CPU 200a executes a set value switching process for switching the set value. The setting value switching process will be described later.

(Step S110-13)
The main CPU 200a sets an error code "E7" indicating that it is a backup error.

(Step S112)
The main CPU 200a executes an error stop process for stopping the progress of the game due to an error. The error stop processing will be described later.

FIG. 12 is a flowchart illustrating an error stop process (S112) in the main control board 200.

(Step S112-1)
The main CPU 200a sets the initial stack pointer value as the address of the stack pointer.

(Step S112-3)
The main CPU 200a executes an error setting process for displaying an error and setting a warning sound.

(Step S112-5)
The main CPU 200a sets the external signals 1 to 3 output bit off that turns off the output image of the bits corresponding to the external signals 1 to 3.

(Step S112-7)
The main CPU 200a executes an output port image set process for updating the output image for the bits set in step S112-5.

(Step S112-9)
The main CPU 200a shifts to an endless loop. As a result, the progress of the game is stopped.

FIG. 13 is a flowchart illustrating a set value switching process (S120) in the main control board 200.

(Step S120-1)
The main CPU 200a acquires the signal of the input port 1 and determines whether or not the set value switching condition is satisfied based on the acquired signal of the input port 1. As a result, if it is determined that the set value switching condition is not satisfied, the set value switching process is terminated, and if it is determined that the set value switching condition is satisfied, the process is moved to step S120-3. .. Here, the signal of the input port 1 includes a signal indicating whether or not the front upper door 104 and the front lower door 106 are open, and a signal indicating whether or not the setting key is turned on. Here, the set value switching condition is satisfied when the signal indicating that the front upper door 104 and the front lower door 106 are open and the signal indicating that the setting key is turned on are acquired. It is judged that it is done.

(Step S120-3)
The main CPU 200a executes a RAM clearing process for clearing the used area to be cleared when the setting is changed in the main RAM 200c.

(Step S120-5)
The main CPU 200a executes a table content set process for transferring the table data of the data table at the time of switching the set value to the main RAM 200c.

(Step S120-7)
The main CPU 200a sets a setting change start command indicating that the setting value change is started in the transmission buffer.

(Step S120-9)
The main CPU 200a executes an edge check process for detecting a falling edge (on-edge) of a signal of an input port.

(Step S120-11)
The main CPU 200a acquires the set value data indicating the current set value.

(Step S120-13)
The main CPU 200a determines whether or not the on-edge of the setting change switch is detected in step S120-9. As a result, if it is determined that the on-edge of the setting change switch has not been detected, the process is transferred to step S120-17, and if it is determined that the on-edge of the setting change switch has been detected, the process is transferred to step S120-15. ..

(Step S120-15)
The main CPU 200a increments the set value data by 1.

(Step S120-17)
The main CPU 200a determines whether the set value data is within the range (1 to 6) that can be set as the set value. As a result, if it is determined that the set value data is within the range, the process is transferred to step S120-21, and if it is determined that the set value data is not within the range, the process is transferred to step S120-19.

(Step S120-19)
The main CPU 200a sets the set value data to 0.

(Step S120-21)
The main CPU 200a updates the set value data to the value incremented or set in step S120-15 or step S120-19.

(Step S120-23)
The main CPU 200a executes a display data conversion process for displaying the set value on the main credit display unit 130.

(Step S120-25)
The main CPU 200a determines whether or not the on-edge of the setting change switch is detected. As a result, if it is determined that the on-edge of the setting change switch has not been detected, the process is transferred to step S120-31, and if it is determined that the on-edge of the setting change switch has been detected, the process is performed in step S120-27. To move.

(Step S120-27)
The main CPU 200a determines whether the setting change switch is on. As a result, if it is determined that the setting change switch is on, the process is transferred to step S120-27, and if it is determined that the setting change switch is not on, the process is transferred to step S120-29.

(Step S120-29)
The main CPU 200a sets a set value change switch interval timer.

(Step S120-31)
The main CPU 200a executes a timer wait process that waits until the setting change switch interval timer becomes 0.

(Step S120-33)
The main CPU 200a determines whether or not the on-edge of the start switch 118 is detected. As a result, if it is determined that the on-edge of the start switch 118 is not detected, the process is transferred to step S120-9, and if it is determined that the on-edge of the start switch 118 is detected, the process is performed in step S120-35. To move.

(Step S120-35)
The main CPU 200a determines whether the setting key is off. As a result, if it is determined that the setting key is off, the process is transferred to step S120-35, and if it is determined that the setting key is not off, the process is transferred to step S120-37.

(Step S120-37)
The main CPU 200a determines whether the setting key is on. As a result, if it is determined that the setting key is on, the process is transferred to step S120-37, and if it is determined that the setting key is not on, the process is transferred to step S122.

(Step S122)
The main CPU 200a executes an initialization start process for starting the initialization start. The initialization start process will be described later.

FIG. 14 is a flowchart illustrating an initialization start process (S122) in the main control board 200.

(Step S122-1)
The main CPU 200a sets a setting change end command indicating that the setting value change is completed in the transmission buffer.

(Step S122-3)
The main CPU 200a sets a setting change status command indicating a status when the setting value change is completed in the transmission buffer.

(Step S122-5)
The main CPU 200a sets a wait timer at the start of initialization.

(Step S122-7)
The main CPU 200a executes a timer wait process that waits until the wait timer at the start of initialization becomes 0.

(Step S122-9)
The main CPU 200a executes a RAM clearing process at the time of setting change to clear another area of the main RAM 200c.

(Step S122-11)
The main CPU 200a executes a RAM clearing process for clearing the used area to be cleared when the setting is changed in the main RAM 200c.

(Step S122-13)
The main CPU 200a sets a game state command indicating the current game state in the transmission buffer.

(Step S200)
The main CPU 200a executes a game start process for starting a game. The game start process will be described later.

FIG. 15 is a flowchart illustrating a state return process (S130) in the main control board 200.

(Step S130-1)
The main CPU 200a returns the stack pointer.

(Step S130-3)
The main CPU 200a executes an unused area clearing process for clearing an unused area in the main RAM 200c.

(Step S130-5)
The main CPU 200a clears the stack pointer storage buffer.

(Step S130-7)
The main CPU 200a sets (turns on) the flag after the power is turned off and restored.

(Step S130-9)
The main CPU 200a executes a port input process for updating the image of the input port.

(Step S130-11)
The main CPU 200a executes an operation target bit extraction process for extracting information on the operation target bit based on the image of the input port updated in step S130-9.

(Step S130-13)
The main CPU 200a sets the operation target bit extracted in step S130-11 as the operation target bit in the previous state.

(Step S130-15)
The main CPU 200a acquires the motor phases of the reels 110a, 110b, 110c. Here, the motor phase is set as the state of the reels 110a, 110b, 110c. The motor phase indicates an operating state of the reels 110a, 110b, 110c, that is, during acceleration, steady rotation, stop, and standby. Specifically, the 1-byte (storage unit) variable assigned to the motor phase is accelerating = 3, steady rotation = 2, stopped = 1, waiting =, depending on the operating state of the stepping motor 152. It changes to a value such as 0.

(Step S130-17)
Based on the motor phase acquired in step S130-15, the main CPU 200a determines whether any of the reels 110a, 110b, and 110c is in steady rotation and acceleration. As a result, if it is determined that none of the reels 110a, 110b, 110c is in steady rotation and acceleration, the process is transferred to step S130-21, and any of the reels 110a, 110b, 110c is in steady rotation or acceleration. If it is determined to be inside, the process is transferred to step S130-19.

(Step S130-19)
The main CPU 200a executes rotation error processing for setting the reels 110a, 110b, 110c at the time of error detection.

(Step S130-21)
The main CPU 200a restores the saved register group.

(Step S130-23)
The main CPU 200a permits an interrupt and ends the state return process. As a result, the main CPU 200a returns to the state immediately before the power is turned off.

FIG. 16 is a flowchart illustrating a game start process (S200) in the main control board 200.

(Step S200-1)
The main CPU 200a executes a re-game state identification signal output setting process for outputting a re-game state identification signal indicating whether or not the game is re-game.

(Step S200-3)
The main CPU 200a sets the insertion number display output bit off for turning off (turning off) the bit corresponding to the insertion number display that displays the number of inserted medals (the number of bets).

(Step S200-5)
The main CPU 200a executes an output port image set process for updating the output image for the bits set in step S200-3.

(Step S200-7)
The main CPU 200a sets a game start wait timer.

(Step S200-9)
The main CPU 200a executes a timer wait process of waiting until the game start wait timer becomes 0.

(Step S200-11)
The main CPU 200a executes one game RAM clearing process for clearing an area to be cleared for each game among the areas used in the main RAM 200c.

(Step S200-13)
The main CPU 200a executes a bonus signal setting process for setting a bonus signal.

(Step S200-15)
The main CPU 200a executes an edge clearing process for clearing the edge information of the input port image.

(Step S210)
The main CPU 200a executes a game medal insertion process for accepting the insertion of medals. The process of inserting the game medal will be described later.

FIG. 17 is a flowchart illustrating a game medal insertion process (S210) in the main control board 200.

(Step S210-1)
The main CPU 200a executes an error confirmation process for confirming the detection results of various errors.

(Step S210-3)
The main CPU 200a executes an edge check process for detecting a falling edge (on-edge) of a signal of an input port.

(Step S210-5)
The main CPU 200a acquires a door opening error detection flag in which 1 is set when the front upper door 104 or the front lower door 106 is opened.

(Step S210-7)
The main CPU 200a determines whether the front upper door 104 and the front lower door 106 are closed based on the door opening error detection flag acquired in step S210-5. As a result, when it is determined that the front upper door 104 and the front lower door 106 are closed, the process is transferred to step S210-17, and at least one of the front upper door 104 or the front lower door 106 is not closed. If it is determined, the process is transferred to step S210-9.

(Step S210-9)
The main CPU 200a sets an error code "E8" indicating that at least one of the front upper door 104 and the front lower door 106 is open.

(Step S210-11)
The main CPU 200a executes an error display, a request for a warning sound, and an error wait process for waiting for error recovery.

(Step S210-13)
The main CPU 200a executes a set value confirmation process for confirming the set value.

(Step S210-15)
The main CPU 200a executes an edge clearing process for clearing the edge information of the input port image.

(Step S210-17)
The main CPU 200a executes a credit button check process for refunding stored medals when a credit switch (not shown) for refunding stored medals is pressed.

(Step S210-19)
The main CPU 200a executes a game medal insertion button-related process for betting medals. Here, when the bet switch 116 is pressed, the stored (credited) medals are bet up to a specified number, and the stored number is subtracted by the number of bets. Further, when medals are inserted through the medal insertion slot 114a, medals are bet up to a specified number, and when more medals are inserted than the specified number, the number of medals is added to the stored number.

(Step S210-21)
The main CPU 200a executes a game medal acquisition process for confirming whether or not the number of inserted cards is a specified number.

(Step S210-23)
Based on the confirmation result in step S210-21, the main CPU 200a determines whether or not the number of input sheets is the specified number. As a result, if it is determined that the number of input sheets is not the specified number, the process is transferred to step S210-1, and if it is determined that the number of input sheets is the specified number, the process is transferred to step S210-25.

(Step S210-25)
The main CPU 200a sets a start indicator output bit for turning on (lights) the start indicator (not shown) indicating whether or not the operation of the start switch 118 is enabled.

(Step S210-27)
The main CPU 200a determines whether or not the falling edge (pressing) of the start switch 118 is detected. As a result, if it is determined that the falling edge of the start switch 118 has not been detected, the process is transferred to step S210-1, and if it is determined that the falling edge of the start switch 118 has been detected, step S210 Move the process to -29.

(Step S210-29)
The main CPU 200a clears the main payout display unit buffer in order to clear the display of the main payout display unit 132.

(Step S210-31)
The main CPU 200a executes a re-game state identification signal clearing process for clearing the re-game state identification signal.

(Step S210-33)
The main CPU 200a executes a blocker block pre-blocking process for turning off (turning off) the start indicator.

(Step S210-35)
The main CPU 200a sets a lever pressing command indicating that the start switch 118 has been pressed in the transmission buffer.

(Step S220)
The main CPU 200a executes an internal lottery process for performing a winning type lottery. The internal lottery process will be described later.

FIG. 18 is a flowchart illustrating an internal lottery process (S220) in the main control board 200.

(Step S220-1)
The main CPU 200a acquires the set value data.

(Step S220-3)
The main CPU 200a sets an error code "EC" indicating a set value abnormality error.

(Step S220-5)
The main CPU 200a determines whether the set value data acquired in step S220-1 is abnormal. As a result, if it is determined that the set value data is abnormal, the process is transferred to step S112, and if it is determined that the set value data is not abnormal, the process is transferred to step S220-7.

(Step S220-7)
The main CPU 200a acquires a winning type lottery random number updated by the random number generator 200d.

(Step S220-9)
The main CPU 200a executes a state offset acquisition process for acquiring an offset value related to the gaming state.

(Step S220-11)
The main CPU 200a sets the address of the internal lottery area definition table (winning type lottery table).

(Step S220-13)
The main CPU 200a sets the value shown in the address obtained by adding the offset value acquired in step S220-9 to the address set in step S220-11 as the initial value of the winning area. Here, the first winning area in the winning type lottery table in the current gaming state is set as the initial value.

(Step S220-15)
The main CPU 200a acquires lottery data which is a numerical value indicating a winning range of the winning area, and executes a lottery data acquisition process of shifting the winning area by one.

(Step S220-17)
The main CPU 200a determines whether or not to perform a winning type lottery. As a result, if it is determined that the winning type lottery is not performed, the process is transferred to step S220-21, and if it is determined that the winning type lottery is performed, the process is transferred to step S220-19.

(Step S220-19)
The main CPU 200a subtracts lottery data from the random number value.

(Step S220-21)
The main CPU 200a determines whether the subtraction result in step S220-19 is negative, that is, whether the winning area is won by the winning type lottery. As a result, if it is determined that the lottery by winning type has been won, the process is transferred to step S230, and if it is determined that the lottery by winning type has not been won, the process is transferred to step S220-23.

(Step S220-23)
The main CPU 200a determines whether or not the winning type lottery has ended. As a result, if it is determined that the winning type lottery is not completed, the process is transferred to step S220-15, and if it is determined that the winning type lottery is completed, the process is transferred to step S220-25.

(Step S220-25)
The main CPU 200a clears the trigger combination type.

(Step S230)
The main CPU 200a executes a symbol code setting process for setting a symbol code based on the winning area and the gaming state. The symbol code setting process will be described later.

FIG. 19 is a flowchart illustrating a symbol code setting process (S230) in the main control board 200.

(Step S230-1)
The main CPU 200a acquires the winning area won in step S220, and if the acquired winning area includes a bonus combination, executes a game state setting process for setting the game state to the internal middle game state.

(Step S230-3)
The main CPU 200a sets the winning area acquired in step S230-1 as a stop control number.

(Step S230-5)
The main CPU 200a determines (sets) the winning type based on the winning area acquired in step S230-1.

(Step S230-7)
Based on the stop control number set in step S230-3, the main CPU 200a executes a symbol code initial setting process for setting a symbol that can be displayed and a symbol code indicating the symbol to be pulled in.

(Step S230-9)
The main CPU 200a executes a display symbol bit initial value setting process for setting a display symbol bit.

(Step S231)
The main CPU 200a executes an execution flag setting process for setting an execution flag, various processes related to the effect state, processing related to the auxiliary effect, and the like. The execution flag setting process will be described later.

(Step S230-13)
The main CPU 200a sets an effect command, which is a command related to an advantageous section, in the transmission buffer.

(Step S230-15)
The main CPU 200a sets a winning information command indicating a winning type in the transmission buffer.

(Step S230-17)
The main CPU 200a confirms the timer between one game.

(Step S230-19)
The main CPU 200a sets a pre-rotation command indicating that the reels 110a, 110b, 110c are before rotation in the transmission buffer.

(Step S230-21)
The main CPU 200a executes an excitation release waiting process that waits for the excitation release of the stepping motor 152.

(Step S230-23)
The main CPU 200a determines whether the timer for one game is not 0. As a result, if it is determined that the 1-game timer is not 0, the process is transferred to step S230-23, and if it is determined that the 1-game timer is 0, the process is transferred to step S230-25.

(Step S230-25)
The main CPU 200a executes a spinning start process for starting the rotation of the reels 110a, 110b, 110c. Here, the motor phases of the reels 110a, 110b, and 110c are set during acceleration to start the rotation of each reel, or the timer between games is set to a value corresponding to 4.1 seconds.

(Step S230-27)
The main CPU 200a sets a rotation start command indicating that the rotation of the reels 110a, 110b, 110c has started in the transmission buffer.

(Step S240)
The main CPU 200a executes a rotating cylinder rotating process, which is a process during the rotation of the reels 110a, 110b, 110c. The processing during rotation of the rotating cylinder will be described later.

FIG. 20 is a flowchart illustrating the execution flag setting process (S231) in the main control board 200.

(Step S231-1)
The main CPU 200a executes an AT state update process for updating (shifting) the effect state based on the next AT flag. The next AT flag indicates an effect state to be set in the next game, and will be set by the following processing.

(Step S232 to Step S236)
The main CPU 200a executes a state-specific module execution process for executing a module for each effect state and game section, and ends the execution flag setting process. In the state-specific module execution process, the module (process) corresponding to the transferred effect state and game section is read from the main ROM 200b and executed. Hereinafter, modules related to the features of the present embodiment will be described in detail, and modules unrelated to the features of the present embodiment will be omitted.

FIG. 21 is a flowchart illustrating a non-advantageous section process (S232) executed in the state-based module execution process. The non-advantageous section processing is executed when the gaming section is a non-advantageous section.

(Step S232-1)
The main CPU 200a performs an advantageous section lottery.

(Step S232-3)
The main CPU 200a determines whether or not the advantageous section lottery has been won in step S232-1. As a result, if it is determined that the advantageous section lottery has been won, the process is transferred to step S223-5, and if it is determined that the advantageous section lottery has not been won, the non-advantageous section process is terminated.

(Step S223-5)
The main CPU 200a turns on the advantageous section flag indicating that it is an advantageous section, and ends the non-advantageous section processing. As a result, in the advantageous section update process of step S280-7 described later, the process is shifted to the advantageous section.

FIG. 22 is a flowchart illustrating a normal staging state process (S233) executed in the state-specific module execution process. The normal effect state process is executed when the effect state is the normal effect state.

(Step S233-1)
The main CPU 200a increments the continuous game number counter for counting the continuous game number by one. The continuous game number counter is incremented by 1 for each game even in the following CZ effect state process and the pullback effect state process (not shown) executed when the pullback effect state is in effect. Further, the continuous game number counter is reset when the state is changed to the OP effect state or the special special zone effect state.

(Step S233-3)
The main CPU 200a executes a reel effect lottery process for determining whether or not the reel effect can be executed by lottery at the time of winning a predetermined winning type.

(Step S233-5)
The main CPU 200a determines whether the value of the continuous game number counter is equal to or greater than the ceiling game number. As a result, if it is determined that the value of the continuous game number counter is equal to or greater than the number of ceiling games, the process is transferred to step S233-7, and if it is determined that the value of the continuous game number counter is not equal to or greater than the number of ceiling games, the step is performed. The process is transferred to S233-9.

(Step S233-7)
The main CPU 200a sets the next AT flag to a value corresponding to the special specialization zone effect state, and shifts the process to step S233-15.

(Step S233-9)
The main CPU 200a performs a CZ lottery based on the winning type determined by the winning type lottery.

(Step S233-11)
The main CPU 200a determines whether or not the CZ lottery has been won in step S233-9. As a result, if it is determined that the CZ lottery has been won, the process is transferred to step S233-13, and if it is determined that the CZ lottery has not been won, the process is transferred to step S233-15.

(Step S233-13)
The main CPU 200a sets the next AT flag to a value corresponding to the CZ effect state.

(Step S233-15)
The main CPU 200a determines whether or not the execution of the reel effect is determined in step S233-3. As a result, if it is determined that the reel effect has been won, the process is transferred to step S233-17, and if it is determined that the reel effect has not been won, the normal effect state process is terminated.

(Step S233-17)
The main CPU 200a executes the reel effect determined in step S233-3, and ends the normal effect state process.

FIG. 23 is a flowchart illustrating the CZ effect state process (S234) executed in the state-specific module execution process. The CZ effect state process is executed when the effect state is the CZ effect state process. Of the processes in the CZ effect state process, the same processes as those in the normal effect state process are designated by the same reference numerals, and the description thereof will be omitted.

(Step S234-1)
The main CPU 200a performs an AT lottery based on the winning type determined by the winning type lottery.

(Step S234-3)
The main CPU 200a determines whether or not the AT lottery has been won in step S234-1. As a result, if it is determined that the AT lottery has been won, the process is transferred to step S234-5, and if it is determined that the AT lottery has not been won, the process is transferred to step S234-7.

(Step S234-5)
The main CPU 200a sets the next AT flag to a value corresponding to the OP effect state, and shifts the process to step S233-15.

(Step S234-7)
The main CPU 200a determines whether or not it is the final game in the CZ effect state. As a result, if it is determined that the final game is in the CZ effect state, the process is transferred to step S234-9, and if it is determined that the final game is not in the CZ effect state, the process is transferred to step S233-15.

(Step S234-9)
The main CPU 200a sets the next AT flag to a value corresponding to the normal effect state.

FIG. 24 is a flowchart illustrating the non-advantageous standby effect state process and the advantageous standby effect state process (S235) executed in the state-specific module execution process. The non-advantageous effect state process and the advantageous standby effect state process are executed when the effect state is the non-advantageous effect state or the advantageous standby effect state.

(Step S235-1)
The main CPU 200a determines whether the continuation flag is on. The continuation flag is turned on when the transition (continuation) to the normal AT effect state is determined. As a result, if it is determined that the continuation flag is on, the process is transferred to step S235-9, and if it is determined that the continuation flag is not turned on, the process is transferred to step S235-3.

(Step S235-3)
The main CPU 200a performs a continuous lottery with reference to a continuous lottery table (not shown).

(Step S235-5)
The main CPU 200a determines whether or not the continuous lottery has been won. As a result, if it is determined that the continuous lottery has been won, the process is transferred to step S235-7, and if it is determined that the continuous lottery has not been won, the process is transferred to step S235-9.

(Step S235-7)
The main CPU 200a turns on the continuation flag.

(Step S235-9)
The main CPU 200a determines whether it is the final game (second game) in the non-advantageous standby effect state. As a result, if it is determined that it is the final game, the process is transferred to step S235-11, and if it is determined that it is not the final game, the non-advantageous standby effect state process is terminated.

(Step S235-11)
The main CPU 200a sets the next AT flag to a value corresponding to the continuous effect state, and ends the non-advantageous standby effect state process or the advantageous standby effect state.

FIG. 25 is a flowchart illustrating the process during rotation of the rotating cylinder (S240) in the main control board 200.

(Step S240-1)
The main CPU 200a sets the stop indicator output bit off (output image) in order to turn off (turn off) the bits corresponding to the indicators (not shown) of the stop switches 120a, 120b, 120c. Here, the stop indicator output bit is composed of a 3-bit bit string, and each bit is associated with the emission color of the three stop switches 120a, 120b, 120c, respectively, and is represented by blue = 1 and red = 0. Will be done.

(Step S240-3)
The main CPU 200a executes an output port image set process for updating the output image for the bits set in step S240-1.

(Step S240-5)
The main CPU 200a executes an error confirmation process for confirming the detection results of various errors.

(Step S240-7)
The main CPU 200a refers to the index flag and acquires the indexes of the rotating reels 110a, 110b, 110c. The index flag is set only after the reels 110a, 110b, 110c have reached the steady rotation speed. In other words, the fact that the index flag is set means that the reels 110a, 110b, 110c have the steady rotation speed. It will also indicate that it has been reached.

(Step S240-9)
The main CPU 200a determines whether the index flags of all the reels 110a, 110b, and 110c have been detected. As a result, if it is determined that all the index flags have not been detected, the process is transferred to step S240-1, and if it is determined that all the index flags have been detected, the process is transferred to step S240-11.

(Step S240-11)
The main CPU 200a acquires a stop rotation bit indicating the reels 110a, 110b, 110c which have stopped or started to stop. Here, the stop rotation bit is composed of a bit string of 3 bits, and each bit is associated with any of three reels 110a, 110b, 110c, respectively, and steady state = 1, acceleration state, deceleration state or It is represented by the stopped state = 0.

(Step S240-13)
The main CPU 200a saves the stop rotating bit acquired in step S240-11 as a rotating rotating flag.

(Step S240-15)
The main CPU 200a sets the stop indicator output bit on (output image) in order to turn on (turn off) the bits corresponding to the indicators (not shown) of the stop switches 120a, 120b, 120c.

(Step S240-17)
The main CPU 200a acquires an image of the input port 0 and executes an operation target bit extraction process for extracting an operation target bit from the acquired image. Here, the operation target bit is composed of a bit string of 3 bits, and each bit is associated with any of the three stop switches 120a, 120b, and 120c, respectively, and is operated = 1, not operated. It is represented by = 0.

(Step S240-19)
The main CPU 200a calculates the logical product of the rotating cylinder rotating flag acquired in step S240-13 and the operation target bit extracted in step S240-17. Here, if the reel 110 is rotating and the stop switch 120 corresponding to the reel is operated, that is, if the operated stop switch 120 corresponds to the reel 110 that is effectively rotating. , The logical product is 1.

(Step S240-21)
The main CPU 200a determines whether the logical product calculated in step S240-19 is 0, that is, whether or not the stop switch 120 corresponding to the rotating reel 110 is operated. As a result, if it is determined that the stop switch 120 corresponding to the rotating reel 110 is not operated, the process is transferred to step S240-3, and the stop switch 120 corresponding to the rotating reel 110 is operated. If it is determined that the process is performed, the process is transferred to step S240-23.

(Step S240-23)
The main CPU 200a acquires an output image including the stop indicator output bit, and calculates the logical product of the acquired output image and the logical product calculated in step S240-19. Here, when the operated stop switch 120 is lit in red, the bit of the logical product is 0, and when it is lit in blue, the bit of the logical product is 1.

(Step S240-25)
The main CPU 200a determines whether the logical product calculated in step S240-23 is 0, that is, whether the operated stop switch 120 is lit in red. As a result, if it is determined that the operated stop switch 120 is lit in red, the process is transferred to step S240-1, and if it is determined that the operated stop switch 120 is not lit in red, step S240-. Move the process to 27.

(Step S240-27)
The main CPU 200a determines whether the operated stop switch 120 is not valid. As a result, if it is determined that the operated stop switch 120 is not valid, the process is transferred to step S240-1, and if it is determined that the operated stop switch 120 is valid, the process is performed in step S240-29. Transfer. Here, it is determined whether or not the operated stop switch 120 is one. Then, when it is determined that the number of operated stop switches 120 is one, the process is transferred to step S240-29, and when it is determined that the number of operated stop switches 120 is not one, that is, two or more. The process is transferred to step S240-1.

(Step S240-29)
The main CPU 200a executes a stop control rotation cylinder setting process for acquiring various parameters for stopping the reel 110 corresponding to the operated stop switch 120.

(Step S240-31)
The main CPU 200a prohibits interrupts.

(Step S240-33)
The main CPU 200a executes a pressing reference position acquisition process for deriving the symbol number of the symbol located on the effective line A as the pressing reference position.

(Step S240-35)
The main CPU 200a executes a sliding frame number acquisition process for determining the number of sliding frames of the reel 110.

(Step S250)
The main CPU 200a executes a reel stop process for stopping the reel 110 corresponding to the operated stop switch 120. The rotation stop processing will be described later.

FIG. 26 is a flowchart illustrating a rotation cylinder stop process (S250) in the main control board 200.

(Step S250-1)
The main CPU 200a acquires the pressing reference position derived in step S240-35.

(Step S250-3)
The main CPU 200a calculates the stop request number by correcting the number of slip frames determined in step S240-37 with respect to the pressing reference position acquired in step S250-1.

(Step S250-5)
The main CPU 200a sets the stop request flag (sets it to 1). The stop request flag is a flag for requesting the stop processing of the target reel 110 from the programs operating in parallel, and by setting the stop request flag to 1, the symbol corresponding to the stop request number is valid. It is possible to stop on line A. The stop request flag and the above stop request number are read by a program operating in parallel, and the reel 110 is stopped. When the stop processing is completed, the stop request flag is reset to 0 (OFF) by the program.

(Step S250-7)
The main CPU 200a allows interrupts.

(Step S250-9)
The main CPU 200a sets a stop information command indicating the stop order of the reels 110 in the transmission buffer.

(Step S250-11)
The main CPU 200a sets the stop indicator output bit off (output image) in order to turn off (turn off) the bit corresponding to the indicator (not shown) of the stop switch 120.

(Step S250-13)
The main CPU 200a executes an output port image set process for updating the output image for the bits set in step S250-11.

(Step S250-15)
The main CPU 200a executes a display symbol bit setting process for setting a display symbol bit.

(Step S250-17)
The main CPU 200a executes the next cylinder setting preprocessing for stopping the next reel 110.

(Step S250-19)
The main CPU 200a determines whether or not the stop processing of all reels 110 has been completed. As a result, if it is determined that the stop processing of all reels 110 has not been completed, the process is transferred to step S240, and if it is determined that the stop processing of all reels 110 has been completed, the process proceeds to step S250-21. Move the process.

(Step S250-21)
The main CPU 200a determines whether the stop request flag is on for any of the reels 110, that is, whether all the reels 110 have been stopped. As a result, if it is determined that all the reels 110 have not been stopped, the process is transferred to step S250-21, and if it is determined that all the reels 110 have been stopped, the process is transferred to step S250-23.

(Step S250-23)
The main CPU 200a executes an error confirmation process for confirming the detection results of various errors.

(Step S250-25)
The main CPU 200a executes an operation target bit extraction process for extracting information on the operation target bit.

(Step S250-27)
The main CPU 200a determines whether or not the stop switch 120 is pressed based on the operation target bit acquired in step S250-25. As a result, if it is determined that the stop switch 120 is pressed, the process is transferred to step S250-23, and if it is determined that the stop switch 120 is not pressed, the process is transferred to step S260.

(Step S260)
The main CPU 200a executes a display determination process for determining a winning combination. The display determination process will be described later.

FIG. 27 is a flowchart illustrating a display determination process (S260) on the main control board 200.

(Step S260-1)
The main CPU 200a clears the buffer of the main payout display unit 132.

(Step S260-3)
The main CPU 200a determines whether or not a display determination error has occurred depending on whether or not the symbol combination displayed on the valid line A and the symbol combination permitted to be displayed on the valid line A match. Execute the detection process.

(Step S260-5)
The main CPU 200a sets an error code "EE" indicating that the display determination is abnormal (error).

(Step S260-7)
The main CPU 200a determines whether or not the display determination is abnormal based on the determination result in step S260-3. As a result, if it is determined that the display determination is abnormal, the process is transferred to step S112, and if it is determined that the display determination is not abnormal, the process is transferred to step S260-9.

(Step S260-9)
The main CPU 200a executes a display symbol identification generation process for determining a winning combination based on the symbol combination stopped (displayed) on the valid line A.

(Step S260-11)
The main CPU 200a sets 0 as the initial value of the number of payouts.

(Step S260-13)
The main CPU 200a determines whether or not the small winning combination has won. As a result, if it is determined that the small winning combination has won, the process is transferred to step S260-15, and if it is determined that the small winning combination has not won, the processing is transferred to step S260-35.

(Step S260-15)
The main CPU 200a turns on the winning flag indicating that the small winning combination has won.

(Step S260-17)
The main CPU 200a executes a payout number setting process for setting the payout number according to the winning small winning combination.

(Step S260-19)
The main CPU 200a determines whether or not it is an advantageous section. As a result, if it is determined that the section is not advantageous, the process is transferred to step S270, and if it is determined that the section is advantageous, the process is transferred to step S260-21.

(Step S260-21)
The main CPU 200a acquires the value of the advantageous section MY counter that counts the net increase in the number of sheets in the advantageous section.

(Step S260-23)
The main CPU 200a adds the number of payouts to the value of the advantageous section MY counter acquired in step S260-23.

(Step S260-25)
The main CPU 200a acquires the number of input sheets of the game.

(Step S260-27)
The main CPU 200a subtracts the number of input sheets from the value added in step S260-23.

(Step S260-29)
The main CPU 200a determines whether the subtraction result in step S260-27 is not negative. As a result, if it is determined that the subtraction result is not negative, the process is transferred to step S260-33, and if it is determined that the subtraction result is negative, the process is transferred to step S260-31.

(Step S260-31)
The main CPU 200a clears (sets to 0) the value of the advantageous section MY counter.

(Step S260-33)
The main CPU 200a updates the value of the advantageous section MY counter to the value subtracted in the step S260-27 or the value cleared in the step S260-31.

(Step S260-35)
The main CPU 200a determines whether or not the replay combination has won a prize. As a result, if it is determined that the replay combination has not won a prize, the process is transferred to step S270, and if it is determined that the replay combination has won a prize, the process is transferred to steps S260-37.

(Step S260-37)
The main CPU 200a sets the number of input sheets to the number of payout sheets.

(Step S260-39)
The main CPU 200a turns on the flag during replay operation.

(Step S260-41)
The main CPU 200a sets the number of automatically input sheets.

(Step S270)
The main CPU 200a executes a payout process for paying out medals. The payout process will be described later.

FIG. 28 is a flowchart illustrating a payout process (S270) in the main control board 200.

(Step S270-1)
The main CPU 200a acquires the flag during re-game operation.

(Step S270-3)
The main CPU 200a sets a payout start command indicating that the payout of medals has started in the transmission buffer.

(Step S270-5)
The main CPU 200a determines whether or not the replay combination has won a prize based on the replay operating flag acquired in step S270-1. As a result, if it is determined that the replay combination has won a prize, the process is transferred to step S270-41, and if it is determined that the replay combination has not won a prize, the process is transferred to step S270-7.

(Step S270-7)
The main CPU 200a executes a main display display process for displaying 0 on the main payout display unit 132.

(Step S270-9)
The main CPU 200a determines that there is no payout (the number of payouts is 0). As a result, if it is determined that there is no payout, the process is transferred to step S270-35, and if it is determined that there is a payout, the process is transferred to step S270-11.

(Step S270-11)
The main CPU 200a determines whether the number of stored sheets is 50 or more. As a result, if it is determined that the number of stored sheets is 50 or more, the process is transferred to step S270-13, and if it is determined that the number of stored sheets is not 50 or more, the process is transferred to step S270-15.

(Step S270-13)
The main CPU 200a executes a medal payout device control process for paying out one medal from the medal payout device 142, and shifts the process to step S270-23.

(Step S270-15)
The main CPU 200a sets a payout start interval timer.

(Step S270-17)
The main CPU 200a determines whether the payout start timer is not 0, that is, at the time of the first payout. As a result, if it is determined that it is the time of the first payout, the process is transferred to step S270-21, and if it is determined that it is not the time of the first payout, the process is transferred to step S270-19.

(Step S270-19)
The main CPU 200a executes a timer wait process of waiting until the payout start interval timer becomes 0.

(Step S270-21)
The main CPU 200a increments the number of stored sheets by one.

(Step S270-23)
The main CPU 200a sets a payout execution command indicating that one medal has been paid out in the transmission buffer.

(Step S270-25)
The main CPU 200a executes a main display pre-display processing for displaying the number of payouts already paid out on the main payout display unit 132.

(Step S270-27)
The main CPU 200a determines whether or not it is in the bonus gaming state. As a result, if it is determined that the game is not in the bonus game state, the process is transferred to step S270-31, and if it is determined that the game is in the bonus game state, the process is transferred to step S270-29.

(Step S270-29)
The main CPU 200a increments the number of medals acquired during the bonus operation, which is the number of medals paid out in the bonus game state, by 1.

(Step S270-31)
The main CPU 200a determines whether or not the payout of the number of medals to be paid out has been completed. As a result, if it is determined that the payout has not been completed, the process is transferred to step S270-11, and if it is determined that the payout has been completed, the process is transferred to step S270-33.

(Step S270-33)
The main CPU 200a executes a payout end process for ending the payout of medals.

(Step S270-35)
The main CPU 200a determines whether an over error has been detected. As a result, if it is determined that no over error has been detected, the process is transferred to step S270-41, and if it is determined that an over error has been detected, the process is transferred to step S270-37.

(Step S270-37)
The main CPU 200a sets an error code "E5" indicating an over error.

(Step S270-39)
The main CPU 200a executes an error display, a request for a warning sound, and an error wait process for waiting for error recovery.

(Step S270-41)
The main CPU 200a sets a payout end command indicating that the payout of medals has been completed in the transmission buffer.

(Step S280)
The main CPU 200a executes a game transition process for shifting the game state, managing an advantageous section, and the like. The game transition process will be described later.

FIG. 29 is a flowchart illustrating the game transition process (S280) in the main control board 200.

(Step S280-1)
The main CPU 200a acquires a re-game operating flag, and based on the acquired re-game operating flag, turns on or off a bit corresponding to a replay display (not shown) indicating that the next game is a re-game. Therefore, the stop indicator output bit off (output image) is set, and the replay indicator control process that updates the output bit of the set output image is executed.

(Step S280-3)
When the bonus combination is won, the main CPU 200a executes a bonus operation symbol display process for setting various parameters for controlling the bonus game state.

(Step S281)
The main CPU 200a executes a state-specific module execution process for executing a module for each effect state and section state. In the state-specific module execution process, the module (process) corresponding to the transferred effect state is read from the main ROM 200b and executed. Hereinafter, modules related to the features of the present embodiment will be described in detail, and modules unrelated to the features of the present embodiment will be omitted.

(Step S280-5)
In the bonus game state, the main CPU 200a executes a bonus operation end process for shifting the game state to the non-internal game state when the number of acquired cards during the bonus operation reaches a predetermined number.

(Step S280-7)
The main CPU 200a executes the advantageous section update process for managing the advantageous section.

(Step S280-9)
The main CPU 200a determines whether or not the next game is in the AT effect state. As a result, if it is determined that the next game is not in the AT effect state, the process is transferred to step S280-15, and if it is determined that the next game is in the AT effect state, the process is transferred to step S280-11.

(Step S280-11)
The main CPU 200a determines whether or not it is in the bonus gaming state. As a result, if it is determined that the game is not in the bonus game state, the process is transferred to step S280-15, and if it is determined that the game is in the bonus game state, the process is transferred to step S280-13.

(Step S280-13)
The main CPU 200a sets the advantageous lamp flag for lighting the section display 160 to ON.

(Step S280-15)
The main CPU 200a executes an effect command setting process for setting an effect command, which is a command related to an advantageous section, in the transmission buffer.

(Step S280-17)
The main CPU 200a sets a game end command indicating that one game has ended in the transmission buffer.

(Step S280-19)
The main CPU 200a executes a terminal board signal output process for outputting an external signal.

(Step S280-21)
The main CPU 200a determines whether or not the staging wait timer set when the advantageous section is terminated in step S280-7 is not zero. As a result, if it is determined that the effect wait timer is not 0, the process is transferred to step S280-21, and if it is determined that the effect wait timer is 0, the process is transferred to step S280-23.

(Step S280-23)
The main CPU 200a sets a game state command indicating the game state in the transmission buffer.

(Step S280-25)
The main CPU 200a sets a game start command indicating the start of the next game in the transmission buffer, and shifts the process to step S200.

FIG. 30 is a flowchart illustrating a normal AT effect state process (S281) executed in the state-specific module execution process. The normal AT effect state process is executed when the effect state is the normal AT effect state.

(Step S281-1)
The main CPU 200a determines whether or not the game is the final game in the normal AT effect state based on the net increase in the number of sheets in the normal AT effect state. As a result, if it is determined that the final game is in the normal AT effect state, the process is moved to step S281-3, and if it is determined that the final game is not in the normal AT effect state, the normal AT effect state process is terminated. ..

(Step S281-3)
The main CPU 200a performs a continuous lottery with reference to a continuous lottery table (not shown).

(Step S281-5)
The main CPU 200a determines whether or not the continuous lottery has been won. As a result, if it is determined that the continuous lottery has been won, the process is transferred to steps S281-7, and if it is determined that the continuous lottery has not been won, the process is transferred to steps S281-9.

(Step S281-7)
The main CPU 200a turns on the continuation flag and shifts the process to steps S281-17.

(Step S281-9)
The main CPU 200a determines whether the value of the advantageous section MY counter is less than 400. As a result, if it is determined that the value of the advantageous section MY counter is less than 400, the process is transferred to steps S281-11, and if it is determined that the value of the advantageous section MY counter is not less than 400, the process proceeds to step S281-15. Move the process.

(Step S281-11)
The main CPU 200a performs an advantageous continuation lottery with reference to an advantageous continuation lottery table (not shown).

(Step S281-13)
The main CPU 200a determines whether or not the advantageous continuous lottery has been won. As a result, if it is determined that the advantageous continuation lottery has been won, the process is transferred to steps S281-17, and if it is determined that the advantageous continuation lottery has not been won, the process is transferred to steps S281-15.

(Step S281-15)
The main CPU 200a sets the next AT flag to a value corresponding to the non-advantageous standby effect state, sets a flag for setting the game section to the non-advantageous section in step S280-7, and sets the normal AT effect state process. To finish.

(Step S281-17)
The main CPU 200a sets the next AT flag to a value corresponding to the advantageous standby effect state, and ends the normal AT effect state process.

One game is executed through a series of processes from step S200 to step S280. After that, steps S200 to S280 are repeated.

Next, the evacuation process when the power is turned off and the timer interrupt process in the main control board 200 will be described.

(Evacuation processing when the power of the main control board 200 is turned off)
FIG. 31 is a flowchart illustrating the evacuation process when the power is turned off in the main control board 200. The main CPU 200a monitors the power supply cutoff detection circuit, and when the power supply voltage becomes equal to or less than a predetermined value, it interrupts and executes the power cutoff save processing.

(Step S300-1)
When the power cutoff warning signal is input, the main CPU 200a saves the register.

(Step S300-3)
The main CPU 200a checks the power cutoff warning signal.

(Step S300-5)
The main CPU 200a determines whether or not the power supply cutoff warning signal is detected. As a result, if it is determined that the power cutoff warning signal has been detected, the process is transferred to step S300-11, and if it is determined that the power supply cutoff warning signal has not been detected, the process is transferred to step S300-7. ..

(Step S300-7)
The main CPU 200a restores the register.

(Step S300-9)
The main CPU 200a performs a process for permitting an interrupt, and ends the save process when the power is turned off.

(Step S300-11)
The main CPU 200a executes an output port clearing process for stopping the output of the output port.

(Step S300-13)
The main CPU 200a executes an evacuation process when the power is turned off for another area.

(Step S300-15)
The main CPU 200a executes a RAM protect setting process necessary for prohibiting access to the main RAM 200c.

(Step S300-17)
The main CPU 200a sets a predetermined number of times of power failure detection signal detection to the counter value of the loop counter in order to set the power failure occurrence monitoring time.

(Step S300-19)
The main CPU 200a subtracts 1 from the value of the loop counter set in step S300-17.

(Step S300-21)
The main CPU 200a determines whether the counter value of the loop counter is not 0. As a result, if it is determined that the counter value is not 0, the process proceeds to step S300-19, and if it is determined that the counter value is 0, the process proceeds to the CPU initialization process (step S1000) described above.

When the power is actually cut off, the operation of the slot machine 100 is stopped while looping from step S300-19 to step S300-21.

(Timer interrupt processing of main control board 200)
FIG. 32 is a flowchart illustrating timer interrupt processing in the main control board 200. The main control board 200 is provided with a reset clock pulse generation circuit that generates a clock pulse at a predetermined cycle (1.49 ms in the reference example of simultaneous rotation, hereinafter referred to as “1.49 ms”). Then, when a clock pulse is generated by the reset clock pulse generation circuit, it interrupts and the following timer interrupt processing is executed.

(Step S400-1)
The main CPU 200a saves the register.

(Step S400-3)
The main CPU 200a clears the interrupt flag.

(Step S400-5)
The main CPU 200a reads various input port images and executes port input processing for accurately acquiring the latest switch state.

(Step S400-7)
The main CPU 200a outputs the set output image to the output port, and outputs the main credit display unit 130, the main payout display unit 132, the input number display, the start display, the display of the stop switches 120a, 120b, 120c, and the replay display. The dynamic port output process for controlling the lighting of the device and the section display 160 is executed.

(Step S400-9)
The main CPU 200a updates the timer interrupt processing phase. The timer interrupt processing phase is any of 0 to 3, and here, 1 is added when the timer interrupt processing phase is 0, 1, and 2, and 1 is added when the timer interrupt processing phase is 3. Is changed to 0.

(Step S400-11)
The main CPU 200a performs a subcommand transmission process for transmitting the command stored in the transmission buffer to the subcontrol board 202.

(Step S400-13)
The main CPU 200a executes a stepping motor control process for controlling the stepping motor 152.

(Step S400-15)
The main CPU 200a executes an output port image output process for outputting an output image to be output to the medal payout device 142.

(Step S400-17)
The main CPU 200a executes a random number update process for updating various random numbers.

(Step S400-19)
The main CPU 200a executes an fraud monitoring process for detecting an error in order to output an external signal (external signals 4, 5) corresponding to the error to the outside.

(Step S400-21)
The main CPU 200a executes a module (subroutine) corresponding to the timer interrupt processing phase updated in step S400-9. Here, the timer interrupt processing phase is set to any of 0 to 3, and one module corresponding to each of the timer interrupt processing phases 0 to 3 is provided (four in total), 1 One module will be executed once every four times of timer interrupt processing (every 5.96 ms). For example, a module that executes time monitoring processing for subtracting various timers is associated with one timer interrupt processing phase.

(Step S400-23)
The main CPU 200a executes a test signal output process for outputting a test signal to the outside.

(Step S400-25)
The main CPU 200a reads various input port images and executes port input processing for accurately acquiring the latest switch state.

(Step S400-27)
The main CPU 200a restores the register.

(Step S400-29)
The main CPU 200a permits interrupts and ends the timer interrupt process.

<Configuration around the CPU of the main control board>
FIG. 33 is a diagram for explaining an electrical connection around the main CPU 200a. The main CPU 200a includes a CPU core 700 and a bus controller 702. The CPU core 700 controls the bus controller 702 through a bus control signal (Bus Cont) output from the BC terminal, reads data from the main ROM 200b, the main RAM 200c, or the input / output unit 704, or reads data to the main RAM 200c. Write. Here, as the main CPU 200a, a microprocessor sold by LETech, which is based on a Z80 series CPU, is used.

For example, when reading data from the main ROM 200b, the main RAM 200c, or the input / output unit 704, the bus controller 702 outputs a 16-bit address (A [16]) signal, and the main ROM 200b, through the decoders 706a, 706b, 706c, While specifying either the main RAM 200c or the input / output unit 704, the read (RD) signal is controlled to read the data (D [8]) signal from the main ROM 200b, the main RAM 200c, or the input / output unit 704. .. When writing data to the main RAM 200c or the input / output unit 704, the bus controller 702 outputs an address (A [16]) signal and a data (D [8]) signal, and outputs the main RAM 200c through the decoders 706b and 706c. , Or the input / output unit 704 is specified, and the write (WR) signal is controlled to write a data (D [8]) signal to the main RAM 200c or the input / output unit 704.

Here, as will be described later, the address space of the input / output unit 704 is integrated with the address space of the main ROM 200b and the main RAM 200c. Therefore, conventionally, the memory request (MRQ) terminal and the I / O request (IORQ) terminal for outputting a signal for specifying whether to access the memory or the I / O are not provided. By reassigning these two terminals to any other signal, the degree of freedom in program development can be increased.

Further, in the CPU core 700, an interrupt / wait (INT / WAIT) signal that triggers the start of interrupt processing, an unmaskable interrupt (NMI) signal that can execute interrupt processing with the highest priority, and a bus signal are set to high impedance. An external signal such as a transitionable bus request (BUSREQ) signal is also input.

FIG. 34 is a block diagram showing the internal configuration of the CPU core 700. The CPU core 700 includes an external input unit 710, a state control unit 712, a central control unit 714, a register unit 716, and an arithmetic logic unit (ALU) 718. The external input unit 710 receives an external signal and outputs control information based on the external signal to the state control unit 712 and the central control unit 714.

The state control unit 712 manages and transitions the internal state (REST, instruction fetch, instruction decoder, operation, memory load, memory store, HALT, etc.) to determine the operating state of the CPU core 700, and is based on the internal state. The control information is output to the central control unit 714.

The central control unit 714 extracts an operation code (instruction) from the input data (DI [8]) input via the bus controller 702, and controls the ALU718 based on the command decoded by the instruction decoder. Further, the central control unit 714 acquires necessary information from each register of the register unit 716 and updates each register by the decoded command.

The register unit 716 includes selector ports 722a, 722b, 722c, input side bank selector 724, first register bank 726, second register bank 728, output side bank selector 730, address port 732, and individual register 734. In the individual register 734, a 16-bit program counter (PC) indicating the address of the program to be executed next, an 8-bit interrupt (I) register used in the interrupt mode, and an operation code fetch cycle are counted. It includes a bit refresh (R) register and an 8-bit interrupt permission (IFF) register that controls interrupt permission / prohibition.

Further, in the register unit 716, random numbers are generated for acquiring various random number values (big hit determination random number, winning symbol random number, reach group determination random number, reach mode determination random number, variation pattern random number, hit determination random number) related to the big win lottery. A device (not shown) is associated with each other, and a random number value latched via an input port (FE73h to FE9Ch) is acquired.

The random number generator operates with a system clock (a clock obtained by dividing an external input by two) and generates a random number less than a predetermined maximum value. The random number generator is a random number generator that can set the maximum value of random numbers. As a maximum value setting random number generator, a random number generator that can set a maximum value of 16 bits has 4 channels and a maximum value of 8 bits is set. Eight channels of possible random number generation are prepared. Here, the 16-bit maximum value setting random number generator can be selected in the range of 32 to 47 clocks for the random number update cycle, and the maximum value can be set in the range of 256 to 65535. In addition, the 8-bit maximum value setting random number generator can select the random number update cycle in the range of 16 to 31 clocks, the maximum value setting range can be set in the range of 16 to 255 in 4 channels, and the other 4 channels. It can be set in the range of 64 to 255. In addition, as a maximum value fixed random number generator that is a random number generator with a fixed maximum value of random numbers, there are 4 channels of random number generation that can set the maximum value of 16 bits, and random number generation that can set the maximum value of 8 bits. Eight channels are prepared. Here, the 16-bit maximum value fixed random number generator has a random number update cycle fixed to 1 clock and a maximum value fixed to 65535. Further, the 8-bit maximum value fixed random number generator has a random number update cycle fixed to 1 clock and a maximum value fixed to 255.

If there are not enough types of random numbers, the random number value obtained from the hardware random number generator (random number generator) is multiplied by a predetermined value in the program and divided to generate another random number (software). Random number generator) is also possible.

FIG. 35 is a diagram illustrating a register configuration. The first register bank 726 and the second register bank 728 both have 8-bit registers (Q, U, A, F, B, C, D, E, H, L) and 16-bit registers (IX, IY, SP) is provided. Further, the registers of the first register bank 726 and the second register bank 728 include a front register and a back register. The main CPU 200a can access only the front register of the register bank indicated by the register bank designation register RB in the F register, and cannot access the back register.

Of the registers shown in FIG. 35, the Q register is an 8-bit dedicated register with extended specifications for gaming machines. The Q register is fixed at F0h and is used for accessing the main RAM 200c of F000h to F0FFh. The U register is an 8-bit dedicated register with extended specifications for gaming machines. The U register is fixed to FEh and is used to access the built-in device (timer, random number generator, external input / output circuit, etc.) connected to the input / output unit 704 of FE00h to FEFFh. The A register is used for arithmetic processing and data transfer. The F register is an 8-bit flag register that holds various calculation results. Here, each bit of the F register is the most significant bit (MSB:) as shown in FIG. 35. From Most Significant Bit) to the least significant bit (LSB: Least Significant Bit), S is a sign flag set to 1 when the operation result is negative, and Z is 1 when all bits are 0 as a result of the operation. It is a zero flag (first zero flag) set to, and TZ is an extended specification for gaming machines that is set to 1 (value changes) when all bits are 0 by executing a data transfer instruction (LD; load). It is a specific bit flag (second zero flag) and is sometimes called a timer flag. H is a half-carry flag that the programmer cannot participate in, and RB is the current register bank (first register bank 726 = 0, first). 2 Register bank monitor indicating register bank 728 = 1), P / V is a parity overflow flag, N is an addition / subtraction flag that the programmer cannot participate in, and C is a carry or borrow as a result of the operation. It is a carry flag in which 1 is sometimes set. The F register constitutes the A register and the pair register AF.

The B register, C register, D register, E register, H register, and L register are 8-bit general-purpose registers, and each constitutes a 16-bit pair register BC, DE, and HL whose combination is predetermined. .. The IX register and the IY register are 16-bit dedicated registers for index addressing. The SP (stack pointer) register is 16 bits and stores an address that serves as a stack pointer. Q'register, A'register, F'register, B'register, C'register, D'register, E'register, H'register, L'register, IX'register, IY'register are Q register, A register. , F register, B register, C register, D register, E register, H register, L register, IX register, IY register. And F'registers make up pair register AF', B'register and C'register make up pair register BC', D'register and E'register make up pair register DE', H'register and L. The'registers make up the pair register HL'. The back register can be used by selecting and exchanging either of the front register and the register by a replacement instruction or the like. On the other hand, the register U and the register SP are single registers having no back register. In this way, the back register functions as a stack area of the front register when the interrupt process occurs.

By the way, as described above, in the main control board 200, the main CPU 200a controls the progress of the game in cooperation with the main RAM 200c based on the program stored in the main ROM 200b. The program for executing these functional units is arranged in a predetermined area (used area) of the main ROM 200b and the main RAM 200c.

FIG. 36 is an explanatory diagram showing a memory map. A memory space of 0000h to 3FFFh (12kbyte) is allocated to the main ROM 200b, a memory space of F000h to F3FFh (1kbyte) is allocated to the main RAM 200c, and the input / output unit 704 is allocated to the FE00h to FEFFh (256byte). Memory space is allocated. The instruction code of the program is written in assembler language. Here, the program is composed of an instruction code, is read by a computer, and can realize a predetermined process in cooperation with data and a work area.

A used area is allocated to the memory space of the main ROM 200b from 0000h to 1DF3h. The used area is an area for storing programs and data for executing a game control process for controlling the progress of the game. Specifically, in the memory space (control area) limited to 0000h to 11FFh (4.5kbyte), the initialization means 300, the betting means 302, the winning type lottery means 304, the reel control means 306, the determination means 308, and the payout control. The instruction code of the program for executing the game control process for controlling the progress of the game by operating the means 310, the game state control means 312, the effect state control means 314, and the command transmission means 316 is stored, and 1200h to 1DF3h (3). Data used for the game control processing program is stored in the memory space (data area) limited to 0.0 kbyte). Further, a comment area is allocated to the memory space of 1E00h to 1FFFh, and a program management area is allocated to the memory space of 3FC0h to 3FFFh. Further, another area (unused area) is allocated to the memory space of 2000h to 3FBFh. As will be described later, another area is an area for storing programs and data that are not defined to be stored in the used area. Specifically, in the memory space of 2000h to 3FBFh, instruction codes and program data of a program that performs some or all of the game machine test processing and security-related processing that do not affect the progress of the game are stored. It is stored. The test process for a game machine is a test process for the slot machine 100 described in the connection specification (fourth edition) of the test machine for a rotating drum type game machine. The security-related process is a process for identifying an abnormal state for the purpose of preventing fraud by a third party or finding a defect, and includes, for example, the determination of the backup flag and the execution of the checksum described above. There is no limitation on the storage capacity in another area, and in the example of FIG. 36, it can be freely allocated to a storage area other than the used area, the comment area, and the program management area.

As described above, the main CPU 200a may perform not only gaming control processing but also gaming machine test processing and security-related processing. However, the storage capacity of the used area is predetermined, for example, as shown in FIG. 36, the control area is limited to 4.5 kbytes and the data area is limited to 3.0 kbytes. Therefore, if not only the game control process but also the game machine test process and the security-related process programs and data are arranged in the used area, the storage area for performing the game control process is limited accordingly. Here, the program (used program) and data for executing the game control process must be stored in the used area, but do not affect the progress of the game other than the game control process (not directly related). A program (separate program) or data for executing a process (test process for a game machine, security-related process, etc.) can be stored in either a used area or another area. Therefore, at least a part of the program or data for executing the backup flag determination process and the checksum execution process, which are the processes corresponding to the security-related process, is stored in a storage area different from the used area (other than the used area). It is described in another area that is a part of it.

When the process executed in the used area (here, the game control process) and the process that does not necessarily have to be performed in the used area (here, the security-related process) are mixed in this way, the game control process is performed. To store the program (program used) and data for executing the game in the area used, and to execute the process (security-related process) that does not affect the progress of the game other than the game control process, which does not need to be performed in the area used. It is desirable to store the program (separate program) and data in another area. By dividing the storage area into a plurality of areas in this way, a margin is created in the storage area (capacity) of the used area by the amount of the program moved to another area. Therefore, it is possible to allocate the used area to the game control process (used program) by that amount.

However, even when the storage area is divided into the used area and another area as described above, the fairness of the gaming machine must be guaranteed. Therefore, the following conditions (1) to (6) are stipulated in order to appropriately divide the roles between the used area and another area while ensuring the fairness of the gaming machine.

Condition (1), programs placed in different areas are used for the purpose of signal output (test processing for gaming machines) and fraud prevention (security-related processing) necessary for testing gaming machines, which impairs the fairness of the game. It should not be (damaged). Condition (2), the control area and the data area, which are different from the used area, should be placed in an explicitly distinguished area. Condition (3), the program to be placed in another area (separate program) must be statically called from the program in the used area (used program) and then executed. In addition, the callee address must be clearly stated in the program list at that time. Condition (4), the program to be placed in another area should be modularized for each function, and when called, the contents of all the registers used in the used area should be protected. Condition (5), access to RAM in each other's area from the used area or another area can only be referred, and can not be updated. Condition (6), it is not possible to call a subroutine in the control area of the used area from the control area of another area. Since a subroutine that performs interrupt processing is provided in the used area, it is necessary to prohibit interrupts when using a control area in another area. In addition, in order to properly execute the game control process, the time from the interrupt prohibition to the release of the interrupt prohibition must be within the interval (for example, 1.49 msec) of the interrupt process in the game control process. Must be. Therefore, when a subroutine that uses a control area of another area is called, the total time required for one call is set so as to be within the interrupt processing interval of the game control processing.

Further, a used area is allocated to the memory space of F000h to F1FFh of the main RAM 200c. Specifically, the work area for the game control process is allocated to the memory spaces of F000h to F13Fh, and is used for managing variables such as timers, counters, and flags. The stack area of the game control process is allocated to the memory spaces of F1C0h to F1FFh. Further, another area is allocated to the memory space of F200h to F3FFh of the main RAM 200c. Specifically, a work area for a part or all of the security-related processes is allocated to the memory space of F210h to F22Fh, and is used for variable management of timers, counters, flags, and the like. In the memory space of F230h to F246h, a stack area of a part or all of the security-related processes is allocated.

Further, an input / output unit 704 is assigned to the memory spaces of FE00h to FEFFh. Conventionally, in order to access the device corresponding to the input / output unit 704, a 256-byte I / O space is provided independently of the memory space. On the other hand, in the present embodiment, the MRQ and IORQ signals are eliminated, and the memory and the input / output unit 704 are commonly accessed by the RD and WR signals. Further, a U register is provided as hardware for designating the address of the upper 8 bits for accessing the device connected to the input / output unit 704, and the upper address of the 8 bits is specified in advance here. As a result, the I / O space provided independently of the memory space is integrated into the memory space into one address space, and when the IN instruction and the OUT instruction are executed, the input / output unit 704 assigned to the memory space is executed. On the other hand, the upper 8 bits are specified by the U register, and the lower 8 bits are accessible by using the lower 8 bits specified by the operands of the IN instruction and the OUT instruction.

In this embodiment, the LDQ instruction uses the Q register to access the memory space (mainly the data area and work area), and the IN instruction and the OUT instruction use the U register to access the device (timer, random number generator, external input / output). You will be able to write a program to access the I / O of the circuit, etc.). With such a configuration, it becomes easy to grasp the program at the time of design. In addition, the memory and I / O specified by the 16-bit address can be accessed by the lower 8-bit operand, and the program capacity can be compressed. Furthermore, by having a Q register, a Q'register, a U register, and a plurality of upper designated registers, the number of replacements due to reuse of the upper register is smaller than when there is only one upper register, and the program capacity is further compressed. be able to.

In the above example, the memory space corresponding to the I / O space is accessed by the IN instruction and the OUT instruction, but the memory space may be directly accessed by the IN instruction and the OUT instruction. This means that, for example, when accessing three 256-byte areas on the memory, the upper 8 bits of each are specified in the Q register, the Q'register, and the U register, and the LDQ instruction and the IN instruction OUT instruction each area. It can be realized by accessing.

Hereinafter, specific instruction codes (command groups) for realizing each of the above-mentioned processes (modules) will be described. Here, in particular, the stop control rotation cylinder setting processing S240-29 in the rotation cylinder rotation processing S240 of FIG. 25 will be described.

(Stop control rotation cylinder setting process S240-29)
As described above, when the correct answer combination and the incorrect answer combination are duplicated in the selection winning type, the correct answer combination can be won by operating the stop switches 120a, 120b, 120c according to the correct answer operation mode. Therefore, in the slot machine 100, it is necessary to grasp what kind of operation mode (here, what kind of operation order) the player has operated the stop switches 120a, 120b, 120c. Therefore, in the stop control rotation cylinder setting process, it is managed which of the stop switches 120a, 120b, and 120c is operated.

Here, mainly, the processing cylinder bit (processing rotation information) indicating the stop switches 120a, 120b, 120c in which the operation is actually performed, and the stop rotation bit (the processing rotation bit) in which the processing rotation bit is accumulated by the logical sum are stored. The operation value (also referred to as "reel stop batting order" or "batting order value"), which is a numerical value that can uniquely identify the operation order in which the stop switches 120a, 120b, and 120c are operated with reference to the stop rotation information), and first A first stop value, which is a numerical value that can uniquely identify the operated stop switches 120a, 120b, and 120c, is derived. The processing rotation bit is an image of the input port 0, and is composed of a 3-bit bit string (stop switch 120a = bit 0, stop switch 120b = bit 1, stop switch 120c = bit 2) for operation. The stopped switch 120 that is set to 1 is set to 1, and the stop switch 120 that is not operated is set to 0. Further, the stop rotation bit is composed of a 3-bit bit string (reel 110a = bit 0, reel 110b = bit 1, reel 110c = bit 2), and is a process already used for stop control of the reels 110a, 110b, 110c. The reeling bit and the currently acquired processing reeling bit are set to 1, and the stop switch 120 that has not yet been operated is set to 0. Therefore, it is possible to grasp the reels 110a, 110b, 110c whose stop control is ex post facto or whose stop control has already been executed by the stop rotation bit. Even if the processing rotating bit such as a so-called slide push is already used for the stop control of the reels 110a, 110b, 110c, the stop control of the reels 110a, 110b, 110c is not always started. Here, the slide push enables the stop operation of another stop switch 120 immediately when an effective stop operation is performed on one stop switch 120 (the stop operation is invalid between the stop operations). (Those that do not set the time).

FIG. 37 is an explanatory diagram for explaining a change mode of the stop rotation bit. Here, "000B" is set as the initial value of the stop rotation bit. First, when any one of the stop switches 120a, 120b, and 120c is first stopped (first stop), the processing cylinder bit changes according to the operation of the stop switches 120a, 120b, 120c. For example, as shown in FIG. 37 (a), when the stop switch 120a is first stopped, the processing rotation cylinder bit becomes "001B" corresponding to the stop switch 120a. Then, the stop rotation bit is "001B" by combining (logically) the initial value "000B" and the processing rotation bit "001B".

When any one of the stop switches 120a, 120b, and 120c is stopped (second stop) after the first stop, the processing spinning bit changes according to the operation of the stop switches 120a, 120b, 120c. For example, as shown in FIG. 37 (b), when the stop switch 120b is secondly stopped, the processing rotation cylinder bit becomes "010B" corresponding to the stop switch 120b. Then, the stop rotation bit is "011B" by combining (logically) the stop rotation bit "001B" at the time of the first stop and the processing rotation bit "010B" at the time of the second stop. In this way, at the time of the second stop, the two bits of the stop rotation bit become 1.

When any of the remaining stop switches 120a, 120b, and 120c is stopped (third stopped) after the second stop, the processing spinning bit changes according to the operation of the stop switches 120a, 120b, 120c. .. For example, as shown in FIG. 37 (c), when the stop switch 120c is thirdly stopped, the processing rotating bit becomes "100B" corresponding to the stop switch 120c. Then, the stop rotation bit is "111B" by combining (logically) the stop rotation bit "011B" at the time of the second stop and the processing rotation bit "100B" at the time of the third stop. In this way, at the time of the third stop, the stop rotation bit is always "111B".

Further, at the time of the second stop, the processing spinning bit and the stopping spinning bit are referred to, and the operation value indicated by the one-digit value in the decimal number is derived. Specifically, the stop rotation bit set by the second stop is shifted to the right by 1 bit, and the logical product is obtained with 001B, and the result is ORed with the processing rotation bit at the time of the second stop. Furthermore, an exclusive OR is taken with the stop rotation bit. In this way, the operation value is derived as shown in FIG. 37 (b). Further, by performing a bit operation (1 bit right shift) on the operation value derived in this way, the first stop value is derived as shown in FIG. 37 (b). Hereinafter, the specific operation of the stop control rotation cylinder setting process will be described.

The stop control turning cylinder setting process is performed by the SET_REL module that performs various parameters for each reel (turning cylinder). The main CPU 200a reads a program from the main ROM 200b and executes the SET_REL module in the program.

FIG. 38 is a flowchart showing a specific process of the SET_REL module, and FIG. 39 is a diagram showing an example of a specific command of the SET_REL module. The numerical value of step S in the description of FIG. 38 will be used only in the description of the present figure. It is assumed that the processing rotation bit is stored in the address "_CUR_REL" and the stop rotation bit is stored in the address "_STP_BIT" one byte lower than the address. Further, the operating states of the reels 110a, 110b, 110c, that is, the motor phase indicating standby, acceleration, steady rotation, and stop, are based on the address "@STP_MOT_ADR" (_SMC_PHS), and the reels 110a, 110b, 110c. It is assumed that one byte is continuously arranged for each. Further, it is assumed that the processing rotation bit is stored in the A register before shifting to the SET_REL module.

As shown in FIG. 38, first, the relative addresses of the work areas for the reels 110a, 110b, 110c are set (S1), and the relative addresses of the corresponding reels 110a, 110b, 110c are calculated (S2). Specifically, the value of the A register (processing rotation bit) is duplicated (saved) in the E register by the command "LD E, A" on the second line of FIG. 39, and by the command "SRLA" on the third line. The value of the A register is shifted to the right by 1 bit, and the relative address (0 to 2) is derived. By such a right shift, the processing rotation bit of the operated stop switches 120a, 120b, 120c is converted into a relative address (0 to 2). For example, when the stop switch 120a is operated, the processing cylinder bit "001B" is right-shifted to an offset "0", and when the stop switch 120b is operated, the processing rotation bit "010B" is right-shifted to an offset "0". When the stop switch 120c is operated, the processing rotation bit “100B” is shifted to the right and becomes an offset “2”. Then, the value of the Q register is read into the IXh register by the command "LDQ IX, LOW @ STP_MOT_ADR" on the fourth line of FIG. By the command "ADDWB IX, A" of, the value (relative address) of the A register is added to the value of the IX register, and the reels 110a, 110b, corresponding to the stop switches 120a, 120b, 120c operated by the value of the IX register, The address of the motor phase of 110c is calculated. The address calculated in this way is used in other processing.

Next, as shown in FIG. 38, the address of the processing spinning bit is set (S3), and the processing spinning bit is saved (S4). Specifically, the value of the Q register is read into the H register by the command "LDQ HL, LOW _CUR_REL" on the sixth line of FIG. 39, and the value of the lower 1 byte of the address "_CUR_REL" indicating the processing rotation bit is set to the L register. The value of the E register (processing rotation bit) is stored in the address indicated by the HL register by "LD (HL), E" on the 7th line.

Subsequently, as shown in FIG. 38, the address of the stop rotation cylinder bit is set (S5), the stop rotation cylinder bit is synthesized and updated (S6), and the stop operation of the stop switches 120a, 120b, 120c this time is performed. If it is determined whether it is not the second stop (S7), if it is the second stop (NO in S7), the process proceeds to step S8, and if it is not the second stop (YES in S7), the stop control rotation cylinder setting process is terminated. do. Specifically, the command "DEC HL" on the 8th line of FIG. 39 decrements the HL register by 1, and the address one byte below the address "_CUR_REL", that is, the address "_STP_BIT" indicating the stop rotation bit is changed. It is set, the value of the E register (processing rotation bit) is duplicated in the A register by the command "LD A, E" on the 9th line, and the A register is duplicated by the command "OR A, (HL)" on the 10th line. The logical sum of the value of (processing rotation bit) and the value stored at the address indicated in the HL register (stop rotation bit) is calculated, and the command "LD (HL), A" on the 11th line is used. If the value of the A register is stored in the address indicated by the HL register and the parity bit of the value of the A register logically summed by the command "RET PO" on the 12th line is odd (ODD), that is, the first. If it is a stop or a third stop, move to the next higher routine.

When it is determined in step S7 that the operation is the second stop operation, as shown in FIG. 38, an operation value is generated (S8), the generated operation value is saved (S9), and the stop control rotation cylinder setting is performed. End the process. Specifically, the value of the A register (stop rotation bit) is duplicated in the B register by the command "LD B, A" on the 13th line in FIG. 39, and the value of the A register is duplicated by the command "RRCA" on the 14th line. The value is shifted to the right by 1 bit, and the command "AND A, 00000001B" on the 15th line leaves only the logical product of the value of the A register and "00000001B", that is, bit 0 of the value of the A register in the A register. The command "OR A, E" on the 16th line holds the logical sum of the value of the A register and the value of the E register (processing cycle bit) in the A register, and the command "XOR A, B" on the 17th line. The exclusive logical sum of the value of the A register and the value of the B register (stop rotation bit) is held in the A register, and the value of the Q register is stored by the command "LDQ (LOW _STP_ORD), A" on the 18th line. Is the upper 1 byte of the address, the value of the lower 1 byte of the address "_STP_ORD" is the lower 1 byte of the address, and the value (operation value) of the A register is stored in the address. Then, the command "RET" on the 19th line in FIG. 39 moves to the next higher routine.

Here, at the time of the second stop, the stop rotation bit is shifted to the right by 1 bit, and the logical product is obtained with 001B, and the result is ORed with the processing rotation bit at the time of the second stop, and the stop turn is further performed. The operation value is derived by taking the exclusive OR with the body bit. As described above, the operation value is a numerical value that can uniquely specify the operation order in which the stop switches 120a, 120b, 120c are operated, and batting order 1 = operation value "0", batting order 2 = operation value "1", batting order. 3 = operation value "2", batting order 4 = operation value "3", batting order 5 = operation value "4", batting order 6 = operation value "5". Hereinafter, the derivation mode of the operation values 0 to 5 in each of the batting orders 1 to 6 will be described.

FIG. 40 is an explanatory diagram illustrating a mode of deriving the operation value based on the batting order. At the time of the second stop when the batting order is 1 (left → middle → right), the stop switch 120b is operated as shown in FIG. Is also operated, so the stop rotation bit is "011B". Here, when the stop turning bit is shifted to the right by 1 bit, it becomes "001B", the logical product of the calculation result and "00000001B" becomes "001B", and the logical sum of the calculation result and the processing turning bit is It becomes "011B", and the exclusive OR of the operation result and the stop rotation bit becomes "000B". Therefore, the operation value is "0".

Further, at the time of the second stop when the batting order 2 (left → right → middle) is operated, since the stop switch 120c is operated as shown in FIG. Since the switch 120a is also operated, the stop rotation bit is "101B". Here, when the stop turning bit is shifted to the right by 1 bit, it becomes "010B", the logical product of the calculation result and "00000001B" becomes "000B", and the logical sum of the calculation result and the processing turning bit is It becomes "100B", and the exclusive OR of the operation result and the stop rotation bit becomes "001B". Therefore, the operation value is "1".

Further, at the time of the second stop when the batting order 3 (middle → left → right) is operated, since the stop switch 120a is operated as shown in FIG. Since the switch 120b is also operated, the stop rotation bit is "011B". Here, when the stop turning bit is shifted to the right by 1 bit, it becomes "001B", the logical product of the calculation result and "00000001B" becomes "001B", and the logical sum of the calculation result and the processing turning bit is It becomes "001B", and the exclusive OR of the operation result and the stop rotation bit becomes "010B". Therefore, the operation value is "2".

Further, at the time of the second stop when the batting order 4 (middle → right → left) is operated, since the stop switch 120c is operated as shown in FIG. Since the switch 120b is also operated, the stop rotation bit is "110B". Here, when the stop turning bit is shifted to the right by 1 bit, it becomes "011B", the logical product of the calculation result and "00000001B" becomes "001B", and the logical sum of the calculation result and the processing turning bit is It becomes "101B", and the exclusive OR of the calculation result and the stop rotation bit becomes "011B". Therefore, the operation value is "3".

Further, at the time of the second stop in the case of operating in the batting order 5 (right → left → middle), as shown in FIG. 40, since the stop switch 120a is operated, the processing turning bit becomes “001B” and has already stopped. Since the switch 120c is also operated, the stop rotation bit is "101B". Here, when the stop turning bit is shifted to the right by 1 bit, it becomes "010B", the logical product of the calculation result and "00000001B" becomes "000B", and the logical sum of the calculation result and the processing turning bit is It becomes "001B", and the exclusive OR of the operation result and the stop rotation bit becomes "100B". Therefore, the operation value is "4".

Further, at the time of the second stop in the case of operating in the batting order 6 (right → middle → left), as shown in FIG. Since the switch 120c is also operated, the stop rotation bit is "110B". Here, when the stop turning bit is shifted to the right by 1 bit, it becomes "011B", the logical product of the calculation result and "00000001B" becomes "001B", and the logical sum of the calculation result and the processing turning bit is It becomes "011B", and the exclusive OR of the operation result and the stop rotation bit becomes "101B". Therefore, the operation value is "5". In this way, at the time of the second stop, the operation values 0 to 5 can be uniformly obtained from the operation results of the batting order 1 to 6.

FIG. 41 is a diagram showing the basis for deriving the operation value. As described above, at the second stop, the stop rotation bit is shifted to the right by 1 bit, and the logical product is obtained with 001B, and the result is ORed with the processing rotation bit at the second stop. Furthermore, the operation value is derived by taking an exclusive OR with the stop rotation bit. The reason why the operation value is required is as follows. Here, we show a method that can be easily calculated by back-calculating from the operation value.

With reference to FIG. 41 (a), attention is paid to the processing rotation bit, the stop rotation bit, the stop rotation bit and the exclusive OR (operation value) bits 1 and 2 shown in FIG. 40, respectively. .. Here, bit 1 of the stop-rotating bit and the exclusive-OR is the exclusive-OR of bit 1 of the processing spinning bit and bit 1 of the stopping-turning bit, and similarly, the stop-rotating cylinder. It can be seen that the bit 2 of the bit and the exclusive OR is the exclusive OR of the bit 2 of the processing rotation bit and the bit 2 of the stop rotation bit. Therefore, except for bit 0, if the exclusive OR of bits 1 and 2 of the processing cylinder bit and bits 1 and 2 of the stop rotation bit is finally taken, the exclusive OR with the stop rotation bit is taken. It can be understood that bits 1 and 2 of (operation value) are derived.

However, if an attempt is made to execute an exclusive OR by limiting the bits, such as calculating only bits 1 and 2, the memory capacity is consumed by the command of the bit operation or conditional branching. Therefore, before executing the exclusive OR, it is conceivable to perform a bit operation only on bit 0 so that the operation value can be derived only by the exclusive OR. Here, the "value to be ORed" is obtained for bit 0 of the processing rotation bit before executing the exclusive OR. Then, as shown in FIG. 41 (b), the values to be ORed are "1", "0", "*", "1", "*", and "1" for each of the batting order 1 to 6. Will be. Here, "*" indicates that it may be 0 or 1. If such a value is used and the processing rotation bit and the logical sum are set in advance, the operation value is derived only by the exclusive OR.

Here, when the bit 0 of the value to be ORed is compared with the processing rotation cylinder bit and the stop rotation cylinder bit, it is understood that the bit 1 of the stop rotation cylinder bit can be applied to the bit 0 of the value to be ORed. can. Therefore, as shown in FIG. 41 (c), the stop rotation bit is shifted to the right by 1 bit and ANDed with 001B to create a value to be ORed. In this way, it is possible to derive the operation value from the processing rotation rotation bit and the stop rotation rotation bit by minimizing the bit operation without performing conditional branching.

When the operation value is obtained, as described above, the first stop value is derived by bit operation (1 bit right shift) of the operation value. As described above, the first stop value is a numerical value that can uniquely identify the first stopped switch 120a, 120b, 120c, and the left reel 110a first stop = first stop value "0", middle reel. 110b 1st stop = 1st stop value "1", right reel 110c 1st stop = 1st stop value "2". Hereinafter, the mode of deriving the first stop value based on the operation value will be described.

FIG. 42 is a diagram showing an example of a specific command for deriving the first stop value. Here, on the premise that the operation value is stored in the address “_STP_ORD” by the command “LDQ (LOW _STP_ORD), A” on the 18th line of FIG. 39, the first stop value derivation process of FIG. 42 is performed. In other words, after the command "LDQ (LOW_STP_ORD), A" on the 18th line of FIG. 39 is executed, the first stop value can be derived based on the operation value at any timing.

First, according to "LDQ A, LOW_STP_ORD" in the first line of FIG. 42, the value of the Q register is set to the upper 1 byte of the address, and the value of the lower 1 byte of the address "_STP_ORD" is set to the lower 1 byte of the address. The operation value stored in is read out to the A register, and the value of the A register is shifted to the right by 1 bit by the command "SRLA A" on the second line, and the first stop value (0 to 2) is derived. Hereinafter, the derivation mode of the first stop value 0 to 2 in each of the batting orders 1 to 6 will be described.

FIG. 43 is an explanatory diagram illustrating a mode of deriving the first stop value based on the operation value. When the batting order is 1 (left → middle → right), the operation value “0” is derived as shown in FIG. 43 at the time of the second stop. Here, when the operation value "000B" is shifted to the right by 1 bit, it becomes "000B". Therefore, the first stop value is "0". Similarly, when the operation is performed in the batting order 2 (left → right → middle), the operation value “1” is derived as shown in FIG. 43 at the time of the second stop. Here, when the operation value "001B" is shifted to the right by 1 bit, it becomes "000B". Therefore, the first stop value is "0".

Further, when the operation is performed in the batting order 3 (middle → left → right), the operation value “2” is derived as shown in FIG. 43 at the time of the second stop. Here, when the operation value "010B" is shifted to the right by 1 bit, it becomes "001B". Therefore, the first stop value is "1". Similarly, when the operation is performed in the batting order 4 (middle → right → left), the operation value “3” is derived as shown in FIG. 43 at the time of the second stop. Here, when the operation value "011B" is shifted to the right by 1 bit, it becomes "001B". Therefore, the first stop value is "1".

Further, when the operation is performed in the batting order 5 (right → left → middle), the operation value “4” is derived as shown in FIG. 43 at the time of the second stop. Here, when the operation value "100B" is shifted to the right by 1 bit, it becomes "010B". Therefore, the first stop value is "2". Similarly, when the batting order 6 (right → middle → left) is operated, the operation value “5” is derived as shown in FIG. 43 at the time of the second stop. Here, when the operation value "101B" is shifted to the right by 1 bit, it becomes "010B". Therefore, the first stop value is "2". If the operation value is derived at the time of the second stop in this way, the first stop value 0 to 2 can be uniformly obtained accordingly.

As described above, the operation value is uniformly derived by executing the logical operation based on the processing rotation cylinder bit (processing rotation cylinder information) and the stop rotation cylinder bit (stop rotation cylinder information). It is not necessary to calculate a numerical value indicating the operation order every time the operation order of the reels is required, and it is possible to quickly and surely grasp the operation order. In addition, the configuration in which the operation value is bit-operated to uniformly derive the first stop value makes it easy to determine the first stop switch 120a, 120b, 120c without requiring a dedicated memory area. It is possible to grasp the operation order quickly and surely by a simple calculation. Further, since the first stop value is represented by 0, 1, and 2, it can also be used as an offset for acquiring data from the table.

Although the preferred embodiment of the present invention has been described above with reference to the accompanying drawings, it goes without saying that the present invention is not limited to such an embodiment. It is clear that a person skilled in the art can come up with various modifications or modifications within the scope of the claims, and it is understood that these also naturally belong to the technical scope of the present invention. Will be done.

For example, in the above-described embodiment, the case where the reel 110 is three reels (reels 110a, 110b, 110c) and the corresponding stop switch 120 is three (stop switches 120a, 120b, 120c) is mentioned. As described above, not only in such a case, but also in the case where the number of reels 110 is two or four or more and the number of stop switches 120 is two or four or more correspondingly, the above embodiment is applied. Applicable.

For example, in the case of so-called four reels, that is, four reels of stop switch 120 and reel 110 (stop switches 120a, 120b, 120c, 120d and left reel 110a, middle reel 110b, right reel 110c, 4th reel 110d), four reels. The striking order is determined by another process, and in parallel with this, the stop switches 120a, 120b, 120c corresponding to 3 reels selected from 4 reels, for example, the left reel 110a, the middle reel 110b, and the right reel 110c. The hitting order may be determined only for the reel (the operation value and the first stop value are derived). In this case, the above-mentioned three-reel embodiment can be applied.

Further, in the case of so-called four reels, that is, when there are four stop switches 120 and reels 110 (stop switches 120a, 120b, 120c, 120d and left reel 110a, middle reel 110b, right reel 110c, 4th reel 110d), the left reel The operation of the stop switches 120a, 120b, 120c, 120d that stop the reels in the order of 110a, middle reel 110b, right reel 110c, and 4th reel 110d is set to "beating order 1", and the operation of the left reel 110a, middle reel 110b, 4th reel 110d, and right. The operation of the stop switches 120a, 120b, 120c, and 120d that stop the reels in the order of the reels 110c is set to "beating order 2", and the stop switch 120a that stops the reels in the order of the left reel 110a, the right reel 110c, the middle reel 110b, and the 4th reel 110d. , 120b, 120c, 120d is referred to as "beating order 3", and the operation of the stop switches 120a, 120b, 120c, 120d for stopping the reels in the order of the left reel 110a, the right reel 110c, the 4th reel 110d, and the middle reel 110b is "beating order". 4 ”, the operation of the stop switches 120a, 120b, 120c, 120d that stop the reels in the order of the left reel 110a, 4th reel 110d, middle reel 110b, right reel 110c is set to“ striking order 5 ”, and the left reel 110a, 4th reel 110d , The operation of the stop switches 120a, 120b, 120c, 120d that stop the reels in the order of the right reel 110c and the middle reel 110b is set to "beating order 6", and the reels are in the order of the middle reel 110b, the left reel 110a, the right reel 110c, and the 4th reel 110d. The operation of the stop switches 120a, 120b, 120c, 120d to stop the reels is set to "beating order 7", and the stop switches 120a, 120b, 120c, which stop the reels in the order of the middle reel 110b, the left reel 110a, the 4th reel 110d, and the right reel 110c, The operation of 120d is set to "hit order 8", and the operation of the stop switches 120a, 120b, 120c, 120d for stopping the reels in the order of the middle reel 110b, the right reel 110c, the left reel 110a, and the 4th reel 110d is set to "hit order 9". The operation of the stop switches 120a, 120b, 120c, 120d that stop the reels in the order of reel 110b, right reel 110c, 4th reel 110d, and left reel 110a is set to "strike order 10", and the middle reel. The operation of the stop switches 120a, 120b, 120c, 120d that stop the reels in the order of 110b, 4th reel 110d, left reel 110a, right reel 110c is set to "beating order 11", and the middle reel 110b, 4th reel 110d, right reel 110c, left. The operation of the stop switches 120a, 120b, 120c, and 120d that stop the reels in the order of the reels 110a is set to "strike order 12", and the stop switch 120a that stops the reels in the order of the right reel 110c, the left reel 110a, the middle reel 110b, and the 4th reel 110d. , 120b, 120c, 120d is referred to as "beating order 13", and the operation of the stop switches 120a, 120b, 120c, 120d for stopping the reels in the order of right reel 110c, left reel 110a, 4th reel 110d, middle reel 110b is "beating order". 14 ”, and the operation of the stop switches 120a, 120b, 120c, 120d that stop the reels in the order of right reel 110c, middle reel 110b, left reel 110a, 4th reel 110d is set to“ striking order 15 ”, right reel 110c, middle reel 110b. The operation of the stop switches 120a, 120b, 120c, 120d that stop the reels in the order of the 4th reel 110d and the left reel 110a is set to "beating order 16", and the reels are in the order of the right reel 110c, the 4th reel 110d, the left reel 110a, and the middle reel 110b. The operation of the stop switches 120a, 120b, 120c, 120d to stop the reels is set to "beating order 17", and the stop switches 120a, 120b, 120c, which stop the reels in the order of the right reel 110c, the 4th reel 110d, the middle reel 110b, and the left reel 110a, The operation of 120d is set to "hit order 18", and the operation of the stop switches 120a, 120b, 120c, 120d for stopping the reels in the order of 4th reel 110d, left reel 110a, middle reel 110b, right reel 110c is set to "hit order 19", and 4th. The operation of the stop switches 120a, 120b, 120c, 120d for stopping the reels in the order of the reel 110d, the left reel 110a, the right reel 110c, and the middle reel 110b is set to "beating order 20", and the 4th reel 110d, the middle reel 110b, the left reel 110a, The operation of the stop switches 120a, 120b, 120c, 120d that stop the reels in the order of the right reel 110c is set to "beating order 21", and the 4th reel 110d, the middle reel 110b, and the right reel 1 are set. The operation of the stop switches 120a, 120b, 120c, and 120d that stop the reels in the order of 10c and the left reel 110a is set to "beating order 22", and the reels are stopped in the order of the 4th reel 110d, the right reel 110c, the left reel 110a, and the middle reel 110b. The operation of the stop switches 120a, 120b, 120c, 120d is set to "beating order 23", and the operation of the stop switches 120a, 120b, 120c, 120d for stopping the reels in the order of the 4th reel 110d, the right reel 110c, the middle reel 110b, and the left reel 110a. Is set to "reel 24". The operation values at this time are batting order 1 = operation value "0", batting order 2 = operation value "1", batting order 3 = operation value "2", batting order 4 = operation value "3", batting order 5 = operation value "4". , Batting order 6 = operation value "5", batting order 7 = operation value "6", batting order 8 = operation value "7", batting order 9 = operation value "8", batting order 10 = operation value "9", batting order 11 = Operation value "10", batting order 12 = operation value "11", batting order 13 = operation value "12", batting order 14 = operation value "13", batting order 15 = operation value "14", batting order 16 = operation value "15" , Batting order 17 = operation value "16", batting order 18 = operation value "17", batting order 19 operation value "18", batting order 20 = operation value "19", batting order 21 = operation value "20", batting order 22 = operation value It is represented by "21", batting order 23 = operation value "22", batting order 24 = operation value "23".

Further, when there are four stop switches 120 and four reels 110 (stop switches 120a, 120b, 120c, 120d and left reel 110a, middle reel 110b, right reel 110c, 4th reel 110d), the left reel 110a is first stopped. The operation of the stop switches 120a, 120b, 120c, 120d is "left push", the operation of the stop switches 120a, 120b, 120c, 120d for first stopping the middle reel 110b is "middle push", and the right reel 110c is first stopped. The operation of the stop switches 120a, 120b, 120c, 120d to be stopped is referred to as "right push", and the operation of the stop switches 120a, 120b, 120c, 120d to first stop the 4th reel 110d is referred to as "4th push". The first stop value at this time is left reel 110a first stop = first stop value "0", middle reel 110b first stop = first stop value "1", right reel 110c first stop = first stop value. "2", 4th reel 110d 1st stop = 1st stop value "3".

Further, in the above-described embodiment, the main control board 200 and the sub control board 202 are arranged so as to share the functional part for advancing the game, but the functional part of the main control board 200 is assigned to the sub control board 202. Alternatively, the functional parts of the sub-control board 202 may be arranged on the main control board 200, or all the functional parts may be arranged together on one control board.

Further, in the above-described embodiment, the game is played using medals as the game value, but the game value may be electrical information (so-called medalless). In this case, when the winning combination wins, the amount of value corresponding to the winning combination may be given to the player by electrical information.

Further, each process performed by the main control board 200 and the sub control board 202 described above does not necessarily have to be processed in chronological order in the order described in the flowchart, and may include parallel or subroutine processing.

100 slot machine (game machine)
200 Main control board 200a Main CPU
200b main ROM
200c main RAM
202 Sub control board 202a Sub CPU
202b sub ROM
202c sub RAM

Claims (2)

A gaming machine that controls the rotation of a plurality of reels and stops and controls each of the reels corresponding to the operated stop switch in response to the operation of any of the plurality of stop switches.
Regarding the operation of the predetermined stop switch, based on the stop rotation information indicating the reel whose stop is controlled in response to the operation of the stop switch and the processing rotation information indicating the stop switch being operated. A gaming machine that executes logical operations and derives operation values that are single-digit values that can specify the operation order in which the stop switch is operated. The gaming machine according to claim 1, wherein a first stop value capable of specifying the first operated stop switch is derived by bit-operating the operation value.

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