JP7086558B2 - Photoelectric converter and imaging system - Google Patents

Description

The present invention relates to a light shielding layer in a photoelectric conversion device.

In the photoelectric conversion device, a black level correction can be realized by correcting a signal from a pixel having a light receiving photoelectric conversion unit by using a signal from a pixel having a light-shielded photoelectric conversion unit. A pixel having a light-receiving photoelectric conversion unit is called an effective pixel or a light-receiving pixel, and a pixel having a light-shielded photoelectric conversion unit is called an optical black (OB) pixel or a light-shielding pixel.

In the solid-state image sensor described in the first embodiment of Patent Document 1, an optical waveguide is formed on the photoelectric conversion unit in both the effective pixel region and the OB pixel region, and the optical waveguide and the photoelectric in the OB pixel region. A light-shielding film is arranged between the conversion units.

The solid-state image sensor described in the fourth embodiment of Patent Document 1 has a global shutter function, and a light-shielding film is formed on the charge storage portion in both the effective pixel region and the OB pixel region, and the OB pixel region is formed. In, a light-shielding film extends over the photoelectric conversion unit.

Japanese Unexamined Patent Publication No. 2012-156334

In studying a light guide path (optical waveguide), the present inventors have found that the technique of Patent Document 1 does not have sufficient accuracy in correcting the black level. Due to this problem, it is not possible to improve the quality (for example, image quality) of the signal obtained through the correction of the black level. Therefore, an object of the present invention is to provide a photoelectric conversion device that can obtain a good signal.

The first means for solving the above-mentioned problems is a photoelectric conversion device including a plurality of units each having a charge generation region arranged in a semiconductor layer, and the plurality of units are the first unit and the second unit. Each of the first unit and the second unit, including the unit, is located above the charge generation region and a charge retention region that holds the charge transferred from the charge generation region, and is surrounded by an insulator layer. The charge holding region is covered between the dielectric region formed of a material different from the insulator layer and the insulator layer and the semiconductor layer, and the first opening is provided above the charge generation region. A first light-shielding layer, a charge detection region, a gate electrode arranged between the charge holding region and the charge detection region, a second opening provided in the first light-shielding layer, and the second. It has a first contact plug provided on the charge detection region and a second contact plug provided on the gate electrode, which are arranged in the same opening which is an opening , and said. The charge generation region of the first unit receives light through the first opening, and the charge generation region of the second unit is provided on the insulator layer and the dielectric region. It is characterized by being covered with a layer.

The second means for solving the above-mentioned problems is a photoelectric conversion device including a plurality of units, wherein the plurality of units include a first unit and a second unit, and each of the first unit and the second unit. Is an n-type first impurity region arranged in the semiconductor layer, an n-type second impurity region arranged in the semiconductor layer and charge is transferred from the first impurity region, and the first. The second impurity is located above the impurity region, surrounded by the insulator layer, and formed of a material different from the insulator layer, and between the insulator layer and the semiconductor layer. A first light-shielding layer that covers the region and has a first opening above the first impurity region, an n-type third impurity region in which charges are transmitted from the second impurity region, and the second impurity region. The third, which is arranged in the same opening as the gate electrode arranged between the third impurity region, the second opening provided in the first light-shielding layer, and the second opening. The first contact plug provided on the impurity region and the second contact plug provided on the gate electrode are provided , and the first impurity region of the first unit has the first opening. The first impurity region of the second unit is covered with a second light-shielding layer provided on the insulator layer and the dielectric region. It is a feature.

According to the present invention, it is possible to provide a photoelectric conversion device that can obtain a good signal.

The schematic diagram explaining the photoelectric conversion apparatus and the image pickup system. The schematic diagram explaining the structure of a pixel unit. Schematic diagram of a cross section for explaining a photoelectric conversion device. Schematic diagram of a plan for explaining a photoelectric conversion device. Schematic diagram of a cross section for explaining a photoelectric conversion device. FIG. 6 is a schematic cross-sectional view for explaining a manufacturing method of a photoelectric conversion device. FIG. 6 is a schematic cross-sectional view for explaining a manufacturing method of a photoelectric conversion device. FIG. 6 is a schematic cross-sectional view for explaining a manufacturing method of a photoelectric conversion device. FIG. 6 is a schematic cross-sectional view for explaining a manufacturing method of a photoelectric conversion device. Schematic diagram of a cross section for explaining a photoelectric conversion device. Schematic diagram of a plan for explaining a photoelectric conversion device. Schematic diagram of a cross section for explaining a photoelectric conversion device.

Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. In the following description and drawings, common reference numerals are given to common configurations across a plurality of drawings. Therefore, a common configuration will be described with reference to each other with reference to a plurality of drawings, and the description of the configuration with a common reference numeral will be omitted as appropriate.

The configuration of the photoelectric conversion device IS will be described with reference to FIG. 1 (a). The photoelectric conversion device IS includes a plurality of pixel units UN in the semiconductor chip IC. Each of the plurality of pixel units UN contains a charge generator arranged in the semiconductor layer. The pixel unit UN is arranged in the light receiving region PXR and the light shielding region OBR of the photoelectric conversion device IS. The pixel unit UNt includes not only a main unit for the purpose of generating basic information of pixels in an image obtained by the photoelectric conversion device IS, but also a sub-unit which is a unit having a configuration similar to that of the main unit. .. The main unit is a light receiving unit arranged in the light receiving region PXR, and the sub unit is a light shielding unit arranged in the light blocking region OBR. As shown in the example of FIG. 1A, an intermediate region DMR may be provided between the light receiving region PXR and the light shielding region OBR. In this example, the pixel unit UN is also provided in the intermediate region DMR. The pixel unit UNT (dummy unit) arranged in the intermediate region DMR is also a sub-unit. The photoelectric conversion device IS can have a peripheral region PRR outside the pixel region in which the pixel unit UNT is arranged.

FIG. 1B shows an example of the configuration of an imaging system SYS equipped with a photoelectric conversion device IS. The imaging system SYS may further include at least one of an optical system OU, a control device CU, a processing device PU, a display device DU, and a storage device MU. The details of the imaging system SYS will be described later.

<First Embodiment>
The first embodiment of the photoelectric conversion device IS will be described with reference to FIGS. 2 and 3.

FIG. 2A shows an example of a circuit diagram of a pixel unit. The pixel unit may include a charge generation unit 2, a charge holding unit 5, a charge detection unit 3, and a charge discharge unit 11 as a pixel circuit. A signal based on the charge of the charge detection unit 3 is output from the pixel unit to the signal output line 10. The pixel circuit of the pixel unit further includes a control unit for switching connection (transfer) / non-connection (non-transfer) or signal amplification of each unit that handles these charges. Specific examples of the control unit include a first transfer gate 4, a second transfer gate 6, a third transfer gate 1, a reset transistor 7, an amplification transistor 8, and a selection transistor 9. Each gate is composed of a MOS gate, and the transistor is composed of a MOSFET. The charge generation unit 2, the charge retention unit 5, the charge detection unit 3, and the charge discharge unit 11 can also be regarded as the source and / or drain of the transistor including the transfer gate as a gate.

The charge generation unit 2 can generate a signal charge according to the amount of light received by the charge generation unit 2. However, the charge generation unit 2 generates a noise charge that becomes a dark current even if the light is not incident by the light shielding layer. A photodiode can be used for the charge generation unit 2. The charge holding unit 5 is connected to the charge generating unit 2 via the first transfer gate 4. The charge holding unit 5 functions as a grounding capacitance, and the charge holding unit 5 temporarily stores the charge transferred from the charge generating unit 2. The charge detection unit 3 converts the charge transferred from the charge holding unit 5 into a voltage signal. The charge detection unit 3 is configured to include an impurity region arranged in the semiconductor layer, and has a capacitance including a parasitic capacitance generated in this node. The impurity region constituting the charge detection unit 3 is a floating diffusion (FD) region. The charge detection unit 3 is connected to the charge holding unit 5 via the second transfer gate 6. The charge detection unit 3 is also connected to the source of the reset transistor 7 and the gate of the amplification transistor 8. A power supply voltage is supplied to the drain of the amplification transistor 8 from the power supply line 12. The power supply voltage is also supplied to the drain of the reset transistor 7 from the power supply line 12. The amplification transistor 8 constitutes a source follower circuit. By turning on the reset transistor 7, the voltage of the charge detection unit 3 is reset to the reset voltage (in this case, the power supply voltage). At this time, the reset signal corresponding to the reset voltage is output to the source of the amplification transistor 8.

When the second transfer gate 6 is turned on and the charge is transferred from the charge holding unit 5 to the charge detecting unit 3, the signal voltage corresponding to the transferred charge amount is output to the source of the amplification transistor 8.

The source of the amplification transistor 8 is connected to the drain of the selection transistor 9. The source terminal of the selection transistor 9 is connected to the signal output line 10. When the selection transistor 9 is turned on, a reset signal or a pixel signal is output to the signal output line 10. In this way, the signal from the pixel is read out.

A charge discharge unit 11 is further connected to the charge generation unit 2 via a third transfer gate 1. When the third transfer gate 1 is turned on, the charge stored in the charge generation unit 2 is discharged to the charge discharge unit 11. The impurity region constituting the charge discharge unit 11 is an overfrodo drain (OFD) region. The charge discharging unit 11 is provided with a voltage capable of discharging charges from the charge generating unit 2. In this example, the power supply voltage is supplied to the charge discharge unit 11 from the power supply line 12, but the connection relationship is not shown in FIG. 2A.

By discharging charges to the charge discharging unit 11 at the same time for all pixels and then transferring the charges generated by the charge generating unit 2 to the charge holding unit 5, simultaneous and constant exposure time is set for all the pixels. An electronic shutter (global electronic shutter) is realized. As a result, the deviation of the exposure timing caused by sequentially reading the electric charge from each pixel is suppressed, and the distortion of the image is reduced. The pixel circuit for realizing the global electronic shutter and its driving method are not limited to those described above, and can be changed in various ways.

FIG. 2B is a plan view of the vicinity of the semiconductor layer of the pixel unit in the light receiving region PXR and the light shielding region OBR of the present embodiment. Hereinafter, the pixel unit in the light receiving region PXR will be referred to as a light receiving unit PXL, and the pixel unit in the light shielding region OBR will be referred to as a light shielding unit OBA.

First, the correspondence between the circuit shown in FIG. 2A and the structure shown in FIG. 2B will be described. In FIG. 2B, the outside of the element region 100 (active region) surrounded by the solid line is an element separation region formed of an insulator. FIG. 2B shows a charge generation region 102 as an impurity region constituting the charge generation unit 2 and a charge retention region 105 as an impurity region constituting the charge retention unit 5. Further, a charge detection region 103 is shown as an impurity region constituting the charge detection unit 3, and a charge discharge region 111 is shown as an impurity region constituting the charge discharge unit 11. In this example, since the electrons are treated as signal charges, each of the charge generation region 102, the charge retention region 105, the charge detection region 103, and the charge discharge region 111 is an n-type impurity region. When holes are treated as signal charges, the conductive type of these impurity regions is the opposite p-type.

FIG. 2B also shows the gate electrode 104 of the first transfer gate 4, the gate electrode 106 of the second transfer gate 6, and the gate electrode 101 of the third transfer gate 1. Further, the gate electrode 107 of the reset transistor 7 and the gate electrode 108 of the amplification transistor 8 are shown. The gate electrode 104 of the first transfer gate 4 is arranged between the charge generation region 102 and the charge retention region 105. The gate electrode 106 of the second transfer gate 6 is arranged between the charge holding region 105 and the charge detection region 103. The gate electrode 107 of the reset transistor 7 is arranged adjacent to the charge detection region 103. An impurity region 112 serving as a drain of the reset transistor 7 is arranged on the opposite side of the gate electrode 107 from the charge detection region 103. The impurity region 112 is common to the drain of the amplification transistor 8. The gate electrode 108 of the amplification transistor 8 is arranged adjacent to the impurity region 112. An impurity region 113 that is a source of the amplification transistor 8 is arranged on the opposite side of the impurity region 112 with the gate electrode 108 interposed therebetween. The selection transistor 9 is not shown in this figure. For example, the selection transistor 9 can be arranged on the opposite side of the reset transistor 7 with the amplification transistor 8 interposed therebetween. The source of the selection transistor 9 can be shared with the impurity region 113 which is the source of the amplification transistor 8. The gate electrode 101 of the third transfer gate 1 is arranged adjacent to the charge generation region 102. The gate electrode 101 is arranged in a portion of the charge generation region 102 different from the side on which the gate electrode 104 is arranged. A charge discharge region 111 forming a part of the charge discharge unit 11 is arranged on the opposite side of the charge generation region 102 with the gate electrode 101 interposed therebetween. The charge discharge region 111 serves as a drain of a transistor having a third transfer gate 1 as a gate.

The light receiving unit PXL and the light shielding unit OBA have a lower light shielding layer 109 that covers at least the charge holding region 105. In the light receiving unit PXL and the shading unit OBA, the lower shading layer 109 has an opening 190 above the charge generation region 102. The charge generation region 102 of the light receiving unit PXL can receive light from the subject through the opening 190. Therefore, the charge generation region of the light receiving unit PXL is the photoelectric conversion region. Then, the signal based on the signal charge generated in the charge generation region 102 of the light receiving unit PXL can be processed as an image signal. Most preferably, the shapes of the openings 190 in the light receiving unit PXL and the light shielding unit OBA are the same, but they may be different. The area of the opening 190 in the light-shielding unit OBA is preferably 0.8 times or more and 1.2 times or less the area of the opening 190 in the light-receiving unit PXL. This rule states that if the radius of one of the two circles is 0.9 times or more and 1.1 times or less the radius of the other, the area of one of the two circles is approximately 0.8 times or more and the area of the other. Based on 1.2 times or less. In this example, the lower light-shielding layer 109 covers a part of the gate electrodes 104, 106, 101 in addition to the charge holding region 105. The lower light-shielding layer 109 does not cover the portion of the gate electrodes 104, 106, 101 to which the contact plug is arranged. By doing so, even if a polysilicon gate electrode having transparency to visible light is used, it is not necessary for the semiconductor layer 200 (described later in FIGS. 3A to 3C) via the gate electrode. It is possible to suppress the incident of light. Further, as can be understood from the positional relationship between the contour of the charge generation region 102 and the opening 190 in FIG. 2B, the area of the opening 190 in the plan view is smaller than the area of the charge generation region 102 in the plan view. By doing so, the lower light-shielding layer 109 also covers the peripheral edge of the charge generation region 102, and the incident of unnecessary light on the semiconductor layer 200 via the gate electrode can be further suppressed.

In the light receiving unit PXL and the shading unit OBA, the lower shading layer 109 has openings 191 above the gate electrodes 104, 106, 107, 108 and the charge detection regions 103, impurity regions 112, 113. A contact plug is connected to the gate electrodes 104, 106, 107, 108, the charge detection region 103, and the impurity regions 112, 113 through the opening 191. Further, the lower light-shielding layer 109 has an opening 192 above the gate electrodes 104, 101 and the charge discharge region 111. A contact plug is connected to the gate electrodes 104 and 101 and the charge discharge region 111 through the opening 192. In FIG. 2B, the contact plug is indicated by a black circle. The openings 191 and 192 are separate from the opening 190 so that a plurality of contact plugs are arranged, and are provided in the lower light-shielding layer 109 in a shape different from that of the opening 190.

On the charge generation region 102, the dielectric region 130 is arranged so as to overlap at least a part of the charge generation region 102. Further, the dielectric film 110 is arranged on the charge generation region 102 so as to overlap at least a part of the dielectric region 130. The dielectric film 110 is located between the dielectric region 130 and the charge generation region 102. Details of the dielectric region 130 and the dielectric film 110 will be described later.

3 (a) and 3 (b) show the structure of the cross section in the line XY of FIG. 2 (b). FIG. 3 (c) shows the structure of the cross section in the peripheral region PRR of FIG. 1 (a).

In the present embodiment, a multilayer wiring structure including wiring layers 2161, 2162, 2163 and interlayer insulating layers 2141, 2142, 2143, 2144 is arranged on the semiconductor layer 200. Hereinafter, the wiring layers 2161, 2162, and 2163 are collectively referred to as the wiring layer 216X, and the interlayer insulating layers 2141, 2142, 2143, and 2144 are collectively referred to as the interlayer insulating layer 214X.

In this example, the pixel unit UN will be described by taking the case where the wiring layer is three layers as an example, but may have four or more wiring layers, or may be a two-layer wiring layer.

The interlayer insulating layer 214X is an insulator layer for insulating the wiring layer and other layers. The interlayer insulating layer 2141 is located between the semiconductor layer 200 and the wiring layer 2161, the interlayer insulating layer 2142 is located between the wiring layer 2161 and the wiring layer 2162, and the interlayer is located between the wiring layer 2162 and the wiring layer 2163. The insulating layer 2143 is located. Silicon oxide (SiO) having a refractive index of about 1.5 can be used for the interlayer insulating layer 214X. The interlayer insulating layer 214X preferably contains silicon (Si), oxygen (O), and hydrogen (H). The hydrogen contained in the interlayer insulating layer 214X is useful for hydrogen termination of the semiconductor layer 200. The interlayer insulating layer 214X can further contain carbon (C). An insulator layer containing silicon (Si), oxygen (O), carbon (C) and hydrogen (H) may exhibit a low dielectric constant (low-k) of less than 4.0 and less than 3.0. By using a low dielectric constant material for the interlayer insulating layer, the RC delay of the wiring structure can be reduced and the operation speed can be increased.

The lower light-shielding layer 109 is arranged between the interlayer insulating layer 214X and the semiconductor layer 200, and covers the charge holding region 105. In this example, the lower light-shielding layer 109 is arranged between the wiring layer 2161 and the semiconductor layer 200, and is arranged between the interlayer insulating layer 2141 through which the contact plug (not shown) penetrates and the semiconductor layer 200.

The light receiving unit PXL and the light shielding units OBA and OBB include a dielectric region 130 arranged on the charge generation region 102. The dielectric region 130 is surrounded by the interlayer insulating layer 214X arranged on the semiconductor layer 200. The planar shape of the dielectric region 130 is circular, but it may be a square, a rectangle, an ellipse, an oval, a polygon, or the like. In particular, the dielectric region 130 is preferably surrounded by the interlayer insulating layers 2142 and 2143 located between the plurality of wiring layers 2161, 2162 and 2163. This is because by arranging the dielectric region 130 around the plurality of wiring layers 2161, 2162, 2163, it is possible to suppress the loss of light due to the presence of the wiring layers 2161, 2162, 2163.

The interlayer insulating layer 214X is provided with holes 218. The dielectric region 130 is located in the hole 218. As a result, the dielectric region 130 is surrounded by the interlayer insulating layer 214X. The dielectric region 130 is preferably formed by embedding the dielectric material constituting the dielectric region 130 in the holes 218 formed through the plurality of interlayer insulating layers 214X of the multilayer wiring structure. However, it is also possible to first form the dielectric region 130 and then form an interlayer insulating layer around the dielectric region 130.

For the dielectric region 130, it is preferable to use a material having a higher refractive index than the material constituting the interlayer insulating layer 214X. By doing so, the light incident obliquely at a predetermined angle with respect to the interface between the dielectric region 130 and the interlayer insulating layer 214X is totally reflected at the interface. Therefore, the light incident on the dielectric region 130 is suppressed from leaking to the interlayer insulating layer 214X, and more incident light reaches the charge generation region 102. In this way, the dielectric region 130 forms a light guide path (optical waveguide) having a core-clad structure together with the interlayer insulating layer 214X. In the light guide path, the dielectric region 130 is the core and the interlayer insulating layer 214X is the clad. For example, silicon nitride (SiN) having a refractive index of about 2.0 can be used as the material of the dielectric region 130. The dielectric region 130 preferably contains silicon (Si), nitrogen (N), and hydrogen (H). The hydrogen contained in the dielectric region 130 is useful for hydrogen termination of the semiconductor layer 200. The material of the interlayer insulating layer 214X and the dielectric region 130 is not limited to the combination of silicon oxide and silicon nitride. In constructing the light guide path, any material may be selected as long as the materials are combined so that the refractive index of the dielectric region 130 is higher than the refractive index of the interlayer insulating layer. As the material of the dielectric region 130, silicon oxynitride (SiON) having a refractive index of about 1.8, or an organic film material and a material in which particles such as titanium oxide are mixed with the organic film material may be used. The dielectric region 130 does not necessarily have to form a light guide path, and the dielectric region 130 may be silicon oxide like the interlayer insulating layer 214X. Since the interface exists between the dielectric region 130 and the interlayer insulating layer 214X, it is possible to have a light guide function as an optical barrier. Further, since the dielectric region 130 is arranged so as to penetrate the plurality of interlayer insulating layers 214, the number of interfaces up to the charge generation region 102 can be reduced, which is advantageous for improving the sensitivity.

The dielectric region 130 as a light guide path has a function of concentrating incident light on the charge generation region 102. In the light receiving unit PXL, since the amount of light incident on the charge generation region 102 is increased by the dielectric region 130, the sensitivity is improved as compared with the case where the dielectric region 130 is not present. In particular, if the area of the charge generation region 102 is small, or if the F number of the lens of the camera when the image pickup device is used for the camera is large, the sensitivity may decrease. On the other hand, by providing the dielectric region 130, this influence can be suppressed.

The interlayer insulating layer may be formed of a laminated film made of different materials, and in that case, the refractive index of the dielectric region 130 may be higher than the refractive index of the interlayer insulating layer around the dielectric region 130. .. Further, the dielectric region 130 has a forward taper shape in which the diameter thereof decreases from the entrance surface side to the emission surface side. This makes it possible for a large amount of incident light to be focused on the charge generation region 102 via the dielectric region 130. The diameter of the dielectric region 130 may be gradually reduced.

The dielectric film 110 arranged between the dielectric region 130 and the charge generation region 102 can function as an antireflection film for preventing reflection between the dielectric region 130 and the charge generation region 102. In addition, it can also function as an etching stopper when forming the holes 218 at the time of manufacturing.

Further, as can be understood from the positional relationship between the contour of the dielectric film 110 and the opening 190 in FIG. 2B, the area of the opening 190 in the plan view is smaller than the area of the dielectric film 110 in the plan view. By doing so, the dielectric film 110 also covers the end portion of the lower light-shielding layer 109. As a result, the dielectric film 110 extends from between the dielectric region 130 and the charge generation region 102 between the interlayer insulating layer 214X and the lower light-shielding layer 109, and partially covers the lower light-shielding layer 109. It is arranged so as to cover it. The dielectric film 110 can be configured to include a material having a higher refractive index than the interlayer insulating layer 214X. In particular, it is preferable that the interlayer insulating layer 214X has a higher refractive index than the portion arranged on the charge holding region 105. With such a structure, it is possible to suppress the light leaking from the dielectric region 130 from entering the charge holding region 105.

In the present embodiment, the distance between the charge holding region 105 and the lower light-shielding layer 109 is smaller than the distance between the dielectric region 130 and the charge generation region 102. By doing so, it is possible to prevent stray light and light emitted from the dielectric region 130 from entering the charge holding region 105 through between the lower light-shielding layer 109 and the semiconductor layer 200 and degrading the accuracy of the signal. can. In this example, by providing the dielectric film 110, the dielectric region 130 is separated from the semiconductor layer 200 from the lower light-shielding layer 109 by at least a distance corresponding to the thickness of the dielectric film 110.

The lower light-shielding layer 109 covers the charge holding region 105, and an opening 190 is formed on the charge generation region 102. The dielectric film 110 is arranged so as to cover the entire charge generation region 102 and a part of the lower light-shielding layer 109. Further, an element separation region formed of an insulator is arranged other than the portion shown by the solid line in FIG. 2 (b). The lower light-shielding layer 109 is arranged so as to overlap a part of the charge generation region 102 in a plan view, and a portion overlapping the other part of the charge generation region 102 in a plan view is opened. The lower light-shielding layer 109 is arranged so as to cover at least a part of the gate electrode 104 of the transistor that transfers the charge from the charge holding region 105 and the charge generation region 102 to the charge holding region 105. The portion of the lower light-shielding layer 109 that overlaps with the charge generation region 102 has a portion extending from above the gate electrode 104 and a portion extending from above the gate electrode 101. The lower light-shielding layer 109 suppresses the incident light on the charge holding region 105, and suppresses the generation of charge and noise generated in the charge holding region 105 by the incident light. The lower light-shielding layer 109 may be formed by using a material that does not easily transmit visible light, such as tungsten, tungsten silicide, tungsten oxide, aluminum, or an alloy film thereof. The thickness of the lower light-shielding layer 109 is preferably 10 nm or more and 1000 nm or less, for example, 100 nm or more and 200 nm or less. Since the lower light-shielding layer 109 is formed on the upper part of the gate electrode and the other part at the same time, it is formed so as to have unevenness due to the thickness of the gate electrode.

FIG. 2B shows the lower surface 131 and the upper surface 132 of the dielectric region 130. The lower surface 131 serves as a light emitting surface, and the upper surface 132 of the dielectric region 130 serves as a light incident surface. As shown in FIG. 2, the entire lower surface 131 of the dielectric region 130 is arranged so as to be included in the charge generation region 102 in a plan view, but at least a part of the lower surface 131 overlaps the charge generation region 102. It suffices if the dielectric region 130 is arranged in.

In this example, the entire surface of the lower surface 131 of the dielectric region 130 is arranged so as to be included in the opening 190 in a plan view, but at least a part of the lower surface 131 may be arranged in the opening 190. Further, in this example, the entire surface of the upper surface 132 of the dielectric region 130 is arranged so as to include the entire opening 190 in a plan view, but at least a part of the upper surface 132 is arranged so as to overlap the opening 190. Just do it. As in this example, the width of the dielectric region 130, which is a forward taper, is determined by the width of the upper surface 132, but it is effective to make the width of the dielectric region 130 larger than the width of the opening 190 in order to improve the light utilization efficiency. be. In particular, in a plan view, it is effective to include the entire surface of the lower surface 131 in the opening 190 and the entire surface of the upper surface 132 to include the entire opening 190 in order to improve the light utilization efficiency.

A dielectric material film 133 made of the same material as the dielectric region 130 is provided on the interlayer insulating layer 214X. In the light receiving region PXR, a plurality of dielectric regions 130 are connected by a dielectric material film 133 between adjacent light receiving units PXL. Since the dielectric region 130 needs to be surrounded by the interlayer insulating layer 214X, a portion of the dielectric material constituting the dielectric region 130 and the dielectric material film 133, which is separated from the upper surface of the interlayer insulating layer 2144. Is regarded as the dielectric material film 133. That is, the dielectric region 130 is covered with the dielectric material film 133. In FIGS. 3A and 3B, a convenient boundary between the dielectric region 130 and the dielectric material film 133 is shown by a dotted line. This dotted line is the upper surface 132 of the dielectric region 130 described above. In an actual device, there may be no interface between the dielectric region 130 and the dielectric material film 133. The dielectric material film 133 may be omitted.

A silicon nitride layer 228 and an intermediate layer 229 are arranged on the dielectric region 130 via the dielectric material film 133. The intermediate layer 229 is an inorganic material layer made of silicon oxide or silicon nitride, and has a function of adjusting the distance between the layer above the intermediate layer 229 and the semiconductor layer 200. The silicon oxynitride layer 228 functions as an antireflection layer for suppressing reflection between the intermediate layer 229 made of silicon oxide and the dielectric material film 133 or the dielectric region 130. In the light receiving unit PXL and the light shielding unit OBA, the dielectric region 130 is located between the intermediate layer 229, which is an inorganic material layer, and the semiconductor layer 200.

In the present embodiment, the light receiving unit PXL and the light shielding unit OBA are also provided with the dielectric region 130. Further, the lower light-shielding layer 109 located between the interlayer insulating layer 214X, which is an insulator layer surrounding the dielectric region 130, and the semiconductor layer 200 is provided with an opening 190 in the light-receiving unit PXL and the light-shielding unit OBA. There is. Thereby, the difference in the influence of the dielectric region 130 on the pixel circuit between the light receiving unit PXL and the light shielding unit OBA can be reduced. The influence of the dielectric region 130 and the lower light-shielding layer 109 on the pixel circuit includes an optical influence. For example, if the dielectric region 130 is provided in the light receiving unit PXL and the light utilization efficiency is higher than that in the case where the dielectric region 130 is not provided, the light leakage to the lower part of the lower light-shielding layer 109 may increase. Therefore, the closer the lower light-shielding layer 109 is to the semiconductor layer 200, the greater the interaction between the semiconductor layer 200 and the lower light-shielding layer 109.

The effect of the dielectric region 130 and the lower light-shielding layer 109 on the pixel circuit includes an electrical effect. In particular, if the dielectric constants of the dielectric region 130 and the insulating layer surrounding the dielectric region 130 are different, it depends on whether the dielectric region 130 is above the charge generation region 102 or the insulator layer is not the dielectric region 130. The dielectric constants on the charge generation region 102 are different. As a result, the capacitance (for example, parasitic capacitance) of the pixel circuit may differ depending on the presence / absence of the opening 190 and the presence / absence of the dielectric region 130.

Examples of the influence of the dielectric region 130 and the lower light-shielding layer 109 on the pixel circuit include physical and chemical influences. In particular, there is a difference in interface state due to hydrogen termination depending on the presence or absence of the opening 190 and the presence or absence of the dielectric region 130, and a difference in defect density due to etching damage during formation of the opening 190 and the dielectric region 130. These are the differences at the atomic level of the semiconductor layer 200. In the charge handling region such as the charge generation region 102, the charge retention region 105, and the charge detection region 103, such a difference at the atomic level can greatly affect the output signal from the pixel circuit.

In this example, as shown in FIGS. 3A and 3B, the light receiving unit PXL and the light shielding unit OBA can have the same structure from the semiconductor layer 200 to the intermediate layer 229. In particular, the lower light-shielding layer 109 has an opening 190 on the charge generation region 102 in both the light-receiving region PXR and the light-shielding region OBR, and both the light-receiving region PXR and the light-shielding region OBR have a dielectric region 130 and a dielectric film 110. Therefore, the amount of hydrogen supplied to the charge generation region 102 due to the hydrogen sinter effect is whether there is a difference or a slight difference between the charge generation region 102 in the light-shielding region OBR and the light-receiving region PXR. Further, the damage received by the charge generation region 102 in the manufacturing process is also a slight difference between the light receiving region PXR and the light shielding region OBR. Therefore, the difference in the characteristics of the charge generation region 102 between the light receiving unit PXL and the light shielding unit OBA can be reduced.

The light-shielding unit OBA of the light-shielding region OBR has an upper light-shielding layer 231 for light-shielding the charge generation region 102. The upper light-shielding layer 231 is arranged farther from the semiconductor layer 200 than the lower light-shielding layer 109. That is, the distance between the upper light-shielding layer 231 and the semiconductor layer 200 is larger than the distance between the lower light-shielding layer 109 and the semiconductor layer 200. The light-shielding units OBA and OBB include the upper light-shielding layer 231. The opening 190 of the lower light-shielding layer 109 is located between the charge generation region 102 and the upper light-shielding layer 231. As a result, the charge generation region 102 of the light-shielding unit OBA is shielded by the upper light-shielding layer 231 even if the lower light-shielding layer 109 is provided with the opening 190. As a result, a reference signal for black level correction can be obtained from the shading unit OBA.

The upper light-shielding layer 231 is made of a light-shielding material, and is formed of a metal material or an organic material having a low light transmittance (10% or less) such as black. The material of the upper light-shielding layer 231 is preferably a material having a high reflectance of light having a wavelength of 400 to 600 nm. In this example, the main component of the upper light-shielding layer 231 is aluminum. The upper light-shielding layer 231 is arranged so as to overlap the entire surface of the charge generation area 102 of the light-shielding area OBR. It is preferable that the upper light-shielding layer 231 is arranged in the entire light-shielding region OBR. The upper light-shielding layer 231 may form a wiring for transmitting a power supply voltage or a signal.

The main component of the lower light-shielding layer 109 and the main component of the lower wiring layer 2161 may be different from each other. This is because the material suitable for the wiring layer 2161 and the material suitable for the lower light-shielding layer 109 are different. Similarly, the main component of the upper light-shielding layer 231 and the main component of the upper wiring layer 2163 may be different from each other. This is because the material suitable for the wiring layer 2163 and the material suitable for the upper light-shielding layer 231 are different. In this example, the main component of the lower light-shielding layer 109 is tungsten, the main component of the upper light-shielding layer 231 is aluminum, and the main components of the wiring layers 2161, 2162, and 2163 are copper.

In this embodiment, the upper light-shielding layer 231 is provided above the dielectric region 130. That is, the dielectric region 130 is located between the upper light-shielding layer 231 and the charge generation region 102. By doing so, it is possible to reduce the difference in the influence of the presence of the dielectric region 130 on the charge generation region 102 between the light receiving unit PXL and the light shielding unit OBA. This is because the upper light-shielding layer 231 arranged above the dielectric region 130 does not easily affect the dielectric region 130 and the charge generation region 102.

The upper shading layer 231 is arranged on the intermediate layer 229. That is, in the light-shielding unit OBA, the intermediate layer 229, which is an inorganic material layer, is located between the upper light-shielding layer 231 and the dielectric region 130.

The lower light-shielding layer 109 covers the charge holding region 105. The lower light-shielding layer 109 has an opening 190 on the charge generation region 102. The dielectric film 110 is arranged so as to cover the entire charge generation region 102 and a part of the lower light-shielding layer 109. On the other hand, also in the light-shielding region OBR, as in the light-receiving region PXR, the gate electrode 101, the dielectric region 130, the gate electrode 104, the charge holding region 105, the gate electrode 107, the gate electrode 108, the lower light-shielding layer 109, and the dielectric film 110. The charge detection region 103 is arranged. However, the charge generation region 102 of the light-shielding region OBR is shielded by the upper light-shielding layer 231. Therefore, the signal from the charge generation region 102 can be processed as a reference signal for black level correction.

An upper light-shielding layer 231 for light-shielding is arranged in the light-shielding unit OBA. However, the structure between the charge generation region 102 of the light-shielding unit OBA and the upper light-shielding layer 231 is the same as the structure from the semiconductor layer 200 to the intermediate layer 229 in the light-receiving unit PXL, or the difference is extremely small. As a result, the signal obtained from the light-shielding unit OBA can be expected to improve the accuracy as a reference signal for correcting the black level.

As shown in FIG. 3B, a light-shielding unit OBB may be provided in the light-shielding region OBR in addition to the light-shielding unit OBA. The shading unit OBB has a charge holding region 105 that holds the charges transferred from the charge generation region 102 of the shading unit OBB. The light-shielding unit OBB is located above the charge generation region 102 of the light-shielding unit OBB and has a dielectric region 130 surrounded by the interlayer insulating layer 214X. In the light-shielding unit OBB, the lower light-shielding layer 109 covers the charge holding region of the light-shielding unit OBB between the interlayer insulating layer 214X and the semiconductor layer 200. Further, in the light-shielding unit OBB, the lower light-shielding layer 109 covers the charge generation region 102 between the dielectric region 130 and the semiconductor layer 200. That is, in the light-shielding unit OBB, the lower light-shielding layer 109 covers not only the charge holding region 105 but also the charge generation region 102. An upper light-shielding layer 231 is arranged on the dielectric region 130 as in the light-shielding unit OBA, and the dielectric region 130 is covered with the upper light-shielding layer 231 to shield the dielectric region 130 from light. The upper light-shielding layer 231 in the light-shielding unit OBB is composed of a light-shielding film 230 continuous with the upper light-shielding layer 231 in the light-shielding unit OBA.

The light-shielding unit OBB differs from the light-shielding unit OBA only in that the lower light-shielding layer 109 does not have an opening corresponding to the opening 190 of the light-shielding unit OBA above the charge generation region 102 in the light-shielding unit OBB. In the light-shielding unit OBB, the lower light-shielding layer 109 can have openings corresponding to the openings 191 and 192 of the light-shielding unit OBA. Further, in the light-shielding unit OBB, the light-shielding area of the semiconductor layer 200 is increased by the lower light-shielding layer 109 on the charge generation region 102, so that the light-shielding performance is high and the optical accuracy of the black level is higher than that of the light-shielding unit OBA. Become. However, in terms of the reproducibility of the noise component of the light receiving unit PXL, the light shielding unit OBB is inferior to the light shielding unit OBA having an opening 190 like the light receiving unit PXL. Therefore, it is preferable to use or combine the black level correction using the signal from the light-shielding unit OBA and the black level correction using the signal from the light-shielding unit OBB as necessary. Although the light-shielding unit OBA and the light-shielding unit OBB can be mixed in the light-shielding region OBR as in this example, the light-shielding unit OBA may be used alone without arranging the light-shielding unit OBB in the light-shielding region OBR. Further, if only the lower light-shielding layer 109 is sufficient for light-shielding the charge generation region 102 in the light-shielding unit OBB, the upper light-shielding layer 231 can be omitted.

The details of the structure of the pixel unit UNT will be described. In FIGS. 3A and 3B, the charge generation region 102 in the semiconductor layer 200 is, for example, an n-type impurity region. In each of the plurality of pixel units UNT, the n-type impurity region as the charge generation region 102 is a charge collection region, and each has substantially the same impurity concentration. Specifically, assuming that the maximum concentration of n-type impurities in the charge generation region 102 of the light-receiving unit PXL is Cnmax, the maximum concentration of n-type impurities in the pixel unit UN other than the light-receiving unit PXL is Cnmax / 2 (half). The above is 2 × Cnmax (twice) or less. The photodiode constituting the charge generation unit 2 forms a pn junction with the n-type charge generation region 102 laterally and below the n-type charge generation region 102 in addition to the n-type charge generation region 102. It also includes a charge generation region, which is an impurity region of. The range of the charge generation region is the range in which the charge collected in the n-type charge generation region 102, which is the charge collection region, is generated. This range is determined by the potential distribution in the semiconductor layer 200. The region that generates charges that are not collected in the n-type charge generation region 102, which is the charge collection region, does not become the charge generation region in the pixel circuit. In this example, the charge generation region 102 is embedded by arranging the p-type impurity region 205 above the charge generation region 102, that is, between the charge generation region 102 and the surface of the semiconductor layer 200. It is supposed to be.

With this structure, it is possible to suppress noise generated at the interface between the semiconductor layer 200 and the insulating film arranged on the surface thereof. The charge holding region 105 is, for example, an n-type impurity region, and by arranging the p-type impurity region 206 between the charge holding region 105 and the surface of the semiconductor layer 200, the charge holding region 105 can be used as an embedded structure. There is. With such a structure, it is possible to reduce noise in the charge holding region 105.

A protective film 211 is arranged on the charge generation region 102. As the protective film 211, a film having a refractive index lower than that of the semiconductor layer 200, for example, a film including a silicon nitride layer (SiN) having a refractive index of about 2.0 can be used. The protective film 211 may be a multi-layer film including, in addition to the silicon nitride layer, a layer having a refractive index lower than that of the silicon nitride layer, for example, a silicon oxide layer having a refractive index of about 1.5. The protective film 211 is located between the dielectric film 110 and the semiconductor layer 200, and is provided extending between the lower light-shielding layer 109 and the semiconductor layer 200. The protective film 211 covers the charge holding region 105 and the gate electrodes 101, 104, 106 between the lower light-shielding layer 109 and the semiconductor layer 200. The protective film 211 also covers the charge discharge region 111, the charge detection region 103, and the impurity regions 112 and 113. The protective film 211 can be used as an etching stop film when forming a contact hole for a contact plug.

A sidewall 212 is arranged between the protective film 211 and the lower light-shielding layer 109. The sidewall 212 is an insulator such as silicon oxide or silicon nitride, and covers the uneven stepped portion of the protective film 211 formed by the gate electrodes 101, 104, 106. The unevenness of the base of the lower light-shielding layer 109 is alleviated by the sidewall 212, and the unevenness of the upper surface of the lower light-shielding layer 109 is also alleviated accordingly. As a result, the generation of highly directional stray light on the upper surface of the lower light-shielding layer 109 is suppressed.

An insulator film 213, which is a single-layer film of a silicon oxide layer, is arranged between the protective film 211 and the dielectric film 110. The insulating film 213 extends from between the dielectric film 110 and the lower light-shielding layer 109 to the interlayer insulating layer 2141 and the lower light-shielding layer 109 so as to cover the lower light-shielding layer 109. However, in FIGS. 3A and 3B, the insulator film 213 and the interlayer insulating layer 2141 are integrally described.

On the semiconductor layer 200, a contact plug 2191 for connecting the wiring layer 2161 to the semiconductor layer 200 and the gate electrode, and via plugs 2192 and 2193 for connecting the wiring layer 216X to each other are arranged. The main component of the contact plug 2191 is tungsten, and the main component of the via plugs 2192 and 2193 is copper. The wiring layer 2162 and the via plug 2192, and the wiring layer 2163 and the via plug 2193 are integrally formed by a dual damascene structure. The wiring layer 2163 may have a barrier metal portion made of tantalum, titanium and / or a nitride thereof, in addition to the conductive portion containing copper as a main component.

Copper can be preferably used as the main component of the wiring layer 216X, but aluminum, tungsten, polysilicon, or the like may be used. The wiring layer 2161 and the lower light-shielding layer 109 may be connected in order to apply a voltage to the lower light-shielding layer 109 (not shown). Alternatively, a contact (not shown) may be formed and connected between the lower light-shielding layer 109 and the semiconductor layer 200.

The diffusion prevention layers 2171, 2172, and 2173 (hereinafter collectively referred to as the diffusion prevention layer 217X) are the wiring layer 216X and the interlayer insulating layer 214X in order to prevent Cu of the wiring layer 216X from diffusing into the interlayer insulating layer 214X. It is arranged between and. The diffusion prevention layer 217X is provided in contact with the wiring layer 216X. As the diffusion prevention layer 217X, for example, an insulator layer such as silicon nitride (SiN) or silicon carbide (SiC) is used. Silicon carbide (SiCN) can be used as the material for the diffusion prevention layer 217X. Silicon carbide (SiCN) may be classified as silicon carbide if it has more carbon than nitrogen, and may be classified as silicon nitride if it has more nitrogen than carbon. The diffusion prevention layer 217X surrounds the dielectric region 130 like the interlayer insulating layer 214X. The refractive index of the diffusion prevention layer 217X may be different from the refractive index of the dielectric region 130, or may be the same as the refractive index of the dielectric region 130. When the refractive index of the anti-diffusion layer 217X is higher than the refractive index of the interlayer insulating layer 214X, the thickness of the anti-diffusion layer 217X is made smaller than the thickness of the interlayer insulating layer 214X, so that the dielectric region 130 to the anti-diffusion layer 217X It is possible to suppress the leakage of light to. The interface composed of the diffusion prevention layer 217X and the interlayer insulating layer 214X can reflect light toward the charge generation region 102. Therefore, by arranging the dielectric region 130 instead of the diffusion prevention layer 217X above the charge generation region 102, the number of interfaces to the charge generation region 102 can be reduced, which is advantageous for improving the sensitivity. In order to obtain this effect, if the dielectric region 130 is surrounded by a plurality of insulating layers (diffuse prevention layer 217X and interlayer insulating layer 214X), the refractive index and dielectric constant of the dielectric region 130 are interlayer insulating. It does not have to be lower than layer 214X.

The light receiving unit PXL further includes an in-layer lens 240 as well as a dielectric region 130 as an optical system arranged directly above the charge generation region 102. Further, a color filter 250 and a microlens 251 may be provided above the in-layer lens 240. The in-layer lens 240 is arranged for each light receiving unit PXL on the silicon nitride layer 242 that continuously covers the light receiving region PXR.

Between the dielectric region 130 and the in-layer lens 240, an antireflection silicon nitride layer 228, an intermediate layer 229, and an antireflection layer silicon nitride layer 243 are arranged. The silicon nitride layer 228 and 243 have, for example, a refractive index of about 1.6 to 1.7. Silicon oxide (SiO) having a refractive index of about 1.5 can be used as the intermediate layer 229. The intermediate layer 229 can be used as an interlayer insulating layer of the peripheral region PRR. Further, the silicon nitride layer 241 may be further formed above the in-layer lens 240. By adopting such an antireflection structure, the transmittance of the incident light can be improved, and thus the sensitivity can be improved.

A flattening layer 244 made of an organic material (resin) is arranged between the in-layer lens 240 and the color filter 250, and an organic material (resin) is formed between the color filter 250 and the microlens 251. A flattening layer 245 is arranged. The color filter 250 and the microlens 251 are made of an organic material. The flattening layer 245 and the microlens 251 can be integrally formed. Further, when the in-layer lens 240 is not provided on the silicon nitride layer 242, the flattening layer 244 can be omitted.

FIG. 3C shows the cross-sectional structure of the peripheral region PRR. In FIG. 3C, a P-type MOS transistor having a peripheral region PRR is taken as an example. This p-type MOS transistor can form a CMOS circuit together with an n-type MOS transistor. The p-type impurity region 208, which is the source / drain of the MOS transistor, is formed in the impurity region 207, which is the n-type well. Further, the plurality of MOS transistors are separated from each other by the element separation region 114 having the STI structure and the LOCOS structure. A side spacer 116 is formed on the side wall of the gate electrode 115 of the MOS transistor by etching a film common to the protective film 211 in the pixel unit UNT. The impurity region 208 is formed to have an LDD structure using a side spacer 116. On the upper surface of the impurity region 208 and the gate electrode 115 that serve as the source and drain, a silicide region 117 of a refractory metal such as cobalt silicide or nickel silicide is provided to reduce the electrical resistance between the contact plug 2190 and the impurity region 208. Reduce. The protective film 118 can be an etching stop film used when forming a contact hole for the contact plug 2190, or can be a diffusion prevention film that prevents the diffusion of metal from the silicide region 117. The protective film 118 is formed by etching a film common to the dielectric film 110. The dielectric material film 133 for forming the light guide path of the light receiving unit PXL and the light shielding units OBA and OBB formed after forming the interlayer insulating layer 2144 is removed in the peripheral region PRR. The intermediate layer 229 is arranged on the interlayer insulating layer 2144, and the via plug 2194 is provided so as to penetrate the intermediate layer 229 and the interlayer insulating layer 2144. An input or output electrode 2164 is arranged on the via plug 2194. The electrode 2164 is formed by etching a conductor film common to the upper light-shielding layer 231. As described above, in the step of forming the upper light-shielding layer 231, the conductive member constituting the wiring of the electrode 2164 and the peripheral region PRR can be formed at the same time. In the peripheral region PRR, the intermediate layer 229 functions as an interlayer insulating layer between the electrode 2164 and the wiring layer of the same layer as the electrode 2164 and the wiring layer 2163 together with the interlayer insulating layer 2144. A passivation film, which is a laminated film of the silicon nitride layer 241 and the silicon nitride layer 242, and the silicon nitride layer 243, is formed so as to cover the electrodes 2164 and wiring (not shown). The silicon nitride layer 242 of the passivation film is a layer constituting the in-layer lens 240 in the pixel region. On the electrode 2164, an opening 260 for connection with the outside is provided in the passivation film.

<Second Embodiment>
The second embodiment will be described with reference to FIGS. 4 and 5. This embodiment relates to an intermediate region DMR between a light receiving region PXR and a light shielding region OBR, as described with reference to FIG. 1 (a).

FIG. 4 shows semiconductors of the dummy light receiving unit DML, the dummy light shielding unit DMA, and the DMB arranged in the intermediate region DMR in addition to the light receiving unit PXL of the light receiving region PXR and the light shielding units OBA and OBB of the light shielding region OBR described in the first embodiment. A plan view of the vicinity of the layer is shown. FIG. 5 is a cross-sectional view of a light receiving unit PXL, a dummy light receiving unit DML, a dummy shading unit DMA, DMB, a shading unit OBA, and an OBB. Since the light receiving unit PXL and the light shielding units OBA and OBB may be the same as those in the first embodiment, detailed description thereof will be omitted. Although the opening 191 in FIG. 2B is described as the opening 193 in FIG. 4, the function and shape of the opening 193 may be the same as the function and shape of the opening 191.

The dummy light receiving unit DML, the dummy shading unit DMA, and the DMB are arranged between the light receiving unit PXL and the shading units OBA and OBB. The dummy light receiving unit DML, the dummy shading unit DMA, and DMB are auxiliary pixel units UN provided for the purpose of improving the characteristics of the light receiving unit PXL and / or the shading units OBA and OBB.

The dummy light receiving unit DML, the dummy shading unit DMA, and the DMB itself can be configured so that no signal can be obtained from them. For example, neither the amplification transistor 8 nor the selection transistor 9 may be connected to the signal output line 10 in the dummy light receiving unit DML, the dummy shading unit DMA, and the DMB. Alternatively, even if the dummy light receiving unit DML, the dummy shading unit DMA, and DMB output the signal to the signal output line 10, it may not be used for signal processing. Alternatively, even if the signals from the dummy light receiving unit DML, the dummy shading unit DMA, and the DMB are signal-processed, they may not be reflected in the image. However, if the signals from the dummy light receiving unit DML, the dummy shading unit DMA, and the DMB are useful, the information may be incorporated into the image.

The charge holding region 105 of the dummy light receiving unit DML, the dummy light shielding unit DMA, and the DMB is covered with the lower light shielding layer 109 like the light receiving unit PXL, the light shielding unit OBA, and OBB. In the dummy light-receiving unit DML and the dummy light-shielding unit DMA, the lower light-shielding layer 109 has an opening 190 above the charge generation region 102, similarly to the light-receiving unit PXL and the light-shielding unit OBA. In the dummy light-shielding unit DMB, the lower light-shielding layer 109 covers the charge generation region 102, similarly to the light-shielding unit OBB. The dummy light receiving unit DML does not have an upper light shielding layer, and the charge generation region 102 of the dummy light receiving unit DML can receive light through the opening 190.

Since the lower light-shielding layer 109 of the dummy light-receiving unit DML and the dummy light-shielding unit DMA has an opening 190, the light that can reach the light-shielding unit OBA due to the reflection of light by the lower light-shielding layer 109 can be reduced. This is because the area of the lower light-shielding layer 109 can be reduced by providing the opening 190, and the reflection of light by the lower light-shielding layer 109 on the charge generation region 102 can be suppressed. Further, by providing the opening 190, the light incident on the dummy light receiving unit DML and the dummy shading unit DMA can be absorbed by the charge generation region 102 of the dummy light receiving unit DML and the dummy shading unit DMA.

The dummy light-shielding units DMA and DMB have an upper light-shielding layer 232 arranged farther from the semiconductor layer 200 than the lower light-shielding layer 109. That is, the distance between the upper light-shielding layer 232 and the semiconductor layer 200 in the dummy light-shielding unit DMA and DMB is larger than the distance between the lower light-shielding layer 109 and the semiconductor layer 200 in the light-shielding units OBA and OBB and the dummy light-shielding unit DMA and DMB. The charge generation region 102 of the dummy light-shielding unit DMA having an opening 190 in the lower light-shielding layer 109 is shielded by the upper light-shielding layer 232. Further, in the dummy light-shielding unit DMB having the charge generation region 102 covered with the lower light-shielding layer 109 by the upper light-shielding layer 232, the light-shielding performance in the charge-generating region 102 is enhanced.

The upper light-shielding layer 232 of the dummy light-shielding unit DMA and DMB is composed of a light-shielding film 230 continuous with the light-shielding unit OBA and the upper light-shielding layer 231 of the OBB. By making the light-shielding film 230 continuous, that is, by not dividing the light-shielding film 230, it is possible to prevent extra light from entering the charge generation region 102 of the light-shielding unit OBA from the slit formed by the division. By arranging the dummy light-shielding unit DMA and DMB between the light-receiving unit PXL and the light-shielding unit OBA, the light-shielding unit OBA can be separated from the light-receiving unit PXL by the size of the dummy light-shielding unit DMA and DMB. Therefore, it is possible to prevent the light incident between the light-shielding film 230 and the semiconductor layer 200 from being incident on the charge generation region 102 of the light-shielding unit OBA.

The upper light-shielding layer 232 is arranged closer to the semiconductor layer 200 than the upper light-shielding layer 231. That is, the distance between the upper light-shielding layer 232 and the semiconductor layer 200 in the dummy light-shielding units DMA and DMB is smaller than the distance between the upper light-shielding layer 231 and the semiconductor layer 200 in the light-shielding units OBA and OBB. By doing so, the entrance of light from the light-receiving region PXR to the portion between the light-shielding film 230 and the semiconductor layer 200 is narrowed, so that the intrusion of light into the light-shielding region OBR can be reduced. As a result, the accuracy of black level correction can be improved.

The dielectric region 130 surrounded by an insulator layer such as the interlayer insulating layer 214X and the diffusion prevention layer 217X as provided in the light receiving unit PXL is arranged on the charge generation region 102 of the dummy light receiving unit DML. Not. Therefore, the interlayer insulating layer 214X and the diffusion prevention layer 217X cover the charge generation region 102 of the dummy light receiving unit DML. The interlayer insulating layer 214X and the diffusion prevention layer 217X cover the entire opening 190 of the lower light shielding layer 109 in the dummy light receiving unit DML. Similarly, the dielectric region 130 surrounded by an insulator layer such as the interlayer insulating layer 214X and the diffusion prevention layer 217X as provided in the light-shielding units OBA and OBB is a charge generation region of the dummy light-shielding units DMA and DMB. Not placed on top of 102. Therefore, the interlayer insulating layer 214X and the diffusion prevention layer 217X cover the charge generation regions 102 of the dummy shading unit DMA and DMB between the upper shading layer 232 and the semiconductor layer 200. The interlayer insulating layer 214X and the diffusion prevention layer 217X cover the entire opening 190 of the lower light-shielding layer 109 in the dummy light-shielding unit DMA.

In this way, by not providing the dielectric region 130 in the dummy light receiving unit DML, the dummy light shielding unit DMA, and the DMB, the dielectric region 130 of the pixel unit UN other than the light receiving unit PXL is interposed and propagated to the light shielding units OBA and OBB. The possibility of doing so can be reduced. It can be considered that the distance between the light receiving unit PXL and the adjacent dielectric regions 130 between the light shielding units OBA and OBB is increased by the amount of the pixel unit UN not provided with the dielectric region 130. By separating the light receiving unit PXL from the light shielding units OBA and OBB, it can be said that the propagation of light from the light receiving unit PXL to the light shielding unit OBA is suppressed.

In this example, not only the dielectric region 130 but also the dielectric material film 133 is not provided in the dummy light receiving unit DML, the dummy light shielding unit DMA, and the DMB. By doing so, it is possible to reduce the possibility that light propagates to the light shielding units OBA and OBB through the dielectric material film 133. Further, by not providing the dielectric material film 133 on the dummy light-shielding units DMA and DMB, the upper light-shielding layer 232 can be brought closer to the semiconductor layer 200 than the upper light-shielding layer 231 by at least the thickness of the dielectric material film 133. can. Therefore, as described above, it is possible to reduce the intrusion of light into the light-shielding region OBR.

When the dielectric region 130 is not provided in the dummy light receiving unit DML, the dummy light shielding unit DMA, and the DMB, the dielectric film 110 as the etching stop film may not be provided. In particular, in the dummy light-shielding unit DMB in which the lower light-shielding layer 109 covers the charge generation region 102, the dielectric film 110 may not be provided. However, considering the absorption of light in the charge generation region 102 of the dummy light receiving unit DML and the dummy shading unit DMA as described above, the dummy light receiving unit DML and the dummy shading unit DMA are provided with the dielectric film 110. Is preferable. In this example, the dielectric film 110 that functions as an antireflection film is arranged on the charge generation region 102 of the dummy light receiving unit DML and the dummy light shielding unit DMA via the opening 190. By doing so, it is possible to suppress absorption in the charge generation region 102 and suppress reflection of light on the surface of the semiconductor layer 200.

In this example, the light-shielding unit OBA is arranged between the light-shielding unit OBB and the light-receiving unit PXL, but conversely, the light-shielding unit OBB may be arranged between the light-shielding unit OBA and the light-receiving unit PXL. The closer to the end of the light-shielding film 230 on the light-receiving region PXR side, the easier it is for light to reach the portion between the light-shielding film 230 and the semiconductor layer 200 from the light-receiving region PXR side. Therefore, the light-shielding unit OBB in which the charge generation region 102 is doubly shielded by the upper light-shielding layer 231 and the lower light-shielding layer 109 can sufficiently shield light even if it is close to the light-receiving region PXR side. Further, by keeping the light-shielding unit OBA having the lower light-shielding layer 109 having an opening 190 on the charge generation region 102 away from the light-receiving region PXR side, even if there is an opening 190, the upper light-shielding layer 231 can sufficiently block light.

<Third Embodiment>
As a third embodiment, a method of manufacturing the photoelectric conversion device IS will be described. 6 to 9 are cross-sectional views showing a method of manufacturing the photoelectric conversion device IS.

In the step a shown in FIG. 6A, the semiconductor layer 200 is prepared as a silicon wafer, and then the charge discharge region 111, the charge generation region 102, the charge retention region 105, and the gate electrodes 101, 104, 106 of each transistor are formed. ..

Next, the protective film 211 is formed on the charge generation region 102, the gate electrode of each transistor, and the source and drain of each transistor. Silicon nitride can be used for the protective film 211. Further, the protective film 211 can be used as a film for forming the side spacer 116 (see FIG. 3C) of the transistor arranged in the peripheral region PRR outside the pixel region (not shown).

Next, in the step b shown in FIG. 6B, an insulating film such as a silicon oxide film is formed on the protective film 211, and the insulating film is etched back to the sidewall 212 (FIG. 3A). , (B)). A light-shielding material film such as a tungsten film to be a lower light-shielding layer 109 is formed on the protective film 211 via the sidewall 212 so as to cover at least the charge generation region 102, the gate electrode 104, and the charge retention region 105. Next, the portion of the light-shielding material film that overlaps the charge-generating region 102 in a plan view is removed, a part of the charge-generating region 102, the charge-holding region 105 is covered, and a lower light-shielding layer having an opening 190 on the charge-generating region 102. Form 109. Dry etching can be used to remove the light-shielding material.

Next, in the step c shown in FIG. 6 (c), an insulator film such as a silicon oxide film is formed on the lower light-shielding layer 109, and further, the lower light-shielding on the charge generation region 102 is formed through the insulator film. A dielectric film 110 such as a silicon nitride film is formed so as to cover the opening 190 of the layer 109. Dry etching can be used for patterning the dielectric film 110.

Next, in the step d shown in FIG. 7A, the contact plugs 2190 and 2191 (see FIGS. 3A to 3C), the interlayer insulating layer 214X, the diffusion prevention layer 217X, and the wiring layer 216X are used by a known method. , Via plugs 2192, 2193 are formed. The wiring layer 216X containing copper as a main component and the via plug can be formed by the dual damascene method.

After that, in the step e shown in FIG. 7B, a hole 218 for the light guide path is formed on the place where the light guide path should be formed, that is, the charge generation region 102 of the interlayer insulating layer 214X and the diffusion prevention layer 217X. .. The holes 218 are formed in the light receiving unit PXL and the light-shielding units OBA and OBB, but not in the dummy light-receiving unit DML and the dummy light-shielding units DMA and DMB. Dry etching can be used as a method for forming the holes 218. When forming the holes 218, the dielectric film 110 functions as an etching stop film. By stopping the etching at the dielectric film 110, it is possible to suppress the increase in noise due to etching damage in the charge generation region 102. The dielectric film 110 as the etching stop film may be overetched. The dielectric film 110 may be a material that is less likely to be etched than the interlayer insulating layer 2141 with respect to the etching conditions at the time of etching the interlayer insulating layer 2141. If the interlayer insulating layer 2141 is a material containing silicon oxide as a main component (glass-based material such as BPSG, PSG, NSG, etc. may be used), a silicon nitride film or a silicon carbide film is formed on the dielectric film 110. Can be used. Further, the dielectric film 110 may be partially or completely removed by etching.

Next, in the step f shown in FIG. 7 (c), a high refractive index material having a higher refractive index than the interlayer insulating layer 214X is embedded as a dielectric material in the hole 218, and flattened to obtain a dielectric as a light guide path. Form the body region 130. As a method for embedding a high refractive index material, a high-density plasma CVD method or a spin coating method for an organic material can be used. The flattening can be performed by using the CMP method or the etchback method. Of the embedded dielectric materials, the portion located outside the holes 218 after flattening is the dielectric material film 133 as the residual film of the dielectric material. It is also possible to remove the dielectric material film 133 by flattening the dielectric material until the interlayer insulating layer 2144 is exposed.

Next, in the step g shown in FIG. 8A, the silicon nitride layer 228 is formed on the dielectric material film 133. The wiring layer 216b shown in FIG. 8A is equivalent to the wiring layer 2162 in other drawings. Further, although the portion where the oxynitride silicon layer 228 is formed is indicated by the reference numeral of the oxynitride silicon layer 228 in FIG. 7 (c), the oxynitride silicon layer 228 is still formed in the step f of FIG. 7 (c). The oxynitriding silicon layer 228 is formed in this step g.

Next, in the step h shown in FIG. 8B, the silicon nitride layer 228 and the dielectric material film 133 are removed by etching in the dummy light receiving unit DML, the dummy shading unit DMA, and the DMB. As a result, in the dielectric material film 133, a slit 134 is formed between the light receiving region PXR and the light shielding region OBR.

Next, in step i shown in FIG. 8C, an intermediate layer 229 such as a silicon oxide film is formed. The oxynitride silicon layer 228 has a charge generation region 102 in the light receiving unit PXL by suppressing reflection of incident light, as compared with a configuration in which the intermediate layer 229 is provided in contact with the dielectric material film 133 (or the dielectric region 130). It is possible to increase the amount of incident light on.

Next, in the step j shown in FIG. 9A, a light-shielding film 230 serving as the upper light-shielding layer 231 of the light-shielding units OBA and OBB and the upper light-shielding layer 232 of the dummy light-shielding units DMA and DMB is formed. The light-shielding film 230 may reflect or absorb light traveling toward the charge generation region 102, and a metal that reflects light or an organic material that absorbs light is suitable as the material of the light-shielding film 230. In this embodiment, it is an aluminum film. Due to the formation of the slit 134 in the dielectric material film 133 in the step h, the intermediate layer 229 has a step that is lower than the light-shielding units OBA and OBB in the dummy light-shielding units DMA and DMB. Therefore, the upper light-shielding layer 232 is arranged closer to the semiconductor layer 200 than the upper light-shielding layer 231.

The light-shielding film 230 is patterned to remove the light-shielding film 230 from above the light-receiving unit PXL and the dummy light-receiving unit DML. In the patterning of the light-shielding film 230, a conductive member constituting the wiring of the electrode 2164 (see FIG. 3C) and the peripheral region PRR can be formed at the same time.

Next, in the step k shown in FIG. 9B, a silicon nitride film is formed on the silicon nitride layer 243. By processing the silicon nitride film by the etchback method so as to have the in-layer lens 240, the silicon nitride layer 242 having the in-layer lens 240 is formed. The silicon nitride layer 241 is formed on the silicon nitride layer 242. The silicon nitride layer 243, the silicon nitride layer 242, and the silicon nitride layer 241 function as a passivation film.

Next, in step l shown in FIG. 9C, a flattening layer 244, a color filter 250, a flattening layer 245, and a microlens 251 are formed on the passivation film. The color filter 250 and the microlens 251 can be formed by photolithography of a photosensitive resin.

<Fourth Embodiment>
A fourth embodiment of the photoelectric conversion device IS will be described with reference to FIG. 10 (a). The same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted or simplified. The configuration of the light receiving unit PXL is the same as that of the first embodiment.

In the fourth embodiment, the in-layer lens 240 is formed on the dielectric region 130 in the light-shielding region OBR as well as in the light-receiving region PXR. Similar to the light receiving region PXR, an antireflection silicon nitride layer 228, an intermediate layer 229, a silicon nitride layer 242 having an in-layer lens 240, and an antireflection silicon nitride layer 241 are formed.

The difference from the first embodiment is that the upper light-shielding layer 233 is formed on the in-layer lens 240 of the light-shielding region OBR via the oxynitride silicon layer 241 instead of the upper light-shielding layer 231. Other configurations may be the same as in the first embodiment. In particular, the lower shading layer 109 covering the charge holding region 105 in the shading unit OBA has an opening 190 on the charge generating region 102, and the lower shading layer 109 covering the charge holding region 105 in the shading unit OBB also has a charge generating region 102. cover. The dielectric region 130 can be arranged on the charge generation region 102 in the light shielding unit OBA and on the charge generation region 102 in the light shielding unit OBB.

As a manufacturing process (not shown) of the fourth embodiment, after flattening the light guide path, a silicon nitride layer 228 is formed, and an intermediate layer 229 is formed on the silicon nitride layer 228. A silicon nitride layer 242 having an in-layer lens 240 is formed on the silicon nitride layer 243, and a silicon nitride layer 241 is formed on the silicon nitride layer 242. Next, a light-shielding film to be the upper light-shielding layer 233 is formed in the light-shielding region OBR. Further, a passivation film (silicon nitride layer or silicon nitride layer) (not shown) may be formed on the upper part of the upper light-shielding layer 233, or a color filter 250 or a microlens 251 may be provided. As an effect of this embodiment, the hydrogen termination effect of the semiconductor layer 200 by the hydrogen sinter from the silicon nitride layer 242 (particularly the thick in-layer lens 240) can be expected in the light-shielding region OBR as well as the light-receiving region PXR, and the black level is corrected. Further improvement in accuracy can be expected. This is because the upper light-shielding layer 233 is arranged above the silicon nitride layer 242 instead of below the silicon nitride layer 242 to supply hydrogen from the silicon nitride layer 242, which was blocked by the upper light-shielding layer 231 in the first embodiment, to the semiconductor layer 200. Because it can be increased.

<Fifth Embodiment>
A fifth embodiment of the photoelectric conversion device IS will be described with reference to FIG. 10 (b). The same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted or simplified. The configuration of the light receiving unit PXL is substantially the same as that of the first embodiment , but in the light receiving unit PXL, the lower light shielding layer 109 covering the charge holding region 105 is formed of the same layer as the wiring layer 2161. Different from. The distance between the lower light-shielding layer 109 and the charge holding region 105 is larger than the distance between the charge generation region 102 and the dielectric region 130. It is also different from the first embodiment in that a flattening layer 246 is provided between the intermediate layer 229, the silicon nitride layer 242, and the silicon nitride layer 243. The flattening layer 246 is, for example, a silicon oxide layer, and extends between the electrode 2164, the silicon nitride layer 242, and the silicon nitride layer 243 in the peripheral region PRR shown in FIG. 3 (c) .

In the fifth embodiment, in the light-shielding unit OBA, the lower light-shielding layer 109 is composed of the same layer as the wiring layer 2161. The upper light-shielding layer 231 is composed of the same layer as the wiring layer 2162. The upper light-shielding layer 231 is provided below the dielectric region 130. That is, the upper light-shielding layer 231 is arranged between the dielectric region 130 and the charge generation region 102. The dielectric region 130 is surrounded by the interlayer insulating layers 2143 and 2144, but the interlayer insulating layers 2142 and 2141 do not have holes for the dielectric region 130 and do not surround the dielectric region 130. In the present embodiment, since the configuration between the charge generation region 102 and the dielectric region 130 differs between the light receiving unit PXL and the light shielding unit OB, the accuracy of the black level reference signal due to the degree of dark current may decrease. .. In particular, the main factors are that the existence of the dielectric region 130 (hydrogen termination effect) and the influence of damage on the semiconductor layer 200 when forming an opening in the interlayer insulating layer are different. However, since the upper light-shielding layer 231 can be brought closer to the opening 190 of the lower light-shielding layer 109, there is an advantage that the light entering the charge generation region 102 of the light-shielding unit OBA and OBB via the interlayer insulating layer can be reduced. Therefore, even in this embodiment, the accuracy of the black level signal can be sufficiently ensured.

Further, in the present embodiment, the distance between the charge holding region 105 and the lower light-shielding layer 109 is smaller than the distance between the dielectric region 130 and the charge generation region 102. Therefore, there is a possibility that the amount of light emitted from the dielectric region 130 incident on the charge holding region 105 from between the lower light-shielding layer 109 and the semiconductor layer 200 may increase. In this respect, it can be said that the first embodiment is superior.

<Sixth Embodiment>
In the light-shielding unit OBA, a light-shielding layer that shields the charge holding region 105 (corresponding to the lower light-shielding layer 109 of the above-described embodiment) and a light-shielding layer that shields the charge generation region 102 (corresponding to the upper light-shielding layer 231 of the above-described embodiment). ) Can be swapped up and down. In this case, in the light receiving unit PXL and the light shielding unit OBA, the point that the light shielding layer that shields the charge holding region 105 has an opening 190 above the charge generation region 102 and the point that the dielectric region 130 is provided is the same as the above-described embodiment. The same is true. Also in the light-shielding unit OBA, the accuracy of black level correction is improved by providing the opening 190 in the light-shielding layer that shields the charge holding region 105. This is because the difference between the light receiving unit PXL and the light shielding unit OBA due to the optical, electrical or chemical influence of the dielectric region 130 on the semiconductor layer 200 through the opening 190 can be eliminated or reduced. Is. The light-shielding unit OBA differs in that the light-shielding layer that shields the charge-generating region 102 is located between the opening 190 and the charge-generating region 102. The light-shielding layer that shields the charge-generating region 102 from light is similar to that of the fifth embodiment in that the light-shielding layer is located between the dielectric region 130 and the charge-generating region 102. Like the light receiving unit PXL of the first embodiment, the light shielding layer that shields the charge holding region 105 from light may be closer to the semiconductor layer 200 than the dielectric region 130. Alternatively, as in the light receiving unit PXL of the fifth embodiment, the dielectric region 130 may be closer to the semiconductor layer 200 than the light shielding layer that shields the charge holding region 105. In the present embodiment, it is possible to eliminate or reduce the difference in distance between the semiconductor layer 200 and the dielectric region 130 in the light receiving unit PXL and the light shielding unit OBA as compared with the fifth embodiment. In that respect, it is more advantageous than the fifth embodiment.

<7th Embodiment>
The seventh embodiment will be described with reference to FIGS. 11 and 12. This embodiment relates to an intermediate region DMR between a light receiving region PXR and a light shielding region OBR, as described with reference to FIG. 1 (a). The photoelectric conversion device IS in the present embodiment also includes a plurality of units each having a charge generation region 102 arranged in the semiconductor layer 200. The plurality of units include a light receiving unit PXL and a light shielding unit OBC. Each of the light receiving unit PXL and the light shielding unit OBC has a charge detection region 103 for detecting the charge transferred from the charge generation region 102. Each of the light receiving unit PXL and the light shielding unit OBC is located above the charge generation region 102 and has a dielectric region 130 surrounded by an insulator layer such as the interlayer insulating layer 214X. The semiconductor layer 200 has an intermediate region DMR located between the light receiving unit PXL and the light shielding unit. The intermediate region DMR is covered with a lower light-shielding layer 109 located between the interlayer insulating layer 214X and the semiconductor layer 200 over an area larger than the area of the charge generation region 102. The charge generation region 102 and the intermediate region DMR of the light-shielding unit OBC are covered with upper light-shielding layers 231 and 232 located on the opposite side of the semiconductor layer 200 with respect to the interlayer insulating layer 214X.

FIG. 11 shows a plan view of the dummy light-shielding units DMC and DMD arranged in the intermediate region DMR in the vicinity of the semiconductor layer, in addition to the light-receiving unit PXL of the light-receiving region PXR and the light-shielding unit OBC of the light-shielding region OBR described in the first embodiment. ing. FIG. 12 is a cross-sectional view of the light receiving unit PXL, the dummy shading units DMC, DMD, and the shading unit OBC. In the present embodiment, the dummy light-shielding unit DMD arranged between the light-receiving unit PXL and the light-shielding unit has a lower light-shielding layer 109 that covers the charge generation region 102, which is common to the dummy light-shielding unit DMB of the second embodiment. .. In the present embodiment, the modes of the light receiving unit PXL and the light blocking unit are different from those of the first to sixth embodiments. The light receiving unit PXL and the light blocking unit OBC in the present embodiment do not have the charge holding region 105, and accordingly, the gate electrode 104 of the first transfer gate 4 and the lower light blocking layer 109 covering the charge holding region 105 do not exist. The gate electrode 106 of the transfer gate corresponding to the second transfer gate 6 is arranged between the charge generation region 102 and the charge detection region 103. The gate electrode 106 transfers a charge from the charge generation region 102 to the charge detection region 103. Further, the gate electrode 101 of the third transfer gate 1 may not be present.

The dummy light-shielding units DMC and DMD are arranged between the light-receiving unit PXL and the light-shielding unit OBC. The dummy light-shielding units DMC and DMD are auxiliary pixel units UN provided for the purpose of improving the characteristics of the light-receiving unit PXL and / or the light-shielding unit OBC.

The dummy shading units DMC and DMD themselves can be configured so that no signal can be obtained from them. For example, neither the amplification transistor 8 nor the selection transistor 9 may be connected to the signal output line 10 in the dummy shading units DMC and DMD. Alternatively, even if the dummy shading units DMC and DMD output the signal to the signal output line 10, they may not be used for signal processing. Alternatively, even if the signals from the dummy shading units DMC and DMD are signal-processed, they may not be reflected in the image. However, if the signals from the dummy shading units DMC and DMD are useful, the information may be incorporated into the image.

The charge generation region 102 of the dummy shading unit DMD is covered with a lower shading layer 109. The charge generation region 102 of the dummy light-shielding unit DMC is not covered with the lower light-shielding layer 109 like the light-receiving unit PXL. The dummy shading unit DMC has an upper shading layer 233, and the DMD has an upper shading layer 232. The charge generation area 102 of the dummy light-shielding unit DMC is shielded by the upper light-shielding layer 233, and the charge generation area 102 of the dummy light-shielding unit DMC is shielded by the upper light-shielding layer 232 and the lower light-shielding layer 109.

Since the dummy light-shielding unit DMD has the lower light-shielding layer 109, it is possible to suppress the light entering under the upper light-shielding layer 232 from entering the semiconductor layer 200. As a result, it is possible to suppress the incident light on the light shielding unit OBC through the semiconductor layer 200.

In the example shown in FIG. 11, the lower light-shielding layer 109 covering the semiconductor layer 200 in the intermediate region DMR has an opening 191 above the gate electrodes 106, 107, 108. When the gate electrodes 106, 107, 108 and the lower light-shielding layer 109 overlap each other, the height of the base of the interlayer insulating layer 214X increases by that amount. As a result, a height difference is likely to occur in the base of the interlayer insulating layer 214X between the light receiving region PXR and the intermediate region DMR, and the flatness of the interlayer insulating layer 214X is lowered. Since the lower light-shielding layer 109 has an opening above the gate electrodes 106, 107, 108, the flatness of the interlayer insulating layer 214X is improved. As a modification of this example, in the intermediate region DMR, the lower light-shielding layer 109 may cover not only the charge generation region 102 but also the gate electrodes 106, 107, 108. By doing so, the light-shielding performance of the lower light-shielding layer 109 with respect to the semiconductor layer 200 is improved.

The dummy light-shielding units DMD and DMC have an upper light-shielding layer 232 and 233 arranged farther from the semiconductor layer 200 than the lower light-shielding layer 109. That is, the distance between the upper light-shielding layer 232 and 233 in the dummy light-shielding units DMD and DMC and the semiconductor layer 200 is larger than the distance between the lower light-shielding layer 109 and the semiconductor layer 200 in the light-shielding unit OBC and the dummy light-shielding unit DMD. The upper light-shielding layer 232 is located on the side opposite to the side of the semiconductor layer 200 with respect to the interlayer insulating layer 214X. The charge generation region 102 of the dummy light-shielding unit DMC that does not have the lower light-shielding layer 109 is shielded by the upper light-shielding layer 233. Further, in the dummy light-shielding unit DMD having the charge generation region 102 covered with the lower light-shielding layer 109 by the upper light-shielding layer 232, the light-shielding performance in the charge generation region 102 is enhanced.

The upper light-shielding layers 233 and 232 of the dummy light-shielding units DMC and DMD are composed of a light-shielding film 230 continuous with the upper light-shielding layer 231 of the light-shielding unit OBC. By making the light-shielding film 230 continuous, that is, by not dividing the light-shielding film 230, it is possible to prevent extra light from entering the charge generation region 102 of the light-shielding unit OBC from the slit formed by the division. By arranging the dummy light-shielding units DMC and DMD between the light-receiving unit PXL and the light-shielding unit OBC, the light-shielding unit OBC can be separated from the light-receiving unit PXL by the size of the dummy light-shielding units DMD and DMC. Therefore, it is possible to prevent the light incident between the light-shielding film 230 and the semiconductor layer 200 from being incident on the charge generation region 102 of the light-shielding unit OBC.

The upper light-shielding layer 232 is arranged closer to the semiconductor layer 200 than the upper light-shielding layers 231 and 233. That is, the distance between the upper light-shielding layer 232 and the semiconductor layer 200 in the dummy light-shielding unit DMD is smaller than the distance between the upper light-shielding layer 231 in the light-shielding unit OBC and the upper light-shielding layer 233 and the semiconductor layer 200 in the dummy light-shielding unit DMC. By doing so, the entrance of light from the light-receiving region PXR to the portion between the light-shielding film 230 and the semiconductor layer 200 is narrowed, so that the intrusion of light into the light-shielding region OBR can be reduced. As a result, the accuracy of black level correction can be improved.

The dielectric region 130 surrounded by an insulator layer such as the interlayer insulating layer 214X and the diffusion prevention layer 217X as provided in the light receiving unit PXL is arranged on the charge generation region 102 of the dummy shading unit DMD. Not. Therefore, the interlayer insulating layer 214X and the diffusion prevention layer 217X cover the charge generation region 102 of the dummy shading unit DMD. The interlayer insulating layer 214X and the diffusion prevention layer 217X cover the entire lower light-shielding layer 109 in the dummy light-shielding unit DMD. Similarly, the dielectric region 130 surrounded by an insulator layer such as the interlayer insulating layer 214X and the diffusion prevention layer 217X, which is provided in the shading unit OBC, is above the charge generation region 102 of the dummy shading unit DMD. Is not placed. Therefore, the interlayer insulating layer 214X and the diffusion prevention layer 217X cover the charge generation region 102 of the dummy shading unit DMD between the upper shading layer 232 and the semiconductor layer 200. The interlayer insulating layer 214X and the diffusion prevention layer 217X cover the entire lower light-shielding layer 109 in the dummy light-shielding unit DMD.

By not providing the dielectric region 130 in the dummy light-shielding unit DMD in this way, it is possible to reduce the possibility of propagating to the light-shielding unit OBC via the dielectric region 130 of the pixel unit UN other than the light-receiving unit PXL. It can be considered that the distance between the light receiving unit PXL and the light shielding unit OBC adjacent to each other in the dielectric region 130 is increased by the amount of the pixel unit UNT in which the dielectric region 130 is not provided. By separating the light receiving unit PXL and the light blocking unit OBC, it can be said that the propagation of light from the light receiving unit PXL to the light blocking unit OBC is suppressed.

In this example, not only the dielectric region 130 but also the dielectric material film 133 is not provided in the dummy shading unit DMD. By doing so, it is possible to reduce the possibility that light propagates to the light shielding unit OBC through the dielectric material film 133. Further, by not providing the dielectric material film 133 in the dummy light-shielding unit DMD, the upper light-shielding layer 232 can be brought closer to the semiconductor layer 200 than the upper light-shielding layer 231 by at least the thickness of the dielectric material film 133. Therefore, as described above, it is possible to reduce the intrusion of light into the light-shielding region OBR.

If the dummy light-shielding unit DMD is not provided with the dielectric region 130, the dielectric film 110 as the etching stop film may not be provided. The dummy light-shielding unit DMD in which the lower light-shielding layer 109 covers the charge generation region 102 is not provided with the dielectric film 110. However, as described above, considering that the charge generation region 102 of the dummy light-shielding unit DMD is thicker than the other units by the thickness of the lower light-shielding layer 109, the dummy light-shielding unit DMD has a dielectric film. It is preferable not to provide 110. In this example, the dielectric film 110 that functions as an antireflection film is arranged on the charge generation region 102 of the dummy shading unit DMC. By doing so, it is possible to suppress absorption in the charge generation region 102 and suppress reflection of light on the surface of the semiconductor layer 200.

Similar to the light receiving unit PXL, the dummy light shielding unit DMC is provided with a dielectric region 130. The dielectric region 130 of the dummy shading unit DMC can also be referred to as a dummy dielectric region. The distance between the dielectric region 130 of the dummy shading unit DMC and the dielectric region 130 of the light receiving unit PXL is larger than the distance between the dielectric region 130 of the dummy shading unit DMC and the dielectric region 130 of the shading unit OBC. It can be made smaller. In this example, the dummy shading unit DMC is adjacent to the light receiving unit PXL, and the dummy shading unit DMD is located between the dummy shading unit DMC and the shading unit OBC. By arranging the dielectric region 130 in the dummy light-shielding unit DMC arranged closer to the light-receiving unit PXL than the dummy light-shielding unit DMD, the dielectric region 130 is abruptly placed on the upper layer of the interlayer insulating layer 2144 between the light-receiving region PXR and the intermediate region DMR. It is possible to suppress the occurrence of height difference. Thereby, the flatness of the upper layer of the interlayer insulating layer 2144 can be improved. The upper layer of the interlayer insulating layer 2144 is a dielectric film 110, a silicon nitride layer 228, and an intermediate layer 229. If the flatness of the upper layer of the interlayer insulating layer 2144 can be improved, even if the shape of the dielectric region 130 of the dummy light-shielding unit DMC is different from the shape of the dielectric region 130 of the light-receiving unit PXL or the dielectric region 130 of the light-shielding unit OBC. good. A lower light-shielding layer 109 may be provided under the dielectric region 130 and the dielectric film 110 of the dummy light-shielding unit DMC. However, in this way, the height of the base of the dielectric film 110 differs between the dummy light-shielding unit DMC and the light-receiving unit PXL, and the flatness of the interlayer insulating layer 214X may decrease. Therefore, it is preferable not to provide the lower light-shielding layer 109 on the dummy light-shielding unit DMC provided with the dielectric region 130. The dummy shading unit DMC can also be arranged in the intermediate region DMR of the first to sixth embodiments. For example, the dummy shading unit DMC can be arranged between the dummy shading unit DMA and the light receiving unit PXL of the second embodiment. When the dummy shading unit DMC is arranged between the dummy shading unit DMC of the second embodiment and the light receiving unit PXL, an intermediate region DMR similar to that of the present embodiment is obtained.

Up to this point, an example has been described in which each of the dummy light-shielding units DMC and DMD in the intermediate region DMR has a charge generation region 102, but since the light-shielding units DMC and DMD do not read signals, the charge generation region 102 may not be provided. In that case, the intermediate region DMR is covered with the lower light-shielding layer 109 located between the interlayer insulating layer 214X and the semiconductor layer 200 over an area larger than the area of the charge generation region 102 of the light-receiving unit PXL and the light-shielding unit OBC. You just have to. Then, even if the intermediate region DMR does not have the charge generation region 102, it has the same effect as when the charge generation region 102 exists. Since the two dummy shading units DMD are arranged here, the intermediate region DMR is covered with the lower shading layer 109 over an area larger than twice the area of the charge generation region 102.

In the second embodiment, the area of the charge holding region 105 is larger than the area of the charge generation region 102. Therefore, even in the dummy light-shielding unit DMA having the opening 190, the semiconductor layer 200 is covered with the lower light-shielding layer 109 located between the interlayer insulating layer 214X and the semiconductor layer 200 over an area larger than the area of the charge generation region 102. It has been. Therefore, in the second embodiment, not only the dummy light-shielding unit DMB but also the dummy light-shielding unit DMA has the effect of covering the semiconductor layer 200 with the lower light-shielding layer 109 in the intermediate region DMR as in the seventh embodiment. Obtainable.

<8th Embodiment>
A configuration other than the pixel unit UNT of the photoelectric conversion device IS will be described with reference to FIG. 1 (a). The photoelectric conversion device IS may include a peripheral circuit PRC. The peripheral circuit PRC sequentially processes a vertical drive circuit VDC for driving a plurality of pixel units, a signal processing circuit SPC for processing signals obtained from the plurality of pixel units, and a signal processed by the signal processing circuit SPC. It may include a horizontal scanning circuit HSC for output. Further, the peripheral circuit PRC may include an output circuit OPC that outputs a signal generated by the signal processing circuit SPC. The peripheral circuit PRC may include a vertical drive circuit VDC, a signal processing circuit SPC, and a control circuit CC for controlling the horizontal scanning circuit HSC. The signal processing circuit SPC can include an analog-to-digital converter, and the control circuit CC can include a timing generator. The vertical drive circuit VDC and the horizontal scan circuit HSC can include a shift register and an address decoder. The output circuit OPC can include an LVDS driver. The peripheral circuit PRC may be arranged in the peripheral region PRR located around the pixel unit UN in the semiconductor chip IC. However, at least a part of the vertical drive circuit VDC, the signal processing circuit SPC, the horizontal scanning circuit HSC, the control circuit CC, and the output circuit OPC can be provided on a semiconductor chip different from the semiconductor chip having a plurality of pixel units. It is also possible to stack the other semiconductor chip and a semiconductor chip having a plurality of pixel units.

The image pickup system SYS shown in FIG. 1 (b) can be an electronic device such as a camera or an information terminal having a shooting function. Further, the image pickup system SYS can be a transportation device such as a vehicle, a ship, or an air vehicle. The imaging system SYS as a transport device is suitable for transporting a photoelectric conversion device IS and for assisting and / or automating operation (maneuvering) by a photographing function.

The photoelectric conversion device IS may further include not only a semiconductor chip IC but also a package PKG accommodating the semiconductor chip IC. The package PKG is a bonding wire or bump that connects a substrate on which a semiconductor chip IC is fixed, a lid such as glass facing the semiconductor layer 200, and terminals provided on the substrate to terminals provided on the semiconductor chip IC. And the like, and may include.

The optical system OU forms an image on the photoelectric conversion device IS, and is, for example, a lens, a shutter, or a mirror. The control device CU controls the photoelectric conversion device IS, and is a semiconductor device such as an ASIC. The processing device PU processes the signal output from the photoelectric conversion device IS, and is a semiconductor device such as a CPU or an ASIC for forming an AFE (analog front end) or a DFE (digital front end). The display device DU is an EL display device or a liquid crystal display device that displays an image obtained by the photoelectric conversion device IS. The storage device MU stores an image obtained by the photoelectric conversion device IS, and is a volatile memory such as SRAM or DRAM, or a non-volatile memory such as a flash memory or a hard disk drive.

As described above, an embodiment of the present invention relates to a photoelectric conversion device IS including a plurality of pixel units each including a charge generation region 102 arranged in a semiconductor layer 200. The light receiving unit PXL and the light shielding unit OBA among the plurality of pixel units include a charge holding region 105 that holds the charge transferred from the charge generation region 102. The light receiving unit PXL and the light shielding unit OBA are located above the charge generation region 102 and include a dielectric region 130 surrounded by an insulating layer such as an interlayer insulating layer 214X and a diffusion prevention layer 217X.

The light-receiving unit PXL and the light-shielding unit OBA include a lower light-shielding layer 109 that covers the charge-holding region 105 between the interlayer insulating layer 214X and the semiconductor layer 200 and has an opening 190 above the charge-generating region 102. The charge generation region 102 of the light receiving unit PXL receives light through the opening 190, and the charge generation region 102 of the light shielding unit OBA is covered with the upper light shielding layer 231. This makes it possible to provide a photoelectric conversion device IS that can obtain a good signal.

Further, dummy light-shielding units DMA, DMB, and DMD are provided in the intermediate region DMR located between the light-receiving unit PXL and the light-shielding units OBA and OBC. In the intermediate region DMR, the semiconductor layer 200 is covered with a lower light-shielding layer 109 located between the interlayer insulating layer 214X and the semiconductor layer 200 over an area larger than the area of the charge generation region 102. The intermediate region DMR, the light-shielding unit OBA, and the charge generation region 102 of the OBC are covered with an upper light-shielding layer 231 located on the side opposite to the semiconductor layer 200 with respect to the interlayer insulating layer 214X. This makes it possible to provide a photoelectric conversion device IS that can obtain a good signal.

The embodiments described above can be appropriately modified without departing from the ideas of the present invention. In addition to the matters specified in the present specification, the disclosure contents of the present specification include matters not clearly stated in the present specification but can be read from the attached drawings.

IS photoelectric conversion device PXL light receiving unit OBA light shielding unit 200 semiconductor layer 102 charge generation area 105 charge holding area 109 lower light shielding layer 190 opening 130 dielectric region 214X interlayer insulating layer 231 upper light shielding layer

Claims (21)

A photoelectric conversion device including a plurality of units each having a charge generation region arranged in a semiconductor layer.
Multiple units include the first unit and the second unit
Each of the first unit and the second unit
A charge holding region that holds the charge transferred from the charge generation region, and a charge holding region.
A dielectric region located above the charge generation region, surrounded by an insulator layer, and formed of a material different from the insulator layer.
A first light-shielding layer that covers the charge holding region between the insulator layer and the semiconductor layer and has a first opening above the charge generation region.
Charge detection area and
A gate electrode arranged between the charge holding region and the charge detection region,
The second opening provided in the first light-shielding layer and
It has a first contact plug provided on the charge detection region and a second contact plug provided on the gate electrode, which are arranged in the same opening which is the second opening. death,
The charge generation region of the first unit receives light through the first opening and receives light.
A photoelectric conversion device characterized in that the charge generation region of the second unit is covered with the insulator layer and the second light-shielding layer provided on the dielectric region . The first aspect of the present invention, wherein the area of the first opening of the second unit is 0.8 times or more and 1.2 times or less the area of the first opening of the first unit. Photoconverter. The photoelectric conversion device according to claim 1 or 2 , wherein in the second unit, the first opening is located between the charge generation region and the second light-shielding layer. The photoelectric conversion device according to any one of claims 1 to 3, wherein the dielectric region constitutes a light guide path together with the insulator layer. The photoelectric conversion device according to any one of claims 1 to 4 , wherein in the second unit, the dielectric region is located between the second light-shielding layer and the charge generation region. Any of claims 1 to 5 , wherein in the first unit and the second unit, the distance between the charge holding region and the first light-shielding layer is smaller than the distance between the dielectric region and the charge generation region. The photoelectric conversion device according to item 1. In the first unit and the second unit, a dielectric film is arranged between the dielectric region and the charge generation region, and the dielectric film includes the insulator layer and the first light-shielding layer. The photoelectric conversion device according to any one of claims 1 to 6 , which extends between the two. In the first unit, the dielectric region is located between the inorganic material layer and the semiconductor layer.
The photoelectric conversion device according to any one of claims 1 to 7 , wherein in the second unit, the inorganic material layer is located between the second light-shielding layer and the dielectric region. The photoelectric conversion device according to any one of claims 1 to 8 , wherein in the first unit and the second unit, the width of the dielectric region is larger than the width of the first opening . The first light-shielding layer has the second opening having a shape different from that of the first opening, and the second opening has a plurality of contacts other than the first contact plug and the second contact plug. The photoelectric conversion device according to any one of claims 1 to 9 , wherein a plug is arranged. The first unit and the second unit are used as a first transfer gate for transferring charge from the charge generation region to the charge holding region and as the gate electrode for transferring charge from the charge holding region to the charge detection region. Has a second transfer gate and an amplification transistor connected to the charge detection region.
The photoelectric conversion device according to any one of claims 1 to 10 , wherein in the first unit and the second unit, the first light-shielding layer covers the first transfer gate and the second transfer gate. A fourth unit is provided between the first unit and the second unit.
The fourth unit has a fifth light-shielding layer.
The distance between the fifth light-shielding layer and the semiconductor layer is larger than the distance between the first light-shielding layer and the semiconductor layer in the second unit, and the second light-shielding layer and the semiconductor layer in the second unit The photoelectric conversion device according to any one of claims 1 to 11, which is smaller than the distance of. The plurality of units include a fifth unit.
The fifth unit is
A charge holding region that holds the charge transferred from the charge generation region of the fifth unit, and a charge holding region.
A dielectric region located above the charge generation region of the fifth unit and surrounded by the insulator layer.
A sixth light-shielding layer that covers the charge holding region of the fifth unit between the insulator layer and the semiconductor layer and covers the charge generation region between the dielectric region and the semiconductor layer. The photoelectric conversion device according to any one of claims 1 to 12 , comprising the above. The plurality of units include the sixth unit.
The sixth unit is
A charge holding region that holds the charge transferred from the charge generation region of the sixth unit, and a charge holding region.
It has a seventh light-shielding layer that covers the charge-holding region of the sixth unit between the insulator layer and the semiconductor layer and has an opening above the charge-generating region of the sixth unit.
One of claims 1 to 13 , wherein in the sixth unit, the insulator layer covers the entire opening of the seventh light-shielding layer, and the charge generation region of the sixth unit receives light through the opening. The photoelectric conversion device according to the section. It is a photoelectric conversion device equipped with multiple units.
Multiple units include the first unit and the second unit
Each of the first unit and the second unit
The n-type first impurity region arranged in the semiconductor layer,
An n-type second impurity region arranged in the semiconductor layer and to which charges are transferred from the first impurity region,
A dielectric region located above the first impurity region, surrounded by an insulator layer, and formed of a material different from that of the insulator layer.
A first light-shielding layer that covers the second impurity region between the insulator layer and the semiconductor layer and has a first opening above the first impurity region.
An n-type third impurity region in which charges are transmitted from the second impurity region,
A gate electrode arranged between the second impurity region and the third impurity region,
The second opening provided in the first light-shielding layer and
A first contact plug provided on the third impurity region and a second contact plug provided on the gate electrode, which are arranged in the same opening which is the second opening, are provided. Have and
The first impurity region of the first unit receives light through the first opening and receives light.
The photoelectric conversion device is characterized in that the first impurity region of the second unit is covered with the insulator layer and the second light-shielding layer provided on the dielectric region . The insulator layer is located between the first wiring layer and the second wiring layer, and is located between the first wiring layer and the second wiring layer.
The main component of the first light-shielding layer and the main component of the first wiring layer are different from each other.
The photoelectric conversion device according to any one of claims 1 to 15 , wherein the main component of the second light-shielding layer and the main component of the second wiring layer are different from each other. The insulator layer is located between the first wiring layer and the second wiring layer, and is located between the first wiring layer and the second wiring layer.
The main component of the first light-shielding layer is tungsten.
The main component of the second light-shielding layer is aluminum.
The photoelectric conversion device according to any one of claims 1 to 16 , wherein the main component of the first wiring layer and the second wiring layer is copper. One of claims 1 to 17 , wherein the insulator layer contains silicon, oxygen, and hydrogen, and the dielectric region contains silicon, nitrogen, and hydrogen. The photoelectric conversion device according to the above. A first wiring layer and a second wiring layer are provided on the semiconductor layer, and the first wiring layer and the second wiring layer are provided.
The photoelectric conversion device according to any one of claims 1 to 18 , wherein the insulator layer is provided between the first wiring layer and the second wiring layer. The photoelectric conversion device according to claim 19 , wherein the main components of each of the first wiring layer and the second wiring layer are copper. The photoelectric conversion device according to any one of claims 1 to 20 and
An optical system that forms an image on the photoelectric conversion device, a control device that controls the photoelectric conversion device, a processing device that processes a signal output from the photoelectric conversion device, and a display device that displays information obtained by the photoelectric conversion device. , And at least one of storage devices for storing information obtained by the photoelectric conversion device.

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