JP7112840B2 - protection circuit - Google Patents

Description

The present invention relates to protection circuits.

Conventionally, many semiconductor integrated circuit devices include a high-voltage circuit and a low-voltage circuit, both of which are internal circuits. The high withstand voltage circuit is, for example, a circuit that operates on the battery power supply voltage, and the low withstand voltage circuit is, for example, a circuit that operates on the internal power supply voltage.

In the semiconductor integrated circuit device as described above, there are cases where the high-voltage terminal connected to the high-voltage circuit and the low-voltage terminal connected to the low-voltage circuit are adjacent to each other. In that case, there is a possibility that the high withstand voltage terminal and the low withstand voltage terminal are short-circuited, and if they are short-circuited, an overvoltage is applied to the low withstand voltage circuit. At this time, there is a risk that the low withstand voltage circuit will be destroyed.

JP-A-2004-311536

Therefore, for example, using the invention disclosed in Patent Document 1, an unconnected terminal (NC) is sandwiched between a high-withstand-voltage terminal and a low-withstand-voltage terminal in order to suppress short-circuiting between the high-withstand-voltage terminal and the low-withstand-voltage terminal. It is conceivable to configure

Alternatively, countermeasures have been taken to change circuits that can be configured with low-voltage elements so that they are configured with high-voltage elements.

However, in the above method, the number of terminals of the package increases, the chip size increases, and there is a problem that miniaturization of the semiconductor integrated circuit device is hindered.

SUMMARY OF THE INVENTION In view of the above situation, it is an object of the present invention to provide a protection circuit capable of suppressing breakdown of a low withstand voltage circuit due to a short circuit between adjacent terminals and miniaturizing a semiconductor integrated circuit device.

A protection circuit according to an aspect of the present invention includes
a first switch that switches conduction/interruption of a path between the low-voltage circuit and the low-voltage terminal;
a switching control unit that switches between on and off of the first switch according to the voltage applied to the low withstand voltage terminal;
(first configuration).

Further, in the above first configuration, the switching control unit
a pull-up resistor connected to the gate of the first switch, which is an N-channel MOSFET;
and a second switch that switches conduction/interruption of the path between the gate and the ground (second configuration).

In the second configuration, the pull-up resistor may be a depletion type N-type MOSFET (third configuration).

Further, in the above second or third configuration, the switching control unit further includes a first Zener diode and a first resistor,
the gate of the second switch, which is an N-channel MOSFET, is connected to a first connection point where the anode of the first Zener diode and one end of the first resistor are connected;
The source of the second switch is connected to the other end of the first resistor together with the ground potential application end,
the drain of the second switch is connected to the gate of the first switch;
A cathode of the first Zener diode may be connected to the low withstand voltage terminal (fourth configuration).

Further, in the fourth configuration, the switching control unit further includes a second Zener diode and a second resistor,
the anode of the second Zener diode is connected to the source of the second switch;
the cathode of the second Zener diode is connected to a second connection point where the gate of the second switch and one end of the second resistor are connected;
The other end of the second resistor may be connected to the first connection point (fifth configuration).

Further, in the above first configuration, the switching control unit includes a pull-down resistor connected to the gate of the first switch, which is a P-channel MOSFET;
and a third switch for switching conduction/interruption of a path between the gate and the power supply terminal (sixth configuration).

In the sixth configuration, the pull-down resistor may be a depletion-type N-type MOSFET (seventh configuration).

In the sixth or seventh configuration, the switching control unit further includes a third Zener diode and a third resistor,
The gate of the third switch, which is a P-channel MOSFET, is connected to a third connection point where the cathode of the third Zener diode and one end of the third resistor are connected,
the source of the third switch is connected to the other end of the third resistor together with the power supply terminal;
the drain of the third switch is connected to the gate of the first switch;
The anode of the third Zener diode may be connected to the low withstand voltage terminal (eighth configuration).

Further, in the eighth configuration, the switching control unit further includes a fourth Zener diode and a fourth resistor,
the cathode of the fourth Zener diode is connected to the source of the third switch;
the anode of the fourth Zener diode is connected to a fourth connection point where the gate of the third switch and one end of the fourth resistor are connected;
The other end of the fourth resistor may be connected to the third connection point (ninth configuration).

Further, a semiconductor integrated circuit device according to an aspect of the present invention includes a protection circuit having any one of the above configurations, a low-voltage terminal, and a high-voltage terminal adjacent to the low-voltage terminal (Section 1). 10 configuration).

In the tenth configuration, the low withstand voltage terminal may be a terminal to which a resistor for setting an overcurrent set value of the overcurrent protection circuit can be connected (eleventh configuration).

An electronic device for vehicle according to an aspect of the present invention includes a semiconductor integrated circuit device having any one of the above configurations, and a load connected to the semiconductor integrated circuit device.

According to the present invention, it is possible to reduce the size of the semiconductor integrated circuit device while suppressing the breakdown of the low withstand voltage circuit due to the short circuit between the adjacent terminals.

1 is a circuit diagram showing the configuration of a protection circuit according to a first embodiment of the invention (normal state); FIG. 1 is a circuit diagram showing the configuration of a protection circuit according to a first embodiment of the present invention (short-circuit state between terminals); FIG. FIG. 7 is a circuit diagram showing the configuration of a protection circuit according to a second embodiment of the invention (normal state); FIG. 7 is a circuit diagram showing the configuration of a protection circuit according to a second embodiment of the present invention (inter-terminal short-circuit state); 1 is a block diagram showing a configuration example of a semiconductor integrated circuit device; FIG. 1 is a diagram showing an example of pin arrangement of a semiconductor integrated circuit device; FIG. 1 is an external view showing one configuration example of a vehicle; FIG.

An embodiment of the present invention will be described below with reference to the drawings.

<First embodiment>
FIG. 1 is a circuit diagram showing the configuration of a protection circuit according to the first embodiment of the invention. The protection circuit 10 shown in FIG. 1 is provided in a semiconductor integrated circuit device (package product), and protects the low-withstand-voltage circuit even when an overvoltage is applied due to a short-circuit to a low-withstand-voltage terminal TL connected to a low-withstand-voltage circuit (internal circuit). intended to protect. Note that in the present embodiment, the low breakdown voltage and high breakdown voltage are the breakdown voltages based on the ground reference. FIG. 2, which will be described later, shows the configuration of the protection circuit 10 in the same manner as in FIG. 1, but the ON/OFF states of the switches are different from FIG.

The protection circuit 10 includes transistors NM1 to NM3, Zener diodes ZD1 and ZD2, and resistors R1 and R2. A switching control unit 101 is composed of transistors NM2 and NM3, Zener diodes ZD1 and ZD2, and resistors R1 and R2. The switching control unit 101 has a function of switching on/off of the transistor NM1 according to the voltage applied to the low withstand voltage terminal TL.

The transistor NM1 is composed of an N-channel MOSFET. A drain of the transistor NM1 is connected to a low-voltage circuit (not shown) through a terminal Tc. The low withstand voltage circuit has, for example, a ground reference 7V withstand voltage. The source of the transistor NM1 is connected to the low withstand voltage terminal TL which is an external terminal. The transistor NM1 is a switch that conducts/disconnects the path between the terminal TL and the terminal Tc.

A gate of the transistor NM1 is connected to the terminal Tvr through the transistor NM2. Internal power supply voltage Vreg is applied to terminal Tvr. The internal power supply voltage Vreg is set to, for example, 5 V which is the ground reference. The transistor NM2 is a depletion type N-type MOSFET. The transistor NM2 is a low withstand voltage transistor. The gate of transistor NM2 and the source of transistor NM2 are shorted. The source of transistor NM2 is connected to the gate of transistor NM1. A drain of the transistor NM2 is connected to the terminal Tvr. Transistor NM2 functions as a pull-up resistor. A general resistor can also be used as the pull-up resistor.

The transistor NM3 is an N-channel MOSFET and functions as a switch that switches conduction/interruption of the path between the ground terminal Tgd and the gate of the transistor NM1. The transistor NM3 is a low withstand voltage transistor.

The drain of transistor NM3 is connected to the gate of transistor NM1. A gate of the transistor NM3 is connected to a connection point P2 where one end of the resistor R2 and the cathode of the Zener diode ZD2 are connected. The other end of resistor R2 is connected to connection point P1 where the anode of Zener diode ZD1 and one end of resistor R1 are connected. A cathode of the Zener diode ZD1 is connected to the low withstand voltage terminal TL.

The other end of resistor R1, the anode of Zener diode ZD2, the source of transistor NM3, and the back gate of transistor NM1 are connected to ground terminal Tgd to which the ground potential is applied.

The operation of the protection circuit 10 having such a configuration will be described. Here, the semiconductor integrated circuit device (not shown) including the protection circuit 10 has a high withstand voltage terminal (not shown) adjacent to the low withstand voltage terminal TL. The high withstand voltage terminal is connected to a high withstand voltage circuit (internal circuit) not shown, and is applied with a high voltage such as a battery voltage. Since the low-voltage terminal TL and the high-voltage terminal are adjacent to each other, they may be short-circuited.

In a normal state in which the low-voltage terminal TL and the high-voltage terminal are not short-circuited, a voltage lower than the sum of the threshold voltage Vth of the transistor NM3 and the Zener voltage Vz of the Zener diode ZD1 is applied to the terminal TL. It turns off (Fig. 1).

In this case, the ground terminal Tgd and the gate of the transistor NM1 are cut off, and the internal power supply voltage Vreg is applied to the gate of the transistor NM1 through the transistor NM2 as a pull-up resistor. As a result, the transistor NM1 is turned on, and the path between the low withstand voltage terminal TL and the terminal Tc is conducted by the transistor NM1 (FIG. 1). That is, in the normal state, the low-voltage terminal TL and the low-voltage circuit are connected.

On the other hand, when an abnormal state occurs in which the low withstand voltage terminal TL and the high withstand voltage terminal are short-circuited, the voltage applied to the low withstand voltage terminal TL becomes equal to or higher than the sum of the threshold voltage Vth and the Zener voltage Vz. Therefore, the transistor NM3 is turned on (FIG. 2), and the ground terminal Tgd and the gate of the transistor NM1 are electrically connected.

More specifically, when a voltage equal to or higher than the threshold voltage Vth and lower than the Zener voltage of the Zener diode ZD2 is applied across the resistor R1, the Zener diode ZD2 is turned off, current flows through the resistor R1, and the transistor NM3 is turned on.

Further, when the voltage applied to the low withstand voltage terminal TL becomes higher and a voltage equal to or higher than the Zener voltage of the Zener diode ZD2 is applied across the resistor R1, the Zener diode ZD2 is turned on and current flows through the resistor R2. , transistor NM3 is turned on (FIG. 2). That is, the voltage between the gate and source of transistor NM3 is clamped to the Zener voltage of Zener diode ZD2. As a result, application of an overvoltage between the gate and source of the transistor NM3 can be suppressed.

When the ground terminal Tgd and the gate of the transistor NM1 are electrically connected, the ground potential is applied to the gate of the transistor NM1, so that the high-voltage transistor NM1 is turned off (FIG. 2). Therefore, the path between the low withstand voltage terminal TL and the terminal Tc is cut off. Therefore, when an overvoltage is applied to the low-withstand voltage terminal due to a short circuit with the adjacent high-withstand-voltage terminal, the overvoltage is not applied to the low-withstand-voltage circuit connected to the terminal Tc, thereby suppressing the breakdown of the low-withstand-voltage circuit. can.

According to such a protection circuit 10, there is no need to dispose a non-connected terminal (NC) for preventing a short circuit between the low-voltage terminal TL and the high-voltage terminal in the semiconductor integrated circuit device. Also, there is no need to configure the low-voltage circuit (the circuit connected to the terminal Tc) with high-voltage elements. Therefore, an increase in the number of terminals of the package is prevented, and an increase in chip size is suppressed, so that the size of the semiconductor integrated circuit device can be reduced.

<Second embodiment>
FIG. 3 is a circuit diagram showing the configuration of a protection circuit according to the second embodiment of the invention. The protection circuit 20 shown in FIG. 3 is provided in a semiconductor integrated circuit device (package product), and protects the low withstand voltage circuit even when an overvoltage is applied due to a short circuit to the low withstand voltage terminal TL connected to the low withstand voltage circuit (internal circuit). intended to protect. In this embodiment, the low breakdown voltage and high breakdown voltage are based on the power supply voltage. FIG. 4, which will be described later, shows the configuration of the protection circuit 20 in the same manner as in FIG.

The protection circuit 20 includes transistors PM1 and PM2, a transistor NM4, Zener diodes ZD3 and ZD4, and resistors R3 and R4. A switching control unit 201 is composed of a transistor PM2, a transistor NM4, Zener diodes ZD3 and ZD4, and resistors R3 and R4. The switching control unit 201 has a function of switching on/off of the transistor PM1 according to the voltage applied to the low withstand voltage terminal TL.

The transistor PM1 is composed of a P-channel MOSFET. A drain of the transistor PM1 is connected to a low-voltage circuit (not shown) through a terminal Tc. The low withstand voltage circuit has, for example, a −7 V withstand voltage based on the power supply voltage. The source of the transistor PM1 is connected to the low withstand voltage terminal TL which is an external terminal. The transistor PM1 is a switch that connects/disconnects the path between the terminal TL and the terminal Tc.

The gate of transistor PM1 is connected to terminal Tvr via transistor NM4. Internal power supply voltage Vreg is applied to terminal Tvr. The internal power supply voltage Vreg is, for example, −5 V which is the power supply voltage reference. The transistor NM4 is a depletion type N-type MOSFET. The transistor NM4 is a low withstand voltage transistor. The gate of transistor NM4 and the source of transistor NM4 are shorted. The drain of transistor NM4 is connected to the gate of transistor PM1. The source of transistor NM4 is connected to terminal Tvr. Transistor NM4 functions as a pull-down resistor. A general resistor can also be used as the pull-down resistor.

The transistor PM2 is a P-channel MOSFET and functions as a switch that switches conduction/interruption of the path between the power supply terminal Tvd and the gate of the transistor PM1. The transistor PM2 is a low withstand voltage transistor.

The drain of transistor PM2 is connected to the gate of transistor PM1. A gate of the transistor PM2 is connected to a connection point P4 at which one end of the resistor R4 and the anode of the Zener diode ZD4 are connected. The other end of resistor R4 is connected to connection point P3 where the cathode of Zener diode ZD3 and one end of resistor R3 are connected. The anode of the Zener diode ZD3 is connected to the low withstand voltage terminal TL.

The other end of resistor R3, the cathode of Zener diode ZD4, the source of transistor PM2, and the back gate of transistor PM1 are connected to power supply terminal Tvd to which power supply voltage Vd is applied. The power supply voltage Vd is, for example, 12V.

The operation of the protection circuit 20 having such a configuration will be described. Here, the semiconductor integrated circuit device (not shown) including the protection circuit 20 has a high withstand voltage terminal (not shown) adjacent to the low withstand voltage terminal TL. A ground potential, for example, is applied to the high voltage terminal. Since the low-voltage terminal TL and the high-voltage terminal are adjacent to each other, they may be short-circuited.

In a normal state where the low-voltage terminal TL and the high-voltage terminal are not short-circuited, a voltage lower than the sum of the threshold voltage Vth of the transistor PM2 and the Zener voltage Vz of the Zener diode ZD3 is applied between the power supply terminal Tvd and the terminal TL. Therefore, transistor PM2 is turned off (FIG. 3).

In this case, the power supply terminal Tvd and the gate of the transistor PM1 are cut off, and the internal power supply voltage Vreg is applied to the gate of the transistor PM1 through the transistor NM4 as a pull-down resistor. As a result, the transistor PM1 is turned on, and the path between the low withstand voltage terminal TL and the terminal Tc is conducted by the transistor PM1 (FIG. 3). That is, in the normal state, the low-voltage terminal TL and the low-voltage circuit are connected.

On the other hand, when an abnormal state occurs in which the low withstand voltage terminal TL and the high withstand voltage terminal (that is, the ground potential or the like) are short-circuited, the voltage applied between the power supply terminal Tvd and the low withstand voltage terminal TL becomes the threshold voltage Vth and Zener voltage Vz. Therefore, the transistor PM2 is turned on (FIG. 4), and the power supply terminal Tvd and the gate of the transistor PM1 are electrically connected.

More specifically, when a voltage equal to or higher than the threshold voltage Vth and lower than the Zener voltage of the Zener diode ZD4 is applied across the resistor R3, the Zener diode ZD4 is turned off, current flows through the resistor R3, and the transistor PM2 is turned on.

Further, when the voltage applied between the power supply terminal Tvd and the low withstand voltage terminal TL becomes higher and a voltage equal to or higher than the Zener voltage of the Zener diode ZD4 is applied across the resistor R3, the Zener diode ZD4 is turned on. , a current flows through the resistor R4 and the transistor PM2 is turned on. That is, the voltage between the gate and source of transistor PM2 is clamped to the Zener voltage of Zener diode ZD4. As a result, application of an overvoltage between the gate and source of the transistor PM2 can be suppressed.

When the power supply terminal Tvd and the gate of the transistor PM1 are electrically connected, the power supply voltage Vd is applied to the gate of the transistor PM1, so that the high voltage transistor PM1 is turned off (FIG. 4). Therefore, the path between the low withstand voltage terminal TL and the terminal Tc is cut off. Therefore, when an overvoltage (such as ground potential) is applied to the low withstand voltage terminal due to a short circuit with the adjacent high withstand voltage terminal, the overvoltage is not applied to the low withstand voltage circuit connected to the terminal Tc, and the low withstand voltage circuit is destroyed. can be suppressed.

With such a protection circuit 20 as well, it is possible to reduce the size of the semiconductor integrated circuit device, as in the first embodiment.

<An example of a semiconductor integrated circuit device>
Next, an example of a semiconductor integrated circuit device to which the protection circuit described above can be applied will be described. FIG. 5 is a block diagram showing a configuration example of a semiconductor integrated circuit device. The semiconductor integrated circuit device 1 of the present embodiment is an in-vehicle device that conducts/disconnects between an application terminal of a power supply voltage (VBBX.VBBY) and a load (3X, 3Y) according to an instruction from an ECU [electronic control unit] 2. It is a high side switch IC for An in-vehicle high-side switch IC is an example of an in-vehicle IPD (intelligent power device).

The semiconductor integrated circuit device 1 has two systems of NMOSFETs (high side switches) (10X, 10Y) and two systems of corresponding output terminals (T2X, T2Y). A load (3X, 3Y) can be connected. In FIG. 5, the same reference numerals "X" and "Y" are attached to the respective systems, and the configurations of the respective systems are the same. Only the configuration of is representatively described.

The semiconductor integrated circuit device 1 has a power supply terminal T1X, an output terminal T2X, and an input terminal T3X, which are external terminals, as means for establishing electrical connection with the outside of the device. The power supply terminal T1X is a terminal (VBB pin) for receiving supply of a power supply voltage VBBX (eg, 12 V) from a battery (not shown). The output terminal T2X is a terminal (OUT pin) for externally connecting the load 3X (bulb lamp, relay coil, solenoid, light emitting diode, motor, etc.). The input terminal T3X is a terminal (IN pin) for receiving an external input of an external control signal SiX from the ECU 2 .

Further, the semiconductor integrated circuit device 1 includes an NMOSFET 10X, an output current monitoring section 20X, a gate control section 30X, a control logic section 40X, a signal input section 50X, an internal power supply section 60X, and an abnormality protection section 70X. have.

The NMOSFET 10X is a high withstand voltage (for example, 42 V withstand voltage) power transistor having a drain connected to the power supply terminal T1X and a source connected to the output terminal T2X. The NMOSFET 10X connected in this manner functions as a switch element (high side switch) for conducting/interrupting a current path from the terminal to which the power supply voltage VBBX is applied to the ground terminal via the load 3X. The NMOSFET 10X is turned on when the gate drive signal G1X is at high level, and turned off when the gate drive signal G1X is at low level.

The NMOSFET 10X may be designed to have an on-resistance value of several tens of mΩ. However, the lower the on-resistance of the NMOSFET 10X, the more likely overcurrent will flow when the output terminal T2X is grounded (=when the output is shorted to a grounded terminal or a similar low potential terminal), resulting in abnormal heat generation. Therefore, as the on-resistance value of the NMOSFET 10X is lowered, the importance of the overcurrent protection circuit 71X, which will be described later, increases.

The output current monitoring unit 20X includes an NMOSFET 21X and a sense resistor 22X, and generates a sense voltage VsX (=corresponding to a sense signal) according to the output current Io flowing through the NMOSFET 10X.

The NMOSFET 21X is a mirror transistor connected in parallel with the NMOSFET 10X and generates a sense current Is corresponding to the output current Io. The size ratio between NMOSFET 10X and NMOSFET 21X is m:1 (where m>1). Therefore, the sense current Is has a magnitude obtained by reducing the output current Io to 1/m. The NMOSFET 21X is turned on when the gate drive signal G1X is at high level, and turned off when the gate drive signal G1X is at low level, like the NMOSFET 10X.

The sense resistor 22X (resistance value: Rs) is connected between the source of the NMOSFET 21X and the output terminal T2X. It is a current-to-voltage conversion element that produces an output voltage appearing.

The gate control unit 30X generates a gate drive signal G1X in which the current capability of the gate control signal S1X is increased, and outputs the signal to the gates of the NMOSFETs 10X and 21X, thereby performing on/off control of the NMOSFETs 10X and 21X. The gate control section 30X has a function of controlling the NMOSFETs 10X and 21X so as to limit the output current Io according to the overcurrent protection signal S71X.

The control logic unit 40X receives the supply of the internal power supply voltage Vreg and generates the gate control signal S1X. For example, when the external control signal SiX is at a high level (=the logic level for turning on the NMOSFET 10X), the internal power supply voltage Vreg is supplied from the internal power supply section 60X, so that the control logic section 40X is put into an operating state to control the gate. The signal S1X becomes high level (=Vreg). On the other hand, when the external control signal SiX is at a low level (=the logic level for turning off the NMOSFET 10X), the internal power supply voltage Vreg is not supplied from the internal power supply section 60X. The signal S1X becomes low level (=GND). In addition, the control logic unit 40X monitors various abnormal protection signals (overcurrent protection signal S71X, etc.).

The signal input section 50X is a Schmitt trigger that receives the input of the external control signal SiX from the input terminal T3X and transmits it to the control logic section 40X and the internal power supply section 60X. For example, the external control signal SiX becomes high level when turning on the NMOSFET 10X, and becomes low level when turning off the NMOSFET 10X.

The internal power supply section 60X generates a predetermined internal power supply voltage Vreg from the power supply voltage VBBX and supplies it to each section of the semiconductor integrated circuit device 1 . Whether or not the internal power supply unit 60X can operate is controlled according to an external control signal SiX. More specifically, the internal power supply section 60X is in an operating state when the external control signal SiX is at high level, and is in a non-operating state when the external control signal SiX is at low level.

The abnormality protection unit 70X is a circuit block that detects various abnormalities of the semiconductor integrated circuit device 1, and includes an overcurrent protection circuit 71X, an open protection circuit, a temperature protection circuit, and a low voltage protection circuit (not shown).

The overcurrent protection circuit 71X generates an overcurrent protection signal S71X according to the monitoring result of the sense voltage VsX (=whether an overcurrent abnormality occurs in the output current Io). For example, the overcurrent protection signal S71X becomes low level when an abnormality is not detected, and becomes high level when an abnormality is detected.

FIG. 6 is a diagram showing an example of the pin arrangement of the semiconductor integrated circuit device 1 (package product). In the semiconductor integrated circuit device 1 shown in FIG. 6, eight pins are arranged on one side of a rectangular body facing each other, and eight pins are arranged on the other side.

Among eight pins arranged on one side, a pin VBB, a pin SET, and other pins are arranged in order from the end. That is, pin VBB and pin SET are adjacent to each other. Among the eight pins arranged on the other side, four pins OUT1 and four pins OUT2 are arranged in order from the end.

A pin VBB corresponds to the power supply terminal T1X in FIG. 5 and is a high withstand voltage terminal to which a power supply voltage is applied. A pin SET is a terminal to which a resistor for setting overcurrent set values of the overcurrent protection circuits 71X and 71Y in FIG. 5 can be connected, and is a low withstand voltage terminal. The pin OUT1 corresponds to the output terminal T2X in FIG. 5, is a terminal for connecting the load 3X, and is a high withstand voltage terminal. The pin OUT2 corresponds to the output terminal T2Y in FIG. 5, is a terminal for connecting the load 3Y, and is a high withstand voltage terminal.

Therefore, in FIG. 6, basically either the high-voltage terminal or the low-voltage terminal is arranged on the same side. A pin SET, which is a withstand voltage terminal, is arranged on the same side and adjacent to it. Therefore, pin VBB and pin SET may be shorted.

The protection circuit 10 (FIGS. 1 and 2) can be mounted on the semiconductor integrated circuit device 1, and in this case, the low withstand voltage terminal TL corresponds to the pin SET. Therefore, even if the pin VBB and the pin SET are short-circuited, the protection circuit 10 cuts off the path between the pin SET (low-voltage terminal TL) and the low-voltage circuit (state shown in FIG. 2). It is possible to suppress the application of overvoltage to and suppress the breakdown of the low withstand voltage circuit. Therefore, it is not necessary to dispose an unconnected terminal (NC) between the pin SET and the pin VBB, or to configure the low-voltage circuit with high-voltage elements, so that the semiconductor integrated circuit device 1 can be miniaturized.

In recent years, in particular, in-vehicle ICs are required to comply with ISO26262 (international standard for functional safety related to electrical/electronics in automobiles), and higher reliability is also required for in-vehicle IPDs. Therefore, the protection circuit according to the present invention is highly effective.

<Application to vehicles>
FIG. 7 is an external view showing one configuration example of the vehicle. A vehicle X of this configuration example is equipped with a battery (not shown in the drawing) and various electronic devices X11 to X18 that operate with power supplied from the battery. Note that the mounting positions of the electronic devices X11 to X18 in this figure may differ from the actual ones for convenience of illustration.

The electronic device X11 is an engine control unit that performs engine-related controls (injection control, electronic throttle control, idling control, oxygen sensor heater control, auto-cruise control, etc.).

The electronic device X12 is a lamp control unit that controls lighting and extinguishing of HID [high intensity discharged lamps] and DRL [daytime running lamps].

The electronic device X13 is a transmission control unit that performs control related to the transmission.

The electronic device X14 is a body control unit that performs control related to the movement of the vehicle X (ABS [anti-lock brake system] control, EPS [electric power steering] control, electronic suspension control, etc.).

The electronic device X15 is a security control unit that drives and controls door locks, security alarms, and the like.

Electronic device X16 includes wipers, electric door mirrors, power windows, dampers (shock absorbers), electric sunroofs, electric seats, and other electronic devices built into vehicle X at the factory shipment stage as standard equipment or manufacturer options. is.

The electronic device X17 is an electronic device arbitrarily mounted on the vehicle X as a user option, such as an in-vehicle A/V [audio/visual] device, a car navigation system, and an ETC [electronic toll collection system].

The electronic device X18 is an electronic device having a high withstand voltage motor, such as an in-vehicle blower, an oil pump, a water pump, and a battery cooling fan.

The semiconductor integrated circuit device 1, the ECU 2, and the loads 3X and 3Y described above can be incorporated in any of the electronic devices X11 to X18.

<Other Modifications>
Further, in the above-described embodiments, an automotive high-side switch IC has been described as an example, but the scope of application of the invention disclosed herein is not limited to this. , and other vehicle-mounted IPDs (such as vehicle-mounted low-side switch ICs and vehicle-mounted power source ICs), as well as widely applicable to semiconductor integrated circuit devices other than vehicle-mounted applications.

In addition to the above-described embodiments, the various technical features disclosed in this specification can be modified in various ways without departing from the gist of the technical creation. That is, the above-described embodiments should be considered as examples and not restrictive in all respects, and the technical scope of the present invention is indicated by the scope of claims rather than the description of the above-described embodiments. It should be understood that all changes that fall within the meaning and range of equivalence to the claims are included.

INDUSTRIAL APPLICABILITY The present invention can be used, for example, in an in-vehicle IPD.

10, 20 protection circuit 101, 201 switching control unit NM1 to NM4 transistors PM1, PM2 transistors ZD1 to ZD4 zener diodes R1 to R4 resistor TL low withstand voltage terminal Tvr terminal Tc terminal Tgd ground terminal Tvd power supply terminal 1 semiconductor integrated circuit device 2 ECU
3X, 3Y Load T1X, T1Y Power supply terminal T2X, T2Y Output terminal T3X, T3Y Input terminal 10X, 10Y NMOSFET
20X, 20Y Output current monitor 21X, 21Y NMOSFET
22X, 22Y Sense resistors 30X, 30Y Gate control units 40X, 40Y Control logic units 50X, 50Y Signal input units 60X, 60Y Internal power supply units 70X, 70Y Abnormality protection units 71X, 71Y Overcurrent protection circuits

Claims (11)

a first switch that switches conduction/interruption of a path between the low-voltage circuit and the low-voltage terminal;
a switching control unit that switches between on and off of the first switch according to the voltage applied to the low withstand voltage terminal;
with
The switching control unit
a pull-up resistor connected to the gate of the first switch, which is an N-channel MOSFET;
and a second switch for switching between conduction and interruption of the path between the gate and the ground . 2. The protection circuit according to claim 1, wherein said pull-up resistor is a depletion mode N-type MOSFET. The switching control unit further includes a first Zener diode and a first resistor,
the gate of the second switch, which is an N-channel MOSFET, is connected to a first connection point where the anode of the first Zener diode and one end of the first resistor are connected;
The source of the second switch is connected to the other end of the first resistor together with the ground potential application end,
the drain of the second switch is connected to the gate of the first switch;
3. The protection circuit according to claim 1, wherein a cathode of said first Zener diode is connected to said low withstand voltage terminal. The switching control unit further includes a second Zener diode and a second resistor,
the anode of the second Zener diode is connected to the source of the second switch;
the cathode of the second Zener diode is connected to a second connection point where the gate of the second switch and one end of the second resistor are connected;
4. The protection circuit according to claim 3, wherein the other end of said second resistor is connected to said first connection point. a first switch that switches conduction/interruption of a path between the low-voltage circuit and the low-voltage terminal;
a switching control unit that switches between on and off of the first switch according to the voltage applied to the low withstand voltage terminal;
with
The switching control unit
a pull-down resistor connected to the gate of the first switch, which is a P-channel MOSFET;
and a third switch that switches conduction/interruption of a path between the gate and the power supply terminal . 6. The protection circuit according to claim 5, wherein said pull-down resistor is a depletion type N-type MOSFET. The switching control unit further includes a third Zener diode and a third resistor,
The gate of the third switch, which is a P-channel MOSFET, is connected to a third connection point where the cathode of the third Zener diode and one end of the third resistor are connected,
the source of the third switch is connected to the other end of the third resistor together with the power supply terminal;
the drain of the third switch is connected to the gate of the first switch;
7. The protection circuit according to claim 5, wherein an anode of said third Zener diode is connected to said low withstand voltage terminal. The switching control unit further has a fourth Zener diode and a fourth resistor,
the cathode of the fourth Zener diode is connected to the source of the third switch;
the anode of the fourth Zener diode is connected to a fourth connection point where the gate of the third switch and one end of the fourth resistor are connected;
8. The protection circuit according to claim 7, wherein the other end of said fourth resistor is connected to said third connection point. A protection circuit according to any one of claims 1 to 8;
a low withstand voltage terminal;
and a high withstand voltage terminal adjacent to the low withstand voltage terminal. 10. The semiconductor integrated circuit device according to claim 9, wherein said low withstand voltage terminal is a terminal to which a resistor for setting an overcurrent set value of an overcurrent protection circuit can be connected. a semiconductor integrated circuit device according to claim 9 or 10;
and a load connected to the semiconductor integrated circuit device.

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