JP7127680B2 - Semiconductor device and its manufacturing method - Google Patents

Description

The present disclosure relates to a semiconductor device and its manufacturing method.

2. Description of the Related Art Stacked MCPs (Multi Chip Packages), in which semiconductor elements are stacked in multiple stages, have become popular as electronic devices have become multi-functional. Film adhesives are used for mounting semiconductor elements. A wire-embedded package is an example of a multi-layered package using a film-like adhesive. This is a package that is crimped while covering the wires connected to the semiconductor element on the crimped side with a high-flow film-like adhesive, and is used for mobile phones and portable audio equipment. It is installed in a memory package for

One of the important characteristics required for semiconductor devices is connection reliability. In order to improve connection reliability, film adhesives are being developed in consideration of properties such as heat resistance, moisture resistance and reflow resistance. For example, Patent Literature 1 discloses an adhesive sheet with a thickness of 10 to 250 μm containing a filler and a resin containing a high molecular weight component and a thermosetting component whose main component is an epoxy resin. Patent Document 2 discloses an adhesive composition containing a mixture containing an epoxy resin and a phenolic resin and an acrylic copolymer.

The connection reliability of the semiconductor device is greatly affected by whether or not the semiconductor element can be mounted without causing voids on the bonding surface. For this reason, a highly fluid film-like adhesive is used so that the semiconductor element can be pressure-bonded without generating voids, or a low melt viscosity is used so that the generated voids can be eliminated in the sealing process of the semiconductor element. Ingenuity such as using a film-like adhesive has been made. Patent Document 3 discloses an adhesive sheet with low viscosity and low tack strength.

International Publication No. 2005/103180 JP-A-2002-220576 JP 2009-120830 A

By the way, if the size of the semiconductor chip (semiconductor element) is small, the force applied per unit area during thermocompression bonding is too large, and the adhesive film may be crushed, resulting in electrical failure. In addition, when using FOD (Film Over Die), which is a chip-embedded adhesive film, or FOW (Film Over Wire), which is a wire-embedded adhesive film, when stacking multiple layers, the residual stress of the chip causes the chip to detach and the entire package. There is a problem such as occurrence of warpage. Furthermore, the use of FOD or FOW tends to degrade chip and/or wire embeddability. This leads to problems such as peeling of FOD or FOW and an increase in cracks during reflow.

The present disclosure aims to provide a semiconductor device having a configuration useful for improving the embedding property of a film-like adhesive made of a thermosetting resin composition and reducing the occurrence of bowing, and a method for manufacturing the same. aim.

A method for manufacturing a semiconductor device according to the present disclosure includes steps of preparing a substrate having a depression, disposing a first semiconductor element in the depression of the substrate, a film-like adhesive made of a thermosetting resin composition and a first semiconductor device. preparing a laminate with the semiconductor element of 2 by dicing; and applying the laminate to the substrate so that the film-like adhesive covers the region including the recess in the substrate and the first semiconductor element is embedded in the film-like adhesive. and heating the film-like adhesive to seal the first semiconductor element with a cured product of the film-like adhesive. Smaller than the area of the element.

In the manufacturing method described above, since the laminate is prepared by dicing, the area of the second semiconductor element and the area of the film adhesive are substantially the same. The fact that the area of the recess (opening area) is smaller than the area of the film adhesive means that the film adhesive is larger than the opening area of the recess. Such a configuration is useful for improving the embedding property of the film-like adhesive made of the thermosetting resin composition and reducing the overall warpage. That is, from the state shown in FIG. 4B (the state in which the film adhesive 15P is in contact with the surface of the first semiconductor element Wa) to the state shown in FIG. The pressing amount of the second semiconductor element Wb can be reduced until the second semiconductor element Wb is buried in the adhesive 15P. As a result, it is presumed that the residual stress in the first and second semiconductor elements can be reduced, and the warping of the entire semiconductor device can be suppressed. On the other hand, as shown in FIGS. 6A and 6B, when the first semiconductor element Wa is arranged on a flat substrate 10B which does not have a recess, FIGS. 4B and 4C ), it is necessary to increase the pushing amount of the second semiconductor element Wb.

After arranging the first semiconductor element in a recess having an opening area smaller than the area of the film-like adhesive, by embedding this in the film-like adhesive (see FIG. 4(c)), such a recess can be obtained. Compared to the case where the first semiconductor element is arranged on a flat substrate that does not have (see FIG. 6(b)), the first semiconductor element and A distance can be secured between the second semiconductor elements, and contact between the two can be sufficiently suppressed. The thickness of the film-like adhesive may be in the range of 60 to 150 μm, for example, depending on the thickness of the first semiconductor element to be embedded.

From the viewpoint of embedding properties of the film adhesive into the recess, the area of the recess is preferably 30 to 80% of the area of the second semiconductor element (the area of the film adhesive). The height is preferably 10 to 30% of the height of the first semiconductor element. The height of the first semiconductor element here means the height from the bottom surface of the recess to the top surface of the first semiconductor element (for example, the thickness of the adhesive used to pressure-bond the first semiconductor element to the substrate). including).

As the film-like adhesive, it is preferable to use a thermosetting resin composition having a shear viscosity of 5000 Pa·s or less at any temperature between 60 and 150°C. From the viewpoint of suppressing warping of the manufactured semiconductor device, the thickness of the substrate (excluding the recessed portion) is, for example, 90 to 140 μm.

When using a substrate having a circuit pattern on its surface, the manufacturing method according to the present disclosure may further include a first wire bonding step of electrically connecting the first semiconductor element and the circuit pattern. Further, in this case, the manufacturing method according to the present disclosure includes a second wire bonding step of electrically connecting the second semiconductor element and the circuit pattern, and a resin composition for connecting the second semiconductor element and the second wire. and sealing with.

The manufacturing method according to the present disclosure may further include stacking a third semiconductor element on the second semiconductor element. In the manufacturing method according to the present disclosure, the first semiconductor element may be sealed with a cured film adhesive by heating the film adhesive under a pressurized atmosphere.

A semiconductor device according to the present disclosure is arranged to cover a substrate having a recess, a first semiconductor element arranged in the recess, and a region including the recess in the substrate, and seal the first semiconductor element. and a second semiconductor element disposed so as to cover the surface of the first sealing layer opposite to the substrate side, wherein the first sealing layer is thermoset It is made of a cured film adhesive made of a flexible resin composition, and the area of the recess is smaller than the area of the second semiconductor element. Such a configuration is useful for improving the embedding property of the film-like adhesive made of the thermosetting resin composition and reducing the overall warpage.

The semiconductor device according to the present disclosure may further include a circuit pattern formed on the surface of the substrate, and first wires electrically connecting the first semiconductor element and the circuit pattern. A semiconductor device according to the present disclosure includes a second wire that electrically connects a second semiconductor element and a circuit pattern, and a second sealing that seals the second semiconductor element and the second wire. and a layer. The semiconductor device according to the present disclosure may further include a third semiconductor element laminated on the second semiconductor element.

INDUSTRIAL APPLICABILITY According to the present disclosure, a semiconductor device having a configuration useful for improving embedding properties of a film-like adhesive made of a thermosetting resin composition and reducing overall bowing, and a method for manufacturing the same are provided. be done.

FIG. 1 is a cross-sectional view schematically showing one embodiment of a semiconductor device according to the present disclosure. FIG. 2 is a cross-sectional view schematically showing an example of a laminate composed of a film-like adhesive and a second semiconductor element. FIG. 3(a) is a cross-sectional view schematically showing an example of a substrate having a recess, and FIG. 3(b) is a plan view of the substrate shown in FIG. 3(a). 4A to 4C are cross-sectional views schematically showing the process of manufacturing the semiconductor device shown in FIG. 5(a) to 5(e) are cross-sectional views schematically showing the process of manufacturing a laminate comprising a film-like adhesive and a second semiconductor element. 6A and 6B are cross-sectional views schematically showing a process of embedding a semiconductor element arranged on a substrate having no recess with a film-like adhesive.

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In addition, this invention is not limited to the following embodiment.

<Semiconductor device>
FIG. 1 is a cross-sectional view schematically showing a semiconductor device according to this embodiment. The semiconductor device 100 shown in this figure includes a substrate 10 having a recess 10a, a first semiconductor element Wa arranged in the recess 10a, and a first sealing layer 15 sealing the first semiconductor element Wa. , a second semiconductor element Wb arranged above the first semiconductor element Wa, and a second sealing layer 25 sealing the second semiconductor element Wb. The first sealing layer 15 is made of a cured film adhesive 15P (see FIG. 2). Incidentally, as shown in FIG. 2, the film adhesive 15P and the second semiconductor element Wb have substantially the same size. A laminate 20 shown in FIG. 2 is composed of a film-like adhesive 15P and a second semiconductor element Wb, and is also referred to as a semiconductor chip with adhesive. The laminated body 20 is produced through a dicing process and a pick-up process, as will be described later (see FIG. 5).

As shown in FIG. 3A, the recess 10a of the substrate 10 is composed of a bottom surface 10b and side surfaces 10c extending from the bottom surface 10b toward the surface 10F (the surface other than the recess 10a) of the substrate 10. there is As shown in FIG. 3B, the recess 10a has a rectangular shape (square or rectangle) in plan view. From the viewpoint of suppressing warping of the manufactured semiconductor device 100, the thickness of the substrate 10 (thickness T shown in FIG. 3A) is, for example, 90 to 140 μm, and may be 100 to 130 μm. In addition, the shape of the depression 10a is not limited to a rectangle, and may be rounded such as a circle or an ellipse. Moreover, the side surface of the depression 10a may be tapered, for example, from the viewpoint of improving the embedding property of the film adhesive.

A first semiconductor element Wa is arranged on the bottom surface 10b of the recess 10a. The size of the bottom surface 10b of the recess 10a is larger than the size of the first semiconductor element Wa. The shape of the first semiconductor element Wa in plan view is, for example, a rectangle (square or rectangle). The length of one side of the first semiconductor element Wa is, for example, 5 mm or less, and may be 1 to 5 mm or 3 to 5 mm. From the viewpoint of achieving both the suppression of warping of the semiconductor device 100 and the embedding property of the first sealing layer 15, the gap between the first semiconductor element Wa and the side surface 10c of the recess 10a is 1.2 to 5 mm. is preferred, 2 to 5 mm is more preferred, and 4 to 5 mm is even more preferred.

The depth of the depression 10a (depth D shown in FIG. 3(a)) is, for example, 5 to 60 μm, 10 to 50 μm or 20 to 40 μm, from the viewpoint of embedding the film adhesive into the depression 10a. may be The depth of the recess 10a is the height of the first semiconductor element Wa (the height from the bottom surface 10b of the recess 10a to the top surface of the first semiconductor element Wa) from the viewpoint of embedding properties of the film adhesive in the recess 10a. It is preferably 10 to 30%, more preferably 15 to 25%, of the total amount).

In this embodiment, the first semiconductor element Wa is a controller chip for driving the semiconductor device 100 . The thickness of the first semiconductor element Wa is, for example, 10 to 170 μm, and may be 20 to 100 μm. The thickness of the second semiconductor element Wb is, for example, 20-400 μm, and may be 50-200 μm.

From the viewpoint of embedding properties of the film-like adhesive in the recess 10a, as shown in FIG. 1, the size of the recess 10a is smaller than the size of the second semiconductor element Wb. More specifically, the opening area of the recess 10a on the surface 10F of the substrate 10 is smaller than the area of the second semiconductor element Wb. Then, when the laminate 20 (indicated by the dashed line in FIG. 3B) is placed on the substrate 10 so as to cover the depression 10a with the film-like adhesive 15P facing downward, the film-like adhesive 15P The peripheral portion 15a abuts on the surface 10F of the substrate 10. As shown in FIG. The area of the recess 10a (the opening area on the surface 10F) is relative to the area of the second semiconductor element Wb (the area of the film adhesive 15P), from the viewpoint of embedding the film adhesive 15P into the recess 10a. It is preferably 30-80%, more preferably 50-75%.

The shape of the second semiconductor element Wb in plan view is, for example, a rectangle (square or rectangle). The length of one side of the second semiconductor element Wb is, for example, 20 mm or less, and may be 2 to 20 mm or 7 to 20 mm.

As shown in FIG. 1, the substrate 10 has circuit patterns C1 and C2. The circuit pattern C1 is formed on the bottom surface 10b of the recess 10a. The circuit pattern C2 is formed on the front surface 10F of the substrate 10. As shown in FIG. The first semiconductor element Wa is pressure-bonded onto the circuit pattern C1 via an adhesive 5 and connected via the first wire 11 to the circuit pattern C2. The second semiconductor element Wb is mounted on the substrate 10 via the first sealing layer 15 so as to cover the entire first semiconductor element Wa and part of the circuit pattern C2. The second semiconductor element Wb is connected to the circuit pattern C2 via the second wire 12 and sealed with the sealing layer 25 .

<Method for manufacturing a semiconductor device>
A method for manufacturing the semiconductor device 100 will be described. First, the structure 30 shown in FIG. 4(a) is produced. That is, the first semiconductor element Wa is arranged in the recess 10a of the substrate 10. Next, as shown in FIG. After that, the first semiconductor element Wa and the circuit pattern C2 are electrically connected with the first wire 11 .

Next, as shown in FIGS. 4(b) and 4(c), the film-like adhesive 15P of the laminate 20 prepared separately is pressed against the substrate 10. Next, as shown in FIG. As a result, the first semiconductor element Wa and the first wires 11 are embedded in the film adhesive 15P. The thickness of the film adhesive 15P may be appropriately set according to the thickness of the first semiconductor element Wa, the capacity of the recess 10a, and the like. It may be 90-120 μm. By setting the thickness of the film-like adhesive 15P within the above range, it is possible to sufficiently secure the distance (distance G in FIG. 1) between the first semiconductor element Wa and the second semiconductor element Wb. The distance G is, for example, 20-120 μm, and may be 30-100 μm or 40-80 μm. The temperature at which the film adhesive 15P is pressed against the substrate 10 is, for example, 80 to 160.degree.

The film-like adhesive 15P is a thermosetting resin composition, and has a shear viscosity of 5000 Pa s or less (preferably 200 ~4000 Pa·s). From the viewpoint of embeddability, the shear viscosity of the film adhesive 15P at 80° C. is preferably 500 Pa·s or more, preferably 800 Pa·s or more, and more preferably 1000 Pa·s or more.

Next, the film adhesive 15P is cured by heating. As a result, the first semiconductor element Wa is sealed with the cured film adhesive 15P (the first sealing layer 15). The curing treatment of the film-like adhesive 15P may be performed under a pressurized atmosphere from the viewpoint of reducing voids. After electrically connecting the second semiconductor element Wb and the circuit pattern C2 with the second wire 12, the second semiconductor element Wb is sealed with the second sealing layer 25 to complete the semiconductor device 100. (see Figure 1).

An example of a method for manufacturing the laminate 20 shown in FIG. 2 will now be described with reference to FIGS. 5(a) to 5(e). First, a dicing die bonding integrated tape 8 (hereinafter simply referred to as "tape 8") is arranged in a predetermined device (not shown). The tape 8 includes a base layer 1, an adhesive layer 2, and an adhesive layer 15A in this order. As shown in FIGS. 5A and 5B, the tape 8 is attached to one surface of the semiconductor wafer W so that the adhesive layer 15A is in contact therewith. The base material layer 1 is, for example, a polyethylene terephthalate film (PET film). The semiconductor wafer W is, for example, a thin semiconductor wafer with a thickness of 10-100 μm. The semiconductor wafer W may be monocrystalline silicon, polycrystalline silicon, various ceramics, or compound semiconductors such as gallium arsenide.

As shown in FIG. 5(c), the semiconductor wafer W, the adhesive layer 2 and the adhesive layer 15A are diced. As a result, the semiconductor wafer W is separated into individual semiconductor elements Wb. The adhesive layer 15A is also singulated to form a film adhesive 15P. In addition, the semiconductor wafer W may be thinned by grinding the semiconductor wafer W prior to the dicing of the semiconductor wafer W. FIG.

Next, when the adhesive layer 2 is, for example, a UV curable type, as shown in FIG. Reduce the adhesive force with the adhesive 15P. After the ultraviolet irradiation, as shown in FIG. 5(e), the substrate layer 1 is expanded to separate the semiconductor elements Wb from each other, and the adhesive layer 2 is pushed up by the needle 42 to bond the laminated body 20 into a film form. While removing the agent 15P, the laminate 20 is sucked by the suction collet 44 and picked up. The laminated body 20 thus obtained is used for the manufacture of the semiconductor device 100 as shown in FIG. 4(b).

Although the embodiments of the present disclosure have been described above in detail, the present invention is not limited to the above embodiments. For example, in the above-described embodiment, the substrate 10 having one recess 10a is used to manufacture the semiconductor device 100. However, a substrate having a plurality of recesses is used and a semiconductor device is arranged in each recess. You may manufacture the semiconductor device which carried out. Further, in the above embodiment, the package in which the two semiconductor elements Wa and Wb are stacked is illustrated, but a third semiconductor element may be stacked above the second semiconductor element Wb, One or more semiconductor elements may be stacked thereon.

EXAMPLES The present disclosure will be described below with reference to Examples and Comparative Examples, but the scope of the present invention is not limited by these.

[Examples 1a-1c]
<Preparation of Laminate Consisting of First Semiconductor Element and Film Adhesive>
A semiconductor wafer (silicon wafer, thickness 775 μm) was prepared. Using a fully automatic grinder polisher DGP-8761 (manufactured by Disco Co., Ltd.), this semiconductor wafer was ground to a thickness of 30 μm. A dicing die bonding integrated film (manufactured by Hitachi Chemical Co., Ltd., adhesive layer thickness: 10 μm, adhesive layer thickness: 110 μm) was attached to the semiconductor wafer. This attachment was performed using a fully automatic multi-wafer mounter DFM-2800 (manufactured by Disco Co., Ltd.) at a stage temperature of 70.degree.

The semiconductor wafer was diced under the following conditions. As a result, a first laminate composed of the first semiconductor element (controller chip) and the film-like adhesive was obtained.
・Apparatus used: 12-inch dual dicer DFD-6361 (manufactured by Disco Co., Ltd.)
・Cutting method: Single cut method ・Blade: ZH05-SD4800-N1-70-BB (manufactured by Disco Co., Ltd.)
・Blade rotation speed: 50000 rpm
・Cutting speed: 30mm/sec
・Chip size 3mm x 3mm

<Preparation of Laminate Consisting of Second Semiconductor Element and Film Adhesive>
A semiconductor wafer (silicon wafer, thickness 775 μm) was prepared. Using a stealth laser dicer DFL-7361 (manufactured by Disco Co., Ltd.), a modified layer was formed on a semiconductor wafer by a laser so as to obtain a semiconductor device having a size of 10 mm×10 mm. Subsequently, using a fully automatic grinder polisher DGP-8761 (manufactured by Disco Co., Ltd.), this semiconductor wafer was ground to a thickness of 60 μm. A dicing die bonding integrated film (manufactured by Hitachi Chemical Co., Ltd., adhesive layer thickness: 110 μm, adhesive layer thickness: 20 μm) was attached to the semiconductor wafer. This attachment was performed using a fully automatic multi-wafer mounter DFM-2800 (manufactured by Disco Co., Ltd.) at a stage temperature of 70.degree. The adhesive layer of the dicing-die-bonding integrated film is made of a thermosetting resin composition having a relatively high elastic modulus (approximately 90 to 120 MPa) at 260° C. after curing.

Subsequently, using a cooling expansion device DDS2300 (manufactured by Disco Co., Ltd.), the semiconductor wafer and the adhesive layer are singulated by expanding under the following conditions, and the obtained laminate (second semiconductor and film adhesive) was picked up.
・Temperature: -15℃
・Holding time in the cooling chamber: 90 sec
・Push-up amount: 9mm
・Push-up speed: 300mm/sec
The heat shrink conditions were as follows: push-up amount of 7 mm, push-up speed of 30 mm/sec, holding time of 15 sec, and dryer temperature of 220°C. After washing and drying, the adhesive layer was irradiated with UV. The UV conditions were an illuminance of 100 mW/cm ² and a dose of 150 mJ/cm ² . As a result, a second laminate comprising the second semiconductor wafer and the film-like adhesive was obtained.

<Die bonding of the first semiconductor element>
Three types of substrates (E-700G, manufactured by Hitachi Chemical Co., Ltd.) having depressions on the surface were prepared. The three types of substrates have different pit sizes, which are 5 mm×5 mm, 7.1 mm×7.1 mm and 8.7 mm×8.7 mm, respectively, and the depth is 10 μm. rice field. The first laminate was press-bonded to the center of the depression of each substrate under the following conditions.
・Equipment: Die bonder DB-830plus+ (manufactured by FASFORD TECHNOLOGY)
・Crimp conditions: temperature 120°C, time 1 second, pressure 1.0 MPa

The film adhesive of the first laminate was cured under the following conditions.
・Device: fully automatic pressure oven PCOA-01T (manufactured by NTT Advance)
- Curing conditions: temperature of 90°C, pressure of 0.3 MPa, hold for 3 minutes, then 140°C, 0.7 MPa, hold for 35 minutes.

<Die bonding of the second semiconductor element>
The second laminate was press-bonded under the following conditions onto the substrate after the die-bonding of the first semiconductor element.
- Position: The second stacked body was aligned so that the center of the first semiconductor element and the center of the second semiconductor element were aligned.
・Crimp conditions: temperature 120°C, time 1.5 seconds, pressure 1.5 MPa

Three types of structures (Examples 1a to 1c) having different sizes of recesses after the second semiconductor element was pressure-bonded were evaluated as described below. Hereinafter, Examples 1a to 1c may be collectively referred to as Example 1.

[Comparative Example 1]
Structures for evaluation (Comparative Examples 1a to 1c) were obtained in the same manner as in Example 1, except that the first semiconductor element was pressure-bonded to the surface of a substrate having no depression on the surface.

[Example 2]
A structure for evaluation was obtained in the same manner as in Example 1 except that the thickness of the first semiconductor element was set to 40 μm instead of 30 μm. Three types of structures (Examples 2a to 2c) having different sizes of recesses after the second semiconductor element was pressure-bonded were evaluated as described below. Hereinafter, Examples 2a to 2c may be collectively referred to as Example 2.
[Comparative Example 2]
Structures for evaluation (Comparative Examples 2a to 2c) were obtained in the same manner as in Example 2, except that the first semiconductor element was pressure-bonded to the surface of a substrate having no depression on the surface.

[Example 3]
A structure for evaluation was obtained in the same manner as in Example 1 except that the thickness of the first semiconductor element was set to 50 μm instead of 30 μm. Three types of structures (Examples 3a to 3c) having different sizes of recesses after the second semiconductor element was pressure-bonded were evaluated as described below. Hereinafter, Examples 3a to 3c may be collectively referred to as Example 3.

[Comparative Example 3]
Structures for evaluation (Comparative Examples 3a to 3c) were obtained in the same manner as in Example 3, except that the first semiconductor element was pressure-bonded to the surface of a substrate having no depression on the surface.

<Evaluation of bowing>
The structures according to Examples 1 to 3 and Comparative Examples 1 to 3 are assumed to be chip-embedded semiconductor devices. The amount of warpage of these structures was measured as follows. That is, using a digimatic indicator ID-H0530 (manufactured by Mitutoyo), the five points of the upper left, upper right, center, lower left and lower right of the structure placed on the plane were measured, and the maximum value to the minimum value of the measurement result was measured. The value obtained by subtracting the value was taken as the amount of warpage. The improvement rate of the amount of warpage due to the use of the substrate having the recesses was calculated by the following formula.
・ Improvement rate (%) of Example 1 = (Warp amount of Comparative Example 1 - Warp amount of Example 1) / Warp amount of Comparative Example 1 x 100
・ Improvement rate (%) of Example 2 = (Warp amount of Comparative Example 2 - Warp amount of Example 2) / Warp amount of Comparative Example 2 x 100
・ Improvement rate (%) of Example 3 = (Warp amount of Comparative Example 3 - Warp amount of Example 3) / Warp amount of Comparative Example 3 x 100

Tables 1 to 3 show the evaluation results of the amount of warpage. As shown in Tables 1 to 3, except for Example 1-1 (indentation size of 5 mm×5 mm), the improvement rate of the amount of warpage was a positive value. Although the structure according to Example 1-1 had a negative value for the improvement rate of the amount of warpage, the difference in the amount of warpage from the comparative example was 0.7 μm (=26 μm−25.3 μm). It can be evaluated that it is a level that can withstand practical use.

<Evaluation of Embedability>
The embeddability of the first semiconductor element in the structures according to Examples 1 to 3 and Comparative Examples 1 to 3 was evaluated as follows.
・Equipment: Ultrasound digital diagnostic imaging device IS-350 (manufactured by Insight Co., Ltd.)
・Measurement: transmission (probe 35 MHz, scan length (X: 100 mm, Y: 50 mm), pitch: 0.1 mm)

In order to quantitatively evaluate the embeddability of the first semiconductor element by the film adhesive, the obtained image was edited using image editing software (Photoshop (registered trademark) manufactured by Adobe Systems Incorporated) and the void ratio was calculated. was calculated. That is, the portion embedded with the film-like adhesive was displayed in white, and the portion not embedded (void) was displayed in black, and the ratio of voids (void ratio) was calculated. The void rate improvement rate due to the use of a substrate having depressions was calculated by the following formula.
・ Improvement rate (%) of Example 1 = (void rate of Comparative Example 1 - void rate of Example 1) / void rate of Comparative Example 1 x 100
・ Improvement rate (%) of Example 2 = (void rate of Comparative Example 2 - void rate of Example 2) / void rate of Comparative Example 2 x 100
・ Improvement rate (%) of Example 3 = (void rate of Comparative Example 3 - void rate of Example 3) / void rate of Comparative Example 3 x 100

Tables 1 to 3 show the evaluation results of the void fraction. As shown in Tables 1 to 3, except when the size of the dent is 5 mm × 5 mm (Example 1-1, Example 2-1 and Example 3-1), the improvement rate of the void ratio is a positive value. Met. When the size of the depression was 5 mm×5 mm, the gap between the side surface of the depression and the first semiconductor element (size 3 mm×3 mm) was only 1 mm. It is speculated that

INDUSTRIAL APPLICABILITY According to the present disclosure, a semiconductor device having a configuration useful for improving embedding properties of a film-like adhesive made of a thermosetting resin composition and reducing overall bowing, and a method for manufacturing the same are provided. be done.

DESCRIPTION OF SYMBOLS 10... Substrate, 10a... Recess, 11... First wire, 12... Second wire, 15... First sealing layer (hardened film adhesive), 15P... Film adhesive, 20... Lamination Body 100 Semiconductor device C1, C2 Circuit pattern Wa First semiconductor element Wb Second semiconductor element

Claims (16)

providing a substrate having depressions;
disposing a first semiconductor element in the recess of the substrate;
a step of preparing a laminate of a film-like adhesive made of a thermosetting resin composition and a second semiconductor element by dicing;
a step of pressing the laminate against the substrate such that the film-like adhesive covers the region of the substrate including the recess and the first semiconductor element is embedded in the film-like adhesive;
a step of sealing the first semiconductor element with a cured film adhesive by heating the film adhesive;
including
the area of the recess is smaller than the area of the second semiconductor element;
The method of manufacturing a semiconductor device , wherein the depth of the recess is 10 to 30% of the height of the first semiconductor element . 2. The method of manufacturing a semiconductor device according to claim 1, wherein the area of said recess is 30 to 80% of the area of said second semiconductor element. 3. The method of manufacturing a semiconductor device according to claim 1, wherein said film adhesive has a thickness of 60 to 150 μm. 4. The method according to any one of claims 1 to 3 , wherein a gap between the first semiconductor element and the side surface of the recess is 1.2 to 5 mm when the first semiconductor element is placed in the recess. and a method for manufacturing a semiconductor device. 5. The method of manufacturing a semiconductor device according to claim 1 , wherein said film adhesive has a shear viscosity of 5000 Pa·s or less at any temperature between 60 and 150.degree. The substrate has a circuit pattern on its surface,
6. The method of manufacturing a semiconductor device according to claim 1 , further comprising a first wire bonding step of electrically connecting said first semiconductor element and said circuit pattern. a second wire bonding step of electrically connecting the second semiconductor element and the circuit pattern;
a step of encapsulating the second semiconductor element and the second wire with a resin composition;
7. The method of manufacturing a semiconductor device according to claim 6 , further comprising: 8. The method of manufacturing a semiconductor device according to claim 1 , further comprising the step of stacking a third semiconductor element on said second semiconductor element. The semiconductor according to any one of claims 1 to 8 , wherein the first semiconductor element is sealed with a cured film adhesive by heating the film adhesive under a pressurized atmosphere. Method of manufacturing the device. a substrate having a depression;
a first semiconductor element disposed in the recess;
a first sealing layer arranged to cover a region including the recess in the substrate and sealing the first semiconductor element;
a second semiconductor element arranged to cover a surface of the first sealing layer opposite to the substrate;
with
The first sealing layer is made of a cured film adhesive made of a thermosetting resin composition,
the area of the recess is smaller than the area of the second semiconductor element;
The semiconductor device, wherein the depth of the recess is 10 to 30% of the height of the first semiconductor element . 11. The semiconductor device according to claim 10 , wherein the area of said recess is 30 to 80% of the area of said second semiconductor element. 12. The semiconductor device according to claim 10 , wherein a gap between said first semiconductor element and a side surface of said recess is 1.2 to 5 mm. 13. The semiconductor device according to claim 10 , wherein said substrate has a thickness of 90-140 μm. a circuit pattern formed on the surface of the substrate;
a first wire electrically connecting the first semiconductor element and the circuit pattern;
14. The semiconductor device according to any one of claims 10 to 13 , further comprising: a second wire electrically connecting the second semiconductor element and the circuit pattern;
a second encapsulation layer encapsulating the second semiconductor element and the second wire;
15. The semiconductor device of claim 14 , further comprising: 16. The semiconductor device according to claim 10 , further comprising a third semiconductor element laminated on said second semiconductor element.

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