JP7186284B2 - Solar cell manufacturing method - Google Patents

Description

The present invention relates to a method for manufacturing a back contact type (also referred to as back contact type or back electrode type) solar cell.

As a solar cell using a semiconductor substrate, for example, a heterojunction type in which a semiconductor layer is formed on both the light receiving surface side and the back surface side (hereinafter referred to as a double-sided junction type as opposed to a back surface junction type, also referred to as a double-sided electrode type). and a back junction solar cell in which a semiconductor layer is formed only on the back side. In a double-sided junction type solar cell, since an electrode is formed on the light receiving surface side, the electrode shields sunlight. On the other hand, in the back contact solar cell, since no electrode is formed on the light receiving surface side, the sunlight receiving rate is higher than in the double-sided contact solar cell. Patent Literature 1 discloses a back contact solar cell.

The solar cell described in Patent Document 1 includes a semiconductor substrate that functions as a photoelectric conversion layer, a first conductivity type semiconductor layer and a first electrode layer that are sequentially laminated on a part of the back surface side of the semiconductor substrate, and a back surface of the semiconductor substrate. A second conductivity type semiconductor layer and a second electrode layer are laminated in order on the other part of the side.

JP 2014-75526 A

In general, an etching method using a photolithographic technique is used for patterning the first conductivity type semiconductor layer (first patterning) and patterning the second conductivity type semiconductor layer (second patterning). However, in the etching method using the photolithographic technique, for example, photoresist application by spin coating, photoresist drying, photoresist exposure, photoresist development, etching of a semiconductor layer using photoresist as a mask, and photoresist stripping are performed. A process was required and the process was complicated.

Regarding this point, Patent Document 1 describes a technique for simplifying the patterning process by a lift-off method using a lift-off layer (sacrificial layer) in the second patterning.

In the lift-off method, the lift-off layer must be peeled off efficiently. For mass production, it is necessary to simultaneously process a plurality of semiconductor substrates using a cassette as shown in FIG. In such a case, in adjacent semiconductor substrates, a large amount of the lift-off layer peeled off (lifted off) on the back surface side of one semiconductor substrate reattaches to the light-receiving surface side of the other semiconductor substrate. If the lift-off layer that has been lifted off reattaches to the light-receiving surface of the solar cell, for example, the adhered lift-off layer may reflect diffusely on the surface of the semiconductor substrate, which may degrade the performance of the solar cell or damage its appearance (light-receiving surface). The design of the side may deteriorate).

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a solar cell that suppresses degradation of the performance of the solar cell and damage to the appearance of the solar cell even when the manufacturing process is simplified.

A method for manufacturing a solar cell according to the present invention comprises: a semiconductor substrate; and a first conductivity type semiconductor layer laminated in a first region which is part of the other main surface side opposite to the one main surface side of the semiconductor substrate. and a second conductivity type semiconductor layer laminated on a second region which is another part of the other main surface side of the semiconductor substrate, the method for manufacturing a back contact solar cell comprising: a first semiconductor layer material film forming step of forming a material film of the first conductivity type semiconductor layer on the other main surface side; and a lift-off of forming a lift-off layer on the material film of the first conductivity type semiconductor layer. In the first region, the patterned first conductivity type semiconductor layer and the lift-off are formed in the first region by a layer forming step and removing material films of the lift-off layer and the first conductivity type semiconductor layer in the second region. a first semiconductor layer forming step of forming a layer; and a second semiconductor layer material film forming step of forming a material film of the second conductivity type semiconductor layer on the lift-off layer in the first region and the second region. and removing the lift-off layer to remove the material film of the second conductivity type semiconductor layer in the first region to form the patterned second conductivity type semiconductor layer in the second region. a second semiconductor layer forming step, wherein the second semiconductor layer forming step includes an etching step of immersing the semiconductor substrate in an etching solution for removing the lift-off layer; and a rinsing step of immersing in a rinsing solution for rinsing the surface of each at least once, wherein in at least one step of the etching step and the rinsing step, the lift-off layer to be removed and/or the second An adhesion inhibitor is added to prevent the material film of the two-conductivity-type semiconductor layer from re-adhering to the main surface of the semiconductor substrate.

ADVANTAGE OF THE INVENTION According to this invention, even if it simplifies the manufacturing process of a solar cell, it can suppress that the performance deterioration of a solar cell and the appearance of a solar cell are spoiled.

It is the figure which looked at the solar cell which concerns on this embodiment from the back surface side. FIG. 2 is a cross-sectional view taken along the line II-II in the solar cell of FIG. 1; It is a figure which shows the 1st semiconductor layer material film|membrane formation process and the lift-off layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 1st semiconductor layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 1st semiconductor layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 1st semiconductor layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 2nd semiconductor layer material film formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 2nd semiconductor layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the optical adjustment layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure for demonstrating the lift-off process and the rinse process in the 2nd semiconductor layer formation process shown in FIG. 3F. It is a figure for demonstrating the lift-off process and the rinse process in the 2nd semiconductor layer formation process shown in FIG. 3F. It is image data (binarization) which imaged the light-receiving surface of the solar cell of an Example. It is image data (binarization) which imaged the light-receiving surface of the solar cell of an Example. It is image data (binarization) which imaged the light-receiving surface of the solar cell of an Example. It is image data (binarization) which imaged the light-receiving surface of the solar cell of a comparative example.

An example of an embodiment of the present invention will be described below with reference to the accompanying drawings. In addition, suppose that the same code|symbol is attached|subjected to the same or a corresponding part in each drawing. Also, for convenience, hatching, member numbers, etc. may be omitted, but in such cases, other drawings shall be referred to.

(solar cell)
FIG. 1 is a view of the solar cell according to this embodiment as seen from the back side. The solar cell 1 shown in FIG. 1 is a back electrode type solar cell. The solar cell 1 has a semiconductor substrate 11 with two main surfaces, and has a first region 7 and a second region 8 on the main surface of the semiconductor substrate 11 .

The first region 7 has a so-called comb shape, and includes a plurality of finger portions 7f corresponding to comb teeth and busbar portions 7b corresponding to support portions of the comb teeth. The busbar portion 7b extends in a first direction (X direction) along one side portion of the semiconductor substrate 11, and the finger portions 7f extend from the busbar portion 7b in a second direction intersecting the first direction (X direction). direction (Y direction).
Similarly, the second region 8 has a so-called comb shape, and includes a plurality of finger portions 8f corresponding to comb teeth and busbar portions 8b corresponding to support portions for the comb teeth. The busbar portion 8b extends in a first direction (X direction) along one side portion of the semiconductor substrate 11 opposite to the other side portion, and the finger portions 8f extend in a second direction (Y direction) from the busbar portion 8b. direction).
The finger portions 7f and the finger portions 8f are alternately provided in the first direction (X direction).
Note that the first region 7 and the second region 8 may be formed in stripes.

FIG. 2 is a cross-sectional view of the solar cell of FIG. 1 taken along the line II-II. As shown in FIG. 2, the solar cell 1 includes a semiconductor substrate 11, an intrinsic semiconductor layer 13 and an optical semiconductor layer 13 which are sequentially laminated on the light receiving surface side which is one of the main surfaces of the semiconductor substrate 11 on the light receiving side. An adjustment layer 15 is provided. In the solar cell 1, a first intrinsic semiconductor layer 23 is sequentially laminated on a part (first region 7) of the back surface side, which is the other main surface of the semiconductor substrate 11 opposite to the light receiving surface. , a first conductivity type semiconductor layer 25 and a first electrode layer 27 . In addition, the solar cell 1 includes a second intrinsic semiconductor layer 33, a second conductivity type semiconductor layer 35, and a second electrode layer 37, which are laminated in order on another portion (second region 8) of the back surface side of the semiconductor substrate 11. Prepare.

Semiconductor substrate 11 is formed of a crystalline silicon material such as monocrystalline silicon or polycrystalline silicon. The semiconductor substrate 11 is, for example, an n-type semiconductor substrate in which a crystalline silicon material is doped with an n-type dopant. Examples of n-type dopants include phosphorus (P).
The semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light receiving surface side and generates photocarriers (electrons and holes).
Since crystalline silicon is used as the material of the semiconductor substrate 11, dark current is relatively small, and relatively high output (stable output regardless of illuminance) can be obtained even when the intensity of incident light is low.

The semiconductor substrate 11 may have a pyramid-shaped fine uneven structure called a texture structure on the back surface side. As a result, the efficiency of collecting the light that has passed through the semiconductor substrate 11 without being absorbed increases.
Further, the semiconductor substrate 11 may have a pyramid-shaped fine uneven structure called a texture structure on the light receiving surface side. As a result, the reflection of incident light on the light receiving surface is reduced, and the light confinement effect in the semiconductor substrate 11 is improved.

The intrinsic semiconductor layer 13 is formed on the light receiving surface side of the semiconductor substrate 11 . The first intrinsic semiconductor layer 23 is formed in the first region 7 on the back side of the semiconductor substrate 11 . The second intrinsic semiconductor layer 33 is formed in the second region 8 on the back side of the semiconductor substrate 11 . The intrinsic semiconductor layer 13, the first intrinsic semiconductor layer 23, and the second intrinsic semiconductor layer 33 are made of a material whose main component is, for example, substantially intrinsic (i-type) amorphous silicon. Substantially intrinsic is not limited to a completely intrinsic layer containing no conductivity type impurities, but a weakly p-type or n-type impurity containing a small amount of p-type or n-type impurities to the extent that the silicon-based layer can function as an intrinsic layer. It also includes substantially intrinsic layers of weak n-type.

The intrinsic semiconductor layer 13, the first intrinsic semiconductor layer 23, and the second intrinsic semiconductor layer 33 function as so-called passivation layers to suppress recombination of carriers generated in the semiconductor substrate 11 and increase carrier recovery efficiency.

The optical adjustment layer 15 is formed on the intrinsic semiconductor layer 13 on the light receiving surface side of the semiconductor substrate 11 . The optical adjustment layer 15 functions as an antireflection layer that prevents reflection of incident light, and also functions as a protective layer that protects the light receiving surface side of the semiconductor substrate 11 and the intrinsic semiconductor layer 13 . The optical adjustment layer 15 is made of an insulating material whose main component is silicon oxide (SiO), silicon nitride (SiN), or a compound thereof such as silicon oxynitride (SiON). The optical adjustment layer 15 may contain a small amount of p-type impurity or n-type impurity.

The first conductivity type semiconductor layer 25 is formed on the first intrinsic semiconductor layer 23 , that is, in the first region 7 on the back side of the semiconductor substrate 11 . The first conductivity type semiconductor layer 25 is made of, for example, an amorphous silicon material. The first conductivity type semiconductor layer 25 is, for example, a p-type semiconductor layer in which an amorphous silicon material is doped with a p-type dopant. Examples of p-type dopants include boron (B).

The second conductivity type semiconductor layer 35 is formed on the second intrinsic semiconductor layer 33 , that is, in the second region 8 on the back side of the semiconductor substrate 11 . The second conductivity type semiconductor layer 35 is made of, for example, an amorphous silicon material. The second conductivity type semiconductor layer 35 is, for example, an n-type semiconductor layer formed by doping an n-type dopant (for example, phosphorus (P) described above) into an amorphous silicon material.

The first conductivity type semiconductor layer 25 may be an n-type semiconductor layer, and the second conductivity type semiconductor layer 35 may be a p-type semiconductor layer.
Semiconductor substrate 11 may also be a p-type semiconductor substrate in which a crystalline silicon material is doped with a p-type dopant (eg, boron (B) as described above).

The first electrode layer 27 is formed on the semiconductor layer 25 of the first conductivity type, and the second electrode layer 37 is formed on the semiconductor layer 35 of the second conductivity type.
The first electrode layer 27 and the second electrode layer 37 may include a transparent electrode layer and a metal electrode layer, or may include only the metal electrode layer. In this embodiment, the first electrode layer 27 has a transparent electrode layer 28 and a metal electrode layer 29 that are sequentially laminated on the first conductivity type semiconductor layer 25 . The second electrode layer 37 has a transparent electrode layer 38 and a metal electrode layer 39 that are sequentially laminated on the second conductivity type semiconductor layer 35 .
The transparent electrode layers 28, 38 are made of a transparent conductive material. Transparent conductive materials include ITO (Indium Tin Oxide: composite oxide of indium oxide and tin oxide) and ZnO (Zinc Oxide: zinc oxide). The metal electrode layers 29 and 39 may be formed of a conductive paste material containing metal powder such as silver, or may be formed by metal plating. Moreover, the metal electrode layers 29 and 39 may be formed of a composite of these, for example, copper plating may be performed on a base formed of a conductive paste material containing silver.

(Method for manufacturing solar cell)
Next, a method for manufacturing the solar cell 1 of this embodiment shown in FIGS. 1 and 2 will be described with reference to FIGS. 3A to 3G. FIG. 3A is a diagram showing an intrinsic semiconductor layer forming step, a first semiconductor layer material film forming step, and a lift-off layer forming step in a method for manufacturing a solar cell according to this embodiment. 1 is a diagram showing a first semiconductor layer forming step in the method for manufacturing a solar cell according to FIG. FIG. 3E is a diagram showing a second semiconductor layer material film forming step in the method for manufacturing a solar cell according to this embodiment, and FIG. 3F is a diagram showing a second semiconductor layer forming step in the method for manufacturing a solar cell according to this embodiment. It is a figure which shows. FIG. 3G is a diagram showing an optical adjustment layer forming step in the method for manufacturing a solar cell according to this embodiment.

First, as shown in FIG. 3A, an intrinsic semiconductor layer 13 is laminated (film-formed) on the entire light-receiving surface side of the semiconductor substrate 11 using, for example, a CVD method (intrinsic semiconductor layer formation). process).

In addition, for example, by using the CVD method, a first intrinsic semiconductor layer material film 23Z and a first conductivity type semiconductor layer material film 25Z are sequentially laminated (formed) on the back surface side of the semiconductor substrate 11 (first semiconductor layer material film forming process).

Next, a lift-off layer (sacrificial layer) 40 is laminated (formed) on the entire back surface side of the semiconductor substrate 11, specifically, on the entire surface of the first conductivity type semiconductor layer material film 25Z using, for example, the CVD method. ) (lift-off layer forming step).
The lift-off layer 40 can be made of, for example, an inorganic material. Hydrofluoric acid treatment (hydrofluoric acid, or hydrofluoric acid and other types of If the lift-off proceeds with materials such as ITO and their composites such as ZnO, acid treatment (hydrochloric acid, nitric acid, or other types of acid (treatment with a mixture with ) promotes lift-off and is easily removed.
In particular, when the lift-off layer 40 is formed of a material such as silicon oxide (SiO), silicon nitride (SiN), or a compound thereof such as silicon oxynitride (SiON), the lift-off layer has a multi-layer structure of two or more layers. By doing so, higher lift-off properties can be obtained. For example, in the case of a two-layer structure, a first lift-off layer and a second lift-off layer are formed on the first conductivity type semiconductor layer material film 25Z in this order, and these layers are etched to the first conductivity type semiconductor layer material film 25Z. Etching rate of the first conductivity type semiconductor layer material film 25Z<etching rate of the second lift-off layer<etching rate of the first lift-off layer (Relational Expression 1) is satisfied with respect to the liquid.

Next, as shown in FIGS. 3B to 3D, the first intrinsic semiconductor layer material film 23Z and the first conductivity type semiconductor layer material film 23Z in the second region 8 are formed on the back surface side of the semiconductor substrate 11 using, for example, a resist 90. 25Z and the lift-off layer 40 are removed to form the patterned first intrinsic semiconductor layer 23, the first conductivity type semiconductor layer 25 and the lift-off layer 40 in the first region 7 (first semiconductor layer forming step). .

Specifically, using a photolithography method, a photoresist is applied to the entire surface of both surface sides of the semiconductor substrate 11, and then the photoresist in the second region 8 on the back surface side is exposed and developed using a mask to remove it. . As a result, as shown in FIG. 3B, a resist 90 covering the first region 7 on the back surface side of the semiconductor substrate 11 and the entire surface on the light receiving surface side is formed.

Thereafter, as shown in FIG. 3C, the resist 90 is used as a mask to etch the lift-off layer 40, the first conductivity type semiconductor layer material film 25Z and the first intrinsic semiconductor layer material film 23Z in the second region 8, thereby forming the first semiconductor layer material film 23Z. A patterned first intrinsic semiconductor layer 23 , a first conductivity type semiconductor layer 25 and a lift-off layer 40 are formed in the region 7 . Examples of the etching solution for the lift-off layer 40, the first conductivity type semiconductor layer material film 25Z, and the first intrinsic semiconductor layer material film 13Z include a mixed solution of hydrofluoric acid and nitric acid, and an ozone-hydrofluoric acid solution obtained by dissolving ozone in hydrofluoric acid. Acidic solution such as is used.

After that, as shown in FIG. 3D, the resist 90 is removed. As an etching solution for the resist 90, an organic solvent such as acetone is used.

Next, as shown in FIG. 3E, a second intrinsic semiconductor layer material film 33Z and a second conductivity type semiconductor layer material film 35Z are sequentially laminated (manufactured) on the entire back surface side of the semiconductor substrate 11 using, for example, the CVD method. film) (second semiconductor layer material film forming step).

Next, as shown in FIG. 3F, the second intrinsic semiconductor layer material film 33Z and the second intrinsic semiconductor layer material film 33Z in the first region 7 are formed on the back surface side of the semiconductor substrate 11 by using a lift-off method using a lift-off layer (sacrificial layer). By removing the conductivity type semiconductor layer material film 35Z, the patterned second intrinsic semiconductor layer 33 and second conductivity type semiconductor layer 35 are formed in the second region 8 (second semiconductor layer forming step).

Specifically, by removing the lift-off layer 40, the second intrinsic semiconductor layer material film 33Z and the second conductivity type semiconductor layer material film 35Z on the lift-off layer 40 are removed, and the second intrinsic semiconductor layer is formed in the second region 8. A layer 33 and a second conductivity type semiconductor layer 35 are formed. As a removal solution for the lift-off layer 40, for example, an acidic solution such as hydrofluoric acid is used.

Next, as shown in FIG. 3G, the optical adjustment layer 15 is laminated (formed) on the entire surface of the intrinsic semiconductor layer 13 on the light receiving surface side of the semiconductor substrate 11 by using, for example, the CVD method (optical adjustment layer formation). process).

Next, the first electrode layer 27 and the second electrode layer 37 are formed on the back surface side of the semiconductor substrate 11 (electrode layer forming step).
Specifically, a transparent electrode layer material film is laminated (formed) on the entire back surface side of the semiconductor substrate 11 using, for example, a PVD method (physical vapor deposition method) such as a sputtering method. Thereafter, patterned transparent electrode layers 28 and 38 are formed by removing part of the transparent electrode layer material film, for example, using an etching method using an etching paste. As an etching solution for the transparent electrode layer material film, for example, hydrochloric acid or ferric chloride aqueous solution is used.
After that, for example, using a pattern printing method or a coating method, a metal electrode layer 29 is formed on the transparent electrode layer 28, and a metal electrode layer 39 is formed on the transparent electrode layer 38, whereby the first electrode layer 27 and the A second electrode layer 37 is formed.

Through the above steps, the back electrode type solar cell 1 of the present embodiment shown in FIGS. 1 and 2 is completed.

Here, in the lift-off method, the lift-off layer must be removed efficiently, and for mass production, it is necessary to simultaneously process a plurality of semiconductor substrates using a cassette as shown in FIG. In such a case, in adjacent semiconductor substrates, a large amount of the lift-off layer peeled off (lifted off) on the back surface side of one semiconductor substrate reattaches to the light-receiving surface side of the other semiconductor substrate. Moreover, when the optical adjustment layer (SiN) is subsequently formed on the light receiving surface side of the semiconductor substrate, there is a problem that it is fixed to the semiconductor substrate and cannot be peeled off. If the lift-off layer that has been lifted off reattaches to the light-receiving surface of the solar cell, for example, the adhered lift-off layer causes irregular reflection on the surface of the semiconductor substrate. The design of the product may deteriorate).
In addition, since the lift-off layer that has been peeled off (lifted off) floats on the liquid surface, it also re-adheres to the back surface side (device surface side) of the semiconductor substrate. When the lift-off layer is reattached to the back surface of the solar cell, it acts as a contact resistance and lowers the FF of the solar cell.

As a method of avoiding such problems, the use of ultrasonic waves is known. Ultrasonic treatment reduces the amount of redeposition, but it lowers the performance of the solar cell, making it unsuitable for mass production. Therefore, it is desired to prevent the lift-off layer that has peeled off from re-adhering or to make the re-adhering lift-off layer easier to peel off without using ultrasonic equipment.

In this regard, the second semiconductor layer forming step includes at least one etching step and at least one rinsing step. For example, as shown in FIG. 5, it includes one etching process and a plurality of rinsing processes (first rinsing process, second rinsing process, third rinsing process, . . . ) sequentially performed after the etching process.

In the etching process, the semiconductor substrate 11 is dipped in an etching solution (etching bath) for removing the lift-off layer 40 . As the etching solution, an acidic solution such as hydrofluoric acid is used as described above.

In the rinsing step, the semiconductor substrate 11 is immersed in a rinsing solution (rinsing tank) for rinsing the surface of the semiconductor substrate. Specifically, in the first rinsing step, the semiconductor substrate 11 is immersed in a first rinsing solution (first rinsing tank), and in the second rinsing step, the semiconductor substrate 11 is immersed in a second rinsing solution (second rinsing tank). In the third rinsing step, the semiconductor substrate 11 is immersed in a third rinsing solution (third rinsing tank). As the rinse solution (the first rinse solution, the second rinse solution and the third rinse solution), a solution having a large surface free energy (that is, surface tension) for promoting lift-off as described later, such as water (H ₂ O ), glycerin is used.

In at least one step of the etching step and the rinsing step, the solution suppresses the reattachment of the material film of the removed lift-off layer and/or the second conductivity type semiconductor layer to the main surface of the semiconductor substrate 11. agent is added. A surfactant is used as the adhesion inhibitor. Surfactants include anionic surfactants, cationic surfactants, zwitterionic surfactants, nonionic surfactants, and mixtures thereof.

A surfactant may be an organic acid containing an aromatic structure and a long linear alkyl structure. As a result, affinity with a solvent having a high surfactant action and a large surface free energy (for example, water) is improved.
In addition to the surfactant, the adhesion inhibitor may also contain stabilizers, emulsifiers, buffer solutions of organic acid ions and organic acid salts, and/or pH adjusters.

As a result, the material film of the removed lift-off layer and/or the second conductivity type semiconductor layer is less likely to agglomerate and dispersed in the solution. As a result, the material film of the removed lift-off layer and/or the second conductivity type semiconductor layer is less likely to reattach to the main surface of the semiconductor substrate 11 . In addition, the material film of the lift-off layer and/or the second conductivity type semiconductor layer re-adhered to the main surface of the semiconductor substrate 11 is easily peeled off.
It is possible to suppress not only the material film of the lift-off layer and/or the second conductivity type semiconductor layer to be removed, but also the adhesion of dust and the like to the main surface of the semiconductor substrate 11 .

Therefore, according to the solar cell manufacturing method of the present embodiment, even if the lift-off method is used to simplify the manufacturing process, it is possible to suppress deterioration in the performance of the solar cell and damage to the appearance of the solar cell. can.

According to the findings of the inventors of the present application, the surfactant is preferably an anionic surfactant, a cationic surfactant, or a mixture thereof. According to this, the effect of suppressing redeposition of the removed material film of the lift-off layer and/or the second-conductivity-type semiconductor layer to the main surface of the semiconductor substrate 11 is relatively large.

Here, since a difference in surface tension is necessary for progress of lift-off, it is necessary to advance lift-off with water (H ₂ O) having a large surface free energy. On the other hand, after lift-off, it is desirable that the lift-off layer is dispersed in the solution so as not to reattach to the semiconductor substrate.

In this regard, it is preferable to add an adhesion inhibitor to the rinse solution in the second and subsequent rinse steps among the rinse steps. At this time, the temperature of the rinse solution may be raised (for example, room temperature or higher and 80 degrees or lower). As a result, the lift-off is advanced by the etching step and the first rinse step (H ₂ O), and the lift-off layer is restored to the semiconductor substrate in the second and subsequent rinse steps (H ₂ O + additive). It can be in a state of being dispersed in a solution so as not to adhere. Therefore, the material film of the lift-off layer and/or the second conductivity type semiconductor layer that has been lifted off is less likely to reattach to the main surface of the semiconductor substrate 11 . In addition, the material film of the lift-off layer and/or the second conductivity type semiconductor layer re-adhered to the main surface of the semiconductor substrate 11 is easily peeled off.

Even if the substrate drying process is performed after the etching process and the first rinsing process, and the second rinsing process and subsequent rinsing processes are performed, the lift-off layer lifted off does not adhere to the semiconductor substrate in the second and subsequent rinsing processes (H ₂ O + additive). It can be prevented from reattaching.

The pH of the rinse solution containing the surfactant is preferably 7 or more and 10 or less. According to the findings of the inventors of the present application, in a combination of a silicon thin film-based lift-off layer and a silicon-based semiconductor substrate, if the rinsing solution is basic, the peeled lift-off layer tends to disperse. As a result, when the pH of the rinse solution containing the surfactant is 7 or more, the removed material film of the lift-off layer and/or the second conductivity type semiconductor layer is less likely to reattach to the main surface of the semiconductor substrate 11 .
On the other hand, if the pH of the rinse solution containing the surfactant is higher than 10, the intrinsic semiconductor layer on the light-receiving surface side of the semiconductor substrate 10 will dissolve, resulting in deterioration of the performance of the solar cell, which is not preferable.

Note that if a large amount of the surfactant remains attached to the surface of the semiconductor substrate, it is expected that the performance of the solar cell (for example, changes over time) will be affected to some extent. Therefore, it is preferable that the anti-adhesion agent is not added to the rinse solution in the last rinse step among the rinse steps.

According to the findings of the inventors of the present application, the back electrode type solar cell 1 manufactured by the solar cell manufacturing method of the present embodiment has the following characteristics.
Between the intrinsic semiconductor layer 13 on the light receiving surface side and the optical adjustment layer 15,
- the ratio of the lift-off layer and/or the reattachment region of the material film of the second-conductivity-type semiconductor layer to the area of the light-receiving surface is 2% or less, preferably 1% or less;
- the size of particles in the reattached lift-off layer and/or the material film of the second conductivity type semiconductor layer is 20 μm or less,
- There is a gap between the material film of the redeposited lift-off layer and/or the second conductivity type semiconductor layer and the intrinsic semiconductor layer, in other words, the redeposited lift-off layer and/or the second conductivity type semiconductor A material film of the layer exists not along the textured structure of the semiconductor substrate.
According to this back electrode type solar cell 1, as described above, it is possible to suppress deterioration in performance and appearance (light-receiving surface side).

Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various changes and modifications are possible. For example, in the above-described embodiment, the method for manufacturing the heterojunction solar cell 1 is illustrated as shown in FIG. It is applicable to various solar cell manufacturing methods such as batteries.

Moreover, in the above-described embodiments, a solar cell having a crystalline silicon substrate was exemplified, but the present invention is not limited to this. For example, a solar cell may have a gallium arsenide (GaAs) substrate.

EXAMPLES The present invention will be specifically described below based on examples, but the present invention is not limited to the following examples.

(Evaluation 1)
According to the steps shown in FIGS. 3A to 3E, the semiconductor substrate 11 before lift-off shown in FIG. 3E was prepared. Silicon oxide (SiO) was used as the lift-off layer 40 .
As shown in FIG. 4, a plurality of semiconductor substrates 11 were simultaneously lifted off using a cassette. The conditions of the lift-off process (etching process, first rinsing process, second rinsing process, third rinsing process shown in FIG. 5) in Examples 11 and 12 and Comparative Example 11 are as follows.

(Common conditions of Examples 11 and 12 and Comparative Example 11)
<Etching process>
Etching solution: 6.4% hydrofluoric acid (HF)
Immersion time: 8 minutes <First rinse step>
First rinse solution: water ( _H2O )
<Second rinse step>
Second rinse solution: water ( _H2O )
<Third rinse step>
Third rinse solution: water ( _H2O )

(Example 11)
In Example 11, the first rinse solution in the first rinse step contained 0.08 vol% Sanisol B-50 (cationic, mainly containing alkylbenzyldimethylammonium chloride, etc.) manufactured by Kao Corporation as a surfactant. added.
(Example 12)
In Example 12, 0.08 vol % of Sanisol B-50 (cation type) was added as a surfactant to the second rinse solution in the second rinse step.
(Comparative Example 11)
In Comparative Example 11, no surfactant was added to either the etching solution in the etching step or the first to third rinse solutions in the first to third rinse steps.

Lift-off properties in Examples 11 and 12 and Comparative Example 11 (○: good, △ somewhat poor), and reattachment of the lift-off layer to the light-receiving surface side of the semiconductor substrate after the lift-off process (○: low, × high ) was evaluated. Table 1 shows the evaluation results.

According to Table 1, in Example 12, that is, when a surfactant was added to the second rinse solution in the second rinse step in the second rinse step, the lift-off property was maintained while reattachment on the light-receiving surface side was suppressed. did it. Also in Example 11, that is, even in the case where the surfactant was added to the first rinse solution in the first rinse step in the rinse step, redeposition on the light-receiving surface side could be suppressed.

(Evaluation 2)
According to the steps shown in FIGS. 3A to 3E, the semiconductor substrate 11 before lift-off shown in FIG. 3E was prepared. Silicon oxide (SiO) was used as the lift-off layer 40 .
As shown in FIG. 4, a plurality of semiconductor substrates 11 were simultaneously lifted off using a cassette. After that, the light-receiving surface side and the back surface side of the semiconductor substrate 11 were dried using a spin dryer. After that, an optical adjustment layer 15 was formed on the light receiving surface side of the semiconductor substrate 11 as shown in FIG. 3G. Silicon nitride (SiN) was used as the optical adjustment layer 15 .
The conditions of the lift-off process (etching process, first rinsing process, second rinsing process, third rinsing process shown in FIG. 5) in Example 21 and Comparative Example 21 are as follows.

(Conditions common to Example 21 and Comparative Example 21)
<Etching process>
Etching solution: 6.4% hydrofluoric acid (HF)
<First rinse step>
First rinse solution: water ( _H2O )
<Second rinse step>
Second rinse solution: water ( _H2O )
<Third rinse step>
Third rinse solution: water ( _H2O )

(Example 21)
In Example 21, the etching solution in the etching step contained Mama Lemon (anionic type, mainly containing alkylbenzene sulfonic acid, sodium alkylbenzene sulfonate, sodium alkyl ether sulfate, etc.) manufactured by Lion Corporation as a surfactant. 08 vol % was added.
Immersion time: 80 seconds (Comparative Example 21)
In Comparative Example 21, no surfactant was added to either the etching solution in the etching step or the first to third rinse solutions in the first to third rinse steps.
Immersion time: 40 seconds

Lift-off properties in Example 21 and Comparative Example 21 (○: good, △ slightly bad), appearance of the light-receiving surface side of the semiconductor substrate after the lift-off process (after drying with a spin dryer) (○: good, △ slightly bad), and , and the appearance of the light-receiving surface side of the semiconductor substrate after forming the optical adjustment layer (○: good, Δ: somewhat bad). Table 2 shows the evaluation results.

According to Table 1, even in Example 21, that is, even when a surfactant was added to the etching solution in the etching step, re-adhesion on the light-receiving surface side could be suppressed, and the appearance of the light-receiving surface side was impaired. I was able to suppress it.

(Evaluation 3)
According to the steps shown in FIGS. 3A to 3E, the semiconductor substrate 11 before lift-off shown in FIG. 3E was prepared. Silicon oxide (SiO) was used as the lift-off layer 40 .
As shown in FIG. 4, a plurality of semiconductor substrates 11 were simultaneously lifted off using a cassette. After that, the light-receiving surface side and the back surface side of the semiconductor substrate 11 were dried using a spin dryer. After that, an optical adjustment layer 15 was formed on the light receiving surface side of the semiconductor substrate 11 as shown in FIG. 3G. Silicon nitride (SiN) was used as the optical adjustment layer 15 .
The conditions of the lift-off process (etching process, first rinsing process, second rinsing process, third rinsing process shown in FIG. 5) in Examples 31 to 34 and Comparative Example 31 are as follows.

(Common conditions for Examples 31 to 34 and Comparative Example 31)
<Etching process>
Etching solution: 6.4% hydrofluoric acid (HF)
Immersion time: 10 minutes <First rinse step>
First rinse solution: water ( _H2O )
<Second rinse step>
Second rinse solution: water ( _H2O )
<Third rinse step>
Third rinse solution: water ( _H2O )

(Example 31)
In Example 31, 0.08 vol % of Sanisol B-50 (cation type) was added as a surfactant to the second rinse solution in the second rinse step.
(Example 32)
In Example 32, 0.08 vol % of mama lemon (anionic) was added as a surfactant to the second rinse solution in the second rinse step.
(Example 33)
In Example 33, 0.08 vol % of 2-alkyl-N-carboxymethyl-N-hydroxyethylimidazolinium betaine (zwitterionic system) was added as a surfactant to the second rinse solution in the second rinse step.
(Example 34)
In Example 34, 0.08 vol% of polyoxyethylene polyoxypropylene alkyl ether (alkyl length: C12-C16) (nonionic) was added as a surfactant to the second rinse solution in the second rinse step. .
(Comparative Example 31)
In Comparative Example 31, ultrasonic waves were applied for 20 seconds in the second rinse step.

Appearance of the light-receiving surface side of the semiconductor substrate after the first rinse step in Examples 31 to 34 and Comparative Example 31 (Poor), Appearance of the light-receiving surface side of the semiconductor substrate after the lift-off process (after drying with a spin dryer) (○ ○: very good, ○: good, △ somewhat bad), and the appearance of the light-receiving surface side of the semiconductor substrate after forming the optical adjustment layer (○○: very good, ○: good, △ somewhat bad) were evaluated. Table 3 shows the evaluation results.

According to Table 3, the cationic surfactant of Example 31 is more likely to reattach to the light-receiving surface than the amphoteric surfactant of Example 33 and the amphoteric surfactant of Example 34. The effect of suppressing redeposition on the light-receiving surface side was even greater with the anionic surfactant of Example 32.
The amphoteric surfactant of Example 33 and the amphoteric surfactant of Example 34 also provided the same effect as the case of using ultrasonic waves.
Also, in the first rinsing step, the effect of suppressing redeposition on the light-receiving surface side was small, and after the second rinsing step in which the surfactant was added, there was an effect of suppressing redeposition on the light-receiving surface side.

(Evaluation 4)
According to the steps shown in FIGS. 3A to 3E, the semiconductor substrate 11 before lift-off shown in FIG. 3E was prepared. Silicon oxide (SiO) was used as the lift-off layer 40 .
As shown in FIG. 4, a plurality of semiconductor substrates 11 were simultaneously lifted off using a cassette. After that, the light-receiving surface side and the back surface side of the semiconductor substrate 11 were dried using a spin dryer. After that, an optical adjustment layer 15 was formed on the light receiving surface side of the semiconductor substrate 11 as shown in FIG. 3G. Silicon nitride (SiN) was used as the optical adjustment layer 15 .
The conditions of the lift-off process (etching process, first rinsing process, second rinsing process, third rinsing process shown in FIG. 5) in Examples 41 to 44 and Comparative Example 41 are as follows.

(Common conditions for Examples 41 to 44 and Comparative Example 41)
<Etching process>
Etching solution: 6.4% hydrofluoric acid (HF)
Immersion time: 8 minutes <First rinse step>
First rinse solution: water ( _H2O )
<Second rinse step>
Second rinse solution: water ( _H2O )
<Third rinse step>
Third rinse solution: water ( _H2O )

(Example 41)
In Example 41, 0.08 vol % of mama lemon (anionic) was added as a surfactant to the second rinse solution in the second rinse step.
(Example 42)
Example 42 is the same as Example 41, except that the surfactant concentration is 0.16 vol %.
(Example 43)
Example 43 was the same as Example 41, except that the surfactant concentration was 0.24 vol % (about pH 7).
(Example 44)
Example 44 was the same as Example 41, except that the surfactant concentration was 0.24 vol % and 6 g/20 L of Na ₂ CO ₃ was added (pH about 10).
(Comparative Example 41)
In Comparative Example 41, ultrasonic waves were applied for 20 seconds in the second rinse step.

Appearance of the light-receiving surface side of the semiconductor substrate after the first rinse step in Examples 41 to 44 and Comparative Example 41 (Poor), Appearance of the light-receiving surface side of the semiconductor substrate after the lift-off process (after drying with a spin dryer) (○ ○○: further excellent, ○○: very good, ○: good, △ somewhat poor), and the appearance of the light-receiving surface side of the semiconductor substrate after forming the optical adjustment layer (○○○: further excellent, ○○: Very good, ◯: good, Δ somewhat bad). Table 4 shows the evaluation results.

According to Table 3, the higher the surfactant concentration, the greater the effect of suppressing redeposition on the light-receiving surface side. In addition, the inventors of the present application have conducted further experiments, and the concentration of the surfactant is preferably 0.001 vol% or more and 10 vol% or less, more preferably 0.01 vol% or more and 5 vol% or less, and 0.1 vol% It has been found that the content of 1 vol % or less is more preferable.
Further, according to Table 3, in Examples 43 and 44, that is, when the pH was set to 7 or more, the effect of suppressing re-adhesion on the light-receiving surface side increased. When the pH exceeded 10, the intrinsic semiconductor layer on the light receiving surface side was dissolved.

(Evaluation 5)
According to the steps shown in FIGS. 3A to 3E, the semiconductor substrate 11 before lift-off shown in FIG. 3E was prepared. Silicon oxide (SiO) was used as the lift-off layer 40 .
As shown in FIG. 4, a plurality of semiconductor substrates 11 were simultaneously lifted off using a cassette. After that, the light-receiving surface side and the back surface side of the semiconductor substrate 11 were dried using a spin dryer. After that, an optical adjustment layer 15 was formed on the light receiving surface side of the semiconductor substrate 11 as shown in FIG. 3G. Silicon nitride (SiN) was used as the optical adjustment layer 15 .
The conditions of the lift-off process (etching process, first rinsing process, second rinsing process, third rinsing process shown in FIG. 5) in Examples 51 to 53 and Comparative Example 51 are as follows.

(Common conditions for Examples 51 to 53 and Comparative Example 51)
<Etching process>
Etching solution: 6.4% hydrofluoric acid (HF)
Immersion time: 8 minutes <First rinse step>
First rinse solution: water ( _H2O )
<Second rinse step>
Second rinse solution: water ( _H2O )
<Third rinse step>
Third rinse solution: water ( _H2O )

(Example 51)
In Example 51, 0.5 vol % of mama lemon (anionic) was added as a surfactant to the second rinse solution in the second rinse step.
(Example 52)
Example 52 is the same as Example 51, except that the surfactant concentration is 1.0 vol %.
(Example 53)
In Example 53, 0.08 vol% of polyoxyethylene polyoxypropylene alkyl ether (alkyl length: C12-C16) (nonionic) was added as a surfactant to the second rinse solution in the second rinse step. .
(Comparative Example 51)
In Comparative Example 51, no surfactant was added to either the etching solution in the etching step or the first to third rinse solutions in the first to third rinse steps.

The appearance of the light-receiving surface side of the semiconductor substrate after forming the optical adjustment layer in Examples 51 to 53 and Comparative Example 51 was measured. The measurement results are shown in FIGS. 6A-6D and Table 5.
6A to 6D show imaging data of the light receiving surface obtained by imaging the light receiving surface obliquely while vertically irradiating the light receiving surface with AM1.5 light, and binarizing the image data. In FIGS. 6A-6D, the redeposited lift-off layer and/or second conductivity type semiconductor layer material film is shown in white.
In Table 5, the reattachment area of the material film of the lift-off layer and/or the second conductivity type semiconductor layer calculated using the image processing software "ImageJ" from the binarized light receiving surface imaging data of FIGS. 6A to 6D indicates the ratio of occupies the area of the light-receiving surface.

REFERENCE SIGNS LIST 1 solar cell 7 first region 7b, 8b busbar portion 7f, 8f finger portion 8 second region 11 semiconductor substrate 13 intrinsic semiconductor layer 15 optical adjustment layer 23 first intrinsic semiconductor layer 23Z first intrinsic semiconductor layer material film 25 first conductor type semiconductor layer 25Z first conductivity type semiconductor layer material film 27 first electrode layer 28, 38 transparent electrode layer 29, 39 metal electrode layer 33 second intrinsic semiconductor layer 33Z second intrinsic semiconductor layer material film 35 second conductivity type semiconductor layer 35Z second conductivity type semiconductor layer material film 37 second electrode layer 40 lift-off layer 90 mask

Claims (5)

a semiconductor substrate; a semiconductor layer of a first conductivity type laminated in a first region which is part of the other main surface side opposite to the one main surface side of the semiconductor substrate; A method for manufacturing a back contact solar cell including a second conductivity type semiconductor layer laminated on a second region which is another part of the solar cell,
a first semiconductor layer material film forming step of forming a material film of the first conductivity type semiconductor layer on the other main surface side of the semiconductor substrate;
a lift-off layer forming step of forming a lift-off layer on the material film of the first conductivity type semiconductor layer;
forming the patterned first conductivity type semiconductor layer and the lift-off layer in the first region by removing material films of the lift-off layer and the first conductivity type semiconductor layer in the second region; 1 semiconductor layer forming step;
a second semiconductor layer material film forming step of forming a material film of the second conductivity type semiconductor layer on the lift-off layer and the second region in the first region;
removing the lift-off layer to remove the material film of the second conductivity type semiconductor layer in the first region and forming the patterned second conductivity type semiconductor layer in the second region; a semiconductor layer forming step;
including
The second semiconductor layer forming step includes:
an etching step of immersing the semiconductor substrate in an etching solution for removing the lift-off layer;
a rinsing step of immersing the semiconductor substrate in a rinsing solution for rinsing the surface of the semiconductor substrate;
at least once each,
In at least one of the etching step and the rinsing step, the solution prevents the material film of the removed lift-off layer and/or the second conductivity type semiconductor layer from reattaching to the main surface of the semiconductor substrate. Add an anti-adhesion agent ,
The adhesion inhibitor is a surfactant,
A method for manufacturing a solar cell. The second semiconductor layer forming step includes a plurality of the rinsing steps performed in sequence,
2. The method of manufacturing a solar cell according to claim 1, wherein the adhesion inhibitor is added to the rinse solution in the second and subsequent rinse steps among the plurality of rinse steps. 3. The method of manufacturing a solar cell according to claim 1 , wherein the rinse solution containing the surfactant has a pH of 7 or more. The method for producing a solar cell according to any one of claims 1 to 3 , wherein the surfactant includes an anionic surfactant, a cationic surfactant, or a mixture thereof. 5. The method of manufacturing a solar cell according to claim 4 , wherein the surfactant is an organic acid containing an aromatic structure and a long-chain linear alkyl structure.

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