JP7193993B2 - Power supply control circuit, power supply, and power supply control method - Google Patents

Description

The present invention relates to a control circuit for a power supply, a power supply, and a control method for the power supply.

Conventionally, direct current is converted to alternating current and input to the primary coil of a transformer, and the alternating current in the secondary coil generated by electromagnetic induction is rectified, only the positive voltage in the induced voltage in the secondary coil is extracted, stored in an output capacitor, and output. Power supplies (such as DC-DC converters) are known and widely used.

With the spread of such power sources, there is a demand for power sources with less power loss. There is a demand for a power supply that can reduce the power loss of the entire power supply by reducing the power loss on the secondary side (output side), particularly the rectification on the secondary side.

Here, there is a method in which a diode is inserted in series with the coil on the secondary side so that current flows when the voltage applied to the diode is in the forward direction and current does not flow when the voltage is applied in the reverse direction (Japanese Unexamined Patent Publication No. 11 -69802). This method is superior in that the circuit is simple.

The invention of the publication will be described with reference to FIG. 15 (corresponding to FIG. 1 of the publication) (see paragraphs 0022 to 0024 of the publication).
As shown in FIG. 15, the control circuit P-CONT detects the output voltage P-Vout and controls the on/off of the main switch P-SW1 by the drive signal PP1. When the main switch P-SW1 is turned on, the current P-In1 flows through the primary winding (coil) PN1 of the transformer PT due to the input voltage P-Vin. When the main switch P-SW1 is turned off, the current P-Id2 flows through the diode P-D2 due to the voltage induced in the secondary winding (coil) PN2 of the transformer PT. It charges the capacitor PC2 and is supplied to the load. This current is detected by the current detector P-CDT.

When the current P-Id2 exceeds the set value, the detection signal P-dt becomes "1", thereby turning on the synchronous rectification switch P-SW2. Therefore, the current P-In2 flowing through the secondary winding P-N2 of the transformer PT becomes the current P-Isw2 flowing through the synchronous rectifier switch P-SW2, and the current P-Id2 flowing through the diode P-D2 becomes zero. Therefore, the loss due to the forward voltage of the diode PD2 becomes zero. Then, when the current P-Id2 due to the excitation energy accumulated in the transformer PT gradually decreases and becomes equal to or less than the set value, the detection signal P-dt becomes "0" and the synchronous rectification switch P-SW2 is turned off. .
Note that P-C1 is an input side capacitor.

JP-A-11-69802

However, as described in Patent Document 1 (see FIG. 15), the secondary side diode P-D2 and the synchronous rectification switch P-SW2 are arranged in parallel, and the current flowing through the diode P-D2 exceeds the set value. When the synchronous rectification switch P-SW2 is turned on to rectify the diode P-SW2, a current flows through the diode P-D2 every cycle until it reaches the set value, resulting in power loss.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a control circuit or the like for a power supply device in which power loss during rectification is small.

[1] The control circuit of the power supply device of the present invention comprises:
a transformer having a primary coil on the input side and a secondary coil on the output side;
first and second output terminals connected in parallel to at least part of the secondary coil;
A power supply control circuit for controlling a power supply comprising
switching means provided between the secondary coil and the first output terminal for turning on/off a connection between the secondary coil and the first output terminal;
current detection means having a current detection coil for detecting a current flowing between the secondary coil and the first output terminal;
on/off timing control means for outputting an on/off timing signal for the switching means based on the peak timing of the detected current detected by the current detection means;
characterized by comprising

[2] In the control circuit of the power supply device of the present invention,
The on/off timing control means further includes period detection means for detecting the period of the AC waveform of the detected current based on the peak timing, and the on/off timing control means detects the period detected by the period detection means and the peak timing. /OFF timing signal is preferably output.

[3] In the control circuit of the power supply device of the present invention,
Preferably, the current sensing coil is a Rogowski coil.

[4] In the control circuit of the power supply device of the present invention,
It is preferable that the Rogowski coil is formed in a chip shape.

[5] In the control circuit of the power supply device of the present invention,
Preferably, the current detection coil is a current transformer.

[6] In the control circuit of the power supply device of the present invention,
further comprising a diode connected in parallel with the switching means and a diode switch connected in series with the diode;
The on/off timing control means turns off the switching means and turns on the diode switch to determine the peak timing of the detected current,
It is preferable to output an on/off timing signal for turning off the diode switch and turning on the switching means based on the calculated peak timing.

[7] In the control circuit of the power supply device of the present invention,
The on/off timing control means is
It is preferable to output the on/off timing signal corrected so that the on/off timing of the on/off timing signal before correction is between the on/off timing before correction and the zero cross timing.

[8] In the control circuit of the power supply device of the present invention,
It is preferable that the switching means is composed of a gallium nitride semiconductor chip and integrated with the current detection means and the on/off timing control means.

[9] In the power supply device of the present invention,
a transformer having a primary coil on the input side and a secondary coil on the output side;
first and second output terminals connected in parallel to at least part of the secondary coil;
A power supply device comprising:
The power supply device
switching means provided between the secondary coil and the first output terminal for turning on/off a connection between the secondary coil and the first output terminal;
current detection means having a current detection coil for detecting a current flowing between the secondary coil and the first output terminal;
and a control circuit having on/off timing control means for outputting an on/off timing signal for the switching means based on the peak timing of the detected current detected by the current detection means.

[10] A control method for a power supply device of the present invention comprises:
a transformer having a primary coil on the input side and a secondary coil on the output side;
first and second output terminals connected in parallel to at least part of the secondary coil;
switching means provided between the secondary coil and the first output terminal;
A control method for a power supply device comprising:
a current detection step of detecting a current flowing between the secondary coil and the first output terminal with a current detection coil;
an on/off timing control step of outputting an on/off timing signal based on the detected peak timing of the detected current to turn on/off the switching means;
characterized by comprising

According to the control circuit of the power supply device of the present invention,
switching means provided between the secondary coil and the first output terminal for turning on/off the connection between the secondary coil and the first output terminal;
a current detection means having a current detection coil that detects a current flowing between the secondary coil and the first output terminal;
Since the on/off timing signal is output from the switching means based on the peak timing of the current detected by the current detecting means, the switching means can be turned on/off with high precision, and power loss can be reduced. .

3 is a diagram for explaining the control circuit (and power supply) of the power supply according to the first embodiment; FIG. 4 is a diagram for explaining a Rogowski coil used in the control circuit (and the power supply) of the power supply according to Embodiment 1; FIG. 4 is a timing chart of the control circuit (and power supply) of the power supply according to the first embodiment; 7 is another timing chart of the control circuit of the power supply device (and the power supply device) according to the first embodiment; 4 is a diagram for explaining on/off timing control means used in the control circuit (and the power supply) of the power supply according to the first embodiment; FIG. 3 is a hardware configuration diagram of on/off timing control means used in the control circuit (and power supply) of the power supply according to Embodiment 1. FIG. 5 is a diagram illustrating a processing flow for correcting timing in the control circuit (and power supply) of the power supply according to the first embodiment; FIG. FIG. 8 is a diagram for explaining a current transformer used in the control circuit (and power supply) of the power supply according to the second embodiment; FIG. 12 is a diagram for explaining another on/off timing control means used in the control circuit (and power supply) of the power supply according to the fourth embodiment; FIG. 16 is a diagram illustrating another processing flow for correcting timing in the control circuit (and power supply) of the power supply according to the fourth embodiment; FIG. 12 is a diagram for explaining how the control circuit (and the power supply) of the power supply according to the fifth embodiment determines the zero-cross timing; FIG. 12 is a diagram for explaining a control circuit (and power supply) of a power supply according to a sixth embodiment; FIG. 12 is a diagram for explaining a timing chart of a control circuit (and power supply) of the power supply according to the sixth embodiment; FIG. 12 is a diagram for explaining on/off timings in a control circuit (and power supply) of the power supply according to the eighth embodiment; FIG. 11 is an explanatory diagram of a conventional example;

DESCRIPTION OF THE PREFERRED EMBODIMENTS A control circuit and the like of a power supply device according to the present invention will be described below based on embodiments shown in the drawings. Each drawing is a schematic diagram and does not necessarily strictly reflect the actual structure, circuits, waveforms, and the like.

[Embodiment 1]
Overview of the power supply control circuit (and power supply)
The control circuit of Embodiment 1 is
a transformer having a primary coil on the input side and a secondary coil on the output side;
first and second output terminals connected in parallel to at least part of the secondary coil;
A control circuit for a power supply comprising:
switching means provided between the secondary coil and the first output terminal for turning on/off a connection between the secondary coil and the first output terminal;
current detection means having a current detection coil for detecting a current flowing between the secondary coil and the first output terminal;
on/off timing control means for outputting an on/off timing signal for the switching means based on the peak timing of the current detected by the current detection means;
Prepare.

Here, "based on" means as a foundation, in accordance with, or in line with. Although it is based on peak timing, it does not necessarily mean that it is based only on peak timing. For example, it may include a peak timing and a period calculated from the peak timing.

FIG. 1 is a diagram for explaining the control circuit 1 (and the power supply PW1) of the power supply according to the first embodiment.
FIG. 1 illustrates the entire power supply device PW1. The transformer T has a primary coil CL1 and a secondary coil CL2. The primary coil CL1 side is the input side of the power supply PW1, and the secondary coil CL2 side is the output side.

A DC voltage VI is input to the input side of the power supply device PW1.
Four input side transistors Q11 to Q14 are provided on the input side (the primary coil CL1 side of the transformer T). The input side transistors Q11 to Q14 are insulated gate bipolar transistors (IGBT) having a collector electrode C, an emitter electrode E and a gate electrode G. FIG. Between the collector electrode C and the emitter electrode E, a diode FD having an anode connected to the emitter electrode E side and a cathode connected to the collector electrode C side (so-called anti-parallel connection) was provided. This is to prevent destruction of the input side transistors Q11 to Q14 by serving as a free wheel diode (also called a free wheel diode) when a reverse voltage is applied to the input side transistors Q11 to Q14.
The four input-side transistors Q11 to Q14 are turned on/off by the input-side timing signals P11 and P12 input to the gate electrode G (turned on/off between the collector electrode C and the emitter electrode) to generate alternating current (rectangular wave) and As a result, the voltage is input to the primary coil CL1 of the transformer T via the primary side coil CL11 and the primary side capacitor C11 which are connected in series.

The voltage induced in the secondary coil CL2 of the transformer T is output between the first output terminal TVO-1 and the second output terminal TVO-2 via the output side transistors (switching means) Q1 and Q2. Output as voltage VO.
The output side transistors Q1 and Q2 are composed of n-channel MOSFETs (n-channel Metal Oxide Semiconductor Field Effect Transistors). Used as a switch.
The output side transistors Q1 and Q2 are made of a gallium nitride semiconductor.
An output capacitor CO is provided between the first output terminal TVO-1 and the second output terminal TVO-2 to smooth the voltage.
The first and second output terminals TVO-1, TVO-2 are connected to a load RO.

The configuration on the input side will be described in more detail.
An input capacitor C1 is provided between the input terminals.
A collector electrode C of the input transistor Q11 and a collector electrode C of the input transistor Q13 are connected, and an emitter electrode E of the input transistor Q12 and an emitter electrode E of the input transistor Q14 are connected.
The emitter electrode E of the input side transistor Q11 and the collector electrode C of the input side transistor Q12 are connected together, and are also connected to one end of the primary side coil CL11. The other end of the primary coil CL11 is connected to one electrode of a primary capacitor C11 connected in series with the primary coil CL11. The other electrode of the primary side capacitor C11 is connected to one end of the primary side coil CL1 of the transformer T. As shown in FIG.
The emitter electrode E of the input side transistor Q13 and the collector electrode C of the input side transistor Q14 are connected together, and are also connected to the other end of the primary side coil CL1.

The configuration on the output side will be described in more detail.
The secondary coil CL2 of the transformer T is composed of parts CL2-1 and CL2-2 of the secondary coil. CL2-1 and CL2-2 have the same number of turns.
An AC sine wave (voltage) is induced in the secondary coil CL2.

The secondary coils CL2-1 and CL2-2 are connected in series.
The connection between the two is connected to the second output terminal TVO-2.
A part of the secondary coil CL2-1 is connected to the source electrode S of the output side transistor (switching means) Q1 at the end opposite to the CL2-1/CL2-2 connection side.
A part of the secondary coil CL2-2 is connected to the source electrode S of the output side transistor (switching means) Q2 at the end opposite to the connection side of CL2-1 and CL2-2.
The drain electrode D of the output side transistor Q1 and the drain electrode D of the output side transistor Q2 are connected to each other and connected to the first output terminal TVO-1.

A current detection means 22 having a current detection coil 21 for detecting a current in an electric path between the end of the secondary coil CL2-1 opposite to the CL2-1/CL2-2 connection side and the source electrode S of the transistor Q1 is provided. It is The detected current ID (detected current waveform) is input to the on/off timing control means 31 . Details of the current detection means 22 will be described later.

The on/off timing control means 31 determines the peak timing of the current ID detected by the current detection means 22, and applies the on/off timing signal P1 to the gate electrodes G of the switching means (output side transistors Q1 and Q2) based on the peak timing. , P2.
The reason why it is based on the peak timing is that it is less susceptible to noise, enables highly accurate timing detection and control, and reduces power loss.
The switching means (output-side transistors Q1, Q2) performs ON/OFF (switching ON/OFF) between the source electrode S and the drain electrode D according to the ON/OFF timing signals P1, P2.

Current Detection Means Current detection means 22 detects the current flowing between the secondary coil (CL2-1) and the first output terminal (TVO-1). The current detection means 22 has a current detection coil 21 . By using the current detection coil 21, the current can be detected with high accuracy. Moreover, it can generally be miniaturized.
As the current detection coil 21, for example, there are a Rogowski coil and a current transformer, and the Rogowski coil is used in the first embodiment.

Rogowski coil (current detection coil 21)
A "Rogowski coil" refers to an air-core coil placed around a primary conductor, and is a sensor that detects current without using a core to detect a magnetic field. A voltage corresponding to the AC primary current is induced across the coil, and since this voltage has a differential waveform of the primary current, passing it through an integrator can reproduce the primary current waveform.

FIG. 2 is a diagram for explaining a Rogowski coil used in the control circuit (and power supply) of the power supply according to the first embodiment.

The Rogowski coil CL21 is configured by surrounding an electric line WI through which the current ID passes with a loop. The Rogowski coil CL21 is wound on a thin plastic tube and surrounded by an insulator. Both ends of the Rogowski coil CL21 are connected to the integrating circuit INT. The integration circuit INT is composed of an operational amplifier OPEC (using an operational amplifier as an integrator, operational amplifier: operational amplifier), a resistor ROP, and a capacitor COP. One end of the coil is connected to the plus side input section of the operational amplifier OPEC, and the other end is connected to the minus side input section via the resistor ROP as shown in FIG. The minus side input and output of the operational amplifier OPEC are connected via a capacitor COP.

When a current ID (horizontal axis is time, vertical axis is current intensity) ID flows through electric circuit WI, induced power E is generated in Rogowski coil CL21. This is integrated by the integrating circuit INT to generate a voltage VOP proportional to the current ID.
Thereby, the current ID can be measured.
By using the Rogowski coil, the current can be measured with high accuracy without affecting the electric circuit.
In addition, the measurement circuit can be made smaller, and the control circuit or power supply can be made smaller.

Timing Chart First, the input side will be explained (see FIG. 1).
The input side timing signal P11 is input to the gate electrodes G of the input side transistors Q11 and Q14, and controls the on/off timing (between the collector electrode C and the emitter electrode E) of the input side transistors Q11 and Q14.
The input side timing signal P12 is input to the gate electrodes G of the input side transistors Q12 and Q13, and controls the on/off timing (between the collector electrode C and the emitter electrode E) of the input side transistors Q12 and Q13.
The input-side timing signals P11 and P12 are rectangular waves with opposite phases.

The ON signal applied to the gate electrode G has a gate voltage (voltage between the gate electrode G and the emitter electrode E) equal to or higher than the threshold voltage.
The OFF signal applied to the gate electrode G is a voltage in which the gate voltage (the voltage between the gate electrode G and the emitter electrode E) is less than the threshold voltage.
The transistors Q11 to Q14 are composed of MOSFETs having a source electrode S, a drain electrode D and a gate electrode G, and controlling on/off between the source electrode S and the drain electrode D by a voltage applied to the gate electrode G. In this case, the ON signal is a voltage equal to or higher than the gate threshold voltage applied to the gate electrode G, and turns on the transistor (turns on the switch).
The off signal is a voltage less than the gate threshold voltage applied to the gate electrode G and turns off the transistor (turns off the switch).
The same applies to input side transistors Q11 to Q14 and output side transistors (switching means) Q1 and Q2.

3 and 4 show timing charts of the control circuit (and power supply) of the power supply according to the first embodiment.
When the input side timing signal P11 shown in FIG. 3 is an ON signal, the input side transistors Q11 and Q14 are turned on. At that time, the input side timing signal P12 is an off signal, and the input side transistors Q12 and Q13 are turned off.
When the input side timing signal P11 is an off signal, the input side transistors Q11 and Q14 are turned off. At that time, the input side timing signal P12 is an ON signal, and the input side transistors Q12 and Q13 are turned on.

Thus, the DC input voltage VI becomes AC. A sine wave is input to the primary coil CL1 of the transformer T through the primary coil CL11 and the primary capacitor C11, and is output from the secondary coil CL2 by electromagnetic induction. The voltage ratio is determined by the turn ratio between the primary coil CL1 and the secondary coil CL2 (CL2-1, CL2-2).

The output side will be explained.
The secondary coil CL2 is split at the midpoint into a first secondary coil CL2-1 and a second secondary coil CL2-2. As a result, when the first secondary coil CL2-1 produces an upwardly convex waveform of the current ID (sine wave), the second secondary coil CL2-2 produces a downwardly convex waveform. When the secondary coil CL2-1 produces a downwardly convex waveform of the sine wave, the second secondary coil CL2-2 produces an upwardly convex waveform.
When the coil CL2-1 has a convex waveform above the sine wave in half the cycle of the secondary coil CL2, the coil CL2-2 has a convex waveform below the sine wave in the remaining half cycle. When the coil CL2-1 produces a convex sine wave below the sine wave, the coil CL2-2 forms a convex above the sine wave.
By synthesizing these, full-wave rectification becomes possible.

The timing chart of FIG. 4 shows the timing of signals on the output side of the power supply (the side of the secondary coil CL2 of the transformer T).
ID-0 (dashed line) in FIG. 4 is the first secondary coil detected by the current detection means 22 when the on/off timing control means 31 ideally turns on/off the output side transistor Q1. CL2-1 currents are shown. In other words, it is the current that flows through the first secondary coil CL2-1 in the case of zero power loss.
Timings t01, t02, t03, t04, t05, t06, t07, and t08 are timings at which the current ID-0 turns on/off at these timings in an ideal state, and are so-called zero-crossing timings. Also called zero cross point.

t1, t3, t5, and t7 are the timings (peak timings) at which the current ID-0 (broken line) peaks.

First, the on/off timing control means 31 turns on at timing t31 after zero cross timing t01, turns off at timing t32 before zero cross timing t02, turns on at timing t41 after zero cross timing t03, and turns on at timing t41 after zero cross timing t04. An on/off timing signal P1 to be turned off at earlier timing t42 is output to the gate electrode G of the output side transistor Q1.
This timing can be created based on the input side timing signals P11 and P12 of the input side transistors Q11 to Q14.

The term "before" and "after" means that the timings before and after are reversed, and if the timing is turned on before the zero cross timings t01 and t03 and turned off after the timings t02 and t04, reverse flow of the output current occurs. This is because
Moreover, it is difficult to accurately find timings close to the zero-cross timings t01, t02, t03 and t04 based on the input side timing signals P11 and P12. This is because the timing shifts due to the primary coil CL11, the primary capacitor C11, the transformer T, and the like.

When the output side transistor (switching means) Q1 is turned on at t11, turned off at t12, turned on at t21, and turned off at t22 by the on/off timing signal P1, the current ID is, as shown in FIG. It becomes a sine wave from t21 to t22.

The on/off timing control means 31 detects timings t31, t32, t41, and t42 of a certain current value IDT of the current waveform ID.
Since the timings t31 to t32 are formed by two periods T01, the peak timing t1 of the current waveform ID within this period can be detected.
Similarly, since the timings t41 to t42 are formed by two periods T01, the peak timing t3 of the current waveform ID within this period can be detected.
A timing period t31 to t41 is one cycle T.

Based on the above information, the on/off timing control means 31 outputs the corrected on/off timing signals P1 and P2 after the zero cross timing t5.

At the zero cross timing t05 after (3/4)·T from the peak timing t3, the ON/OFF timing P1 is set to the ON signal.
After that, the ON/OFF signal is repeated such that the OFF signal is generated after (1/4)·T and the ON signal is generated after (1/4)·T.
The on/off timing control means 31 outputs the on/off timing signals P1 and P2 before the correction before timing t05 and after the correction after t05.

Before the correction, the output voltage VO was turned on/off at timings t11, t12, t21, and t22 shifted from the zero-cross timing. Switching is performed, and power loss is reduced.

Although the above description has been given on the side of the first secondary coil CL2-1, the same control is performed on the side of the second secondary coil CL2-2.
The on/off timing control means 31 generates an on/off timing signal P2 for controlling the output side transistor Q2 from the current waveform peak timing obtained from the current ID waveform detection by the first secondary coil CL2-1.
The on/off timing signal P2 is a signal that turns off t05-t06, turns on t06-t07, and turns off t07-t08, thereby turning on/off the output side transistor Q2.

The output voltage VO becomes as shown in FIG.
The solid line of the sine wave is the output voltage obtained on the side of the first secondary coil CL2-1, the dashed line is the output voltage obtained on the side of the second secondary coil CL2-2, and the sum of these voltages is the output voltage. becomes. These output voltages are also smoothed by an output capacitor CO. In order to make the explanation easier to understand, FIG. 4 exaggerates the actual voltage waveforms.

ON/OFF Timing Control Means FIG. 5 is a diagram for explaining the ON/OFF timing control means used in the control circuit (and power supply) of the power supply device according to the first embodiment. It is a so-called functional block diagram,

The ON/OFF timing control means 31 shown in FIG.

Waveform information of the detected current ID is input to the on/off timing control means 31 from the current detection means 22 having the current detection coil 21 . A peak timing detection means 311 detects the peak timing of the current ID. A period detection means 312 detects the period T of the current ID. Based on the detected peak timing information and period T information, the (on/off) timing generating means 313 generates corrected on/off timing signals P1 and P2, and gates of the output side transistors (switching means) Q1 and Q2. By applying voltage to the electrode G, the output side transistors Q1 and Q2 are turned on/off along the zero cross timing.

FIG. 6 is a hardware configuration diagram of on/off timing control means used in the control circuit (and power supply) of the power supply according to the first embodiment.

The on/off timing control means 31 has a CPU (Central Processing Unit), a ROM (Read Only Memory), and a RAM (Random Access Memory). The CPU, ROM, RAM, and current detection means 22 are connected by BUS.

The CPU reads and executes a computer program (also referred to as software, hereinafter simply referred to as a "program") describing instructions (processing) for the CPU.
The program is stored in ROM or RAM in advance. Alternatively, by instructing software installation with a keyboard (not shown) or a mouse (not shown) connected to the BUS, the software is transferred from the external storage device storing the software to the ROM via the BUS. or RAM.

The "on/off timing control means" 31 is a CPU that reads a program and executes the function of controlling on/off timing.
"Peak timing detection means" 311 is a CPU that reads a program and executes a function of detecting the peak timing of the current ID waveform.
“Period detection means” 312 is a CPU that reads a program and executes a function of detecting the period of the current ID waveform.
The "(on/off) timing generation means" 313 is a CPU that reads a program and executes the function of generating on/off timing signals P1 and P2 for turning on/off the output side transistors (switching means) Q1 and Q2. say.

7 is a diagram illustrating a processing flow for correcting timing in the control circuit (and power supply) of the power supply according to the first embodiment; FIG.

The on/off timing control means 31 measures the timings (t31, t32, t41, t42) at which the current ID waveform reaches a constant level (IDT), and determines peak timings (peak positions, t1, t3) (step S11). .
Zero-cross start times (timings, t11, t21) and zero-cross end times (timings, t12, t22) in the output (current ID) detected by the Rogowski coil are measured (step S12).
Original zero-cross start times (timings t01, t03) and zero-cross end times (timings t02, t04) are determined (step S13).
The on/off timing signals P1 and P2 are corrected in accordance with the determined zero-cross start times (timings t05 and t07) and zero-cross end times (timings t06 and t08).

Structure of the control circuit The entire control circuit is mounted on a copper plate and integrated. An insulating layer was formed on the side on which the control circuit was mounted, and the control circuit was mounted.
The output side transistors (switching means) Q1 and Q2 are gallium nitride semiconductor chips, the on/off timing control means 31 is a silicon semiconductor chip, and the Rogowski coil used for the current detection means 22 is a chip, and the whole is mounted on a copper plate. did. Circuits other than the Rogowski coil of the current detection means 22 are formed in the same silicon semiconductor chip as the on/off timing control means.
By doing so, the size of the mounting of the control circuit 1 can be reduced.

A Rogowski coil was formed in a chip shape and arranged beside the electric path between the secondary coil CL2-1 and the output side transistor Q1. The Rogowski coil is a spiral Rogowski coil formed by forming multiple copper wires in parallel on the front and back sides of an insulating polyimide flat plate and electrically connecting them with copper-plated through holes. chipped.

The output side transistors (switching means) Q1 and Q2 are composed of gallium nitride semiconductor chips.
A buffer layer was provided on a silicon base (substrate) Si, and a gallium nitride layer was formed thereon. An aluminum gallium nitride layer was formed thereon. A source electrode S, a drain electrode D, and a gate electrode G were formed thereon. An insulating layer was formed between these electrodes.
A two-dimensional electron gas is distributed over the gallium nitride layer. A gallium nitride semiconductor chip as a whole is a gallium nitride (GaN) based semiconductor substrate.
The drain electrode D, source electrode S, and gate electrode G constitute a semiconductor switch.

By using a gallium nitride semiconductor chip, high withstand voltage, low conduction resistance, high-speed switching, etc. can be easily imparted. Also suitable for semiconductor control and power applications that switch large currents and voltages.

The on/off timing control means and the like are mainly composed of a silicon semiconductor chip having a CPU, ROM and RAM. A silicon semiconductor chip is a semiconductor chip using a silicon wafer.
Silicon semiconductor chips have been developed for many years, are technically stable, and are easy to integrate, so they are particularly suitable for circuits where high voltages are not applied and large currents do not flow.

[Embodiment 2]
In the second embodiment, instead of the Rogowski coil of the first embodiment, the current detection means has a current transformer, and current detection is performed using the current coil.

Current transformer (current detection coil)
A "current transformer" is a current transformer for instruments, and is also called a current transformer or a current transformer. It is a special transformer for current measurement, and is configured so that the current transformation ratio (ratio of primary current to secondary current) is accurate. The current is inversely proportional to the turns ratio.

FIG. 8 is a diagram for explaining a current transformer used in the control circuit (and power supply) of the power supply according to the second embodiment. A current transformation ratio of n:1 is established between the n-turn secondary winding wound around the ring core and the through electric path WI through which the current ID flows. The current value is measured by flowing the output current through the load resistor RL and measuring the voltage EO.
By placing the cable in the center of the ring core, the current can be measured with high accuracy.
In addition, the measurement circuit can be made smaller, and the control circuit or power supply can be made smaller.

[Embodiment 3]
In the first embodiment, the timing of the ON/OFF timing signal after correction (after t05) is determined based on the peak timing (t01 to t04) of the current ID before correction. was determined based on the peak timing of the current ID before correction.
In FIG. 4, zero-cross timings t05 and t06 are determined based on peak timings t1 and t3, as in the first embodiment.
However, the timings t07 and t08 are determined based on the peak timings t3 and t5.
Thereafter, timings t09 and t10 (not shown) are determined based on peak timings t5 and t7. The ON/OFF switching timing of the ON/OFF timing signal is set so that the waveform of the detected current ID, which is the target of peak timing determination, is close to the switching timing.
By doing so, it is possible to reduce the risk of accumulating deviations in peak timing, and to reduce power loss.

[Embodiment 4]
The fourth embodiment differs from the first embodiment in that the on/off timing control means has a peak timing detection means, zero cross timing detection means, and (on/off) timing generation means.

FIG. 9 is a diagram for explaining the on/off timing control means used in the control circuit (and power supply) of the power supply according to the fourth embodiment.
FIG. 10 is a diagram illustrating a processing flow for correcting timing.

The on/off timing control means 31 shown in FIG. 9 has peak timing detection means 311 , zero cross timing detection means 314 and (on/off) timing generation means 315 .

Waveform information of the detected current ID is input to the on/off timing control means 31 from the current detection means 22 having the current detection coil 21 . A peak timing detection means 311 detects the peak timing and period of the current ID. A zero-cross timing detection means 314 detects the zero-cross timing of the current ID. Based on the detected zero-cross timing information, the (on/off) timing generating means 313 generates corrected on/off timing signals P1 and P2, and applies them to the gate electrodes G of the output side transistors Q1 and Q2, thereby The output side transistors Q1 and Q2 are turned on/off along the zero cross timing.

10, the on/off timing control means 31 measures the timings (t31, t32, t41, t42) at a constant level (IDT) of the current ID waveform, and measures the peak timing (peak position, t1). , t3) and the period T (step S21).
From the peak timing (peak position, t1, t3) and period T, zero-cross start time (timing, t01, t03) and zero-cross end time (timing, t02, t04) are calculated (step S22).
The on/off timing signals P1 and P2 are corrected in accordance with the determined zero-cross start times (timings t05 and t07) and zero-cross end times (timings t06 and t08).
Here, "determine" means to deduce, to reason, to estimate, to infer, to estimate, to infer, to conclude by inference, to calculate, to calculate, to figure out, to know, to infer.
[Embodiment 5]

FIG. 11 is a diagram for explaining how the control circuit (and the power supply) of the power supply according to the fifth embodiment determines the zero-cross timing.

Current detection means using a current detection coil such as a Rogowski coil or a current transformer cannot detect where the zero-cross timing is because the reference level of the detected current ID is unknown.
However, as shown in FIG. 11, for the current ID, the area above (shaded line) and the area below (shaded line) the reference level (dashed line) are equal in one period.
By using this property, the zero-cross timing can be calculated from the waveform of the detected current ID.

In this case, the on/off timing control means 31 calculates from the waveform of the detected current ID the level at which the upper area and the lower area in one cycle are equal, and the intersection of this level and the detected current ID is the zero cross timing. It is calculated as (t11, t12, t21, t22).
Peak timings t1 and t2 and period T are determined, and after timing t05, ON/OFF timing signals P1. Output P2.

[Embodiment 6]
In Embodiment 6, the control circuit of the power supply device further has a diode connected in parallel with the switching means,
The on/off timing control means turns off the diode circuit based on the peak timing of the AC waveform of the detected current detected by the current detection means when the switching means is off and the diode circuit is on, thereby turning off the switching means. on/off timing signal.

FIG. 12 is a diagram for explaining the control circuit (and the power supply) of the power supply according to the sixth embodiment. FIG. 13 is a diagram for explaining the timing chart.
Description will be made by omitting points common to the control circuit (and power supply) of the power supply device according to the first embodiment shown in FIG. 1 and the timing chart of FIG.
In FIG. 12, PW2 is a power supply device, and 2 is a control circuit.

In the control circuit 2 of FIG. 12, an output side transistor (switching means) Q1 and a diode D1 are connected in parallel. A circuit switch SW13 is connected in series with the output side transistor Q1, and a diode switch SW11 is connected in series with the diode D1.

A diode D2 is connected in parallel with the output side transistor Q2. A circuit switch SW14 is connected in series with the output side transistor Q2, and a diode switch SW12 is connected in series with the diode D2.

The diode switches SW11 and SW12 and the electric path switches SW13 and SW14 are configured by the same transistors as the output side transistors Q1 and Q2. In order to make the explanation easier to understand, it is represented by a symbol of a switch.
Further, since the circuit switches SW13 and SW14 overlap with the output side transistors (switching means) Q1 and Q2, they are essentially unnecessary.

The diode switch SW11 and the circuit switch SW13 are on/off controlled by a diode switch on/off signal PSW1 from the on/off timing control means 31. FIG. The on/off states of the diode switch SW11 and the circuit switch SW13 are opposite to each other. When the diode switch SW11 is on, the circuit switch SW13 is off. is turned on.

Similarly, the diode switch SW12 and the circuit switch SW14 are on/off controlled by a diode switch on/off signal PSW1 from the on/off timing control means 31. FIG. The on/off states of the diode switch SW12 and the circuit switch SW14 are opposite to each other. When the diode switch SW12 is on, the circuit switch SW14 is off. is turned on.

When the diode switch on/off signal PSW1 is a signal for turning on the diode switch SW11 and turning off the circuit switch SW13, the circuit of the diode D1 is turned on and the circuit of the output side transistor Q1 is cut off. (In addition, the electric path of the diode D2 becomes conductive, and the electric path of the output side transistor Q1 is cut off.)
Here, the first secondary coil CL2-1 side will be described. The same applies to the second secondary coil CL2-2 side, and the description is omitted.

When the power supply device PW2 is first turned on, the diode switch on/off signal PSW1 output from the on/off timing control means 31 turns on the diode switch SW11 and turns off the circuit switch SW13 (the diode switch SW12 turns on and the circuit switch SW13 turns off). SW14 off) signal. Then, the electric path of the diode D1 (and the electric path of the diode D2) becomes conductive, and the electric path of the output side transistor Q1 (and the electric line of the output side transistor Q2) is cut off. In this state, rectification is provided by diode D1 (and D2). Any power loss is automatically rectified by diode D1 (and D2).

As shown in FIG. 13, the diode D1 causes the detected current to rise from zero at timing t11, which is delayed by the forward voltage drop of the diode D1, and drop to zero at t12 in the interval between zero cross timings t01 and t02. During the zero-cross timing t02 to t03, the current ID becomes zero because the diode D1 is applied in the reverse direction.

In the interval from zero cross timing t03 to t04, the voltage rises from zero at timing t21 delayed by the forward voltage drop of diode D1, and drops to zero at t22. During the zero-cross timing period t04 to t05, the current ID becomes zero because the diode D1 is applied in the reverse direction.

5, the on/off timing control means 31 detects timings t31, t32, t41, and t42 of a certain current value IDT of the current waveform ID.

Since the timings t31 to t32 are formed by two periods T01, the peak timing t1 of the current waveform ID within this period can be detected.
Similarly, since the timings t41 to t42 are formed by two periods T01, the peak timing t3 of the current waveform ID within this period can be detected.
The timing period t31 to t41 is one cycle T.

At zero-crossing timing t05 after (3/4)·T from peak timing t3, on/off timing control means 31 reverses diode switch on/off signal PSW1, turning off diode switch SW11 and turning off electric path. The switch SW13 is turned on (and the diode switch SW12 is turned off, and the circuit switch SW14 is turned on).

Then, the electric path of the diode D1 is cut off, and the electric path of the output side transistor Q1 is turned on. (In addition, the circuit of the diode D2 is cut off, and the circuit of the output side transistor Q2 is turned on.)
At the same time, the on/off timing signal P1 is turned on at timing t05 and is turned on for a period from t05 to (1/4)·T, that is, from t05 to t06. Then, an output along the zero cross timings t05 and t06 is output from the first secondary coil CL2-1 side.

At the timings of zero-crossing timings t06 to t07, outputs along the zero-crossing timings t06 and t07 are similarly output from the second secondary coil CL2-2 side.
After that, by switching the on/off output of the on/off timing signal P1 every (1/4)·T, an output in line with the zero-cross timing is produced.

By doing so, even if there is a power loss due to the diode before the zero-cross timing is corrected, it can be automatically rectified.
[Embodiment 7]

Embodiment 7 is a combination of Embodiments 3 and 6 (see FIGS. 4, 12 and 13).
Zero-cross timings t05 and t06 are determined based on peak timings t1 and t3, as in the first embodiment.
However, the timings t07 and t08 are determined based on the peak timings t3 and t5.
Thereafter, timings t09 and t10 (not shown) are determined based on peak timings t5 and t7. The ON/OFF switching timing of the ON/OFF timing signal is set so that the waveform of the detected current ID, which is the target of peak timing determination, is close to the switching timing.
By doing so, it is possible to reduce the risk of accumulating deviations in peak timing, and to reduce power loss.

[Embodiment 8]
In the control circuit of the power supply device according to the eighth embodiment, the on/off timing control means controls the on/off timing of the uncorrected on/off timing signal between the uncorrected on/off timing and the zero-cross timing. It is configured to output an on/off timing signal corrected to be

FIG. 14 is a diagram for explaining on/off timing in the control circuit (and power supply) of the power supply according to the eighth embodiment.
The first secondary coil CL2-1 side will be described.

4, the detected current ID-0 (broken line) in FIG. The timings t01, t02, .

If the timing before correction is set to the same timing after correction, the ON/OFF switching timing of the ON/OFF timing signal P1 output from the ON/OFF timing control means 31 is t51 with respect to the zero cross timing t05. is defined as timing t51Y between zero-cross timing t05 and t51 before correction. Also, the timing t52Y between the timing t06 before correction and the timing t52 and t06 is set.
By setting the ON/OFF switching timing in this way, if the ON/OFF switching timing is the zero-cross timing, the power loss can be reduced compared to before the correction, and the possibility of the reverse phase output being generated is reduced. be able to.

[Embodiment 9]
In the first embodiment, the output side transistors (switching means) Q1 and Q2 are composed of gallium nitride semiconductor chips, but in the ninth embodiment, silicon carbide semiconductor chips are used instead.
A silicon carbide semiconductor chip is a semiconductor chip that uses silicon carbide (SiC) as a semiconductor material. Silicon carbide is composed of silicon (Si) and carbon (C).

The dielectric breakdown field strength is about ten times that of silicon (Si), and the bandgap is about three times that of silicon. Also, p-type and n-type control is possible in a wide range. It is also possible to operate at high temperatures exceeding 200° C., which is considered to be the limit of silicon.

[Embodiment 10]
In Embodiment 1, the output side transistors (switching means) Q1 and Q2 are composed of gallium nitride semiconductor chips, but in Embodiment 10, instead, semiconductor chips are used in which semiconductor switches are constructed in a vertical structure on a so-called silicon substrate. .
It is a chip in which a source electrode and a drain electrode are formed on both sides in the thickness direction of a silicon substrate.
Since the main raw material is a silicon substrate, it is easily available and has excellent pressure resistance.

Although the present invention has been described based on the above embodiments, the present invention is not limited to the above embodiments. It can be implemented in various forms without departing from the spirit thereof, and for example, the following modifications are also possible.

(1) A current detecting means 22 having current detecting coils 21 arranged in both output side transistors (switching means) Q1 and Q2 is provided.
(2) MOS transistors are used as the input side transistors Q11, Q12, Q13 and Q14.

Q1, Q2... output side transistor (switching means), S... source electrode, D... drain electrode, G... gate electrode, Q11, Q12, Q13, Q14... input side transistor, P1, P2... on/off timing signal, E Emitter electrode C Collector electrode G Gate electrode FD Diode VI Input voltage C1 Input capacitor P11, P12 Input timing signal CL11 Primary coil C11 Primary capacitor T Transformer CL1 Primary coil CL2 Secondary coil CL2-1 Part of secondary coil CL2-2 Part of secondary coil TVO-1 First output terminal TVO-2 2nd output terminal PW1, PW2 power supply device 21 current detection coil 22 current detection means 1, 2 control circuit 31 on/off timing control means ID current (detected current, detection object current), IDI...Current detection command signal, CO...Output capacitor, VO...Output voltage, RO...Load, CL22...Coil, RL...Resistance, EO...Voltage, VOP, E...Voltage, t1, t2, t3, t4 , t5, t6, t7... peak timing, t01, t02, t03, t04, t05, t06, t07, t08... zero cross timing, t11, t12, t21, t22... resistance, ID-0... primary coil in the case of zero loss Current flowing through CL2-1, ID... Current flowing through primary coil CL2-1, IDT... Current flowing through primary coil CL2-1 (constant value), t31, t32, t41, t42... Timing when current value is IDT, T... Period, T01... Time of t31 to t1, t1 to t32, t41 to t3, t3 to T42, 311... Peak timing detection means, 312... Period detection means, 313... (ON/OFF) timing generation means, 314... Zero cross timing Detecting means 315 (ON/OFF) timing generating means SW11, SW12 Diode switches SW13, SW14 Circuit switches PSW1, PSW2 Diode switch ON/OFF signals TX Zero cross timing t01 to VO rising timing (CL2-1 side, before smoothing) or the time interval from VO falling timing (CL2-1 side, before smoothing) to zero crossing timing t12, TX ... between zero crossing timing t01 and VO rising timing (CL2-1 side, before smoothing) or time interval between VO fall timing (CL2-1 side, before smoothing) and zero cross timing t12, P-CO NT... control circuit, P-Vout... output voltage, PP1... drive signal, P-SW1... main switch, P-Vin... input voltage, PT... transformer, PN1... primary winding (coil), P-In1...current, PN2...secondary winding (coil), P-D2...diode, P-Id2...current, P-C2...smoothing capacitor, P-CDT...current detector, dt...detection signal , P-SW2... synchronous rectification switch, P-In2... current, P-SW2... synchronous rectification switch, P-Isw2... current, P-Id2... current, P-C1... input side capacitor

Claims (10)

a transformer having a primary coil on the input side and a secondary coil on the output side;
first and second output terminals connected in parallel to at least part of the secondary coil;
A power supply control circuit for controlling a power supply comprising
switching means provided between the secondary coil and the first output terminal for turning on/off a connection between the secondary coil and the first output terminal;
current detection means having a current detection coil for detecting a current flowing between the secondary coil and the first output terminal;
on/off timing control means for outputting an on/off timing signal for the switching means based on the peak timing of the detected current detected by the current detection means;
A control circuit for a power supply, comprising: In the control circuit of the power supply device according to claim 1,
The on/off timing control means further includes period detection means for detecting the period of the AC waveform of the detected current based on the peak timing, and the on/off timing control means detects the period detected by the period detection means and the peak timing. / A control circuit for a power supply, characterized by outputting an off-timing signal. 3. In the control circuit of the power supply device according to claim 1 or 2,
A control circuit for a power supply, wherein the current detection coil is a Rogowski coil. In the control circuit of the power supply device according to claim 3,
A control circuit for a power supply device, wherein the Rogowski coil is formed in a chip shape. 3. In the control circuit of the power supply device according to claim 1 or 2,
A control circuit for a power supply, wherein the current detection coil is a current transformer. In the power supply control circuit according to any one of claims 1 to 5,
further comprising a diode connected in parallel with the switching means and a diode switch connected in series with the diode;
The on/off timing control means turns off the switching means and turns on the diode switch to determine the peak timing of the detected current,
A control circuit for a power supply device, which outputs an on/off timing signal for turning off the diode switch and turning on the switching means based on the calculated peak timing. In the power supply control circuit according to any one of claims 1 to 6,
The on/off timing control means is
A power supply characterized by outputting an on/off timing signal corrected so that the on/off timing of the on/off timing signal before correction is between the on/off timing before correction and zero cross timing. Device control circuit. In the power supply control circuit according to any one of claims 1 to 7,
A control circuit for a power supply device, wherein the switching means is composed of a gallium nitride semiconductor chip, and is integrated with the current detection means and the on/off timing control means. a transformer having a primary coil on the input side and a secondary coil on the output side;
first and second output terminals connected in parallel to at least part of the secondary coil;
A power supply device comprising:
The power supply device
switching means provided between the secondary coil and the first output terminal for turning on/off a connection between the secondary coil and the first output terminal;
current detection means having a current detection coil for detecting a current flowing between the secondary coil and the first output terminal;
and an on/off timing control means for outputting an on/off timing signal for the switching means based on the peak timing of the detected current detected by the current detection means. a transformer having a primary coil on the input side and a secondary coil on the output side;
first and second output terminals connected in parallel to at least part of the secondary coil;
switching means provided between the secondary coil and the first output terminal;
A control method for a power supply device comprising:
a current detection step of detecting a current flowing between the secondary coil and the first output terminal with a current detection coil;
an on/off timing control step of outputting an on/off timing signal based on the detected peak timing of the detected current to turn on/off the switching means;
A control method for a power supply, comprising:

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