JP7202396B2 - SOLAR CELL MANUFACTURING METHOD AND SOLAR CELL MANUFACTURING APPARATUS - Google Patents

Description

The present invention relates to a method for manufacturing a back electrode type (back contact type) solar cell, and a solar cell manufacturing apparatus used in the method for manufacturing the solar cell.

As solar cells using semiconductor substrates, there are double-sided electrode solar cells in which electrodes are formed on both the light-receiving side and the back side, and back electrode-type solar cells in which electrodes are formed only on the back side. In a double-sided electrode type solar cell, since electrodes are formed on the light receiving surface side, the electrodes block sunlight. On the other hand, in the back electrode type solar cell, no electrode is formed on the light receiving surface side, so the solar cell has a higher light receiving rate than the double electrode type solar cell. Patent Literature 1 discloses a back electrode type solar cell.

The solar cell described in Patent Document 1 includes a semiconductor substrate that functions as a photoelectric conversion layer, a first conductivity type semiconductor layer and a first electrode layer that are sequentially laminated on a part of the back surface side of the semiconductor substrate, and a back surface of the semiconductor substrate. A second conductivity type semiconductor layer and a second electrode layer are laminated in order on the other part of the side.

JP 2014-75526 A

In general, an etching method using a photolithographic technique is used for patterning the first conductivity type semiconductor layer (first patterning) and patterning the second conductivity type semiconductor layer (second patterning). However, in the etching method using photolithography technology, for example, photoresist application by spin coating, photoresist baking, photoresist exposure, photoresist development, etching of a semiconductor layer using photoresist as a mask, and photoresist stripping are performed. A process was required and the process was complicated.

Regarding this point, Patent Document 1 describes a technique for simplifying the patterning process by a lift-off method using a lift-off layer (sacrificial layer) in the second patterning. However, Patent Document 1 does not consider simplification of the first patterning process.

SUMMARY OF THE INVENTION An object of the present invention is to provide a solar cell manufacturing method and a solar cell manufacturing apparatus that enable simplification of the solar cell manufacturing process.

A method for manufacturing a solar cell according to the present invention comprises: a semiconductor substrate; Manufacture of a back electrode type solar cell comprising a first electrode layer, and a second conductivity type semiconductor layer and a second electrode layer laminated in order on a second region which is another part of the other main surface of a semiconductor substrate (A1) a first semiconductor layer material film forming step of forming a material film of a first conductivity type semiconductor layer on the other main surface side of a semiconductor substrate; (A3) a lift-off layer forming step of selectively forming a lift-off layer on the material film of the first conductivity type semiconductor layer in one region; A first semiconductor layer forming step of forming a patterned first conductivity type semiconductor layer in the first region by removing the material film of the first conductivity type semiconductor layer in the region; (A4) in the first region A second semiconductor layer material film forming step of forming a material film of the second conductivity type semiconductor layer on the lift-off layer and in the second region; and a second semiconductor layer forming step of removing the material film of the second conductivity type semiconductor layer in the first region and forming a patterned second conductivity type semiconductor layer in the second region.

A solar cell manufacturing apparatus according to the present invention is a solar cell manufacturing apparatus used in the above solar cell manufacturing method, and comprises a first semiconductor layer material film forming step, a lift-off layer forming step, and a first semiconductor layer forming step. and a second semiconductor layer material film forming step without being exposed to the atmosphere.

ADVANTAGE OF THE INVENTION According to this invention, the simplification of the manufacturing process of a solar cell is attained.

It is the figure which looked at the solar cell which concerns on this embodiment from the back surface side. FIG. 2 is a cross-sectional view taken along the line II-II in the solar cell of FIG. 1; FIG. 4 is a diagram showing a passivation layer forming step and an optical adjustment layer forming step in the method for manufacturing a solar cell according to this embodiment; It is a figure which shows the 1st semiconductor layer material film formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the lift-off layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 1st semiconductor layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 2nd semiconductor layer material film formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows the 2nd semiconductor layer formation process in the manufacturing method of the solar cell which concerns on this embodiment. It is a figure which shows an example of the manufacturing apparatus of the solar cell which concerns on this embodiment.

An example of an embodiment of the present invention will be described below with reference to the accompanying drawings. In each drawing, the same reference numerals are given to the same or corresponding parts. Also, for convenience, hatching, member numbers, etc. may be omitted, but in such cases, other drawings shall be referred to.

(solar cell)
FIG. 1 is a view of the solar cell according to this embodiment as seen from the back side. The solar cell 1 shown in FIG. 1 is a back electrode type (back contact type) solar cell. Solar cell 1 includes n-type (second conductivity type) semiconductor substrate 11 having two main surfaces, and has first region 7 and second region 8 on one main surface of semiconductor substrate 11 .

The first region 7 has a so-called comb shape, and includes a plurality of finger portions 7f corresponding to comb teeth and busbar portions 7b corresponding to support portions of the comb teeth. The busbar portion 7b extends in a first direction (X direction) along one side portion of the semiconductor substrate 11, and the finger portions 7f extend from the busbar portion 7b in a second direction intersecting the first direction (X direction). direction (Y direction).
Similarly, the second region 8 has a so-called comb shape, and includes a plurality of finger portions 8f corresponding to comb teeth and busbar portions 8b corresponding to support portions for the comb teeth. The busbar portion 8b extends in a first direction (X direction) along one side portion of the semiconductor substrate 11 opposite to the other side portion, and the finger portions 8f extend in a second direction (Y direction) from the busbar portion 8b. direction).
The finger portions 7f and the finger portions 8f are alternately provided in the first direction (X direction).
Note that the first region 7 and the second region 8 may be formed in stripes.

FIG. 2 is a cross-sectional view of the solar cell of FIG. 1 taken along the line II-II. As shown in FIG. 2, the solar cell 1 includes a semiconductor substrate 11, a passivation layer 13 and an optical adjustment layer laminated in order on the light receiving surface side, which is one of the main surfaces of the semiconductor substrate 11 on the light receiving side. A layer 15 is provided. In addition, the solar cell 1 includes a passivation layer 23, a p-type passivation layer 23, and a p-type passivation layer 23 which are sequentially laminated on a portion (first region 7) of the back surface side, which is the other main surface of the semiconductor substrate 11 opposite to the light-receiving surface. A (first conductivity type) semiconductor layer 25 and a first electrode layer 27 are provided. In addition, the solar cell 1 includes a passivation layer 33, an n-type (second conductivity type) semiconductor layer 35, and a second electrode layer, which are laminated in order on another portion (second region 8) of the back surface side of the semiconductor substrate 11. 37.

Semiconductor substrate 11 is formed of a crystalline silicon material such as monocrystalline silicon or polycrystalline silicon. The semiconductor substrate 11 is, for example, an n-type semiconductor substrate in which a crystalline silicon material is doped with an n-type dopant. Examples of n-type dopants include phosphorus (P).
The semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light receiving surface side and generates photocarriers (electrons and holes).

The passivation layer 13 is formed on the light receiving surface side of the semiconductor substrate 11 . The passivation layer 23 is formed in the first region 7 on the back side of the semiconductor substrate 11 . The passivation layer 33 is formed in the second region 8 on the back side of the semiconductor substrate 11 . The passivation layers 13, 23, 33 are made of a material mainly composed of, for example, intrinsic (i-type) amorphous silicon.
The passivation layers 13 , 23 , 33 suppress recombination of carriers generated in the semiconductor substrate 11 and increase carrier recovery efficiency.

The optical adjustment layer 15 is formed on the passivation layer 13 on the light receiving surface side of the semiconductor substrate 11 . The optical adjustment layer 15 functions as an antireflection layer that prevents reflection of incident light, and also functions as a protective layer that protects the light receiving surface side of the semiconductor substrate 11 and the passivation layer 13 . The optical adjustment layer 15 is formed of an insulator material such as silicon oxide (SiO), silicon nitride (SiN), or a composite thereof such as silicon oxynitride (SiON).

The p-type semiconductor layer 25 is formed on the passivation layer 23 , that is, in the first region 7 on the back side of the semiconductor substrate 11 . The p-type semiconductor layer 25 is made of, for example, an amorphous silicon material. The p-type semiconductor layer 25 is, for example, a p-type semiconductor layer in which an amorphous silicon material is doped with a p-type dopant. Examples of p-type dopants include boron (B).

The n-type semiconductor layer 35 is formed on the passivation layer 33 , that is, in the second region 8 on the back side of the semiconductor substrate 11 . The n-type semiconductor layer 35 is made of, for example, an amorphous silicon material. The n-type semiconductor layer 35 is an n-type semiconductor layer in which, for example, an amorphous silicon material is doped with an n-type dopant (for example, phosphorus (P) described above).

The first electrode layer 27 is formed on the p-type semiconductor layer 25 and the second electrode layer 37 is formed on the n-type semiconductor layer 35 .
The first electrode layer 27 has a transparent electrode layer 28 and a metal electrode layer 29 that are sequentially laminated on the p-type semiconductor layer 25 . The second electrode layer 37 has a transparent electrode layer 38 and a metal electrode layer 39 that are sequentially laminated on the n-type semiconductor layer 35 .
The transparent electrode layers 28, 38 are made of a transparent conductive material. Transparent conductive materials include ITO (Indium Tin Oxide: composite oxide of indium oxide and tin oxide) and ZnO (Zinc Oxide: zinc oxide). The metal electrode layers 29 and 39 are made of a conductive paste material containing metal powder such as silver.

(Method for manufacturing solar cell)
Next, a method for manufacturing the solar cell 1 of this embodiment shown in FIGS. 1 and 2 will be described with reference to FIGS. 3A to 3F. FIG. 3A is a diagram showing a passivation layer forming step and an optical adjustment layer forming step in the method for manufacturing a solar cell according to this embodiment, and FIG. It is a figure which shows a material film formation process. FIG. 3C is a diagram showing a lift-off layer forming step in the method for manufacturing a solar cell according to this embodiment, and FIG. 3D is a diagram showing a first semiconductor layer forming step in the method for manufacturing a solar cell according to this embodiment. be. FIG. 3E is a diagram showing a second semiconductor layer material film forming step in the method for manufacturing a solar cell according to this embodiment, and FIG. 3F is a diagram showing a second semiconductor layer forming step in the method for manufacturing a solar cell according to this embodiment. It is a figure which shows.

The passivation layer forming step, the optical adjustment layer forming step, the first semiconductor layer material film forming step, the lift-off layer forming step, the first semiconductor layer forming step, and the second semiconductor layer material film forming step are performed by, for example, the CVD method (chemical vapor deposition). deposition method) in a vacuum chamber of a CVD apparatus to be described later in order without being exposed to the atmosphere.
At least the first semiconductor layer material film forming step, the lift-off layer forming step, the first semiconductor layer forming step, and the second semiconductor layer material film forming step may be performed inline in order without being exposed to the atmosphere. The layer forming process and the optical adjustment layer forming process may be exposed to the atmosphere.

Each step in the solar cell manufacturing method of the present embodiment, mainly the passivation layer forming step, the optical adjustment layer forming step, the first semiconductor layer material film forming step, the lift-off layer forming step, the first semiconductor layer forming step, and the second semiconductor A substrate tray for holding the semiconductor substrate 11 is used in the layer material film forming process.

As shown in FIG. 3A, the substrate tray 3 is a double-sided open tray having openings on the light-receiving surface side and the back surface side of the semiconductor substrate 11 . The substrate tray 3 is configured to expose the light-receiving surface side of the semiconductor substrate 11 and to expose the first region 7 and the second region 8 on the back side of the semiconductor substrate 11 .
The substrate tray 3 is configured to cover the side surface side of the semiconductor substrate 11 and the peripheral edge area of the back surface side of the semiconductor substrate 11 . As a result, the film-forming gas is suppressed from flowing into the peripheral region on the side surface side of the semiconductor substrate 11 and the back surface side of the semiconductor substrate 11 .
When using the double-sided open substrate tray 3, the semiconductor substrate 11 may be heated during film formation by the CVD method. For example, using a heater (heating means), the semiconductor substrate 11 is heated from the back surface side when forming the film on the light receiving surface side of the semiconductor substrate 11, and the semiconductor substrate 11 is heated from the light receiving surface side when forming the film on the back surface side of the semiconductor substrate 11. You may Thereby, the semiconductor substrate 11 can be uniformly heated, and the uniformity of the temperature of the semiconductor substrate 11 can be improved. As a result, it is possible to form a uniform and homogeneous film, which is expected to improve the performance of solar cells.

First, as shown in FIG. 3A, a passivation layer 13 is laminated (formed) on the entire surface of the semiconductor substrate 11 on the light-receiving surface side using, for example, the CVD method (passivation layer forming step). Next, the optical adjustment layer 15 is laminated (formed) on the entire surface of the passivation layer 13 on the light receiving surface side of the semiconductor substrate 11 by using, for example, the CVD method (optical adjustment layer forming step).

Next, as shown in FIG. 3B, a passivation layer material film 23Z and a p-type semiconductor layer material film 25Z are sequentially laminated (film-formed) on the entire back surface side of the semiconductor substrate 11 using, for example, the CVD method (second film formation). 1 semiconductor layer material film forming step).

Next, as shown in FIG. 3C, a lift-off layer (lift-off layer ) 40 is laminated (film-formed). At this time, using a mask (first mask) 43 arranged at a position corresponding to the second region 8 on the back side of the semiconductor substrate 11, the lift-off layer 40 is selectively formed in the first region 7 (lift-off layer forming process).

The lift-off layer 40 is made of a material containing silicon oxide (SiO) or silicon nitride (SiN) as a main component. When the lift-off layer 40 contains a material containing silicon oxide as a main component, it preferably has a refractive index of 1.45 to 1.90, more preferably 1.50 to 1.80, with respect to light with a wavelength of 632 nm. It is more preferable to have a refractive index of 1.55 or more and 1.72 or less.
On the other hand, when the lift-off layer 40 contains a material containing silicon nitride as a main component, it preferably has a refractive index of 1.60 or more and 2.10 or less, more preferably 1.70 or more and 2.00 or less, with respect to light with a wavelength of 632 nm. and more preferably 1.80 or more and 1.95 or less.

The refractive index is a factor that depends on the silicon content and affects the etching rate of the lift-off layer, which will be described later. Thereby, lift-off in the lift-off layer etching process (lift-off process) proceeds easily.
The above refractive index is a value obtained by performing fitting from a dielectric function in spectroscopic ellipsometry measurement and extracting a numerical value for light with a wavelength of 632 nm.

The mask 43 is a mask containing, for example, a metal material.

Next, as shown in FIG. 3D, using the lift-off layer 40 as a mask (second mask), the intrinsic semiconductor layer material film 23Z and the p-type semiconductor layer material film 23Z in the second region 8 on the back side of the semiconductor substrate 11 are etched by hydrogen plasma etching. The semiconductor layer material film 25Z is removed. Thus, patterned intrinsic semiconductor layer 23 and p-type semiconductor layer 25 are formed in first region 7 on the back surface side of semiconductor substrate 11 (first semiconductor layer forming step).
At this time, hydrogen plasma etching may be performed so as to leave part or all of the intrinsic semiconductor layer material film 23Z in the second region 8 on the back surface side of the semiconductor substrate 11 .

For example, in hydrogen plasma etching, plasma discharge is performed while introducing a gas containing hydrogen as a main component into a vacuum chamber. A major component indicates that hydrogen (H ₂ ) is 90% by volume or more with respect to the total amount of gas introduced into the vacuum chamber. More preferably, the volume ratio of this hydrogen is 95% or more. Examples of introduced gas species other than hydrogen include SiH ₄ and CH ₄ .

Next, as shown in FIG. 3E, for example, the CVD method is used to cover the entire back surface side of the semiconductor substrate 11, that is, on the exposed semiconductor substrate 11 in the second region 8 and on the lift-off layer 40 in the first region 7. Next, as shown in FIG. , a passivation layer material film 33Z and an n-type semiconductor layer material film 35Z are sequentially laminated (formed) (second semiconductor layer material film forming process).
In addition, in the first semiconductor layer forming step, if the entire intrinsic semiconductor layer material film 23Z remains in the second region 8 on the back surface side of the semiconductor substrate 11, the passivation layer material film does not have to be laminated (formed). . Further, in the first semiconductor layer forming step, if a part of the intrinsic semiconductor layer material film 23Z remains in the second region 8 on the back surface side of the semiconductor substrate 11, a passivation layer material film is stacked (film formation) by the removed portion. should be done.

Next, as shown in FIG. 3F, the lift-off method using a lift-off layer is used to remove the passivation layer material film 33Z and the n-type semiconductor layer material film 35Z in the first region 7 on the back side of the semiconductor substrate 11. . Specifically, the passivation layer material film 33Z and the n-type semiconductor layer material film 35Z on the lift-off layer 40 are removed by removing the lift-off layer 40 by etching using an etching solution. As an etching solution for the lift-off layer 40, for example, an acidic solution such as hydrofluoric acid is used. Thereby, a patterned passivation layer 33 and an n-type semiconductor layer 35 are formed in the second region 8 (second semiconductor layer forming step).

Next, the first electrode layer 27 and the second electrode layer 37 are formed on the back surface side of the semiconductor substrate 11 (electrode layer forming step).
Specifically, a transparent electrode layer material film is laminated (formed) on the entire back surface side of the semiconductor substrate 11 using, for example, a PVD method (physical vapor deposition method) such as a sputtering method. After that, the transparent electrode layers 28 and 38 are patterned by removing part of the transparent electrode layer material film, for example, using an etching method using an etching paste. As an etching solution for the transparent electrode layer material film, for example, hydrochloric acid or ferric chloride aqueous solution is used.
After that, for example, using a pattern printing method or a coating method, a metal electrode layer 29 is formed on the transparent electrode layer 28, and a metal electrode layer 39 is formed on the transparent electrode layer 38, whereby the first electrode layer 27 and the A second electrode layer 37 is formed.

Through the above steps, the back electrode type solar cell 1 of the present embodiment shown in FIGS. 1 and 2 is completed.

(Solar cell manufacturing equipment)
Next, an example of a solar cell manufacturing apparatus used in the solar cell manufacturing method of the present embodiment will be described.
FIG. 4 is a cross-sectional view (schematic view) showing an example of a solar cell manufacturing apparatus according to this embodiment. A solar cell manufacturing apparatus 100 shown in FIG. 4 is, for example, a horizontal plasma CVD apparatus in which a semiconductor substrate 11 is arranged horizontally. The features of this embodiment may be applied to, for example, a vertical plasma CVD apparatus in which a semiconductor substrate is arranged vertically. Moreover, the features of the present embodiment are not limited to the plasma CVD apparatus, but can be applied to various solar cell manufacturing apparatuses equipped with a vacuum chamber.

In FIG. 4, the substrate tray 3 in which two semiconductor substrates 11 are arranged in one direction is illustrated in a simplified manner. .

A solar cell manufacturing apparatus 100 includes a vacuum chamber 110 . The interior of the vacuum chamber 110 constitutes two spaces, a first space 111 and a second space 112 , partitioned by a partition 115 when the substrate tray 3 on which the semiconductor substrate 11 is mounted is arranged.

A supply port 121 and an exhaust port 123 for the deposition gas are formed on the first space 111 side. An electrode 141 for plasma discharge is arranged on the first space 111 side.
Similarly, a film forming gas supply port 131 and an exhaust port 133 are formed on the second space 112 side. An electrode 142 for plasma discharge is arranged on the second space 112 side.
Further, heating means (not shown) for heating the semiconductor substrate 11 as described above may be arranged on the first space 111 side and the second space 112 side. For example, the heating means may be arranged to heat the surface of the semiconductor substrate 11 opposite to the film forming surface through the opening of the double-sided substrate tray 3 .

With such a configuration, the passivation layer forming step, the optical adjustment layer forming step, the first semiconductor layer material film forming step, the lift-off layer forming step, the first semiconductor layer forming step, and the second semiconductor layer material film forming step are performed by: The steps can be performed in sequence without exposing the semiconductor substrate 11 to the atmosphere.

Note that the solar cell manufacturing apparatus includes a plurality of vacuum chambers partitioned for each of the above-described steps, and the semiconductor substrates are removed from the plurality of vacuum chambers without being exposed to the atmosphere, that is, without exposing the semiconductor substrate 11 to the atmosphere. 11 may be relatively moved to sequentially perform the steps described above.

Here, in the conventional method for manufacturing a solar cell, when forming the first conductivity type semiconductor layer,
(A1) forming a material film of a first conductivity type semiconductor layer on the back surface side of a semiconductor substrate (first semiconductor layer material film forming step);
(A2') forming a lift-off layer on the entire surface of the first conductivity type semiconductor layer material film (lift-off layer forming step);
(A3') removing the material film of the lift-off layer and the first-conductivity-type semiconductor layer in the second region using a resist to form a patterned first-conductivity-type semiconductor layer and lift-off layer in the first region; Forming (first semiconductor layer forming step: patterning process: opening to the atmosphere is required to form the resist by a wet process),
(A11) using a resist removing solution to remove the resist (resist removing step: opening to the atmosphere is required to use the resist removing solution);
(A12) cleaning the exposed surface of the semiconductor substrate in the second region using a cleaning liquid (cleaning step: exposure to the atmosphere is required to use the cleaning liquid);
including.

In contrast, according to the solar cell manufacturing method of the present embodiment, when forming the first conductivity type semiconductor layer 25,
(A1) forming a first conductivity type semiconductor layer material film 25Z on the back surface side of the semiconductor substrate 11 (first semiconductor layer material film forming step);
(A2) using a mask 43 to selectively form a lift-off layer 40 on the first conductivity type semiconductor layer material film 25Z in the first region 7 (lift-off layer forming step);
(A3) Using the lift-off layer 40 as a mask, the first conductivity type semiconductor layer material film 25Z in the second region 8 is removed by hydrogen plasma etching, thereby forming a patterned first conductivity in the first region 7. A mold semiconductor layer 25 is formed (first semiconductor layer forming step).
Thus, in the lift-off layer forming step (A2), the lift-off layer 40 is selectively formed on the first conductivity type semiconductor layer material film 25Z in the first region 7 using the mask 43, and (A3) In the first semiconductor layer forming step, using the lift-off layer 40 as a mask, hydrogen plasma etching is performed to remove the first conductivity type semiconductor layer material film 25Z in the second region 8, thereby using the (A3′) mask. Resist formation step (e.g., etching method using photolithography technology, for example, photoresist application by spin coating, photoresist baking, photoresist exposure, and photoresist development), (A11) resist removal step and (A12) washing step can be reduced.
This enables simplification and shortening of the manufacturing process of the solar cell, and as a result, reduction in the cost of the solar cell and improvement in productivity are achieved.

Here, in the conventional method for manufacturing a solar cell,
(A3′) Patterning process (wet process) in the first semiconductor layer forming step
(A11) resist removal step,
(A12) washing step,
, it was necessary to open to the atmosphere.
As a result, foreign matter (contamination, dust) adheres to the surface of the semiconductor substrate, causing pinholes in the passivation layer in the second region to be formed later, and as a result, the performance of the solar cell may be degraded. Conceivable.
In addition, it is conceivable that the semiconductor substrate may be damaged due to handling when exposed to the atmosphere, resulting in deterioration of the performance of the solar cell.

In contrast, according to the solar cell manufacturing method of the present embodiment,
(A1) first semiconductor layer material film forming step, (A2) lift-off layer forming step, (A3) first semiconductor layer forming step and (A4) second semiconductor layer material film forming step are performed in-line without being exposed to the atmosphere. (In line).
As a result, it is possible to prevent contamination (dust) from adhering to the surface of the semiconductor substrate 11 and to prevent deterioration of the performance of the solar cell 1 .
In addition, the semiconductor substrate 11 is not damaged due to handling when exposed to the atmosphere, and deterioration of the performance of the solar cell 1 can be prevented.

In addition, according to the method for manufacturing a solar cell of the present embodiment, the passivation layer forming step (B1) and the optical adjustment layer forming step (B2) before the first semiconductor layer material film forming step are also performed without being exposed to the atmosphere. , can be done in order inline.
As a result, it is possible to prevent contamination (dust) from adhering to the surface of the semiconductor substrate 11 and to prevent deterioration of the performance of the solar cell 1 .
In addition, the semiconductor substrate 11 is not damaged due to handling when exposed to the atmosphere, and deterioration of the performance of the solar cell 1 can be prevented.

Here, as in the conventional art, patterning of the first conductivity type semiconductor layer (first patterning) and patterning of the second conductivity type semiconductor layer (second patterning) are performed using an etching method using photolithography technology. In this case, the mask needs to be aligned twice when forming the resist, and high alignment accuracy is required.

On the other hand, according to the solar cell manufacturing method of the present embodiment, the alignment of the mask is only the alignment of the mask 43 in (A2) the lift-off layer forming step, and the number of times of alignment of the mask is reduced. be.
In the second semiconductor layer material film forming process and the second semiconductor layer forming process, a lift-off method using the lift-off layer 40 is used, in other words, the lift-off layer 40 formed using the mask 43 is used as a mask. Since the second conductivity type semiconductor layer 35 is formed by using the mask 43, the alignment accuracy of the mask 43 may be relatively low.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various changes and modifications are possible. For example, in the above-described embodiment, the first conductivity type semiconductor layer 25 is a p-type semiconductor layer and the second conductivity type semiconductor layer 35 is an n-type semiconductor layer. The second conductivity type semiconductor layer 35 may be replaced with a p-type semiconductor layer.

In the above-described embodiment, the method for manufacturing the heterojunction solar cell 1 as shown in FIG. 2 was exemplified. It is applicable to various solar cell manufacturing methods such as batteries.

Further, in the above-described embodiment, an n-type semiconductor substrate is illustrated as the semiconductor substrate 11, but the semiconductor substrate 11 is a p-type semiconductor obtained by doping a p-type dopant (for example, boron (B) described above) into a crystalline silicon material. It may be a substrate.

Moreover, in the above-described embodiments, a solar cell having a crystalline silicon substrate was exemplified, but the present invention is not limited to this. For example, a solar cell may have a gallium arsenide (GaAs) substrate.

REFERENCE SIGNS LIST 1 solar cell 7 first region 7b, 8b busbar portion 7f, 8f finger portion 8 second region 11 semiconductor substrate 13 passivation layer 15 optical adjustment layer 23 passivation layer 23Z, 33Z passivation layer material film 25 first conductivity type semiconductor layer 25Z 1 conductivity type semiconductor layer material film 27 first electrode layer 28, 38 transparent electrode layer 29, 39 metal electrode layer 33 passivation layer 35 second conductivity type semiconductor layer 35Z second conductivity type semiconductor layer material film 37 second electrode layer 40 lift-off layer (second mask)
43 first mask

Claims (7)

a semiconductor substrate; a first conductivity type semiconductor layer and a first electrode layer laminated in order in a first region which is part of the other main surface side opposite to one main surface side of the semiconductor substrate; A method for manufacturing a back electrode type solar cell comprising a second conductivity type semiconductor layer and a second electrode layer laminated in order in a second region which is another part of the other main surface, the method comprising:
a first semiconductor layer material film forming step of forming a material film of the first conductivity type semiconductor layer on the other main surface side of the semiconductor substrate;
a lift-off layer forming step of selectively forming a lift-off layer on the material film of the first conductivity type semiconductor layer in the first region using a first mask;
By removing the material film of the first conductivity type semiconductor layer in the second region by hydrogen plasma etching using the lift-off layer as a second mask, the patterned first semiconductor layer is formed in the first region. a first semiconductor layer forming step of forming a conductive semiconductor layer;
a second semiconductor layer material film forming step of forming a material film of the second conductivity type semiconductor layer on the lift-off layer in the first region and in the second region;
Etching with an etching solution removes the lift-off layer to remove the material film of the second conductivity type semiconductor layer in the first region, and the patterned second conductivity type semiconductor layer is formed in the second region. a second semiconductor layer forming step of forming a type semiconductor layer;
including
The solar cell further includes a passivation layer on the other main surface side laminated between the semiconductor substrate and the semiconductor layer of the first conductivity type and between the semiconductor substrate and the semiconductor layer of the second conductivity type. prepared,
In the first semiconductor layer material film forming step, before forming the material film of the first conductivity type semiconductor layer, a material film of the passivation layer on the other main surface side of the semiconductor substrate is formed on the other main surface side of the semiconductor substrate. to form
In the first semiconductor layer forming step, the hydrogen plasma etching is performed so as to leave part or all of the material film of the passivation layer on the other main surface side in the second region,
In the second semiconductor layer material film forming step,
In the first semiconductor layer forming step, if a part of the material film of the passivation layer on the other main surface side in the second region remains, before forming the material film of the second conductivity type semiconductor layer, the forming a material film of the passivation layer on the other main surface side on the lift-off layer in the first region and in the second region;
In the step of forming the first semiconductor layer, if the entire material film of the passivation layer on the other main surface side remains in the second region , no material film of the passivation layer on the other main surface side is formed,
In the second semiconductor layer forming step, when the material film of the passivation layer on the other main surface side is formed in the second semiconductor layer material film forming step, the passivation layer on the other main surface side in the first region also removes the material film of
A method for manufacturing a solar cell. 2. The method according to claim 1, wherein said first semiconductor layer material film forming step, said lift-off layer forming step, said first semiconductor layer forming step, and said second semiconductor layer material film forming step are performed in order without being exposed to the atmosphere. A method for manufacturing a solar cell. Before the step of forming the first semiconductor layer material film,
a passivation layer forming step of forming a passivation layer on the one main surface side of the semiconductor substrate;
an optical adjustment layer forming step of forming an optical adjustment layer on the passivation layer on the one main surface side;
including
The passivation layer forming step, the optical adjustment layer forming step, the first semiconductor layer material film forming step, the lift-off layer forming step, the first semiconductor layer forming step, and the second semiconductor layer material film forming step are performed by exposing to the atmosphere. performed in order without
3. A method for manufacturing a solar cell according to claim 2. In the first semiconductor layer material film forming step, the lift-off layer forming step, the first semiconductor layer forming step, and the second semiconductor layer material film forming step, a substrate tray for holding the semiconductor substrate is used,
The substrate tray covers a side surface side of the semiconductor substrate and a peripheral region on the other main surface side of the semiconductor substrate, and exposes the first region and the second region on the other main surface side of the semiconductor substrate. configured to
3. A method of manufacturing a solar cell according to claim 1 or 2. In the passivation layer forming step, the optical adjustment layer forming step, the first semiconductor layer material film forming step, the lift-off layer forming step, the first semiconductor layer forming step, and the second semiconductor layer material film forming step, the semiconductor Using a substrate tray that holds the substrate,
The substrate tray covers a side surface side of the semiconductor substrate and a peripheral region on the other main surface side of the semiconductor substrate, exposes the one main surface side of the semiconductor substrate, and exposes the other main surface of the semiconductor substrate. configured to expose the first region and the second region on the side of
A method for manufacturing a solar cell according to claim 3 . 6. The lift-off layer according to any one of claims 1 to 5, wherein the lift-off layer contains a material containing silicon oxide as a main component and has a refractive index of 1.45 or more and 1.90 or less for light with a wavelength of 632 nm. A method for manufacturing a solar cell. The lift-off layer according to any one of claims 1 to 5, wherein the lift-off layer contains a material containing silicon nitride as a main component and has a refractive index of 1.60 or more and 2.10 or less for light with a wavelength of 632 nm. A method for manufacturing a solar cell.

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