JP7204528B2 - liquid crystal display panel - Google Patents

Description

The present disclosure relates to liquid crystal display panels.

An active matrix drive type liquid crystal display panel includes a TFT substrate on which a pixel electrode and a thin film transistor (TFT) are formed for each pixel, a counter substrate facing the TFT substrate, and between the TFT substrate and the counter substrate. and an arranged liquid crystal layer.

In a liquid crystal display panel, there is a pixel defect (point defect) in which a black point or a bright point occurs in a pixel as a display defect in pixel units. In this case, a desired image cannot be displayed depending on the degree of the pixel defect, and the liquid crystal display panel may be treated as defective. Among pixel defects, a bright spot that causes a pixel to always display white is a particular problem. Therefore, when a bright spot is found in the inspection stage, there is a known technique for converting the pixel that has become the bright spot into a black dot so that it always displays black.

Pixels that are blackened to eliminate pixel defects due to bright spots cannot be driven. Conventionally, one pixel is divided into two sub-pixels, and each of the two sub-pixels is provided with a pixel electrode and a thin film transistor. A technique is known in which the other sub-pixel can be operated normally by turning it into a black dot (dark dot) (for example, Patent Document 1).

JP 2011-191791 A

However, when one pixel is divided into two sub-pixels and each of the two sub-pixels is provided with a pixel electrode and a thin film transistor, the video signal line is led out to connect the video signal line and the two thin film transistors. Since the extraction wiring passes through the pixel, the aperture ratio of the pixel is lowered. In addition, since the lead wires drawn from the video signal lines overlap the pixel electrodes or the scanning lines, the coupling capacitance between the lead wires and the pixel electrodes or the scanning lines degrades the electrical characteristics.

The present disclosure has been made to solve such problems, and even when one pixel is divided into a plurality of sub-pixels and a plurality of transistors are arranged in each sub-pixel, the aperture ratio is It is an object of the present invention to provide a liquid crystal display panel capable of suppressing deterioration of electrical properties and deterioration of electrical properties.

To achieve the above object, one aspect of the liquid crystal display panel according to the present disclosure is a liquid crystal display panel having a plurality of pixels arranged in a matrix, wherein a plurality of pixels extending in the row direction or the column direction are arranged. through one signal line, a first transistor and a second transistor provided in each of the plurality of pixels, and the first transistor and the second transistor provided in each of the plurality of pixels and corresponding to the pixel; and a pixel electrode connected to the first signal line corresponding to the pixel, and in each of the plurality of pixels, the pixel electrode is divided across the first signal line corresponding to the pixel. It has a first pixel electrode and a second pixel electrode, the first transistor and the second transistor are divided across the first signal line corresponding to the pixel, and the first transistor is the second pixel electrode. 1 pixel electrode, and the second transistor is connected to the second pixel electrode.

According to the present disclosure, even when one pixel is divided into a plurality of sub-pixels and a plurality of transistors are arranged in each sub-pixel, a decrease in aperture ratio and deterioration of electrical characteristics can be suppressed. can.

1 is a diagram schematically showing a schematic configuration of a liquid crystal display device according to Embodiment 1; FIG. 2 is a diagram showing a pixel circuit of the liquid crystal display panel according to Embodiment 1; FIG. 2 is a plan view showing a pixel layout of the liquid crystal display panel according to Embodiment 1; FIG. 1 is a cross-sectional view of a liquid crystal display panel according to Embodiment 1; FIG. 3 is a diagram showing a pixel layout of a liquid crystal display panel of Comparative Example 1; FIG. 8 is a diagram showing a pixel layout of a liquid crystal display panel of Comparative Example 2; FIG. FIG. 8 is a plan view showing the layout of pixels of the liquid crystal display panel according to the second embodiment; 8 is a partially enlarged view of a pixel of the liquid crystal display panel according to Embodiment 2; FIG. FIG. 10 is a partially enlarged view showing an example of another pixel of the liquid crystal display panel according to Embodiment 2; FIG. 11 is a plan view showing a pixel layout of a liquid crystal display panel according to a modification of the second embodiment; FIG. 10 is a plan view showing a pixel layout of a liquid crystal display panel according to Modification 1; FIG. 11 is a plan view showing a pixel layout of a liquid crystal display panel according to Modification 2; FIG. 11 is a plan view showing a pixel layout of a liquid crystal display panel according to Modification 3; FIG. 11 is a plan view showing a pixel layout of a liquid crystal display panel according to Modification 4; FIG. 11 is a plan view showing a pixel layout of a liquid crystal display panel according to modification 5;

Embodiments of the present disclosure will be described below. It should be noted that each of the embodiments described below is a specific example of the present disclosure. Therefore, the numerical values, shapes, materials, constituent elements, and arrangement positions and connection forms of the constituent elements shown in the following embodiments are examples and are not intended to limit the present disclosure. Therefore, among the constituent elements in the following embodiments, constituent elements that are not described in independent claims representing the highest concept of the present disclosure will be described as optional constituent elements.

Each figure is a schematic diagram and is not necessarily strictly illustrated. Therefore, the scales and the like are not always the same in each drawing. Moreover, in each figure, the same code|symbol is attached|subjected to the substantially same structure, and the overlapping description is abbreviate|omitted or simplified.

(Embodiment 1)
First, a schematic configuration of a liquid crystal display device 1 according to Embodiment 1 using the liquid crystal display panel 2 will be described with reference to FIGS. 1 and 2. FIG. FIG. 1 is a diagram schematically showing a schematic configuration of a liquid crystal display device 1 according to Embodiment 1. As shown in FIG. FIG. 2 is a diagram showing a pixel circuit of the liquid crystal display panel 2 according to the first embodiment.

The liquid crystal display device 1 is an example of an image display device, and displays still images or moving images (video). As shown in FIG. 1 , the liquid crystal display device 1 includes a liquid crystal display panel 2 , a backlight 3 and an image processing section 4 .

The liquid crystal display panel 2 is arranged on the light exit side of the backlight 3 . The liquid crystal display panel 2 has an image display area (active area) 2a in which an image is displayed. A driving method of the liquid crystal display panel 2 is, for example, a lateral electric field method such as IPS or FFS. In the liquid crystal display panel 2, for example, the voltage is controlled by the normally black method, but the voltage control method is not limited to the normally black method.

As shown in FIGS. 1 and 2, the liquid crystal display panel 2 has a plurality of pixels PX arranged in a matrix. The image display area 2a is composed of a plurality of pixels PX.

As shown in FIG. 2, the liquid crystal display panel 2 includes a pixel electrode 10 provided for each of the plurality of pixels PX, and a first transistor 21 and a second transistor 22 provided for each of the plurality of pixels PX. and an electrode 30 . The liquid crystal display panel 2 includes video signal lines (data lines) 40, which are a plurality of first signal lines extending in the column direction, and a plurality of second signal lines extending in the row direction orthogonal to the column direction. and a certain scanning line (gate line) 50 .

In each of the plurality of pixels PX, the pixel electrode 10 is connected to the video signal line 40 and scanning line 50 corresponding to the pixel PX through the first transistor 21 and the second transistor 22 corresponding to the pixel PX. .

The liquid crystal display panel 2 in the present embodiment is an intra-pixel division type liquid crystal display panel in which one pixel PX is divided into a plurality of sub-pixels (divided pixels). Electrodes and transistors are provided. Specifically, one pixel PX is divided into two pixel regions, a first subpixel SUB1 and a second subpixel SUB2. The first subpixel SUB1 includes a first pixel electrode 11 and a first transistor. 21 is provided, and a second pixel electrode 12 and a second transistor 22 are provided in the second sub-pixel SUB2. The first sub-pixel SUB1 is controlled by the first pixel electrode 11 and the first transistor 21, and the second sub-pixel SUB2 is controlled by the second pixel electrode 12 and the second transistor 22. FIG.

The first transistor 21 and the second transistor 22 in each pixel PX are arranged along the direction in which the scanning line 50 extends. Specifically, the first transistor 21 and the second transistor 22 in each pixel PX are provided at positions overlapping the scanning lines 50 in plan view.

The first transistor 21 is a thin film transistor and has a gate electrode 21G, a source electrode 21S and a drain electrode 21D. Similarly, the second transistor 22 is a thin film transistor and has a gate electrode 22G, a source electrode 22S and a drain electrode 22D. In this specification, the source electrode 21S and the drain electrode 21D may be collectively referred to as a source-drain electrode, and the source-drain electrode means at least one of the source electrode 21S and the drain electrode 21D. and the drain electrode 21D, or both the source electrode 21S and the drain electrode 21D. The same applies to the source electrode 22S and the drain electrode 22D of the second transistor 22 as well.

The common electrode 30 may be provided for each of the plurality of pixels PX, similarly to the pixel electrode 10, or may be provided over the plurality of pixels PX. In this embodiment, the common electrode 30 is provided over all the pixels PX in the image display area 2a. For example, the common electrode 30 is one planar electrode common to all the pixels PX, and is formed over the entire image display region 2a.

Each of the plurality of video signal lines 40 is connected to the source-drain electrodes of the plurality of first transistors 21 and the plurality of second transistors 22 of each of the plurality of pixels PX arranged in the column direction. In the present embodiment, each video signal line 40 is connected to the drain electrode 21D of the source electrode 21S and the drain electrode 21D of the first transistor 21 in each pixel PX, and is connected to the source electrode 22S of the second transistor 22. and the drain electrode 22D among the drain electrodes 22D. That is, in this embodiment, the video signal line 40 is a drain line.

Each of the plurality of scanning lines 50 is connected to the plurality of first transistors 21 and the plurality of second transistors 22 of each of the plurality of pixels PX arranged in the row direction. Specifically, each scanning line 50 is connected to the gate electrode 21G of the first transistor 21 and to the gate electrode 22G of the second transistor 22 in each pixel PX.

As shown in FIG. 1, the liquid crystal display panel 2 has a source driver 5 and a gate driver 6 as liquid crystal display panel driving circuits in order to display an image according to an input video signal. The source driver 5 and the gate driver 6 are driver ICs (IC packages), for example, and are mounted on a flexible wiring board such as FFC (Flexible Flat Cable) or FPC (Flexible Printed Circuit). For example, a flexible wiring board on which the source driver 5 and the gate driver 6 are mounted by COF (Chip on Film) is attached to the electrode terminal of the liquid crystal display panel 2 by thermocompression using an anisotropic conductive film (ACF). is connected with

As shown in FIG. 2, the source driver 5 is connected to a video signal line 40 of the liquid crystal display panel 2. As shown in FIG. The source driver 5 supplies a voltage (data voltage) corresponding to the video signal input from the image processing section 4 to the video signal line 40 in accordance with the selection of the scanning line 50 by the gate driver 6 .

The gate driver 6 is connected to the scanning lines 50 . The gate driver 6 selects the pixel PX to which the video signal is written according to the timing signal input from the image processing unit 4, and applies a voltage (gate-on voltage) that turns on the first transistor 21 and the second transistor 22 of the selected pixel PX. is applied to scan line 50 . Thereby, the data voltage is supplied to the pixel electrode 10 of the selected pixel PX through the first transistor 21 and the second transistor 22 . A gate-on voltage is applied to the first transistor 21 and the second transistor 22 at the same timing, and the same data voltage is supplied. A common voltage is supplied to the common electrode 30 from a common driver (not shown).

Thus, when the gate driver 6 supplies the gate-on voltage to the scanning line 50, the first transistor 21 and the second transistor 22 of the selected pixel PX are turned on. A data voltage is supplied to the pixel electrode 10 from the connected video signal line 40 . Specifically, the data voltage from the video signal line 40 is supplied to the first pixel electrode 11 via the first transistor 21 and to the second pixel electrode 12 via the second transistor 22 . An electric field is generated in the liquid crystal layer due to the difference between the data voltage supplied to the pixel electrodes 10 (the first pixel electrode 11 and the second pixel electrode 12) and the common voltage supplied to the common electrode 30. FIG. This electric field changes the alignment state of the liquid crystal molecules of the liquid crystal layer in each pixel PX, and the transmittance of light from the backlight 3 passing through the liquid crystal display panel 2 is controlled for each pixel PX. A desired image is thereby displayed in the image display area 2 a of the liquid crystal display panel 2 .

The backlight 3 is arranged behind the liquid crystal display panel 2 as shown in FIG. 1 and irradiates the liquid crystal display panel 2 with light. In the present embodiment, the backlight 3 is an LED backlight using an LED (Light Emitting Diode) as a light source, but is not limited to this. The backlight 3 is a direct type LED backlight in which LEDs are arranged two-dimensionally on a substrate so as to face the liquid crystal display panel 2, but may be an edge type. The backlight 3 is a surface emitting unit that irradiates planar uniform scattered light (diffused light). The backlight 3 may have an optical member such as a diffusion plate (diffusion sheet) to diffuse the light from the light source.

The image processing unit 4 is a control device including an arithmetic processing circuit such as a CPU and memories such as ROM and RAM. Video data to be displayed on the liquid crystal display panel 2 is input to the image processing unit 4 . The image processing unit 4 executes various processes by reading out and executing programs stored in the memory by the CPU. Specifically, the image processing unit 4 performs various image signal processing such as color adjustment on video data input from an external system (not shown) to produce an image showing the gradation value of each pixel PX. A signal and a timing signal indicating the timing of writing the video signal to each pixel PX are generated, and the video signal is output to the source driver 5 and the timing signal is output to the gate driver 6 .

Next, a specific structure of the liquid crystal display panel 2 according to Embodiment 1 will be described. First, the layout of the pixels PX of the liquid crystal display panel 2 will be described using FIG. 3 while referring to FIG. FIG. 3 is a plan view showing the layout of the pixels PX of the liquid crystal display panel 2 according to the first embodiment. In FIG. 3, one pixel PX is indicated by a region surrounded by broken lines, and the broken line on the video signal line 40 indicates the boundary between two sub-pixels in one pixel PX. Moreover, when the liquid crystal display panel 2 displays a color image, each of the plurality of pixels PX is one of a red pixel, a green pixel, and a blue pixel. As an example, red pixels, green pixels, and blue pixels are arranged in groups of three repeatedly along the row direction.

As shown in FIG. 3, the plurality of video signal lines 40 extending in the column direction are partially bent in a "<" shape at each pixel PX. In this embodiment, the plurality of video signal lines 40 have the same width. Note that the plurality of video signal lines 40 may be formed in a straight line without being partially bent.

The plurality of scanning lines 50 extending in the row direction are each linear and formed parallel to each other. In this embodiment, the scanning lines 50 have the same width. The width of one scanning line 50 is wider than the width of one video signal line 40 .

The video signal lines 40 and scanning lines 50 are covered with a black matrix BM. That is, above the video signal lines 40 and the scanning lines 50 are non-opening portions.

As described above, each of the plurality of pixels PX has the first sub-pixel SUB1 and the second sub-pixel SUB2 as pixel regions (divided pixels) divided in the row direction with the video signal line 40 interposed therebetween. Therefore, the boundary between the first sub-pixel SUB1 and the second sub-pixel SUB2 overlaps the black matrix BM (non-aperture) that covers the video signal line 40 .

As shown in FIGS. 2 and 3, in each of the plurality of pixels PX, the pixel electrode 10 includes a first pixel electrode 11 and a second pixel electrode 11 divided in the row direction with a video signal line 40 corresponding to the pixel PX interposed therebetween. It has a pixel electrode 12 . That is, in each pixel PX, the first pixel electrode 11 and the second pixel electrode 12 are divided in the row direction with one video signal line 40 corresponding to the pixel PX interposed therebetween.

In addition, in each pixel PX, the first transistor 21 and the second transistor 22 are arranged to sandwich one video signal line 40 corresponding to the pixel PX, similarly to the first pixel electrode 11 and the second pixel electrode 12. divided into directions. That is, the first transistor 21 and the second transistor 22 are provided at positions facing each other with the video signal line 40 interposed therebetween. Specifically, the first transistor 21 and the second transistor 22 are provided at positions that are symmetrical with respect to the video signal line 40 .

The first transistor 21 is connected to the first pixel electrode 11 provided in the first sub-pixel SUB1, and the second transistor 22 is connected to the second pixel electrode 12 provided in the second sub-pixel SUB2. It is Therefore, the first pixel electrode 11 is connected to the video signal line 40 via the first transistor 21 and the second pixel electrode 12 is connected to the video signal line 40 via the second transistor 22 . Note that in the present embodiment, the first pixel electrode 11 and the second pixel electrode 12 are not directly connected.

The liquid crystal driving method of the liquid crystal display panel 2 in the present embodiment is the horizontal electric field method. That is, the first pixel electrode 11 and the second pixel electrode 12 are configured so as to drive the liquid crystal layer with a lateral electric field. Specifically, as shown in FIG. 3, a plurality of slits are formed in each of the first pixel electrodes 11 and the second pixel electrodes 12, and the first pixel electrodes 11 are formed of a plurality of first line electrodes. 11L, and the second pixel electrode 12 has a plurality of second line electrodes 12L.

Both ends of the plurality of first line electrodes 11L are connected by a pair of first connection electrodes 11C. Specifically, the plurality of first line electrodes 11L are connected at one end in the longitudinal direction by a first connecting electrode 11C on one side, and are connected at the other end in the longitudinal direction to the other side. are connected by the first connecting electrode 11C. All the first line electrodes 11L in the first pixel electrodes 11 are formed in parallel. Note that one of the pair of first connecting electrodes 11C may not be provided. In this case, the shape of the first pixel electrode 11 is comb-like.

Each of the first line electrodes 11L has the same width as each other and is formed in a substantially "<" shape with a bent portion in the center. As a result, a multi-domain can be formed in the first sub-pixel SUB1, so that the color viewing angle characteristics of the first sub-pixel SUB1 can be improved. In each first pixel electrode 11, the interval (slit width) between two adjacent first line electrodes 11L is constant.

Similarly, both ends of the plurality of second line electrodes 12L are connected by a pair of second connection electrodes 12C. Specifically, the plurality of second line electrodes 12L are connected at one end in the longitudinal direction by a second connecting electrode 12C on one side, and are connected at the other end in the longitudinal direction to the other side. are connected by the second connecting electrode 12C. All the second line electrodes 12L in the second pixel electrodes 12 are formed in parallel. Note that one of the pair of second connecting electrodes 12C may not be provided. In this case, the shape of the second pixel electrode 12 is comb-like.

Each second line electrode 12L has the same width as each other and is formed in a substantially "<" shape with a bent portion in the center. As a result, a multi-domain can be formed in the second sub-pixel SUB2, so that the color viewing angle characteristics of the second sub-pixel SUB2 can be improved. In each second pixel electrode 12, the interval (slit width) between two adjacent second line electrodes 12L is constant.

Further, in the present embodiment, the first pixel electrode 11 and the second pixel electrode 12 have the same shape. That is, the plurality of first line electrodes 11L and the plurality of second line electrodes 12L are formed in the same pattern. Therefore, the bent portion of the first line electrode 11L and the bent portion of the second line electrode 12L are bent in the same direction. In addition, the bent portion of the first line electrode 11L and the bent portion of the second line electrode 12L are provided at the same position as the bent portion of the video signal line 40 and in the same direction as the bent portion of the video signal line 40. It is bent in the opposite direction.

Further, the first line electrode 11L has a first bent portion 11B with a deeper inclination than the multi-domain bent portion formed in the central portion of the first line electrode 11L. Similarly, the second line electrode 12L has a second bent portion 12B with a deeper inclination than the multi-domain bent portion formed in the central portion of the second line electrode 12L.

Next, the cross-sectional structure of the liquid crystal display panel 2 will be described using FIG. 4 while referring to FIGS. 2 and 3. FIG. FIG. 4 is a cross-sectional view of the liquid crystal display panel 2 taken along line IV-IV of FIG.

As shown in FIG. 4, the liquid crystal display panel 2 includes a first substrate 100, a second substrate 200 facing the first substrate 100, and a liquid crystal layer disposed between the first substrate 100 and the second substrate 200. 300. Although not shown, the liquid crystal layer 300 is sealed between the first substrate 100 and the second substrate 200 by a frame-shaped sealing member.

The first substrate 100 is a TFT substrate having TFTs as the first transistor 21 and the second transistor 22 . Specifically, the first substrate 100 is an active matrix substrate in which a plurality of first transistors 21 and a plurality of second transistors 22 are arranged in a matrix. Further, the first substrate 100 includes not only the first transistor 21 and the second transistor 22, but also various wirings such as the video signal line 40 and the scanning line 50, an interlayer insulating film for insulating between these wirings, the pixel electrode 10, A common electrode 30, an alignment film 60, and the like are provided. These are formed on the first transparent substrate 110 . The first transparent substrate 110 is, for example, a transparent substrate such as a glass substrate.

A first transistor 21 and a second transistor 22 are formed on a first transparent substrate 110 . The first transistor 21 is composed of a gate electrode 21G, a source electrode 21S, a drain electrode 21D, and a semiconductor layer 21SC serving as a channel layer. Similarly, the second transistor 22 is composed of a gate electrode 22G, a source electrode 22S, a drain electrode 22D, and a semiconductor layer 22SC serving as a channel layer. In the present embodiment, the first transistor 21 and the second transistor 22 are TFTs with a bottom gate structure. A first insulating film 121 which is a gate insulating film formed thereon, and semiconductor layers 21SC and 22SC formed above the gate electrodes 21G and 22G with the first insulating film 121 interposed therebetween. The source electrode 21S and the drain electrode 21D are formed on the semiconductor layer 21SC. Also, the source electrode 22S and the drain electrode 22D are formed on the semiconductor layer 22SC.

The gate electrodes 21G and 22G may be composed of, for example, a metal film having a two-layer structure of a molybdenum film and a copper film, or may be composed of a single-layer metal film such as a copper film. The first insulating film 121 may be composed of, for example, an insulating film having a two-layer structure of a silicon oxide film and a silicon nitride film, or may be composed of a single-layer insulating film of a silicon oxide film or a silicon nitride film. may The semiconductor layers 21SC and 22SC may be composed of, for example, a semiconductor film having a two-layer structure of an i-amorphous silicon film and an n-amorphous silicon film, or may be composed of a single-layer semiconductor film. . In the embodiment shown in FIG. 4, two drain electrodes are formed on one semiconductor layer. The source electrodes 21S and 22S and the drain electrodes 21D and 22D may be composed of, for example, a metal film having a two-layer structure of a molybdenum film and a copper film, or may be composed of a single-layer metal film such as a copper film. may be configured.

Materials for the gate electrodes 21G and 22G, the source electrodes 21S and 22S, the drain electrodes 21D and 22D, the semiconductor layers 21SC and 22SC, and the first insulating film 121 are not limited to these. For example, an In--Ga--Zn--O-based oxide semiconductor or the like may be used as the material of the semiconductor layers 21SC and 22SC.

As shown in FIG. 4, video signal lines 40 and scanning lines 50 are formed on the first substrate 100 . The video signal line 40, the source electrodes 21S and 22S, and the drain electrodes 21D and 22D are formed in the same metal layer. That is, the video signal line 40, the source electrodes 21S and 22S, and the drain electrodes 21D and 22D are formed by patterning the same metal film. On the other hand, the scanning line 50 is formed in the same metal layer as the gate electrodes 21G and 22G. That is, the scanning line 50 and the gate electrodes 21G and 22G are formed by patterning the same metal film.

As shown in FIG. 4, in this embodiment, the source electrode 21S of the first transistor 21 is connected to the first pixel electrode 11 through a contact hole. A drain electrode 21</b>D of the first transistor 21 is connected to the video signal line 40 . Similarly, the source electrode 22S of the second transistor 22 is connected to the second pixel electrode 12 through a contact hole. A drain electrode 22</b>D of the second transistor 22 is connected to the video signal line 40 .

A second insulating film 122 is formed on the first transparent substrate 110 so as to cover the first transistor 21 , the second transistor 22 , the video signal lines 40 and the scanning lines 50 . The second insulating film 122 is composed of, for example, an inorganic insulating film made of an inorganic material such as a silicon nitride film. The second insulating film 122, which is an inorganic insulating film, can be formed by, for example, a CVD (chemical vapor deposition) method.

Furthermore, a third insulating film 123 is formed to cover the second insulating film 122 . In this embodiment, the thickness of the third insulating film 123 is thicker than the thickness of the second insulating film 122 . Specifically, the thickness of the third insulating film 123 is four times or more the thickness of the second insulating film 122, and is, for example, 3000 nm. As a result, the distance in the thickness direction between the wiring such as the video signal lines 40 and the scanning lines 50 and the common electrode 30 can be increased. can reduce the binding capacity of Moreover, by increasing the thickness of the third insulating film 123, unevenness of the TFT layer caused by forming the first transistor 21, the second transistor 22, the video signal line 40, and the scanning line 50 is reduced, and the TFT layer is flattened. can also be made into As a result, the third insulating film 123 having a planarized surface can be formed, so that the common electrode 30 directly above the third insulating film 123 can be formed in a flat planar shape.

In this embodiment, the third insulating film 123 is composed of an organic insulating film made of an organic material containing carbon. The third insulating film 123, which is an organic insulating film, can be formed, for example, by applying a liquid organic material and curing it. As a result, the thickness of the third insulating film 123 can be easily increased, so that the surface of the third insulating film 123 can be easily flattened over all the pixels PX. That is, the third insulating film 123 functions as a planarizing layer.

A pixel electrode 10 and a common electrode 30 are formed on the first substrate 100 . Specifically, the pixel electrode 10 and the common electrode 30 are laminated facing each other with the fourth insulating film 124 interposed therebetween.

In this embodiment, the common electrode 30 is formed on the third insulating film 123 . A fourth insulating film 124 is formed to cover the common electrode 30 , and the pixel electrode 10 is formed in a predetermined shape on the fourth insulating film 124 . The pixel electrode 10 and the common electrode 30 are transparent electrodes made of a transparent metal oxide such as indium tin oxide (ITO). Also, the fourth insulating film 124 is composed of, for example, an inorganic insulating film such as a silicon nitride film. The fourth insulating film 124, which is an inorganic insulating film, can be formed by, for example, the CVD method.

As described above, the common electrode 30 is a planar solid electrode formed over all the pixels PX. As a result, since the wirings such as the video signal lines 40 and the scanning lines 50 are covered with the common electrode 30, the electric field generated in the wirings such as the video signal lines 40 and the scanning lines 50 can be shielded by the common electrode 30. In other words, the common electrode 30 can shield the electric field generated in the TFT layer. Therefore, since the degree of freedom in designing the shape and size of the pixel electrode 10 formed on the common electrode 30 is improved, the light transmittance and aperture ratio of the pixel PX can be easily improved.

Note that the common electrode 30 is a flat thin film electrode, but as shown in FIGS. An opening 30 a is formed to connect the electrode 11 and the source electrode 22 S of the second transistor 22 to the second pixel electrode 12 . Therefore, the opening 30 a of the common electrode 30 is provided with a contact hole penetrating through the insulating layers of the three-layer structure of the second insulating film 122 , the third insulating film 123 and the fourth insulating film 124 . Therefore, in each pixel PX, the source electrode 21S of the first transistor 21 and the first pixel electrode 11 are connected via a contact hole, and the source electrode 22S of the second transistor 22 and the second pixel electrode 12 are connected to each other. They are connected through contact holes.

An alignment film 60 is formed on the pixel electrode 10 . The alignment film 60 is formed over the entire surface of the fourth insulating film 124 so as to cover the pixel electrodes 10 . The alignment film 60 is in contact with the liquid crystal layer 300 and controls the initial alignment angle of the liquid crystal molecules of the liquid crystal layer 300 . In this embodiment, the alignment film 60 is subjected to a rubbing treatment in order to align the initial alignment angles of the liquid crystal molecules in a fixed direction.

Although not shown, a plurality of common lines made of a low resistance material such as copper may be provided so as to be in contact with the common electrode 30 . For example, the common line is formed directly above the common electrode 30 . In this case, since the common line made of copper has a light-shielding property, it is preferable to form it so as to overlap the video signal lines 40 or the scanning lines 50 covered with the black matrix BM.

Next, the second substrate 200 will be explained. The second substrate 200 is a counter substrate facing the first substrate 100 . The second substrate 200 has a second transparent base material 210 and a black matrix BM formed on the second transparent base material 210 . The second transparent base material 210 is, for example, a transparent substrate such as a glass substrate, like the first transparent base material 110 .

The black matrix BM is a black light shielding layer, and is made of carbon black, for example. The black matrix BM is formed on the surface of the second transparent substrate 210 on the liquid crystal layer 300 side. In this embodiment, the black matrix BM is formed in a grid pattern so as to cover the video signal lines 40 and the scanning lines 50 . The width of the black matrix BM is larger than the widths of the video signal lines 40 and the scanning lines 50 .

When the liquid crystal display panel 2 displays a color image, the second substrate 200 is a color filter substrate (CF substrate) having color filters. In this case, the plurality of pixels PX are composed of red pixels, green pixels, and blue pixels, and red color filters, blue color filters, and green color filters are provided corresponding to the red pixels, green pixels, and blue pixels, respectively. It is formed. A color filter is formed in the area between the black matrices BM (that is, the opening of the black matrix BM). On the other hand, when the liquid crystal display panel 2 displays a monochrome image, no color filter is formed on the second substrate 200 .

Also, the second substrate 200 has a plurality of spacers 220 . Spacers 220 are formed on the second transparent substrate 210 to protrude toward the first substrate 100 . The spacer 220 is a columnar member for maintaining a constant distance (cell gap) between the first substrate 100 and the second substrate 200 . That is, the thickness of the liquid crystal layer 300 can be kept constant by the spacers 220 . As an example, the spacer 220 has a cylindrical trapezoidal shape. Moreover, the spacer 220 is made of a resin material such as acrylic resin, and can be elastically deformed. The spacers 220 can be patterned, such as by photolithography.

A pair of polarizing plates (not shown) are attached to the liquid crystal display panel 2 configured in this manner. For example, one of the pair of polarizing plates is formed on the outer surface of the first substrate 100 and the other of the pair of polarizing plates is formed on the outer surface of the second substrate 200 . The pair of polarizing plates are arranged so that their polarization directions are orthogonal to each other. A retardation plate may be attached to the pair of polarizing plates.

In the liquid crystal display device 1, the liquid crystal display panel 2 is arranged, for example, so that the first substrate 100 is positioned on the backlight 3 side and the second substrate 200 is positioned on the viewer side. There may be.

Next, the effects and the like of the liquid crystal display panel 2 according to the embodiment will be described with reference to FIGS. FIG. 5 is a diagram showing a pixel layout of the liquid crystal display panel 2X of Comparative Example 1. As shown in FIG. FIG. 6 is a diagram showing a pixel layout of a liquid crystal display panel 2Y of Comparative Example 2. As shown in FIG.

The liquid crystal display panel 2X of Comparative Example 1 shown in FIG. 5 is a multi-domain type horizontal electric field type liquid crystal display panel in which the pixels are not divided.

As shown in FIG. 5, in the horizontal electric field type liquid crystal display panel 2X in which the pixels are not divided, if a bright spot occurs in the pixel as a pixel defect, the liquid crystal display panel may be treated as a defective liquid crystal display panel.

Therefore, a technique has been proposed in which one pixel is divided into two sub-pixels and a pixel electrode and a thin film transistor are provided for each of the two sub-pixels. Specifically, like the liquid crystal display panel 2Y of Comparative Example 2 shown in FIG. 21Y and a second pixel electrode 12Y and a second transistor 22Y in the other of the two sub-pixels, the second sub-pixel SUB2. As a result, when a bright spot occurs in a pixel, the one of the two sub-pixels in which the bright spot occurs is converted to a black spot, so that the one of the two sub-pixels in which the bright spot has not occurred can be normally operated. can be done.

However, when configured like the liquid crystal display panel 2Y of Comparative Example 2 shown in FIG. Since the lead wire 41 (lead wire) passes through the pixel, the aperture ratio of the pixel PX is lowered. Also, if an attempt is made to connect the lead wire 41 drawn from the video signal line 40 to the first transistor 21Y farther from the video signal line 40 of the first transistor 21Y and the second transistor 22Y, the lead wire 41 and the common electrode , and the electrical characteristics deteriorate due to the coupling capacitance between the lead wire 41 and the common electrode.

In this case, it is possible to avoid overlapping with the first pixel electrode 11Y and route the extraction wiring 41 so as to overlap with the scanning line 50. is larger than the coupling capacitance between the common electrode and the video signal line 40 (leading line 41), so the electrical characteristics are further deteriorated.

As a result of intensive studies on such a problem, the present inventors have found that even in a pixel division type horizontal electric field type liquid crystal display panel in which a plurality of transistors are arranged in a pixel, the layout within the pixel is devised. As a result, it has been found that a decrease in aperture ratio and deterioration in electrical characteristics can be suppressed.

Specifically, the liquid crystal display panel 2 in the present embodiment is an intra-pixel division type horizontal electric field type liquid crystal display panel, and as shown in FIG. , and the inside of one pixel PX is divided into a first sub-pixel SUB1 and a second sub-pixel SUB2 with the video signal line 40 as a boundary.

A first pixel electrode 11 and a first transistor 21 provided corresponding to the first sub-pixel SUB1 and a second pixel electrode 12 and a second transistor 22 provided corresponding to the second sub-pixel SUB2 are connected. , are divided in the row direction with the video signal line 40 interposed therebetween. That is, the first pixel electrode 11 and the first transistor 21 are provided on one side of the video signal line 40 in the row direction, and the second pixel electrode 12 and the second transistor 22 are provided on the other side of the video signal line 40 in the row direction. is provided in

With this configuration, each of the first transistor 21 and the second transistor 22 can be connected to the video signal line 40 without drawing a lead wire from the video signal line 40 and extending it uselessly. For example, even if a lead wire is drawn from the video signal line 40 to connect each of the first transistor 21 and the second transistor 22 to the video signal line 40, the lead wire may be connected to the first pixel electrode 11 or the second pixel electrode. There is no need to overlap the electrodes 12 or the scan lines 50 . Alternatively, by using a part of the video signal line 40 as a source-drain electrode, each of the first transistor 21 and the second transistor 22 and the video signal line 40 are connected without drawing wiring from the video signal line 40. can also

As a result, the inside of one pixel PX is divided into the first subpixel SUB1 and the second subpixel SUB2, and the first subpixel SUB1 is provided with the first pixel electrode 11 and the first transistor 21, and the second subpixel SUB2 is provided. Even when the second pixel electrode 12 and the second transistor 22 are provided in the second pixel electrode 12, it is possible to suppress a decrease in aperture ratio and deterioration of electrical characteristics. In other words, even with the intra-pixel division type liquid crystal display panel 2, it is possible to suppress the decrease in the aperture ratio and the deterioration of the electrical characteristics.

Further, in the liquid crystal display panel 2 according to the present embodiment, each pixel PX is provided with a measure against the push domain.

Here, the pressure domain means that when the surface of the liquid crystal display panel is pressed with a finger or the like, the space (cell gap) between the TFT substrate and the counter substrate of the liquid crystal cell partially changes, and the liquid crystal is deformed. A domain generated by rotating a molecule. For example, in the case of a white display screen, the transmitted amount of backlight light is reduced at a location where a push domain occurs, and the screen becomes blackish.

Therefore, in order to suppress such a push domain, in each pixel PX, the first bent portion 11B is formed in the first pixel electrode 11 and the second bent portion is formed in the second pixel electrode 12 as a countermeasure against the push domain. A portion 12B is formed. This can suppress the push domain.

Further, the liquid crystal display panel 2 in the present embodiment is an in-pixel multi-domain type horizontal electric field type liquid crystal display panel. Specifically, a first sub-pixel SUB1 and a second sub-pixel in which one pixel PX is divided by forming a bent portion for multi-domain in each of the first pixel electrode 11 and the second pixel electrode 12 Two domains are formed in each of SUB2.

Thereby, it is possible to realize the liquid crystal display panel 2 having wide viewing angle characteristics and good color viewing angle characteristics.

(Embodiment 2)
Next, Embodiment 2 will be described with reference to FIGS. 7 and 8. FIG. FIG. 7 is a plan view showing the layout of the pixels PX of the liquid crystal display panel 2A used in the liquid crystal display device according to the second embodiment. FIG. 8 is a partial enlarged view of the same liquid crystal display panel 2A, showing an enlarged view of a region A surrounded by broken lines in FIG. In FIG. 7, one pixel PX is indicated by a region surrounded by a dashed trapezoid.

Like the liquid crystal display panel 2 in the first embodiment, the liquid crystal display panel 2A in the present embodiment is an intra-pixel division type liquid crystal display panel, and one pixel PX is divided into a plurality of sub-pixels (divided pixels). split. Specifically, one pixel PX is divided into two pixel regions of a first sub-pixel SUB1 and a second sub-pixel SUB2. In the present embodiment, the first sub-pixel SUB1 and the second sub-pixel SUB2 are separated in the row direction with the video signal line 40 interposed therebetween.

As in the first embodiment, the first sub-pixel SUB1 is provided with the first pixel electrode 11 and the first transistor 21, and the second sub-pixel SUB2 is provided with the second pixel electrode 12 and the second transistor. 22 are provided.

Further, the liquid crystal display panel 2A in the present embodiment is also an intra-pixel multi-domain type liquid crystal display panel, and has a plurality of domains in one pixel PX. Specifically, one pixel PX has a first domain and a second domain.

In this case, in the liquid crystal display panel 2A of this embodiment, the first sub-pixel SUB1 is in the first domain, and the second sub-pixel SUB2 is in the second domain. Therefore, each of the plurality of pixels PX has a first domain (first sub-pixel SUB1) and a second domain (second sub-pixel SUB2) divided in the row direction across the video signal line 40 corresponding to the pixel PX. have. That is, each pixel PX is divided into a first domain D1 and a second domain D2 with the video signal line 40 as a boundary.

Therefore, in the present embodiment, the boundary between the first sub-pixel SUB1 and the second sub-pixel SUB2 overlaps the black matrix BM (non-aperture) covering the video signal line 40, as in the first embodiment. In addition, the boundary between the first domain and the second domain (domain boundary) also overlaps with the black matrix BM (non-aperture) covering the video signal line 40 .

Thus, in the present embodiment, the pixel electrode 10 is provided in the first pixel electrode 11 provided in the first sub-pixel SUB1 which is the first domain and the second pixel electrode 11 provided in the second sub-pixel SUB2 which is the second domain. and a second pixel electrode 12 . That is, the pixel electrode 10 is divided into the first pixel electrode 11 and the second pixel electrode 12 with the video signal line 40 as a boundary. The first domain, the first sub-pixel SUB1, is controlled by the first pixel electrode 11 and the first transistor 21, and the second domain, the second sub-pixel SUB2 is controlled by the second pixel electrode 12 and the second transistor 22. be done.

In this embodiment, the plurality of video signal lines 40 extending in the column direction are each linear and formed parallel to each other. Also in this embodiment, the plurality of video signal lines 40 have the same width.

As shown in FIG. 7, a plurality of slits are formed in each of the first pixel electrode 11 and the second pixel electrode 12 in this embodiment as well. 11 and the pattern of the second pixel electrode 12 are different. Specifically, in the present embodiment, the first pixel electrode 11 has a plurality of first line electrodes 11L extending in a stripe shape in the first direction, and the second pixel electrode 12 has a plurality of first line electrodes 11L extending in the first direction. It has a plurality of second line electrodes 12L extending in a stripe shape in a second direction different from that of the second line electrode 12L.

Each of the plurality of first line electrodes 11L has a strip shape, and is formed in a stripe shape by forming a plurality of slits extending in the first direction in the first pixel electrode 11 . Similarly, each of the plurality of second line electrodes 12L is strip-shaped, and a plurality of slits extending in a second direction different from the first direction are formed in the second pixel electrode 12, It is formed in stripes.

Further, in each pixel PX, the first direction, which is the extending direction of the first line electrodes 11L, and the second direction, which is the extending direction of the second line electrodes 12L, are not in a parallel relationship but in a crossing relationship. It has become. In the present embodiment, the first direction, which is the extending direction of the first line electrodes 11L, and the second direction, which is the extending direction of the second line electrodes 12L, are inclined with respect to the row direction and the column direction. there is

In the present embodiment, the first direction, which is the extending direction of the plurality of first line electrodes 11L, and the second direction, which is the extending direction of the plurality of second line electrodes 12L, are defined in each pixel PX as follows: They are in a line-symmetrical relationship with respect to one video signal line 40 corresponding to the pixel PX. That is, if the angle between the first direction and the column direction that is smaller than 90 degrees is θ, the angle that is smaller than 90 degrees between the second direction and the column direction is also θ. Become.

The plurality of first line electrodes 11L includes a first ladder electrode portion 11L1 having both ends in the longitudinal direction connected in a ladder shape by a pair of first connecting electrodes 11C, and one of the ends in the longitudinal direction being the first connecting electrode. First finger electrode portions 11L2 that are open ends without being connected by the electrodes 11C are included. A pair of first linking electrodes 11</b>C extends along the row direction in the vicinity of the scanning line 50 .

Specifically, the first ladder electrode portion 11L1 is connected at one end in the longitudinal direction by a first connecting electrode 11C on one side, and is connected at the other end in the longitudinal direction by the first connecting electrode 11C on the other side. It is connected by 1 connection electrode 11C.

On the other hand, the first finger electrode portions 11L2 are connected at one end in the longitudinal direction by the first connecting electrode 11C on one side, but the other end in the longitudinal direction is connected to the first connecting electrode 11C on the other side. not connected by

In the present embodiment, more first ladder electrode portions 11L1 are included in the plurality of first line electrodes 11L than among the first ladder electrode portions 11L1 and the first finger electrode portions 11L2. The first finger electrode portion 11L2 is the first line electrode 11L positioned on the video signal line 40 side among the plurality of first line electrodes 11L. In other words, the first finger electrode portion 11L2 is a video signal line when extending from the first connecting electrode 11C on one side of the plurality of first line electrodes 11L toward the first connecting electrode 11C on the other side. 40 is the first line electrode 11L.

Similarly, the plurality of second line electrodes 12L includes a second ladder electrode portion 12L1 having both ends in the longitudinal direction connected in a ladder shape by a pair of second connecting electrodes 12C, and one of the ends in the longitudinal direction. 2nd finger electrode part 12L2 which became an open end without being connected by the 2nd connection electrode 12C is included. The pair of second linking electrodes 12C extends along the row direction in the vicinity of the scanning line 50 .

Specifically, the second ladder electrode portions 12L1 are connected at one end in the longitudinal direction by a second connecting electrode 12C on one side, and are connected at the other end in the longitudinal direction by the second connecting electrode 12C on the other side. They are connected by two connecting electrodes 12C.

On the other hand, the second finger electrode portion 12L2 has one end in the longitudinal direction connected by the second connecting electrode 12C on one side, and the other end in the longitudinal direction is connected by the second connecting electrode 12C on the other side. not concatenated.

In the present embodiment, more second ladder electrode portions 12L1 are included in the plurality of second line electrodes 12L than the second ladder electrode portions 12L1 and the second finger electrode portions 12L2. The second finger electrode portion 12L2 is the second line electrode 12L positioned on the video signal line 40 side among the plurality of second line electrodes 12L. In other words, the second finger electrode portion 12L2 is a video signal line when extending from the second connecting electrode 12C on one side of the plurality of second line electrodes 12L toward the second connecting electrode 12C on the other side. 40 are the second line electrodes 12L.

When viewed from above, in each of the plurality of pixels PX, at least the tip portion of at least one first line electrode 11L among the plurality of first line electrodes 11L and at least the tip portion of the plurality of second line electrodes 12L The tip of one second line electrode 12L overlaps the video signal line 40 corresponding to the pixel PX.

Specifically, as shown in FIGS. 7 and 8, the tip portions of the first finger electrode portions 11L2 among the plurality of first line electrodes 11L are the boundaries between the first pixel electrodes 11 and the second pixel electrodes 12. overlaps with the video signal line 40 located at . In other words, the tip of the first finger electrode portion 11L2 is located at the boundary (domain boundary) between the first domain D1 and the second domain D2, and is located in the black matrix BM (non-opening portion) covering the video signal line 40. overlapping.

Similarly, the tip of the second finger electrode portion 12L2 among the plurality of second line electrodes 12L overlaps the video signal line 40 positioned at the boundary between the first pixel electrode 11 and the second pixel electrode 12. As shown in FIG. In other words, the tip of the second finger electrode portion 12L2 is positioned at the boundary (domain boundary) between the first domain D1 and the second domain D2, and is located in the black matrix BM (non-opening portion) covering the video signal line 40. overlapping.

In this case, in the present embodiment, as shown in FIG. 8, the first line electrode 11L of the first pixel electrode 11 and the second line electrode 12 of the second pixel electrode 12 of each pixel PX are arranged at positions overlapping the video signal lines 40. Although it is not connected to the electrode 12L, it is not limited to this. For example, as shown in FIG. 9, the first line electrode 11L of the first pixel electrode 11 and the second line electrode 12L of the second pixel electrode 12 of each pixel PX are connected at a position overlapping the video signal line 40. may For example, the first finger electrode portion 11L2 of the first pixel electrode 11 and the second finger electrode portion 12L2 of the second pixel electrode 12 may be connected. In FIG. 9, the portion surrounded by the dashed-dotted line is a region in which the liquid crystal molecules are difficult to rotate, and light is difficult to pass through this portion.

Further, as shown in FIG. 7, in the present embodiment, in each pixel PX, all the first line electrodes 11L in the first pixel electrode 11 are linearly formed with the same width and parallel. In the first pixel electrode 11, the interval (slit width) between two adjacent first line electrodes 11L is constant. That is, the pitches of all the first line electrodes 11L are the same.

Similarly, in each pixel PX, all the second line electrodes 12L in the second pixel electrode 12 are formed linearly with the same width and parallel to each other. In the second pixel electrode 12, the interval (slit width) between two adjacent second line electrodes 12L is constant. That is, all the second line electrodes 12L have the same pitch.

Further, in each pixel PX, the first line electrode 11L in the first pixel electrode 11 and the second line electrode 12L in the second pixel electrode 12 have the same width, and the pitch of the first line electrode 11L is equal to the width of the first line electrode 11L. The pitch of the second line electrodes 12L is the same pitch.

Further, as shown in FIG. 7, one pixel PX (pixel on the right side in FIG. 7) of two pixels PX adjacent in the row direction is defined as a first pixel PX1, and two pixels PX adjacent in the row direction are Assuming that the other pixel PX (pixel on the left side in FIG. 7) is a second pixel PX2, the second pixel electrode 12 of the first pixel PX1 and the second pixel PX2 are placed between two adjacent video signal lines 40. A first pixel electrode 11 is provided. That is, between two adjacent video signal lines 40, a plurality of second line electrodes 12L of the first pixels PX1 and a plurality of first line electrodes 11L of the second pixels PX2 are provided.

In this case, the second end electrode 12La positioned closest to the first line electrode 11L of the second pixel PX2 among the plurality of second line electrodes 12L in the first pixel PX1 and the plurality of second line electrodes 12L in the second pixel PX2 The first end electrode 11La located closest to the second line electrode 12L of the first pixel PX1 among the one line electrodes 11L is adjacent.

In the present embodiment, in the first pixel PX1 and the second pixel PX2 that are adjacent to each other in the row direction, the second direction, which is the extending direction of the plurality of second line electrodes 12L in the first pixel PX1, The first direction, which is the extending direction of the plurality of first line electrodes 11L in PX2, is the same direction. That is, in the first pixel PX1 and the second pixel PX2 that are adjacent in the row direction, the plurality of second line electrodes 12L in the first pixel PX1 and the plurality of first line electrodes 11L in the second pixel PX2 parallel. Therefore, the plurality of first line electrodes 11L and the plurality of second line electrodes 12L existing between two adjacent video signal lines 40 are pixel electrodes of different pixels PX but extend in the same direction. It is formed as a continuous pixel electrode.

Note that in the two adjacent pixels PX1 and PX2 in the row direction, the first direction, which is the extending direction of the plurality of first line electrodes 11L in the first pixel PX1, and the plurality of line electrodes 11L in the second pixel PX2 The second direction, which is the extending direction of the second line electrodes 12L, is also the same direction.

Further, in the liquid crystal display panel 2A according to the present embodiment, in each pixel PX, the first pixel electrode 11 is a part of the side of at least one first line electrode 11L among the plurality of first line electrodes 11L. has a first bent portion 11B bent in a direction inclined with respect to the first direction. Further, the second pixel electrode 12 has a second bent portion 12B in which a part of the side of at least one of the second line electrodes 12L among the plurality of second line electrodes 12L is bent in a direction inclined with respect to the second direction. have

The first bent portion 11B has a deeper inclination than the stripe direction (first direction) of the first line electrodes 11L, and has a large inclination angle with respect to the column direction. That is, the first bent portion 11B has a smaller inclination angle with respect to the row direction than the stripe direction (first direction) of the first line electrode 11L.

Similarly, the second bent portion 12B has a deeper inclination than the stripe direction (second direction) of the second line electrode 12L, and has a large inclination angle with respect to the column direction. That is, the second bent portion 12B has a smaller inclination angle with respect to the row direction than the stripe direction (second direction) of the second line electrode 12L.

As shown in FIGS. 7 and 8, the first bent portion 11B of the first pixel electrode 11 is formed at the distal end portion of the first finger electrode portion 11L2, one of which is an open end. ing. In addition, the second bent portion 12B of the second pixel electrode 12 is formed at the distal end portion of the second finger electrode portion 12L2, one of which is an open end.

Then, in each of the plurality of pixels PX, the video signal line 40 corresponding to the pixel PX may overlap with at least one of the first bent portion 11B and the second bent portion 12B. In the present embodiment, both the first bent portion 11B and the second bent portion 12B overlap the video signal line 40 .

Further, in the present embodiment, the first bent portion 11B is formed not only at the tip portion of the first line electrode 11L, which is not connected to the first connection electrode 11C and has an open end at one end, but also at each of both end portions. It is also formed on both ends of the first line electrode 11L connected to the first connecting electrode 11C. In other words, the first bent portion 11B is also formed at the connecting portion (base portion) of the first line electrode 11L with the first connecting electrode 11C.

Similarly, the second bent portion 12B is not only the tip portion of the second line electrode 12L, which is not connected to the second connecting electrode 12C and has an open end at one end, but also both ends of the second line electrode 12C. are also formed at both ends of the second line electrode 12L connected to the . In other words, the second bent portion 12B is also formed at the connection portion (base portion) of the second line electrode 12L with the second connection electrode 12C.

As described above, according to the liquid crystal display panel 2A according to the present embodiment, similarly to the liquid crystal display panel 2 according to the first embodiment, one pixel PX is divided into the first sub-pixel SUB1 and the second sub-pixel SUB2. The first pixel electrode 11 and the first transistor 21 are provided corresponding to the first sub-pixel SUB1, and the second pixel electrode 12 and the second transistor 21 are provided corresponding to the second sub-pixel SUB2. The transistors 22 are divided in the row direction with the video signal line 40 interposed therebetween.

With this configuration, each of the first transistor 21 and the second transistor 22 can be connected to the video signal line 40 without drawing a lead wire from the video signal line 40 and extending it uselessly.

As a result, the inside of one pixel PX is divided into the first subpixel SUB1 and the second subpixel SUB2, and the first subpixel SUB1 is provided with the first pixel electrode 11 and the first transistor 21, and the second subpixel SUB2 is provided. Even when the second pixel electrode 12 and the second transistor 22 are provided in the second pixel electrode 12, it is possible to suppress a decrease in aperture ratio and deterioration of electrical characteristics.

Further, the liquid crystal display panel 2A in the present embodiment is an in-pixel multi-domain type lateral electric field liquid crystal display panel, and in each of the plurality of pixels PX, the pixel electrode 10 extends in a stripe shape in the first direction. A first pixel electrode 11 having a plurality of first line electrodes 11L and a second pixel electrode 12 having a plurality of second line electrodes 12L extending in a stripe shape in a second direction different from the first direction. and

In the liquid crystal display panel 2A of the present embodiment, the first pixel electrode 11 provided in the first sub-pixel SUB1 which is the first domain D1 and the second pixel electrode 12 provided in the second domain D2 are It is divided in the row direction with the video signal line 40 interposed therebetween.

With this configuration, the boundary (domain boundary) between the first domain D1 and the second domain D2 can be overlapped with the black matrix BM (non-opening portion) covering the video signal line 40 (metal layer). As a result, even in the intra-pixel multi-domain type liquid crystal display panel 2A, it is possible to suppress a decrease in the aperture ratio.

In this case, as in the present embodiment, in each of the plurality of pixels PX, the tip portion of at least one of the plurality of first line electrodes 11L and the plurality of second line electrodes 12L The tip of at least one of the second line electrodes 12L may overlap the video signal line 40 corresponding to the pixel PX. In the present embodiment, in each pixel PX, the tip portion of the first finger electrode portion 11L2 among the plurality of first line electrodes 11L and the tip portion of the second finger electrode portion 12L2 among the plurality of second line electrodes 12L part overlaps the video signal line.

With this configuration, even if the pixel electrode 10 is divided into the first pixel electrode 11 and the second pixel electrode 12 with the video signal line 40 as a boundary, the first pixel electrode 11 and the second pixel electrode 12 are formed up to the edge of the video signal line 40 . Since two pixel electrodes 12 can be formed, a decrease in aperture ratio can be suppressed.

In the present embodiment, between two adjacent video signal lines 40, the second pixel electrode 12 of one of two adjacent pixels PX (for example, pixel PX1 in FIG. 7) and the second pixel electrode 12 of two adjacent pixels PX The first pixel electrode 11 of the other pixel PX (for example, pixel PX2 in FIG. 7) of two pixels PX is provided.

This configuration allows a boundary between two adjacent pixels PX to exist between two adjacent video signal lines 40 .

In this case, in two adjacent pixels PX, the plurality of second line electrodes 12L in one pixel PX (for example, the pixel PX1 in FIG. 7) of the othermost pixel PX (for example, the pixel PX2 in FIG. 7) and a second end electrode 12La located on the side of the first line electrode 11L of the other pixel PX, and a second end electrode 12La located on the side of the plurality of second line electrodes 12L of the first pixel PX among the plurality of first line electrodes 11L of the other pixel PX. and the first end electrode 11La adjacent to each other.

With this configuration, the first pixel electrode 11 and the second pixel electrode 12 can be present up to the boundary between two adjacent pixels PX. That is, the boundary between two adjacent pixels PX can be used as an aperture. Thereby, the decrease in the aperture ratio can be further suppressed.

In the present embodiment, in two adjacent pixels PX, the distance between the first end electrode 11La of the other pixel PX and the second end electrode 12La of one pixel PX, and the plurality of first lines The pitch of the electrodes 11L is the same as the pitch of the plurality of second line electrodes 12L.

With this configuration, in two adjacent pixels PX, the pitch of the pixel electrodes 10 can be made uniform not only between the pixels PX but also between the two adjacent pixels PX, thereby further suppressing a decrease in the aperture ratio. be able to.

Note that in two adjacent pixels PX, the first end electrode 11La of the other pixel PX (for example, pixel PX2 in FIG. 7) and the second end electrode 12La of one pixel PX (for example, pixel PX1 in FIG. 7) The interval between them may be larger than the pitch of the plurality of first line electrodes 11L and the pitch of the plurality of second line electrodes 12L.

With this configuration, in two adjacent pixels PX, the pixel electrode 10 of one pixel PX and the pixel electrode 10 of the other pixel PX, which have different potentials, can be kept away from each other, thereby suppressing electric field interference between the pixels. be able to. Thereby, the electrical characteristics can be improved. Also, when the liquid crystal display panel 2A displays a color image, two adjacent pixels PX are pixels of different colors. Therefore, color mixture can be suppressed.

In two adjacent pixels PX, the second direction, which is the extending direction of the plurality of second line electrodes 12L in one pixel PX (for example, the pixel PX1 in FIG. 7), The first direction, which is the extending direction of the plurality of first line electrodes 11L in the pixel PX2), is the same direction.

With this configuration, it is possible to reduce the invalid area existing at the boundary between two adjacent pixels PX, thereby further suppressing the decrease in the aperture ratio.

In addition, in the present embodiment, a plurality of pixels PX are aligned in the entire image display region, and the first transistor 21 and the second transistor 22 of one pixel PX of two adjacent pixels PX and the other Although the first transistor 21 and the second transistor 22 of each pixel PX are provided so as to overlap the same scanning line 50, the present invention is not limited to this.

For example, as shown in FIG. 10, the first transistor 21 and the second transistor 22 of one pixel PX (pixel PX1 on the right side in FIG. 10) of two adjacent pixels PX and the other pixel PX (pixel PX1 on the right side in FIG. 10) The first transistor 21 and the second transistor 22 of the left pixel PX2) may be provided so as to overlap different scanning lines 50. FIG. Specifically, the first transistor 21 and the second transistor 22 of two pixels PX adjacent to each other in the row direction may be provided at positions alternately inverted in the direction in which the video signal line 40 extends for each column. . That is, in FIG. 10, the plurality of pixels PX, the first transistors 21, and the second transistors 22 are arranged in a vertically staggered manner in plan view.

With this configuration, the difference in pixel capacitance between the pixel electrode 10 and the common electrode 30 can be reduced for two pixels PX that are adjacent in the row direction. For example, two pixels PX adjacent to each other in the row direction can have the same pixel capacitance. Thereby, the quality of the display image can be improved. In FIG. 10, one pixel PX is indicated by a region surrounded by a dashed trapezoid.

Further, in the liquid crystal display panel 2A of the present embodiment, in each pixel PX, the first bent portion 11B is formed in the first pixel electrode 11 and the second bent portion 11B is formed in the second pixel electrode 12 as a countermeasure against the push domain. Although the portion 12B is formed, the first bent portion 11B and the second bent portion 12B overlap with the video signal line 40 .

As a result, even if the first bent portion 11B and the second bent portion 12B are formed as a countermeasure against the push domain, it is possible to suppress a decrease in the aperture ratio. That is, it is possible to form the first bent portion 11B and the second bent portion 12B for countermeasures against the push domain without lowering the aperture ratio.

In this case, the first bent portion 11B may be formed on each of both sides of the first line electrode 11L, but as shown in FIG. Of both sides of the electrode 11</b>L, it is formed only on the portion overlapping the video signal line 40 and not formed on the portion not overlapping the video signal line 40 . Similarly, the second bent portion 12B is formed only in the portion overlapping the video signal line 40 among both sides of the second line electrode 12L, and is not formed in the portion not overlapping the video signal line 40. Specifically, the first bent portion 11B is formed at the tip of the first finger electrode 11L2, and the second bent portion 12B is formed at the tip of the second finger electrode 12L2.

As a result, the first bent portion 11B and the second bent portion 12B overlap the video signal lines 40 covered with the black matrix BM, and do not overlap the slit openings. Therefore, even if the first bent portion 11B and the second bent portion 12B are formed as a countermeasure against the push domain, it is possible to effectively suppress the decrease in the aperture ratio.

(Modification)
Although the liquid crystal display panel and the liquid crystal display device according to the present disclosure have been described above based on the embodiments, the present disclosure is not limited to the first and second embodiments.

For example, in Embodiments 1 and 2, one pixel PX is divided into the first sub-pixel SUB1 and the second sub-pixel SUB2 across the video signal line 40, but the present invention is not limited to this. Specifically, one pixel PX may be divided into a first sub-pixel SUB1 and a second sub-pixel SUB2 with the scanning line 50 interposed therebetween. In this case, the first pixel electrode 11 and the first transistor 21 provided in the first sub-pixel SUB1 and the second pixel electrode 12 and the second transistor 22 provided in the second sub-pixel SUB2 are arranged with the scanning line 50 interposed therebetween. will be divided. In this case, in Embodiments 1 and 2, the plurality of first line electrodes 11L of the first pixel electrodes 11 and the plurality of second line electrodes 12L of the second pixel electrodes 12 are used as the entire image display area, Although it mainly extends along the column direction, when the first sub-pixel SUB1 and the second sub-pixel SUB2 are arranged with the scanning line 50 interposed therebetween, the plurality of first lines of the first pixel electrodes 11 The electrodes 11L and the plurality of second line electrodes 12L of the second pixel electrodes 12 preferably extend mainly along the row direction as the entire image display area.

In addition, in Embodiments 1 and 2, an example in which one pixel is divided into two sub-pixels has been described, but the present invention is not limited to this. For example, one pixel may be divided into four sub-pixels as shown in FIGS. 11-15. In FIGS. 11 to 15, one pixel PX is indicated by a region surrounded by dashed lines.

Specifically, in FIGS. 11 to 15, when one pixel PX is divided into four quadrants centered on the intersection of the video signal line 40 and the scanning line 50, each of the four quadrants is divided into first quadrants. They are assigned to the sub-pixel SUB1, the second sub-pixel SUB2, the third sub-pixel SUB3 and the fourth sub-pixel SUB4. A pixel electrode and a transistor are formed in each of the first sub-pixel SUB1, the second sub-pixel SUB2, the third sub-pixel SUB3 and the fourth sub-pixel SUB4. In this way, by increasing the number of divisions of one pixel, it is possible to make black dots less conspicuous in one pixel as a whole when sub-pixels are converted to black dots.

In this case, in the liquid crystal display panel having the pixel layout shown in FIG. 13, since the line electrodes are different for each column, there is a possibility that the aperture ratio and electrical characteristics will differ between the pixels. In contrast, in the liquid crystal display panel having the pixel layouts shown in FIGS. 11 and 12, the pixel layout is the same for each of the plurality of pixels PX, and there is no difference in aperture ratio and electrical characteristics between pixels. .

From another point of view, in the liquid crystal display panel having the pixel layout shown in FIG. 12, the plurality of pixels PX are arranged in a left-right staggered manner in the entire image display area, so that the left-right viewing angle characteristics are different for each row. . On the other hand, in the liquid crystal display panel having the pixel layouts shown in FIGS. 11 and 13, a plurality of pixels PX are arranged in alignment over the entire image display area, so good viewing angle characteristics can be obtained.

Also, as shown in FIG. 15, part of the source-drain electrodes of the transistors of the sub-pixels may be overlapped. Specifically, in FIG. 15, the U-shaped source/drain electrodes of the four sub-pixels are partially overlapped with each other. It should be noted that not only the source/drain electrodes but also portions of the semiconductor layers of the respective sub-pixels may be overlapped. Note that the state in which the source/drain electrodes of the transistors or the semiconductor layers partially overlap with each other is not limited to the state in which they physically overlap with each other. For example, it includes a state in which a source/drain electrode of a transistor or a semiconductor layer is integrally formed. Specifically, when the semiconductor layers forming the respective transistors of the four sub-pixels are formed in the same layer, the number of semiconductor layers may be one.

Further, in Embodiments 1 and 2 and FIGS. 11 to 13, the liquid crystal display panel adopts the horizontal electric field method adopting the multi-domain method. It may be a liquid crystal display panel that is not used. In the first and second embodiments and FIGS. 11 and 13, an intra-pixel multi-domain (one-pixel multi-domain) including a plurality of domains in one pixel is adopted. On the other hand, FIG. 12 employs per-pixel multi-domain (two-pixel multi-domain) with one domain for each of two pixels.

Further, in Embodiments 1 and 2, the first pixel electrode 11 formed in the first sub-pixel SUB1 and the second pixel electrode 12 formed in the second sub-pixel SUB2 were not directly connected. , but not limited to this. For example, one or more bridge electrodes may be formed across the video signal line 40 and the first pixel electrode 11 and the second pixel electrode 12 may be connected by the bridge electrode. In this case, the bridge electrode 13 connecting the first pixel electrode 11 and the second pixel electrode 12 crosses the video signal line 40 three-dimensionally. The bridge electrode may be formed in the same layer as the first pixel electrode 11 and the second pixel electrode 12, or may be formed in a different layer as the first pixel electrode 11 and the second pixel electrode 12. .

In the first and second embodiments, the video signal line 40 and the drain electrode 21D of the first transistor 21 are connected, and the first pixel electrode 11 and the source electrode 21S of the first transistor 21 are connected. is not limited to For example, the video signal line 40 and the source electrode 21S of the first transistor 21 may be connected, and the first pixel electrode 11 and the drain electrode 21D of the first transistor 21 may be connected. As for the second transistor 22, similarly, the video signal line 40 and the source electrode 22S of the second transistor 22 may be connected, and the second pixel electrode 12 and the drain electrode 22D of the second transistor 22 may be connected. .

In addition, forms obtained by applying various modifications that a person skilled in the art can think of to the above-described Embodiments 1 and 2, and arbitrarily combining the components and functions in Embodiments 1 and 2 within the scope of the present disclosure The present disclosure also includes a mode realized by

Reference Signs List 1 liquid crystal display device 2, 2A liquid crystal display panel 2a image display area 3 backlight 4 image processing section 5 source driver 6 gate driver 10 pixel electrode 11 first pixel electrode 11L first line electrode 11L1 first ladder electrode section 11L2 first finger Electrode portion 11La First end electrode 11C First connection electrode 11B First bent portion 12 Second pixel electrode 12L Second line electrode 12L1 Second ladder electrode portion 12L2 Second finger electrode portion 12La Second end electrode 12C Second connection Electrode 12B Second bent portion 21 First transistor 21G Gate electrode 21S Source electrode 21D Drain electrode 21SC Semiconductor layer 22 Second transistor 22G Gate electrode 22S Source electrode 22D Drain electrode 22SC Semiconductor layer 30 Common electrode 30a Opening 40 Video signal line 50 Scanning Line 60 Alignment film 100 First substrate 110 First transparent substrate 121 First insulating film 122 Second insulating film 123 Third insulating film 124 Fourth insulating film 200 Second substrate 210 Second transparent substrate 220 Spacer 300 Liquid crystal layer

Claims (13)

A liquid crystal display panel having a plurality of pixels arranged in a matrix,
a plurality of first signal lines extending in a row direction or a column direction;
a first transistor and a second transistor provided in each of the plurality of pixels;
a pixel electrode provided in each of the plurality of pixels and connected to the first signal line corresponding to the pixel through the first transistor and the second transistor corresponding to the pixel;
In each of the plurality of pixels,
the pixel electrode has a first pixel electrode and a second pixel electrode separated across the first signal line corresponding to the pixel;
the first transistor and the second transistor are separated across the first signal line corresponding to the pixel;
the first transistor is connected to the first pixel electrode;
the second transistor is connected to the second pixel electrode ;
The first pixel electrode has a plurality of first line electrodes extending in a stripe shape in a first direction,
the second pixel electrode has a plurality of second line electrodes extending in a stripe shape in a second direction different from the first direction;
When viewed from above, in each of the plurality of pixels, at least one first line electrode of the plurality of first line electrodes has a leading end portion and at least one of the plurality of second line electrodes has a second line electrode. the tips of the two-line electrodes overlap the first signal lines corresponding to the pixels;
LCD display panel. The first pixel electrode has a first bent portion in which a part of a side of at least one first line electrode among the plurality of first line electrodes is bent in a direction inclined with respect to the first direction. ,
The second pixel electrode has a second bent portion in which a part of a side of at least one second line electrode among the plurality of second line electrodes is bent in a direction inclined with respect to the second direction. ,
When viewed from above, in each of the plurality of pixels, at least one of the first bent portion and the second bent portion overlaps the first signal line corresponding to the pixel.
The liquid crystal display panel according to claim 1. A liquid crystal display panel having a plurality of pixels arranged in a matrix,
a plurality of first signal lines extending in a row direction or a column direction;
a first transistor and a second transistor provided in each of the plurality of pixels;
a pixel electrode provided in each of the plurality of pixels and connected to the first signal line corresponding to the pixel through the first transistor and the second transistor corresponding to the pixel;
In each of the plurality of pixels,
the pixel electrode has a first pixel electrode and a second pixel electrode separated across the first signal line corresponding to the pixel;
the first transistor and the second transistor are separated across the first signal line corresponding to the pixel;
the first transistor is connected to the first pixel electrode;
the second transistor is connected to the second pixel electrode;
The first pixel electrode has a plurality of first line electrodes extending in a stripe shape in a first direction,
the second pixel electrode has a plurality of second line electrodes extending in a stripe shape in a second direction different from the first direction;
The first pixel electrode has a first bent portion in which a part of a side of at least one first line electrode among the plurality of first line electrodes is bent in a direction inclined with respect to the first direction. ,
The second pixel electrode has a second bent portion in which a part of a side of at least one second line electrode among the plurality of second line electrodes is bent in a direction inclined with respect to the second direction. ,
When viewed from above, in each of the plurality of pixels, at least one of the first bent portion and the second bent portion overlaps the first signal line corresponding to the pixel.
LCD display panel. The plurality of first line electrodes include first finger electrode portions having open ends at one end of both ends,
The plurality of second line electrodes include second finger electrode portions having open ends at one end of both ends,
The first bent portion is formed at a tip portion of the first finger electrode,
The second bent portion is formed at the tip of the second finger electrode,
4. The liquid crystal display panel according to claim 2 or 3 . Between the two adjacent first signal lines, the second pixel electrode of one of the two adjacent pixels and the first pixel electrode of the other of the two adjacent pixels are provided. is being
The liquid crystal display panel according to any one of claims 1-4 . a second end electrode positioned closest to the plurality of first line electrodes of the other pixel among the plurality of second line electrodes of the one pixel; the first end electrode located closest to the plurality of second line electrodes of the one pixel among the one line electrodes is adjacent;
The liquid crystal display panel according to claim 5 . the spacing between the first end electrode and the second end electrode is greater than the pitch of the plurality of first line electrodes and the pitch of the plurality of second line electrodes;
The liquid crystal display panel according to claim 6 . The distance between the first end electrode and the second end electrode, the pitch of the plurality of first line electrodes, and the pitch of the plurality of second line electrodes are the same.
The liquid crystal display panel according to claim 6 . The second direction, which is the extending direction of the plurality of second line electrodes in the one pixel, and the first direction, which is the extending direction of the plurality of first line electrodes in the other pixel in the same direction,
The liquid crystal display panel according to any one of claims 5-8 . comprising a plurality of second signal lines extending in a direction orthogonal to the plurality of first signal lines;
Of the two adjacent pixels, the first transistor and the second transistor of one pixel and the first transistor and the second transistor of the other pixel are provided so as to overlap different second signal lines. is being
The liquid crystal display panel according to any one of claims 1-9 . The first signal line is a video signal line connected to the source-drain electrodes of the first transistor and the second transistor,
The liquid crystal display panel according to any one of claims 1-10 . The first signal line is a scanning line connected to gate electrodes of the first transistor and the second transistor,
The liquid crystal display panel according to any one of claims 1-10 . A liquid crystal display panel having a plurality of pixels arranged in a matrix,
a plurality of first signal lines extending in a row direction or a column direction;
a plurality of second signal lines extending in a direction orthogonal to the plurality of first signal lines;
a first transistor and a second transistor provided in each of the plurality of pixels;
a pixel electrode provided in each of the plurality of pixels and connected to the first signal line corresponding to the pixel through the first transistor and the second transistor corresponding to the pixel;
In each of the plurality of pixels,
the pixel electrode has a first pixel electrode and a second pixel electrode separated across the first signal line corresponding to the pixel;
the first transistor and the second transistor are separated across the first signal line corresponding to the pixel;
the first transistor is connected to the first pixel electrode;
the second transistor is connected to the second pixel electrode;
Of the two adjacent pixels, the first transistor and the second transistor of one pixel and the first transistor and the second transistor of the other pixel are provided so as to overlap different second signal lines. is being
LCD display panel.

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