JP7220320B2 - semiconductor equipment - Google Patents

Description

The present invention relates to semiconductor devices.

A flexible display having flexibility has been developed as a display device. For example, a display device is known in which a circuit layer and an organic electroluminescence layer are formed on a flexible resin substrate (Patent Document 1). A flexible resin substrate is manufactured by forming a resin layer on a glass substrate, curing the resin layer, and separating the layer from the glass substrate.

JP 2011-227369 A JP-A-2001-272685 JP-A-11-52417 JP-A-11-24101

An insulating layer and a wiring layer are laminated on the resin substrate, and the flexible display is made easier to bend by removing the insulating layer from the area to be bent. A step is formed by removing a part of the insulating layer. Therefore, when the conductive film is etched when forming the wiring on the insulating layer, the conductive film tends to remain between the adjacent wirings, causing a short circuit.

Japanese Patent Laid-Open No. 2002-200002 discloses that a reflector is placed under the wiring to eliminate the resist residue from the stepped portion in the photolithography process. There is no disclosure of measures to be taken when the conductive film remains.

Although Patent Document 3 discloses forming an opening in an interlayer insulating film, it does not correspond to a structure in which a wiring passes through a stepped portion of a base surface from a lower stage to an upper stage.

Japanese Patent Laid-Open No. 2002-200002 discloses that by forming a convex portion in a thick interlayer insulating film, a resist residue is eliminated when a photoresist formed thereon is exposed to light and washed. There is no disclosure of countermeasures against the conductive film remaining between adjacent wirings.

An object of the present invention is to prevent a short circuit between wirings.

A semiconductor device according to the present invention has a width in a first direction and a length in a second direction orthogonal to the first direction, and has a first region and a second region adjacent to each other in the second direction. a flexible substrate; a circuit layer laminated on the flexible substrate in the first region; A plurality of wirings laminated on the flexible substrate in two regions, and a first inorganic insulating film laminated on the flexible substrate under the plurality of wirings, including a common lowest plane and different heights from each other. a plurality of upper surfaces adjacent to each other in the second direction and a riser surface rising from the upper surfaces excluding the uppermost surface; A base surface of each of the plurality of wirings is in contact with a corresponding one of the plurality of stepped portions in the second region, and the first inorganic insulating film is at least the lowest in each of the plurality of stepped portions. The plurality of upper surfaces excluding surfaces and the riser surface are configured, the semiconductor device further has a recessed portion between the two adjacent stepped portions in the second region, and the lowest surface comprises the In the portion of the recessed portion, the wiring extends toward the first region from the upper surfaces of the plurality of stepped portions excluding the uppermost surfaces, and constitutes the bottom surface of the recessed portion. characterized in that they are separated by recesses.

According to the present invention, even if a conductive film remains in the step portion when forming a plurality of wirings, it is possible to cut off the conduction between the adjacent wirings, thereby preventing a short circuit between the wirings.

A semiconductor device according to the present invention has a width in a first direction and a length in a second direction orthogonal to the first direction, and has a first region and a second region adjacent to each other in the second direction. a flexible substrate; a circuit layer laminated on the flexible substrate in the first region; A plurality of wirings laminated on the flexible substrate in two regions, and a first inorganic insulating film laminated on the flexible substrate under the plurality of wirings, including a common lowest plane and different heights from each other. a plurality of upper surfaces adjacent to each other in the second direction and a riser surface rising from the upper surfaces excluding the uppermost surface; A base surface of each of the plurality of wirings is in contact with a corresponding one of the plurality of stepped portions in the second region, and the first inorganic insulating film is at least the lowest in each of the plurality of stepped portions. The plurality of upper surfaces and the riser surfaces excluding the surface are configured, and the semiconductor devices are lower than the stepped portion of the second region and have different heights and are adjacent to each other in the second direction. and a riser surface rising from the plurality of other upper surfaces, in the second region, between two adjacent staircases and adjacent to each other by the second staircase The plurality of wires are separated.

1 is a schematic plan view of a display device according to an embodiment of the invention; FIG. 1 is a schematic side view of a display device according to an embodiment of the invention; FIG. 2 is an enlarged cross-sectional view of the display device shown in FIG. 1 taken along line III-III. FIG. FIG. 4 is an enlarged plan view of a part of the touch electrodes; It is a figure which shows a 1st pad and a 2nd pad. FIG. 10 is a plan view showing a modification of the touch electrodes; It is a figure which shows the bending state of the display apparatus of embodiment to which this invention is applied. It is a figure which shows the type of usage of the display apparatus of embodiment to which this invention is applied. FIG. 2 is an enlarged view of the portion indicated by IX in FIG. 1; FIG. 10 is a cross-sectional view of the structure shown in FIG. 9 taken along the line XX; FIG. 10 is a cross-sectional view of the structure shown in FIG. 9 taken along the line XI-XI; FIG. 10 is a cross-sectional view of the structure shown in FIG. 9 taken along line XII-XII; It is a figure explaining the manufacturing method of the display apparatus which concerns on embodiment of this invention. It is a figure explaining the manufacturing method of the display apparatus which concerns on embodiment of this invention. It is a figure explaining the manufacturing method of the display apparatus which concerns on embodiment of this invention. It is a figure explaining the manufacturing method of the display apparatus which concerns on embodiment of this invention. It is a figure explaining the manufacturing method of the display apparatus which concerns on embodiment of this invention. FIG. 11 shows a modification of the structure shown in FIG. 10; FIG. 10 is a diagram showing a modification of the structure shown in FIG. 9; FIG. 13 is a diagram showing a modified example 1 of the structure shown in FIG. 12; FIG. 13 is a diagram showing a modified example 2 of the structure shown in FIG. 12;

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in various aspects without departing from the gist thereof, and should not be construed as being limited to the description of the embodiments illustrated below.

In the drawings, in order to make the description clearer, the width, thickness, shape, etc. of each part may be schematically represented compared to the actual embodiment, but this is only an example and limits the interpretation of the present invention. not something to do. In this specification and each drawing, elements having the same functions as those described with respect to the previous drawings may be denoted by the same reference numerals, and redundant description may be omitted.

Furthermore, in the detailed description of the present invention, when defining the positional relationship between one component and another component, the terms “above” and “below” refer only to cases where the component is located directly above or below a certain component. However, unless otherwise specified, it includes the case where other components are interposed between them.

FIG. 1 is a schematic plan view of a display device according to an embodiment of the invention. FIG. 2 is a schematic side view of a display device according to an embodiment of the invention. The display device is an organic electroluminescent display device. The display device combines, for example, unit pixels (sub-pixels) of a plurality of colors of red, green, and blue to form full-color pixels (pixels), and displays a full-color image in the display area DA. there is A flexible printed circuit board FP is connected to the display device. An integrated circuit chip IC for driving elements for displaying images is mounted on the flexible printed circuit board FP.

FIG. 3 is an enlarged cross-sectional view of the display device shown in FIG. 1 taken along the line III-III. The display device has a flexible substrate 10 . The flexible substrate 10 has a width in a first direction D1 shown in FIG. 1 and a length in a second direction D2 perpendicular to the first direction D1. The flexible substrate 10 has a first area A1 including the display area DA. A display circuit layer 12 for displaying an image is laminated on the first area A1. The flexible substrate 10 has a second area A2 adjacent to the first area A1 in the second direction D2.

An undercoat layer 14 made of an inorganic insulating material is formed on the flexible substrate 10 so as to serve as a barrier against impurities, and a semiconductor layer 16 is formed thereon. A source electrode 18 and a drain electrode 20 are electrically connected to the semiconductor layer 16 , and a gate insulating film 22 made of an inorganic insulating material is formed to cover the semiconductor layer 16 . A gate electrode 24 is formed on the gate insulating film 22 , and an interlayer insulating film 26 made of an inorganic insulating material is formed to cover the gate electrode 24 . The source electrode 18 and drain electrode 20 pass through the gate insulating film 22 and the interlayer insulating film 26 . The semiconductor layer 16, the source electrode 18, the drain electrode 20 and the gate electrode 24 constitute at least part of the thin film transistor TFT.

The undercoat layer 14, the gate insulating film 22, and the interlayer insulating film 26 arranged in the first region A1 also reach the second region A2. In the second region A2, the undercoat layer 14, the gate insulating film 22, and the interlayer insulating film 26 are laminated, and if necessary, other inorganic insulating films are added to form a first inorganic insulating film made entirely of an inorganic insulating material. A membrane 28 is constructed. The first inorganic insulating film 28 is composed of a plurality of insulating layers.

In the first region A1, a planarizing layer 30 is provided on the interlayer insulating film 26 so as to cover the thin film transistor TFT. The planarization layer 30 is made of an organic insulating material. The planarization layer 30 is provided in the first area A1 where the display circuit layer 12 is laminated, but is not provided in the second area A2. A second inorganic insulating film 32 interposed between a pair of electrodes constituting a capacitor for holding an image signal is laminated on the planarizing layer 30 . The second inorganic insulating film 32 contacts and overlaps the underlying interlayer insulating film 26 beyond the planarization layer 30 . That is, the planarization layer 30 with high moisture permeability is sandwiched between the second inorganic insulating film 32 and the interlayer insulating film 26 with low moisture permeability, and is blocked from moisture.

A plurality of pixel electrodes 34 (for example, anodes) are provided on the second inorganic insulating film 32 so as to correspond to the plurality of unit pixels. The pixel electrode 34 is one of a pair of electrodes for forming the capacitor described above. The planarizing layer 30 is formed so that at least the surface of the second inorganic insulating film 32 on which the pixel electrodes 34 are provided is planarized. The pixel electrode 34 is electrically connected to one of the source electrode 18 and the drain electrode 20 on the semiconductor layer 16 through the second inorganic insulating film 32 and the planarizing layer 30 .

A bank layer 36 made of an organic insulating material is formed on the second inorganic insulating film 32 and the pixel electrode 34 . The bank layer 36 is placed on the peripheral portion of the pixel electrode 34 and is formed so as to open a portion (for example, the central portion) of the pixel electrode 34 . The bank layer 36 forms a bank surrounding part of the pixel electrode 34 . The pixel electrode 34 is part of the light emitting element 38 . The light emitting element 38 further includes a counter electrode 40 (eg, cathode) facing the plurality of pixel electrodes 34 and a light emitting layer 42 .

The light-emitting layer 42 is provided separately (separately) for each pixel electrode 34 and also placed on the bank layer 36 . In this case, the light-emitting layer 42 emits blue, red, or green light corresponding to each pixel. The color corresponding to each pixel is not limited to this, and may be, for example, yellow or white. The light emitting layer 42 is formed, for example, by vapor deposition. Alternatively, the light emitting layer 42 may be formed on the entire surface covering the display area DA so as to extend over the plurality of pixel electrodes 34 . In other words, the light emitting layer 42 may be formed continuously on the bank layer 36 . In this case, the light-emitting layer 42 is formed by coating with solvent dispersion. When the light-emitting layer 42 is formed over a plurality of pixel electrodes 34, all sub-pixels emit white light, and a desired color wavelength portion is extracted through a color filter (not shown).

At least one of a hole injection layer and a hole transport layer (not shown) is interposed between the pixel electrode 34 and the light emitting layer 42 . The hole injection layer or the hole transport layer may be provided separately for each pixel electrode 34, or may be provided continuously over the entire display area DA shown in FIG. The hole injection layer contacts the pixel electrode 34 and bank layer 36 .

At least one of an electron injection layer and an electron transport layer (not shown) is interposed between the counter electrode 40 and the light emitting layer 42 . The electron injection layer or electron transport layer may be provided separately for each pixel electrode 34, or may be provided continuously over the entire display area DA shown in FIG. The electron injection layer contacts the counter electrode 40 .

The light-emitting layer 42 is sandwiched between the pixel electrode 34 and the counter electrode 40, and emits light with its brightness controlled by the current flowing between them. The counter electrode 40 is made of a metal thin film or the like and has light transmissivity, and transmits light generated in the light emitting layer 42 to display an image. The pixel electrode 34 includes a reflective film that reflects light generated in the light-emitting layer 42 toward the counter electrode 40. The bottom layer of the plurality of layers is the reflective film, and the upper layers are transparent conductive films. good too.

The light emitting element 38 is sealed with a sealing layer 44 to be shielded from moisture. The sealing layer 44 has a structure in which an organic film 48 is sandwiched between a pair of inorganic films 46a and 46b made of an inorganic material such as silicon nitride. At least one of the pair of inorganic films 46a and 46b is provided so as to extend over the bank layer 36, and contacts and overlaps the second inorganic insulating film 32 therebelow. That is, the bank layer 36 with high moisture permeability is blocked from moisture by being sandwiched between at least one of the inorganic films 46a and 46b with low moisture permeability and the second inorganic insulating film 32 . The inorganic films 46a and 46b cover up to the edge of the flattening layer 30 to block moisture and oxygen. Also, since the organic layer 50 is used as a mask when etching the inorganic films 46a and 46b, the ends thereof are aligned with the inorganic films 46a and 46b. As described above, the display circuit layer 12 includes elements for displaying images. A touch electrode 52 for touch sensing is provided on the display circuit layer 12 via the organic layer 50 .

FIG. 4 is an enlarged plan view of a portion of the touch electrode 52. As shown in FIG. The touch electrode 52 has a first pad 54 and a second pad 56 . One of the first pad 54 and the second pad 56 is on the side of transmitting touch sensing signals, and the other is on the side of receiving touch sensing signals. Adjacent first pads 54 or adjacent second pads 56 (first pads 54 in this example) are connected by connection wirings 58 . Adjacent first pads 54 or adjacent second pads 56 (second pads 56 in this example) are connected by jumper wiring 60 .

FIG. 5 is a diagram showing the first pad 54 and the second pad 56. As shown in FIG. The outer shape of each of the first pads 54 and the second pads 56 is diamond-shaped or rectangular. Since the first pad 54 and the second pad 56 are in the same layer, the optical path length becomes equal when the incident external light is reflected, and the difference in reflection is difficult to appear and optically visible. Also, each of the first pads 54 and the second pads 56 is formed in a mesh shape, and the light emitting elements 38 are arranged in the mesh. Therefore, even if the first pad 54 and the second pad 56 are made of metal, light is not blocked. A dummy electrode (not shown) electrically connected to neither of the adjacent first pads 54 and second pads 56 may be arranged. By doing so, the capacitive coupling between the first pad 54 and the second pad 56 can be moderately reduced, and as a result, the capacitive change due to touch can be relatively increased.

As shown in FIG. 3, a touch interlayer insulating film 62 is interposed between the layer forming the first pad 54 and the second pad 56 and the layer forming the jumper wiring 60 . A touch wire 64 is connected to the touch electrode 52 through the touch interlayer insulating film 62 . The touch wiring 64 is provided on the touch interlayer insulating film 62 and is in the same layer as the jumper wiring 60 .

FIG. 6 is a plan view showing a modification of the touch electrodes. In this example, the plurality of first pads 154 and the plurality of second pads 156 are in different layers, with a touch interlayer insulating film interposed therebetween. In this structure, since it is not necessary to open a contact for connecting the jumper wiring, process defects such as poor opening and generation of particles are less likely to occur.

As shown in FIG. 3, in the first area A1, a front lamination film 66 is attached via an adhesive layer 63 so as to cover the touch electrodes 52, and a polarizing plate 68 is attached thereon. The adhesive layer 63 is provided on the touch interlayer insulating film 62, has a thickness enough to flatten the irregularities on the surface of the touch interlayer insulating film 62, and has a flat upper surface. A back lamination film 70 is attached to the back surface of the flexible substrate 10 in the first area A1, and a heat diffusion sheet 72 is attached thereunder. The back lamination film 70 is also attached to the second area A2 at a position overlapping at least the connecting portion with the flexible printed circuit board FP.

A plurality of wirings 74 are laminated on the flexible substrate 10 in the second area A2. A plurality of wirings 74 extend in the second direction D2 from the first region A1. The multiple wirings 74 are arranged in the first direction D1 so as not to be electrically connected to each other (see FIG. 9). The plurality of wirings 74 includes wirings connected to the touch electrodes 52 . For example, the wiring 74 shown in FIG. 3 is connected to the touch wiring 64 . Specifically, in the second region A2, the second inorganic insulating film 32 extends between the touch wires 64 and the wires 74, and the touch wires 64 extend through the openings 32a of the second inorganic insulating film 32. and wiring 74 are electrically connected. A transparent conductive film 75 such as ITO (Indium Tin Oxide) is interposed between the touch electrode 64 and the wiring 74 . The transparent conductive film 75 is formed at the same time as the film forming part of the pixel electrode 34 . An organic insulating film 76 is placed above the second inorganic insulating film 32 . The plurality of wirings 74 are electrically connected to the flexible printed circuit board FP at their ends. Electrical connection is achieved by conductive particles 77a by using an anisotropic conductive film 77, and mechanical connection is achieved by thermosetting resin 77b.

FIG. 7 is a diagram showing a bent state of the display device of the embodiment to which the invention is applied. As shown in FIG. 7, the display device is adapted to be bent. Specifically, the second area A2 of the flexible substrate 10 shown in FIG. 3 (excluding the joint with the flexible printed circuit board FP) is bent. By bending, a part of the display device can be overlapped to reduce the size, and the flexible printed circuit board FP can be arranged on the back side of the display device.

FIG. 8 is a diagram showing how the display device of the embodiment to which the present invention is applied is used. The display device has a body B including a flexible substrate 10 and a display circuit layer 12 and a plurality of wires 74 . A front lamination film 66 and a polarizing plate 68 are provided on the front side of the main body B in the first area A1. Adjacent to these, an organic insulating film 76 is provided in the second region A2. The main body B (flexible substrate 10) bends around an axis AX extending in the first direction D1. A spacer 90 is placed inside the bend to prevent the curvature from becoming too large. A back lamination film 70 is pasted on the back side of the main body B except at least for the bent portion.

FIG. 9 is an enlarged view of the portion indicated by IX in FIG. FIG. 10 is a cross-sectional view of the structure shown in FIG. 9 taken along the line XX. FIG. 11 is a cross-sectional view of the structure shown in FIG. 9 taken along line XI-XI. FIG. 12 is a cross-sectional view of the structure shown in FIG. 9 taken along line XII-XII.

A first inorganic insulating film 28 is provided under the plurality of wirings 74 . In this embodiment, the underlying surface of the plurality of wirings 74 is composed of the flexible substrate 10 and the first inorganic insulating film 28 . The underlying surface composed of the flexible substrate 10 has a region where the first inorganic insulating film 28 does not exist (see FIG. 10). Since the hard first inorganic insulating film 28 is not provided, the flexible substrate 10 can be easily bent.

The underlying surface of the plurality of wirings 74 has a stepped portion ST in the second region A2. A step portion ST is formed when part of the first inorganic insulating film 28 is removed. When the first inorganic insulating film 28 is composed of a plurality of layers, the step portion ST has a plurality of steps. The stepped portion ST includes a plurality of upper surfaces 78 having different heights and adjacent to each other in the second direction D2. A lowest surface 78L of the plurality of upper surfaces 78 is part of the upper surface 78 of the flexible substrate 10 . The staircase portion ST includes risers 80 rising from a plurality of upper surfaces 78 excluding the uppermost surface 78U. The first inorganic insulating film 28 forms at least a plurality of upper surfaces 78 and riser surfaces 80 except for the lowest surface 78L. In the staircase portion ST, an entry corner portion 82 is formed by each of the plurality of upper surfaces 78 excluding the uppermost surface 78U and the riser surface 80 .

Each wiring 74 has a convex portion 84 projecting in a direction facing the adjacent wiring 74 (see FIGS. 9 and 11). The convex portion 84 protrudes in the first direction D1 along the entrance corner portion 82 . A pair of protrusions 84 of adjacent wirings 74 protrude in directions facing each other. The pair of protrusions 84 are spaced apart and electrically insulated (see FIG. 9). The protrusions 84 are etching residues left after etching a conductive film 86 to be described later to form a plurality of wirings 74 .

A second inorganic insulating film 32 is provided on the plurality of wirings 74 . The second inorganic insulating film 32 is provided, at least in the step portion ST, avoiding the region R continuous in the second direction D2 between the adjacent wirings 74 . A region R where the second inorganic insulating film 32 is not provided is a portion removed by etching from the inorganic film 88 described later. In the region R where the second inorganic insulating film 32 is removed, the etching residue of the conductive film 86 existing thereunder is also removed together with the inorganic film 88 (details will be described later). Thereby, a space is formed between the pair of protrusions 84 described above.

The region R avoided by the second inorganic insulating film 32 is limited to the lowest surface 78L of the plurality of upper surfaces 78, and is continuous over the entire length in the second direction D2 between adjacent wirings 74 (see FIG. 9). . The second inorganic insulating film 32 is provided so as to avoid overlapping with at least part of each of the plurality of wirings 74 on the lowest surface 78</b>L of the plurality of upper surfaces 78 . The second inorganic insulating film 32 is provided so as to avoid the region R extending over the entire width in the first direction D1, limited to the lowest surface 78L of the plurality of upper surfaces 78. As shown in FIG.

An organic insulating film 76 is on the second inorganic insulating film 32 . The organic insulating film 76 is in contact with the underlying surface in a region R that is avoided by the second inorganic insulating film 32 . An organic insulating film 76 is interposed between the pair of protrusions 84 to prevent short-circuiting of adjacent wirings 74 .

13 to 17 are diagrams for explaining the manufacturing method of the display device according to the embodiment of the present invention. As shown in FIG. 13, a laminated structure is formed on the flexible substrate 10 up to the first inorganic insulating film 28 . The first inorganic insulating film 28 is composed of a plurality of layers (the undercoat layer 14, the gate insulating film 22, and the interlayer insulating film 26) as shown in FIG. 3, and is patterned by etching using photolithography. The patterned first inorganic insulating film 28 constitutes at least part of the step portion ST, as shown in FIGS.

As shown in FIG. 14, a conductive film 86 is formed on the first inorganic insulating film 28, and as shown in FIG. Patterning is performed by etching using photolithography. A source electrode 18 and a drain electrode 20 are also formed from the conductive film 86 . At this point, since it is difficult for the etchant (for example, an etchant) to enter the entrance corner portion 82 (see FIGS. 9 to 12) of the stepped portion ST on the base surface of the plurality of wirings 74, the conductive film 86 remains. . Therefore, adjacent wirings 74 may be short-circuited.

As shown in FIG. 16, an inorganic film 88 is formed to cover the plurality of wirings 74, and as shown in FIG. 17, the inorganic film 88 is patterned. By patterning, at least in the step portion ST, the inorganic film 88 is removed from the region R continuous in the second direction D2 between the adjacent wirings 74 to form the second inorganic insulating film 32 (see FIG. 9). Continuing with the removal of the inorganic film 88, the conductive film 86 remaining between the adjacent wirings 74 (the portion between the pair of projections 84) is removed (see FIG. 9). By doing so, the conduction between the wirings 74 adjacent to each other can be cut off. Thereafter, the process is self-explanatory from the structure shown in FIG.

FIG. 18 is a diagram showing a modification of the structure shown in FIG. In this example, all of the top surfaces 278 are part of the top surface 278 of the first inorganic insulating film 228 . That is, the first inorganic insulating film 228 exists under the entire wirings 274 .

FIG. 19 is a diagram showing a modification of the structure shown in FIG. In this example, the second inorganic insulating film 332 is provided so as to entirely overlap the plurality of wirings 374 even on the plurality of upper surfaces 378 forming the step portion ST.

FIG. 20 is a diagram showing Modification 1 of the structure shown in FIG. In the example of FIG. 12, the portion of the first inorganic insulating film 28 protruding from the second inorganic insulating film 32 is removed in the process of disconnecting the adjacent wirings 74 . On the other hand, in the example of FIG. 20, the first inorganic insulating film 428 has a portion protruding from the second inorganic insulating film 432 . However, in the process of disconnecting the adjacent wirings 74, the surface layer of the first inorganic insulating film 428 is scraped away from the second inorganic insulating film 432 to form a lower second step portion ST2. have. In this manner, the first inorganic insulating film 428 does not need to completely protrude from the second inorganic insulating film 432 .

FIG. 21 is a diagram showing Modification 2 of the structure shown in FIG. In the example of FIG. 12, the process for cutting the conduction between adjacent wirings 74 is performed by the patterning process of the inorganic film 88 for forming the second inorganic insulating film 32 . On the other hand, in the example of FIG. 21, after disconnecting the adjacent wirings 74, an inorganic film for forming the second inorganic insulating film 532 is formed and patterned. Therefore, the second inorganic insulating film 532 covers the side surfaces of the first inorganic insulating film 528 and extends beyond the periphery thereof. In the example of FIG. 21, the first inorganic insulating film 528 is etched slightly wider than the step portion ST shown in FIG. 10 or FIG. 11, the number of steps is increased by one to form a third stepped portion ST3.

The display device is not limited to an organic electroluminescence display device, and may be a display device having a light emitting element such as a quantum dot light emitting element (QLED: Quantum-Dot Light Emitting Diode) in each pixel. , or a liquid crystal display device.

The present invention is not limited to the above-described embodiments, and various modifications are possible. For example, the configurations described in the embodiments can be replaced with configurations that are substantially the same, configurations that produce the same effects, or configurations that can achieve the same purpose.

10 flexible substrate 12 display circuit layer 14 undercoat layer 16 semiconductor layer 18 source electrode 20 drain electrode 22 gate insulating film 24 gate electrode 26 interlayer insulating film 28 first inorganic insulating film 30 planarization Layer 32 Second inorganic insulating film 32a Opening 34 Pixel electrode 36 Bank layer 38 Light emitting element 40 Counter electrode 42 Light emitting layer 44 Sealing layer 46a Inorganic film 46b Inorganic film 48 Organic film 50 Organic layer 52 Touch electrode 54 First pad 56 Second pad 58 Connection wiring 60 Jumper wiring 62 Touch interlayer insulating film 63 Adhesive layer 64 Touch wiring 66 Front lamination film 68 Polarizing plate 70 Back Lamination film 72 Thermal diffusion sheet 74 Wiring 75 Transparent conductive film 76 Organic insulating film 77 Anisotropic conductive film 77a Conductive particles 77b Thermosetting resin 78 Upper surface 78L Lower surface 78U Uppermost surface 80 Riser surface 82 Entrance corner portion 84 Convex portion 86 Conductive film 88 Inorganic film 90 Spacer 154 First pad 156 Second pad 228 First inorganic insulating film 274 Wiring 278 Upper surface 332 Second inorganic insulating film 374 wiring 378 upper surface 428 first inorganic insulating film 432 second inorganic insulating film 528 first inorganic insulating film 532 second inorganic insulating film A1 first region A2 second region B main body; D1 first direction, D2 second direction, DA display area, FP flexible printed circuit board, IC integrated circuit chip, R area, ST step portion, ST2 second step portion, TFT thin film transistor.

Claims (13)

a flexible substrate having a width in a first direction and a length in a second direction orthogonal to the first direction, and having a first region and a second region adjacent to each other in the second direction;
a circuit layer laminated to the flexible substrate in the first region;
a plurality of wirings extending in the second direction from the first region, arranged in the first direction so as not to be electrically connected to each other, and laminated on the flexible substrate in the second region;
a first inorganic insulating film laminated on the flexible substrate under the plurality of wirings;
In a semiconductor device comprising
A plurality of top surfaces adjacent to each other in the second direction that include a common lowest surface and are different in height from each other, and a plurality of riser surfaces that rise from the plurality of top surfaces excluding the top surface and are aligned in the first direction. The second region further includes a stepped portion of
a base surface of each of the plurality of wirings is in contact with a corresponding one of the plurality of stepped portions in the second region;
the first inorganic insulating film constitutes at least the plurality of upper surfaces and the riser surface excluding the lowest surface in each of the plurality of stepped portions;
The semiconductor device further has a recessed portion between the two stepped portions adjacent to each other in the second region,
the lowest surface extends toward the first region from the plurality of upper surfaces excluding the uppermost surfaces of the plurality of stepped portions in the portion of the recessed portion, and constitutes the bottom surface of the recessed portion;
The semiconductor device, wherein the adjacent wirings are separated by the recess. In the semiconductor device according to claim 1,
the plurality of wirings have a pair of protrusions projecting from the adjacent wirings in directions facing each other in plan view;
A semiconductor device, wherein the pair of protrusions are spaced apart and electrically insulated. In the semiconductor device according to claim 2,
A semiconductor device according to claim 1, wherein the pair of protrusions protrude in the first direction along an entrance corner formed by each of the plurality of upper surfaces excluding the uppermost surface and the riser surface. In the semiconductor device according to any one of claims 1 to 3,
The semiconductor device, wherein the lowest surface of the plurality of upper surfaces is a part of the upper surface of the flexible substrate. In the semiconductor device according to any one of claims 1 to 3,
A semiconductor device, wherein all of the plurality of upper surfaces are part of the upper surface of the first inorganic insulating film. In the semiconductor device according to any one of claims 1 to 5,
further comprising a second inorganic insulating film laminated on the flexible substrate over the plurality of wirings;
The semiconductor device, wherein the second inorganic insulating film is provided to avoid at least the recessed portion. In the semiconductor device according to claim 6,
The semiconductor device, wherein the second inorganic insulating film is provided so as to avoid overlap with at least part of each of the plurality of wirings on the lowest surface of the plurality of upper surfaces. In the semiconductor device according to claim 7,
The semiconductor device, wherein the second inorganic insulating film is provided so as to avoid a region extending over the entire width in the first direction on the lowest surface of the plurality of upper surfaces. In the semiconductor device according to any one of claims 6 to 8,
The semiconductor device, wherein the second inorganic insulating film is provided so as to overlap the entirety of the plurality of wirings on the plurality of upper surfaces except for the lowest surface. In the semiconductor device according to any one of claims 6 to 9,
further comprising an organic insulating film laminated on the flexible substrate on the second inorganic insulating film;
The semiconductor device according to claim 1, wherein the organic insulating film is in contact with the upper surface of the flexible substrate in the recess. In the semiconductor device according to any one of claims 1 to 10,
The first inorganic insulating film is composed of a plurality of insulating layers,
The semiconductor device, wherein the stepped portion is configured to have a plurality of steps. In the semiconductor device according to any one of claims 1 to 11,
The semiconductor device, wherein the flexible substrate is bent around an axis AX extending in the first direction. a flexible substrate having a width in a first direction and a length in a second direction orthogonal to the first direction, and having a first region and a second region adjacent to each other in the second direction;
a circuit layer laminated to the flexible substrate in the first region;
a plurality of wirings extending in the second direction from the first region, arranged in the first direction so as not to be electrically connected to each other, and laminated on the flexible substrate in the second region;
a first inorganic insulating film laminated on the flexible substrate under the plurality of wirings;
In a semiconductor device comprising
A plurality of top surfaces adjacent to each other in the second direction that include a common lowest surface and are different in height from each other, and a plurality of riser surfaces that rise from the plurality of top surfaces excluding the top surface and are aligned in the first direction. The second region further includes a stepped portion of
a base surface of each of the plurality of wirings is in contact with a corresponding one of the plurality of stepped portions in the second region;
the first inorganic insulating film constitutes at least the plurality of upper surfaces and the riser surface excluding the lowest surface in each of the plurality of stepped portions;
The semiconductor device includes a plurality of other upper surfaces that are lower than the stepped portion of the second region and have different heights and are adjacent to each other in the second direction, and a riser surface that rises from the plurality of other upper surfaces. a second staircase portion including
The semiconductor device, wherein the plurality of adjacent wirings are separated by the second step portion.

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