JP7236866B2 - LIN receiver - Google Patents

Description

The present invention relates to a LIN receiver that constitutes a LIN (Local Interconnect Network) transceiver, and more particularly to a receiver that reduces current consumption in a sleep state.

Conventionally, as this type of circuit, various circuits designed to reduce current consumption in a sleep state have been proposed, for example, in Patent Document 1 and Patent Document 2, for example.
In other words, although the circuit disclosed in Patent Document 1 always consumes current in the first stage, the current consumption of the voltage-dividing resistors used to generate the voltage necessary for determining the level of the input voltage is reduced. is possible.
In addition, in the circuit disclosed in Patent Document 2, the current consumption in the sleep state can be suppressed to about the leakage current. It is configured not to have

Japanese Patent No. 4328295 Japanese Patent No. 5449135

However, although various circuit configurations have been proposed in the past, as described above, in a circuit configuration having a voltage dividing resistor for generating the voltage required for level determination, the current consumption during sleep is reduced to the level of leakage current. Nothing made it possible.
In recent years, the reliability demanded of automotive semiconductor circuits has increased, and for this reason, for example, circuits equipped with a low-voltage malfunction prevention function require voltage dividing resistors to generate threshold voltages. become. In addition, the number of electric components used in automobiles is increasing year by year, and along with this trend, the reduction of standby power consumption has become an even more important issue than before.
For this reason, recent LIN receivers are required to be capable of generating a divided voltage using voltage dividing resistors and to reduce current consumption during sleep to the level of leakage current.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a LIN receiver capable of generating a divided voltage using a voltage dividing resistor and reducing current consumption in the sleep state to zero as much as possible. be.

In order to achieve the above object of the present invention, a LIN receiver according to the present invention comprises:
While the circuit operation can be switched between the sleep state and the recovery state according to the level of the LIN input voltage, the voltage corresponding to the recovery of the RXD output is determined based on the result of comparison between the LIN input voltage and the divided voltage of the power supply voltage. A LIN receiver capable of outputting
a constant voltage circuit that is put into an operating state and outputs a constant voltage when the LIN input voltage drops;
a plurality of voltage dividing resistors and a first switch connected in series between a power source that supplies a power source voltage to the constant voltage circuit and a ground;
a hysteresis comparator that compares the divided voltage obtained by the plurality of voltage dividing resistors with the LIN input voltage;
The first switch and the hysteresis comparator are put into an operating state by a constant voltage output from the constant voltage circuit,
the hysteresis comparator, when the LIN input voltage falls below the divided voltage, outputs a voltage corresponding to a logic low value indicating recovery of the RXD output;
The constant voltage circuit starts operating when the LIN input voltage drops below a predetermined voltage, and the predetermined voltage is set higher than the divided voltage.

According to the present invention, unlike the prior art, it is possible to reduce the power consumption in the resistance voltage division by switching the operation based on the threshold voltage of the switch and the transistor without using the current-voltage conversion. This is effective in that it can be set to 0A.
The configuration for reducing current consumption in the present invention can be applied, for example, to the generation of the input hysteresis voltage of the LIN and the generation of the threshold voltage when the low-voltage malfunction prevention function is provided, and a reliable power consumption reduction effect can be achieved. can be expected.
Furthermore, since it can be realized with a small number of elements with a simple circuit configuration, it is possible to reduce the circuit area of the chip in the IC and the mounting area of the substrate.

1 is a circuit diagram showing a first basic circuit configuration example of a LIN receiver according to an embodiment of the present invention; FIG. 2 is a circuit diagram showing a specific circuit configuration example of the first basic circuit configuration example shown in FIG. 1; FIG. FIG. 4 is a circuit diagram showing a second basic circuit configuration example of the LIN receiver according to the embodiment of the present invention; 4 is a circuit diagram showing a specific circuit configuration example of the second basic circuit configuration example shown in FIG. 3; FIG. FIG. 4 is a circuit diagram showing a third basic circuit configuration example of the LIN receiver according to the embodiment of the present invention; 6 is a circuit diagram showing a specific circuit configuration example of the third basic circuit configuration example shown in FIG. 5; FIG.

An embodiment of the present invention will be described below with reference to FIGS. 1 to 6. FIG.
The members, arrangement, etc., described below do not limit the present invention, and can be modified in various ways within the spirit and scope of the present invention.
First, a first basic circuit configuration example will be described with reference to FIG.
The LIN receiver of this first basic circuit configuration example includes a hysteresis comparator (denoted as "X1" in FIG. 1) 11, a constant voltage circuit 50, and a first switch (denoted as "S1" in FIG. ) 21 as main components.

Such a LIN receiver has a sleep/resume function, which will be described later in detail, and is configured to output an RXD output voltage according to the comparison result between the LIN input voltage and the threshold voltage in the hysteresis comparator 11 .
A specific configuration will be described below.
The constant voltage circuit 50 starts operating when the LIN input voltage input via the LIN input terminal (denoted as “LIN” in FIG. 1) 41 drops below a predetermined voltage, and reaches a predetermined constant voltage VREG. is configured to output

The output voltage of the constant voltage circuit 50 is supplied as the power supply voltage of the hysteresis comparator 11 and used as a control signal for controlling the opening/closing of the first switch 21 .
The constant voltage circuit 50 operates with the supply of the battery voltage VB from the battery power supply 43 as the power supply voltage.

Between the battery power supply 43 and the ground, a third resistor ("R3" in FIG. 1) 33 and a fourth resistor ("R4" in FIG. 1) are provided from the battery power supply 43 side. ) 34 and the first switch 21 are connected in series.
A mutual connection point between the third resistor 33 and the fourth resistor 34 is connected to the inverting input terminal of the hysteresis comparator 11 .

The first switch 21 is a single-pole single-throw switch, and its opening/closing state is controlled by the constant voltage output VREG of the constant voltage circuit 50 .
The hysteresis comparator 11 has a non-inverting input terminal to which the LIN input voltage is applied, and an output terminal connected to an RXD output terminal (indicated as "RXD" in FIG. 1) 42. there is
The circuit operation of the LIN receiver having such a configuration will be replaced with the operation explanation of the specific circuit example described below.

Next, a more specific circuit configuration based on the first basic circuit configuration will be described with reference to FIG.
The same components as those shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted, and different points will be mainly described below.
The LIN receiver shown in FIG. 2 includes first and second MOS transistors (represented as "M1" and "M2" in FIG. 1, respectively) 1, 2, a hysteresis comparator 11, and a first Zener It is configured with a diode (denoted as “D1” in FIG. 1) 5 and a first switch 21 as main components.

In this specific circuit example, the constant voltage circuit 50 includes first and second MOS transistors 1 and 2, a first Zener diode 5, and a first resistor (denoted as "R1" in FIG. 1) 31. It consists of
That is, first, in this circuit example, a P-type MOS transistor is used as the first MOS transistor 1, and an N-type MOS transistor is used as the second MOS transistor 2, respectively.

The gate of the first MOS transistor 1 is connected to the LIN input terminal 41 and the non-inverting input terminal of the hysteresis comparator 11, while the source is connected to the positive electrode of the battery power supply 43 via the first resistor 31. . Also, the drain of the first MOS transistor 1 is connected to the gate of the second MOS transistor 2 and the cathode of the first Zener diode 5 . The anode of the first Zener diode 5 is connected to the ground.

The drain of the second MOS transistor 2 is connected to the positive terminal of the battery power supply 43 . The source of the second MOS transistor 2 is connected to a power supply terminal (not shown) of the hysteresis comparator 11 so that the source voltage is supplied to the hysteresis comparator 11 as the power supply voltage.
The source of the second MOS transistor 2 is connected to the control terminal (not shown) of the first switch 21, and the source voltage is used as the control voltage for opening and closing the first switch 21. It's becoming

For the first switch 21, it is preferable to use, for example, a well-known switch circuit configured using MOS transistors.
More specifically, a configuration in which the drain of the NMOS transistor is connected to the fourth resistor 34, the source is connected to the ground, and the gate is connected to the source of the second MOS transistor 2 is preferable.

In such a configuration, it is also preferable to provide a constant current source between the gate and the ground so that the gate voltage becomes a voltage corresponding to the logic value LOW when the NMOS transistor is turned off.
Furthermore, the RXD output voltage output from the hysteresis comparator 11 is preferably configured to be output via a buffer.

Next, operation in such a configuration will be described.
In the LIN receiver configured as described above, when the LIN input voltage at the LIN input terminal 41 drops and falls below the threshold of the gate voltage of the first MOS transistor 1, the first MOS transistor 1 becomes conductive and the first A current flows through the Zener diode 5 .

A current flows through the first Zener diode 5 to generate a Zener voltage, which causes the gate voltage of the second MOS transistor 2 to rise and the source voltage to rise. As a result, the first switch 21 operates to be closed, and the power supply voltage is supplied to the hysteresis comparator 11 to enter the operating state.

As a result, the divided voltage obtained by dividing the battery voltage VB by the third and fourth resistors 33 and 34 is applied to the inverting input terminal of the hysteresis comparator 11, and the LIN input voltage applied to the non-inverting input terminal is applied to the hysteresis comparator 11. A comparison is made with
Then, when the LIN input voltage falls below the threshold voltage of the inverting input terminal, the hysteresis comparator 11 outputs a voltage corresponding to the logic value Low indicating the recovery of the RXD output.

On the other hand, when the LIN input voltage is high, the first MOS transistor 1 does not turn on, so no current flows through the first Zener diode 5 .
Therefore, the gate of the second MOS transistor 2 becomes a voltage level corresponding to the logic value Low due to the internal resistance of the first Zener diode 5, and the second MOS transistor 2 becomes non-conductive.
Therefore, the first switch 21 is opened in a non-operating state, and the power supply to the hysteresis comparator 11 is stopped.

When the first switch 21 is opened, no current flows through the third and fourth resistors 33 and 34, so all current paths from the battery power supply 43 to the ground are cut off in the sleep state. , the current consumption is almost 0A.
In the circuit shown in FIG. 2, since the first Zener diode 5 is for generating a predetermined voltage, it is limited to the first Zener diode 5 as long as it can generate a desired predetermined voltage. For example, a configuration in which a plurality of diodes are connected in series according to a desired voltage may be substituted.

Next, a second basic circuit configuration example will be described with reference to FIG.
The same components as those shown in FIGS. 1 and 2 are denoted by the same reference numerals, detailed descriptions thereof are omitted, and different points are mainly described below.
The LIN receiver in the second basic circuit configuration example includes a hysteresis comparator 11, a constant voltage circuit 50A, and first to fourth switches (in FIG. 3, "S1", "S2", "S3", (denoted as "S4") 21 to 24 are the main constituent elements.
Such a LIN receiver is intended to ensure the safety of circuit operation especially when the battery voltage VB is high and the breakdown voltage of the transistor used is low (details will be described later).

The constant voltage circuit 50A is similar to the constant voltage circuit 50 in FIGS. 1 and 2 in that it can output a predetermined constant voltage VREG, but it is also configured to output a reference voltage VREF. It is different from the constant voltage circuit 50 in that
The constant voltage VREG output from the constant voltage circuit 50A is supplied as a power supply voltage to the hysteresis comparator 11 and used as a control signal for opening/closing the first and second switches 21 and 22. FIG.
The connections between the third and fourth resistors 33 and 34 and the first switch 21 between the battery power supply 43 and the ground are the same as those in the circuits shown in FIGS. A detailed description for the second time will be omitted.

On the other hand, the reference voltage VREF of the constant voltage circuit 50A is used as a control signal for opening and closing the third and fourth switches 23,24.
The third switch 23 is connected in series between the mutual connection point of the third and fourth resistors 33 and 34 and the inverting input terminal of the hysteresis comparator 11 .

Between the LIN input terminal 41 and the ground, from the LIN input terminal 41 side, a sixth resistor ("R6" in FIG. 3) 36 and a seventh resistor ("R7" in FIG. 3) are provided. ”) 37 and the second switch 22 are connected in series.
The fourth switch 24 is connected in series between the mutual connection point of the sixth and seventh resistors 36 and 37 and the non-inverting input terminal of the hysteresis comparator 11 .
The circuit operation of the LIN receiver having such a configuration will be replaced with the operation explanation of the specific circuit example described below.

Next, a more specific circuit configuration based on the second basic circuit configuration will be described with reference to FIG.
1, 2, and 3 are denoted by the same reference numerals, detailed description thereof will be omitted, and different points will be mainly described below. and
The LIN receiver shown in FIG. 4 includes first to fourth MOS transistors (represented as "M1", "M2", "M3", and "M4" in FIG. 4) 1 to 4 and a hysteresis comparator. 11, first and second Zener diodes (represented as "D1" and "D2" respectively in FIG. 4) 5, 6, and first and second switches 21, 22 as main components. It has become a thing.

In the circuit shown in FIG. 4, the constant voltage circuit 50A includes first and second MOS transistors 1 and 2, first and second Zener diodes 21 and 22, and first and fifth resistors ( In FIG. 4, they are configured using 31 and 35, which are denoted as "R1" and "R5", respectively.
The configuration in which the first resistor 31, the first MOS transistor 1, and the first Zener diode 5 are connected in series from the battery power supply 43 side between the positive electrode of the battery power supply 43 and the ground, It is the same as the configuration shown in FIG.

On the gate side of the first MOS transistor 1, between the battery power supply 43 and the LIN input terminal 41, the second Zener diode 6 and the fifth resistor 35 are connected in series from the battery power supply 43 side. A mutual connection point between the second Zener diode 6 and the fifth resistor 35 is connected to the gate of the first MOS transistor 1 .
The second Zener diode 6 has its cathode connected to the positive electrode of the battery power supply 43 and its anode connected to the fifth resistor 35 and the gate of the first MOS transistor 1, respectively.

The second MOS transistor 2 has a drain connected to the battery power supply 43 and a gate connected to the drain of the first MOS transistor 1, similarly to the circuit shown in FIG. The source voltage of the second MOS transistor 2 is supplied as a power supply voltage to the hysteresis comparator 11 as in the circuit shown in FIG. is used as a control voltage for
Also, the connections between the third and fourth resistors 33, 34 and the first switch 21 between the battery power supply 43 and the ground are the same as the circuits shown in FIGS.

In the circuit shown in FIG. 4, the third and fourth MOS transistors 3, 4
uses an NMOS transistor.
The third MOS transistor 3 constitutes the third switch 23 in FIG. 3, and the fourth MOS transistor 4 constitutes the fourth switch 24 in FIG.

The third MOS transistor 3 has a drain connected to the mutual connection point of the third and fourth resistors 33 and 34, a source connected to the inverting input terminal of the hysteresis comparator 11, and a gate connected to the first terminal. It is connected to the cathode of Zener diode 5 .

The fourth MOS transistor 4 has a drain connected to the mutual connection point of the sixth and seventh resistors 36 and 37, a source connected to the non-inverting input terminal of the hysteresis comparator 11, and a gate connected to It is connected to the cathode of the first Zener diode 5 .

As with the first Zener diode 5, the second Zener diode 6 may be replaced with, for example, a structure in which a plurality of normal diodes are connected in series according to a desired voltage.
Also, instead of using the source voltage of the second MOS transistor 2, the drain voltage of the first MOS transistor 1 is used as the control voltage for controlling the opening and closing of the first and second switches 21 and 22. It is preferable to do so.

Next, operation in such a configuration will be described.
First, in the circuit shown in FIG. 4, the third and fourth MOS transistors 3 and 4 protect against the input breakdown voltage of the hysteresis comparator 11 .
That is, the voltage at the mutual connection point of the sixth resistor 36 and the seventh resistor 37, which is the input voltage of the non-inverting input terminal of the hysteresis comparator 11, is passed through the fourth MOS transistor 4 having a high drain-source withstand voltage. Also, the voltage at the mutual connection point between the third resistor 33 and the fourth resistor 34, which is the input voltage of the inverting input terminal of the hysteresis comparator 11, is the voltage of the third MOS transistor 3 having a high drain-source withstand voltage. Withstand voltage protection is achieved by inputting each of them via .

Thus, in the circuit shown in FIG. 4, when the LIN input voltage of the LIN input terminal 41 decreases, the first MOS transistor 1 becomes conductive and current flows through the first Zener diode 5 .
A current flows through the first Zener diode 5 to generate a Zener voltage, which causes the gate voltage of the second MOS transistor 2 to rise and the source voltage to rise. Therefore, the first and second switches 21 and 22 are operated to be closed, and the power supply voltage is supplied to the hysteresis comparator 11 to be in an operating state.

As a result, as described above, the voltage divided by the third and fourth resistors 33 and 34 passes through the third MOS transistor 3 to the voltage divided by the sixth and seventh resistors 36 and 37. are applied to the corresponding input terminals of the hysteresis comparators 11 through the fourth MOS transistors 4 .
Then, when the LIN input voltage falls below the threshold voltage of the inverting input terminal of the hysteresis comparator 11, the hysteresis comparator 11 outputs a voltage corresponding to the logic value Low indicating the recovery of the RXD output.

In the circuit shown in FIG. 4, as in the circuit shown in FIG. 2, when the LIN input voltage is high in the sleep state, the second Zener diode 6 becomes non-operating, and the first and Second MOS transistors 1 and 2 are rendered non-conductive.
As a result, the outputs of the constant voltage VREG and the reference voltage VREF are stopped, the first and second switches 21 and 22 are opened, and the third and fourth MOS transistors 3 and 4 are turned off. Further, the power consumption to the hysteresis comparator 11 is stopped, so that the current consumption becomes almost 0A.

Next, a third basic circuit configuration example and its specific circuit example will be described with reference to FIGS. 5 and 6. FIG.
1 to 4 are denoted by the same reference numerals, detailed description thereof will be omitted, and different points will be mainly described below. and
The LIN receiver in the third basic circuit configuration example is a configuration example that can secure a desired hysteresis characteristic when the hysteresis characteristic of the hysteresis comparator 11 is not sufficient, and the hysteresis characteristic is enhanced.
The third basic circuit configuration example shown in FIG. 5 is obtained by enhancing the hysteresis characteristic in the second basic circuit configuration example shown in FIG.

Specifically, as shown in FIGS. 5 and 6, a normal comparator (denoted as "X2" in FIGS. 5 and 6) 12 is provided instead of the hysteresis comparator 11 (see FIG. 1). 5 and 6), an eighth resistor (labeled "R8" in FIGS. 5 and 6) 38, and a fifth switch (labeled "R8" in FIGS. 5 and 6). 6) 25 is provided as described below.

The inverter 13 has its input terminal connected to the output terminal of the comparator 12 , and its output signal is used as a control voltage for opening and closing the fifth switch 25 .
An eighth resistor 38 and a fifth switch 25 are serially connected in order from the connection point side between the mutual connection point of the sixth and seventh resistors 36 and 37 and the ground. ing.

The circuit operation in such a configuration is the same as the circuit shown in FIG. 4, except for the operation of the fifth switch 25, which will be described below, so detailed description thereof will be omitted.
When the RXD output is at a voltage level corresponding to logic high (sleep state), the output of inverter 13 is at a voltage corresponding to logic low, so fifth switch 25 is open.

On the other hand, when the RXD output reaches the voltage level corresponding to the logic value Low, the output of the inverter 13 becomes the voltage level corresponding to the logic value High, so that the fifth switch 25 is closed. As a result, the eighth resistor 38 is connected in parallel with the seventh resistor 37, and the voltage of the non-inverting input terminal of the hysteresis comparator 11 is lowered, so that the RXD output becomes a voltage corresponding to the logical value High. The actually required LIN input voltage level is raised, and the desired hysteresis characteristic is ensured.

In the circuit shown in FIG. 6, when in the sleep state, the fifth switch 25 is open so that no current flows through the eighth resistor 38, and the rest of the circuit is shown in FIG. The current consumption in the sleep state is almost 0A.

It can be applied to a LIN receiver in which it is desired to reduce the current consumption in the resistance voltage division and to reduce the current consumption in the sleep state to near 0A.

Reference Signs List 11 Hysteresis comparator 12 Comparator 13 Inverter 21 First switch 22 Second switch 23 Third switch 24 Fourth switch 50 Constant voltage circuit

Claims (6)

While the circuit operation can be switched between the sleep state and the recovery state according to the level of the LIN input voltage, the voltage corresponding to the recovery of the RXD output is determined based on the result of comparison between the LIN input voltage and the divided voltage of the power supply voltage. A LIN receiver capable of outputting
a constant voltage circuit that is put into an operating state and outputs a constant voltage when the LIN input voltage drops;
a plurality of voltage dividing resistors and a first switch connected in series between a power source that supplies a power source voltage to the constant voltage circuit and a ground;
a hysteresis comparator that compares the divided voltage obtained by the plurality of voltage dividing resistors with the LIN input voltage;
The first switch and the hysteresis comparator are put into an operating state by a constant voltage output from the constant voltage circuit,
the hysteresis comparator, when the LIN input voltage falls below the divided voltage, outputs a voltage corresponding to a logic low value indicating recovery of the RXD output;
The LIN receiver, wherein the constant voltage circuit starts operating when the LIN input voltage drops below a predetermined voltage, and the predetermined voltage is higher than the divided voltage. The constant voltage circuit includes a first P-type MOS transistor, a second N-type MOS transistor, a first Zener diode, and a first resistor,
The LIN input voltage can be applied to the gate of the first MOS transistor, the source is connected to the power supply through the first resistor, and the drain is the cathode of the first Zener diode and the first MOS transistor. 2 MOS transistors, while the anode of the first Zener diode is connected to ground;
The second MOS transistor has a drain connected to the power supply, and a source voltage serving as the power supply voltage of the hysteresis comparator and serving as a control signal for controlling opening/closing of the first switch. A LIN receiver as claimed in claim 1. While the circuit operation can be switched between the sleep state and the recovery state according to the level of the LIN input voltage, the voltage corresponding to the recovery of the RXD output is determined based on the result of comparison between the LIN input voltage and the divided voltage of the power supply voltage. A LIN receiver capable of outputting
a constant voltage circuit that is put into an operating state when the LIN input voltage drops and outputs two kinds of voltages, a constant voltage and a reference voltage;
third and fourth resistors and a first switch, which are connected in series between a power supply that supplies power supply voltage to the constant voltage circuit and a ground;
sixth and seventh resistors connected in series between a node to which the LIN input voltage is applied and ground, and a second switch;
a hysteresis comparator that compares the voltage divided by the third and fourth resistors and the voltage divided by the sixth and seventh resistors;
a third switch provided between a mutual connection point of the third and fourth resistors and an inverting input terminal of the hysteresis comparator;
a fourth switch provided between a mutual connection point of the sixth and seventh resistors and a non-inverting input terminal of the hysteresis comparator;
The first and second switches and the hysteresis comparator are put into an operating state by a constant voltage output from the constant voltage circuit,
the third and fourth switches are activated by the reference voltage output;
The hysteresis comparator outputs a voltage corresponding to the logic value Low indicating recovery of the RXD output when the voltage of the non-inverting input terminal to which the divided voltage of the LIN input voltage is applied falls below the voltage of the inverting input terminal. A LIN receiver characterized by: While the circuit operation can be switched between the sleep state and the recovery state according to the level of the LIN input voltage, the voltage corresponding to the recovery of the RXD output is determined based on the result of comparison between the LIN input voltage and the divided voltage of the power supply voltage. A LIN receiver capable of outputting
a constant voltage circuit that is put into an operating state when the LIN input voltage drops and outputs two kinds of voltages, a constant voltage and a reference voltage;
third and fourth resistors and a first switch, which are connected in series between a power supply that supplies power supply voltage to the constant voltage circuit and a ground;
sixth and seventh resistors connected in series between a node to which the LIN input voltage is applied and ground, and a second switch;
a comparator that compares the voltage divided by the third and fourth resistors and the voltage divided by the sixth and seventh resistors;
a third switch provided between a mutual connection point of the third and fourth resistors and an inverting input terminal of the comparator;
a fourth switch provided between a mutual connection point of the sixth and seventh resistors and a non-inverting input terminal of the comparator;
an eighth resistor and a fifth switch connected in series between a mutual connection point of the sixth and seventh resistors and ground;
and an inverter that inverts the output of the comparator,
The first and second switches and the comparator are put into an operating state by a constant voltage output from the constant voltage circuit,
the third and fourth switches are activated by the reference voltage output;
the fifth switch is activated by the output of the inverter;
The comparator can operate as a hysteresis comparator by opening and closing the fifth switch. , outputting a voltage corresponding to the logic value Low indicating the recovery of the RXD output. The constant voltage circuit includes a first P-type MOS transistor, a second N-type MOS transistor, first and second Zener diodes, and first and fifth resistors,
The LIN input voltage can be applied to the gate of the first MOS transistor through the fifth resistor, and the anode of the second Zener diode is connected to the gate of the first MOS transistor. One end of a resistor is connected, the other end of the first resistor is connected to the power supply together with the cathode of the second Zener diode, and the drain is connected to the cathode of the first Zener diode and the second The anode of the first Zener diode is connected to the ground while being connected to the gate of the MOS transistor, and the voltage of the cathode of the first Zener diode is used as the reference voltage,
The second MOS transistor has a drain connected to the power supply and a source voltage that is the power supply voltage of the comparator and a control signal that controls opening/closing of the first and second switches. 5. A LIN receiver according to claim 3 or 4, characterized in that: The third switch uses an N-type third MOS transistor, and the fourth switch uses an N-type fourth MOS transistor,
The third MOS transistor has a drain connected to a mutual connection point between the third and fourth resistors, a source connected to an inverting input terminal of the comparator, and a gate connected to the fourth resistor. A reference voltage is applied along with the gates of the MOS transistors of
3. A drain of said fourth MOS transistor is connected to a mutual connection point of said sixth and seventh resistors, and a source thereof is connected to a non-inverting input terminal of said comparator. A LIN receiver according to any one of claims 3 to 5.

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