JP7249586B2 - Manufacturing method of nitride semiconductor device - Google Patents

Description

The technology disclosed in this specification relates to a method for manufacturing a nitride semiconductor device.

Patent Document 1 discloses a technique for forming a p-type region of a nitride semiconductor device.

JP-A-5-183189

When the p-type region is formed by thermal diffusion, the controllability of the diffusion profile of the p-type impurity is lower than that of the ion implantation method, so it is difficult to position the depth and width of the p-type region with high precision. be.

One embodiment of the method for manufacturing a nitride semiconductor device disclosed in this specification includes the step of forming an n-type region containing n-type impurities at a first concentration in a portion of a nitride semiconductor substrate. An impurity introducing step of introducing a p-type impurity into a specific region other than the n-type region from the exposed surface of the nitride semiconductor substrate is provided. The concentration of n-type impurities contained in the specific region is lower than the first concentration. The specified region is in contact with the n-type region. A diffusion step is provided for selectively thermally diffusing the p-type impurity into a specific region without diffusing the n-type impurity in the n-type region. In the diffusion step, diffusion of the p-type impurity is stopped at the interface between the n-type region and the specific region, thereby preventing the p-type impurity from diffusing into the n-type region.

By stopping the diffusion of the p-type impurity at the interface between the n-type region and the specific region, the p-type impurity can be prevented from diffusing into the n-type region. Also, by not diffusing the n-type impurity in the n-type region, the shape of the interface between the n-type region and the specific region can be maintained. That is, the n-type region can function as a region for stopping diffusion of p-type impurities. It becomes possible to position the depth and width of the p-type region with high accuracy.

In the diffusion step, at least a part of the p-type impurity diffusion profile and the hydrogen diffusion profile may have the same shape. Details of the effect will be described in Examples.

In a region where the p-type impurity diffusion profile and the hydrogen diffusion profile have the same shape, the p-type impurity concentration and the hydrogen concentration may be the same. Details of the effect will be described in Examples.

The diffusion step may be performed with hydrogen present in the chamber. Details of the effect will be described in Examples.

The diffusion step may be performed under high pressure near the saturated vapor pressure of the nitride semiconductor substrate. Details of the effect will be described in Examples.

The step of introducing p-type impurities may be performed by ion implantation.

The step of introducing p-type impurities may be performed by solid phase diffusion.

FIG. 4 is a schematic cross-sectional view of SIMS analysis results and a GaN substrate showing a state before thermal diffusion of p-type impurities. FIG. 4 is a schematic cross-sectional view of SIMS analysis results and a GaN substrate showing a state after thermal diffusion of p-type impurities. 4 is a flow chart of a method for manufacturing a nitride semiconductor device; It is a figure which shows the manufacturing process of a nitride semiconductor device. It is a figure which shows the manufacturing process of a nitride semiconductor device. It is a figure which shows the manufacturing process of a nitride semiconductor device. It is a figure which shows the manufacturing process of a nitride semiconductor device.

(P-type impurity diffusion stop function by n ⁺ type region)
The present inventors have found that in a nitride semiconductor, an n ⁺ -type region can function as a region for stopping the diffusion of p-type impurities. Here, the "n ⁺ -type region" is a region having a higher n-type impurity concentration than the "n ^- -type region". It is explained below. In this embodiment, gallium nitride (GaN) is used as the nitride semiconductor, magnesium (Mg) is used as the p-type impurity of the Group II element, and silicon (Si) is used as the n-type impurity.

FIG. 1 shows the state before thermal diffusion of p-type impurities, and FIG. 2 shows the state after thermal diffusion of p-type impurities. FIG. 1A is a concentration profile of each element in the depth direction using a secondary ion mass spectrometry (SIMS) method. The vertical axis of FIG. 1A is the concentration of each element of Mg, hydrogen (H), and Si. The horizontal axis is the depth from the surface 103a of the n ⁻ -type GaN layer 103. FIG. FIG. 1(B) illustrates a structure corresponding to FIG. 1(A). As shown in FIG. 1B, the GaN substrate 100 includes an n-type substrate 101, an n ⁺ -type GaN layer 102, and an n ⁻ -type GaN layer 103. As shown in FIG. The Si concentration of the n ⁺ -type GaN layer 102 is 8×10 ¹⁸ (cm ⁻³ ) or more. The Si concentration of the n ⁻ -type GaN layer 103 is approximately 3×10 ¹⁶ (cm ⁻³ ). The Si concentration of the n ⁻ -type GaN layer 103 is lower than the Si concentration of the n ⁺ -type GaN layer 102 by two orders of magnitude or more. How to determine the Si concentration of the n ⁺ -type GaN layer 102 will be described later. The n ⁺ -type GaN layer 102 and the n ⁻ -type GaN layer 103 are layers epitaxially grown on the n-type substrate 101 . The depth D1 of the interface IF1 between the n ⁻ -type GaN layer 103 and the n ⁺ -type GaN layer 102 from the surface 103a is about 1900 nm. A depth D2 of the interface IF2 between the n ⁺ -type GaN layer 102 and the n-type substrate 101 from the surface 103a is approximately 2200 nm.

As shown in FIG. 1B, the surface 103a of the n ⁻ -type GaN layer 103 is ion-implanted with Mg. In FIG. 1B, the injected Mg is indicated by cross marks. The implantation energy was set so that the implantation depth was 300 nm. The injection amount was 1×10 ¹⁹ (cm ⁻³ ). As a result, the Mg concentration profile P11 has a peak in a region R11 about 300 nm from the surface 103a, and its concentration is 1×10 ¹⁹ (cm ⁻³ ). Note that in FIG. 1B, only the n ⁻ -type GaN layer 103 is obtained for the Si concentration profile P12. Therefore, the Si concentration in the n ⁺ -type GaN layer 102 is not shown in FIG. 1(B).

FIG. 2 shows the state of the GaN substrate 100 of FIG. 1 after annealing. Since the contents of FIG. 2 are the same as those of FIG. 1, the description thereof is omitted. In this example, the GaN substrate 100 was annealed in an inert atmosphere (eg, in an _N2 atmosphere) under a high pressure near the saturated vapor pressure of GaN. Specifically, annealing was performed under the conditions of 1480° C., 1000 MPa, and 15 minutes. By annealing at a high pressure near the saturated vapor pressure of GaN, it is possible to suppress the escape of nitrogen from the surface 103a. It is possible to keep the crystallinity of the n ⁻ -type GaN layer 103 good.

As shown in the Mg concentration profile P21 in FIG. 2A, it can be seen that Mg diffuses in the depth direction (rightward in FIG. 2). Moreover, it can be seen that the Mg concentration is reduced to 1/10 or less with the interface IF1 as a boundary. That is, the diffusion of Mg in the depth direction is stopped by the n ⁺ -type GaN layer 102 . Further, as shown in the region R12 of FIG. 2A, it can be seen that the Mg concentration is constant in the region near the interface IF1 within the n ⁻ -type GaN layer 103 . This is probably because the Mg that could not diffuse toward the n ⁺ -type GaN layer 102 accumulated near the interface IF1, resulting in an increase in the Mg concentration in the region R12.

The Si concentration profile P22 in FIG. 2A has a steeper profile than the Mg concentration profile P21 at the interfaces IF1 and IF2. That is, it can be seen that Si in the n ⁺ -type GaN layer 102 is not diffused by annealing. This is because Si has a property of being difficult to diffuse compared to Mg.

From the above, it can be seen that the diffusion of Mg can be stopped by the n ⁺ -type GaN layer 102 . Also, it can be seen that the profile of the n ⁺ -type GaN layer 102 is not greatly destroyed by annealing by not diffusing Si in the n ⁺ -type GaN layer 102 . Therefore, it can be seen that the n ⁺ -type GaN layer 102 has properties suitable for a diffusion stop layer for stopping the diffusion of Mg at a target position.

In FIG. 2A, the Mg concentration profile P21 and the H concentration profile P23 have the same shape in the region R13 from the depth of 600 nm to the interface IF1. In other words, the Mg concentration and the H concentration are the same in the region R13. That is, it can be seen that hydrogen and Mg are bonded at a ratio of 1:1 and diffused in the n ⁻ -type GaN layer 103 . Hydrogen that bonds with Mg can be supplied from the annealing atmosphere. In this embodiment, hydrogen is supplied to the atmosphere from a minute amount of water present in the annealing chamber.

It is known that the activation of Mg is inhibited when hydrogen is contained in p-type GaN at a very high concentration. For example, p-type GaN grown using cyclopentadienylmagnesium (Cp2Mg) in the metalorganic vapor phase epitaxy (MOVPE) method contains a very high concentration of hydrogen, so activation of Mg is difficult. Therefore, dehydrogenation is required. As described above, the technique described in this specification can make the Mg concentration and the H concentration in p-type GaN comparable. The hydrogen concentration can be made sufficiently low compared to p-type GaN grown by the MOVPE method. Therefore, Mg can be activated without dehydrogenation.

(Diffusion stop mechanism)
The inventors devised the following model for the mechanism by which the p-type impurity diffusion can be stopped in the n ⁺ -type region. It is known that Mg bound to hydrogen tends to diffuse during growth of Mg-doped GaN crystal by MOVPE method or the like. It is also known that hydrogen diffuses in p-type GaN, but is difficult to diffuse in n-type GaN due to the existence of a diffusion barrier. This is because the formation energy of hydrogen increases as the Fermi level moves from the valence band side to the conduction band side at the pn junction edge. Therefore, hydrogen is less likely to be formed in n-type GaN, which acts as a diffusion barrier. This principle is described, for example, in a paper by Lyons et al. (Physical Review Letters 108, “Shallow versus Deep Nature of Mg Acceptors in Nitride Semiconductors”, 156403, 2012).

Whether GaN functions as n-type or p-type depends on the magnitude relationship between the concentrations of n-type impurities (eg Si) and p-type impurities (eg Mg) in GaN. In the ^state before thermal ^diffusion in ^FIG . It exists in the region up to about 1000 nm. The n ⁻ -type GaN layer 103 in the p-type functional region Rp functions as p-type GaN. On the other hand, the n ⁻ -type GaN layer 103 in the n-type functional region Rn functions as n-type GaN. Mg bonds with hydrogen and diffuses in the p-type functional region Rp.

As the diffusion of Mg in the p-type functional region Rp progresses, the Mg concentration at the interface IFa between the p-type functional region Rp and the n-type functional region Rn decreases to the Si concentration of the n ⁻ -type GaN layer 103 (3×10 ¹⁶ ( cm ⁻³ )). Then, as the diffusion of Mg progresses, the interface IFa moves in the depth direction (rightward in FIG. 1). Since the p-type functional region Rp further expands in the depth direction, Mg can bond with hydrogen and diffuse further in the depth direction. It can also be seen from the fact that the Mg concentration profile P21 and the H concentration profile P23 have the same shape in the region R13 of FIG.

Mg diffuses up to the interface IF1 (Fig. 2). The Si concentration (8×10 ¹⁸ (cm ⁻³ )) of the n ⁺ -type GaN layer 102 is sufficiently higher than the Mg concentration at the interface IF1. Therefore, the Mg concentration at interface IF1 cannot exceed the Si concentration of n ⁺ -type GaN layer 102 . As a result, since the n ⁺ -type GaN layer 102 maintains the n-type, hydrogen does not diffuse in the n ⁺ -type GaN layer 102 . Therefore, Mg also does not diffuse in the n ⁺ -type GaN layer 102 . The n ⁺ -type GaN layer 102 functions as a Mg diffusion stop layer.

From the above, the condition for the n ⁺ -type GaN layer to function as a Mg diffusion stop layer is that the Si concentration in the n ⁺ -type GaN layer is higher than the Mg concentration at the interface of the n ⁺ -type GaN layer after annealing is completed. . Specifically, the Mg concentration at the interface of the n ⁺ -type GaN layer after completion of annealing may be roughly estimated based on the Mg injection amount, the Si concentration in the layer into which Mg is diffused, the Mg diffusion distance, and the like. Then, the semiconductor substrate should be designed so that the Si concentration of the n ⁺ -type GaN layer is higher than the approximate value of the Mg concentration.

Note that in FIG. 2A, about 1×10 ¹⁶ to 10 ¹⁷ (cm ⁻³ ) of hydrogen exists in the region R14 ^deeper than the interface IF1. It also seems to spread to the sides. However, since the hydrogen concentration in the region R14 is the ^same as the hydrogen concentration before diffusion as shown in FIG. do not have.

(Manufacturing method of nitride semiconductor device)
An example of a method for manufacturing a nitride semiconductor device using the technique described in this specification will be described. In this embodiment, a method for manufacturing a vertical MOSFET having an n-type JFET region (junction FET region) sandwiched between a pair of body regions below a gate electrode will be described. At step S1 in the flowchart of FIG. 3, a substrate forming process is performed. This step is an example of a step of forming an n ⁺ -type region in a portion of nitride semiconductor substrate 10 . Specifically, as shown in FIG. 4, an n ⁺ -type GaN layer 11 and an n ⁻ -type GaN layer 12 are stacked on a support substrate 9 . The n ⁺ -type GaN layer 11 and the n ⁻ -type GaN layer 12 can be formed by epitaxial growth (eg, HVPE method).

In step S2, a step of introducing Mg, which is a p-type impurity, is performed. As shown in FIG. 5, Mg is ion-implanted from the surface of the nitride semiconductor substrate 10 through a mask 20 covering a region that will become the n-type JFET region. As a result, Mg can be introduced into regions other than the n-type JFET region. In addition, in FIG. 5, the injected Mg is indicated by cross marks. The purpose of this ion implantation is to introduce Mg near the surface of the nitride semiconductor substrate 10, not to convert the entire n ⁻ -type GaN layer 12 to p-type. Therefore, since shallow ion implantation is sufficient, defects caused by implantation can be reduced to an allowable level.

In the ion implantation of Mg, hydrogen and nitrogen may be implanted simultaneously. By co-implanting nitrogen, nitrogen vacancies generated during ion implantation can be reduced. Further, by co-implanting hydrogen, it becomes possible to supply hydrogen that bonds with Mg.

In step S3, a diffusion process is performed. Specifically, annealing is performed in a _N2 atmosphere under a high pressure near the saturated vapor pressure of GaN. An example of annealing conditions is 1400° C., 400 to 1000 MPa for 15 minutes. In the diffusion process, hydrogen is supplied to the annealing atmosphere from a minute amount of water present in the annealing chamber. As a result, Mg bonds with hydrogen and diffuses in the n ⁻ -type GaN layer 12 . Diffusion of Mg stops at the n ⁺ -type GaN layer 11 . At this time, Mg can be diffused anisotropically in the depth direction. Therefore, as shown in FIG. 6, an n-type JFET region 12b and a p-type body region 12a can be formed.

The reason why Mg diffuses anisotropically in the depth direction will be explained. The Mg diffusion itself is isotropic. However, the thickness T1 (about 1 μm) of the n ⁻ -type GaN layer 12 is sufficiently smaller than the width W1 (several tens of μm) of the p-type body region 12a. Considering such an aspect ratio, diffusion in the lateral direction (horizontal direction in FIG. 6) can be neglected, so Mg can be diffused substantially anisotropically in the depth direction.

In step S4, dehydrogenation annealing is performed. Note that the dehydrogenation annealing can be omitted in this embodiment. Explain why. When the p-type GaN layer is formed by the MOVPE method in the prior art, Cp2Mg is used to add Mg, which is a p-type impurity. Then, since the p-type GaN layer contains hydrogen at a very high concentration, dehydrogenation is required to activate Mg. However, with the techniques described herein, n ^- type GaN can be converted to p-type GaN by thermal diffusion. Therefore, the portion where p-type GaN is arranged can be made of n ⁻ -type GaN. The n ^- type GaN can be produced by a growth method (eg, hydride vapor phase epitaxy (HVPE method)) that results in a lower hydrogen content than the MOVPE method. Thus, p-type GaN made with the techniques described herein can eliminate the need for a dehydrogenation step.

In step S5, a process of forming a source region is performed. Specifically, a mask having openings corresponding to the source regions 13 and 14 is processed using a well-known photolithographic technique and dry etching process. Silicon is ion-implanted into the p-type body region 12a through a mask. Activation annealing is then performed. Activation annealing may not use a high pressure close to the saturated vapor pressure of GaN.

In step S6, an electrode forming process is performed. Specifically, as shown in FIG. 7, a gate electrode 16 is formed with a gate insulating film 15 interposed therebetween. Also, source electrodes 17 and 18 are formed. A drain electrode (not shown) is formed on the back surface of the support substrate 9 . This completes the vertical MOSFET 1 with the n-type JFET region 12b.

Although specific examples of the present invention have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. The technical elements described in this specification or in the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims as of the filing. In addition, the techniques exemplified in this specification or drawings can simultaneously achieve a plurality of purposes, and achieving one of them has technical utility in itself.

(Modification)
The technique of anisotropically diffusing Mg in the depth direction in step S3 (FIG. 6) can be applied to various device structures. For example, in the termination region of a semiconductor device having an n-type drift layer, Mg may be ion-implanted and diffused into a region where a p-type guard ring structure is to be formed. This makes it possible to easily form the guard ring.

In step S3, the step of introducing Mg, which is a p-type impurity, is not limited to ion implantation, and solid phase diffusion, for example, may be used. Specifically, a film containing a p-type impurity may be formed in a region other than the n-type region on the surface of the nitride semiconductor substrate 10 and then annealed. Examples of such films include Mg, Be, magnesium nitride (Mg ₃ N ₂ ), beryllium nitride (Be ₃ N ₂ ), etc. formed by sputtering or the like. Annealing may be performed in a state where grains containing p-type impurities (eg, Mg, Be) are placed in a crucible placed in a furnace.

In this embodiment, the case of diffusing Mg into the n ⁻ -type GaN layer has been described, but it is not limited to this form. Mg may be diffused into the i-type GaN layer, which is an intrinsic semiconductor.

The annealing performed in step S4 is not limited to high pressure. The effect of the technique of the present specification can be obtained even if annealing is performed under any pressure.

Various forms of supplying hydrogen into the annealing atmosphere may be used. For example, annealing may be performed while supplying a gas containing hydrogen into the annealing chamber.

The order of the n ⁺ -type region forming step in step S2 and the step of introducing p-type impurities in step S3 may be reversed. A plurality of other steps may exist between these steps.

The nitride semiconductor is not limited to GaN, and may be, for example, aluminum gallium nitride (AlGaN), AlN (aluminum nitride), InN (indium nitride), or a mixed crystal thereof.

In the above embodiments, magnesium (Mg) was used as an example of the Group II element for forming the p-type region, but the composition is not limited to this. Group II elements may be, for example, beryllium (Be), calcium (Ca), and the like.

In the above embodiments, silicon (Si) was used as an example of an element for forming the n-type region, but the configuration is not limited to this, and germanium (Ge) or the like may be used.

The n ⁺ -type GaN layer 102, the n ⁺ -type GaN layer 11, the source regions 13 and 14 are examples of n-type regions.

Reference Signs List 1: lateral MOSFET 9: support substrate 10: nitride semiconductor substrate 11: n ⁺ -type GaN layer 12: i-type GaN layer 13, 14: source region 101: n-type substrate 102: n ⁺ -type GaN layer 103: i-type GaN Layer P11, P21: Mg concentration profile P12, P22: Si concentration profile P13, P23: H concentration profile

Claims (8)

forming an n-type region containing n-type impurities at a first concentration in a portion of a nitride semiconductor substrate;
An impurity introduction step of introducing a p-type impurity from the exposed surface of the nitride semiconductor substrate into a specific region other than the n-type region,
the impurity introducing step, wherein the concentration of the n-type impurity contained in the specific region is lower than the first concentration, and the specific region is in contact with the n-type region;
a diffusion step of selectively thermally diffusing the p-type impurity into the specific region without diffusing the n-type impurity in the n-type region;
with
Manufacture of a nitride semiconductor device in which, in the diffusion step, diffusion of the p-type impurity is stopped at a boundary surface between the n-type region and the specific region to prevent the p-type impurity from diffusing into the n-type region. Method. 2. The method of manufacturing a nitride semiconductor device according to claim 1, wherein in said diffusion step, at least a part of said p-type impurity diffusion profile and hydrogen diffusion profile have the same shape. 3. The manufacturing of the nitride semiconductor device according to claim 2, wherein the p-type impurity concentration and the hydrogen concentration are the same in a region where the p-type impurity diffusion profile and the hydrogen diffusion profile have the same shape. Method. 4. The method of manufacturing a nitride semiconductor device according to claim 1, wherein said diffusion step is performed in a state in which hydrogen is present in said chamber. 5. The method of manufacturing a nitride semiconductor device according to claim 1, wherein said diffusion step is performed under a high pressure close to the saturated vapor pressure of said nitride semiconductor substrate. 6. The method of manufacturing a nitride semiconductor device according to claim 1, wherein the step of introducing said p-type impurity is performed by ion implantation. 6. The method of manufacturing a nitride semiconductor device according to claim 1, wherein the step of introducing said p-type impurity is performed by solid phase diffusion. The nitride semiconductor substrate is GaN,
8. The method of manufacturing a nitride semiconductor device according to claim 1, wherein said p-type impurity is a Group II element.

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