JP7283370B2 - Evaluating device electrical characteristics - Google Patents

Description

The present invention relates to a method for evaluating electrical characteristics of a device by device simulation.

In an electronic device, in order to obtain a device structure having desired electrical characteristics, a prototype of the device is actually manufactured and the electrical characteristics are measured to determine whether the device is good or bad. However, device prototyping involves a large number of steps, and it is difficult to easily obtain results of device characteristics.

Therefore, electrical characteristics are often predicted using simulations. This simulation is called TCAD, and in particular, a simulation that assumes a structure and calculates electrical characteristics is called a device simulation.

In general, a device simulator analytically solves the simultaneous equations of the carrier continuity equations represented by the following equations (1) and (2) and the Poisson equation represented by the following equation (3) in an assumed structure. to predict the electrical properties.

ここで、ｐは正孔密度、ｎは電子密度、Ｆは電場、φは静電ポテンシャル、ｘは位置、εは誘電率、ｑは素電荷量、Ｒは再結合項、Ｇは発生項、μ_ｈは正孔の移動度、μ_ｅは電子の移動度、Ｄ_ｈは正孔の拡散係数、Ｄ_ｅは電子の拡散係数、ｔは時間、Ｎ_Ｄはドナー型不純物濃度、Ｎ_Ａはアクセプター型不純物濃度である。

Here, p is the hole density, n is the electron density, F is the electric field, φ is the electrostatic potential, x is the position, ε is the dielectric constant, q is the elementary charge, R is the recombination term, G is the generation term, _μh is hole mobility, _μe is electron mobility, _Dh is hole diffusion coefficient, _De is electron diffusion coefficient, t is time, _ND is donor type impurity concentration, _NA is acceptor type impurity concentration.

The carrier continuity equations (1) and (2) are composed of a current component term consisting of a drift component and a diffusion component, a recombination term, and a generation term. The effect is reflected in the calculation results of generation/recombination terms.

In order to accurately calculate the electrical properties of an actual device using this device simulator, it is important to use accurate values of various physical properties. Basic physical property values include, for example, the mobility of electrons and holes.

Patent Documents 1 to 3 disclose methods of predicting electrical characteristics by device simulation, but all relate to computational techniques in simulation and do not mention the influence of defects in wafers.

On the other hand, it is known that impurities and defects in wafers affect device characteristics. For example, in a silicon wafer, oxygen contained in the crystal precipitates and forms crystal defects. This is called BMD.

In device simulators, defects and impurities can be considered as "carrier generation/recombination centers" for device characteristics. The extent of the effect depends on the energy level, capture cross section, and concentration of impurities and defects. Specifically, they are represented by the following formulas (4) to (8).

ここで、Ｃ_ｉ（Ｃ_ｐ、Ｃ_ｎ）、ｎ_１、ｐ_１は以下の式で表せる。

上記式において、Ｒ_ＤＤはドナー型の発生／再結合速度、Ｒ_ＤＡはアクセプター型の発生／再結合速度、ｎは電子密度、ｐは正孔密度、Ｎ_ＤＤ、Ｎ_ＤＡは欠陥や不純物の準位密度、Ｖ_ｔｈは熱速度、σ_ｉは欠陥や不純物の捕獲断面積、Ｅ_ｉｎｔは欠陥や不純物のミッドギャップ、Ｅ_ｔ，Ｄは欠陥や不純物のエネルギー準位、ｋ_Ｂはボルツマン定数、Ｔは温度、ｎ_ｉｎｔは真性キャリア濃度である。

Here, C _i (C _p , C _n ), n ₁ and p ₁ can be represented by the following formulas.

In the above formula, _RDD is the donor-type generation/recombination rate, _RDA is the acceptor-type generation/recombination rate, n is the electron density, p is the hole density, and NDD _{and NDA} are the levels of defects and impurities. potential density, V _th is the thermal velocity, σ _i is the trapping cross section of defects and impurities, E _int is the mid gap of defects and impurities, E _{t, D} is the energy level of defects and impurities, k _B is the Boltzmann constant, T is the temperature and n _int is the intrinsic carrier concentration.

In the actual device process, impurities and defects are often introduced into the wafer. Therefore, it is necessary to consider the effects of the introduced impurities and defects for accurate prediction of electrical characteristics. and physical property values of defects are required. The physical property values are the trapping cross sections of defects and impurities in the formula (6) and the energy levels of the defects and impurities in the formula (7) or (8).

JP-A-4-286348 JP-A-4-286350 JP-A-11-68084

For metal impurities, the energy level and capture cross section can often be determined by DLTS measurement, etc., but for BMD, the energy level and capture cross section are not clear, and the effects on electrical characteristics using device simulations have not been evaluated. Hard to predict.

In general, the values of the energy level and the capture cross section are determined experimentally using DLTS or the like, but in the case of BMD, it is difficult to determine these values experimentally compared to metal impurities. However, in order to predict the electrical characteristics in consideration of the BMD using device simulation, specific values of the energy level and capture cross section of the BMD are required, and some values must be assumed.

Since BMDs are formed by heat-treating a CZ wafer containing dissolved oxygen, it is expected that BMDs are formed in the substrate in a device process using a CZ wafer. However, since the energy level and capture cross section of BMD are not clear, it is difficult to predict the electrical properties using a device simulator.

The present invention has been made to solve the above problems, and aims to provide a method for evaluating the electrical characteristics of a device by device simulation using the energy level value and the capture cross section value of BMD. aim.

The present invention has been made to achieve the above objects, and is a method for evaluating the electrical characteristics of a device formed on a silicon wafer by the CZ method by device simulation, wherein a preliminary test silicon wafer is prepared in advance. The energy level of the BMD obtained from the relationship between the BMD density in the preliminary test silicon wafer and the reverse leakage current measured by forming a pn junction on the preliminary test silicon wafer. An evaluation method for evaluating the electrical characteristics of a device formed on a silicon wafer for evaluation by preparing energy level values and capture cross-section values, and conducting device simulations using the prepared energy level values and capture cross-section values. offer.

According to such a method for evaluating the electrical characteristics of a device, it is possible to perform a device simulation using the energy level value and the capture cross section value of the BMD, and to evaluate the electrical characteristics of the device.

At this time, the value of the BMD energy level obtained in advance can be set to Ec−0.56 eV, and the value of the capture cross section can be set to 5×10 ⁻¹¹ cm ² .

By doing so, it is possible to specifically evaluate the electrical characteristics of the device with high accuracy.

At this time, the electrical characteristics of the device to be evaluated can be the reverse leakage current characteristics.

By doing so, the electrical characteristics of the device can be evaluated with higher accuracy.

As described above, according to the device electrical property evaluation method of the present invention, it is possible to perform a device simulation using the BMD energy level value and the capture cross section value. This makes it possible to evaluate the electrical characteristics of the device with high accuracy. Furthermore, it is possible to evaluate the reverse leakage current characteristics with high accuracy.

4 is an analysis flow chart for obtaining the value of the energy level and the value of the capture cross section of BMD; The P and B concentrations of the pn junction structure and the generated center density distribution corresponding to the BMD are shown. Fig. 3 shows BMD density dependence of leakage current. Fig. 3 shows applied voltage dependence of leakage current. Calculated values are plotted with solid lines, and experimental values are plotted with circles. Fig. 3 shows applied voltage dependence of leakage current. Calculated values are indicated by a solid line when the values of the BMD energy level and the capture cross section are taken into account, dotted lines when they are not taken into account, and experimental values by circles.

The present invention will be described in detail below, but the present invention is not limited to these.

As described above, there is a need for a method of evaluating the electrical properties of devices through device simulations using BMD energy level values and capture cross section values.

As a result of extensive studies on the above problems, the present inventors have found a method for evaluating the electrical characteristics of a device formed on a silicon wafer by the CZ method by device simulation, in which a preliminary test silicon wafer is prepared in advance. Then, the energy level value and capture break of BMD obtained from the relationship between the density of BMD in the silicon wafer for preliminary test and the reverse leakage current measured by forming a pn junction on the silicon wafer for preliminary test The energy level of BMD is evaluated by an evaluation method that evaluates the electrical characteristics of a device formed on a silicon wafer for evaluation by means of a device simulation using prepared energy level values and capture cross-sectional area values. The inventors have found that it is possible to perform a device simulation using the value of the potential and the value of the capture cross section, and that the electrical characteristics of the device can be evaluated with higher accuracy, and have completed the present invention.

Description will be made below with reference to the drawings.

[Analysis flow for obtaining BMD energy level values and capture cross section values]
FIG. 1 is an analytical flow chart for determining the values of energy levels and capture cross sections of BMD, and the present invention will be described in detail with reference to FIG.

[First step]
The first step is to prepare a preliminary test silicon wafer. A preliminary test silicon wafer is prepared in which the BMD density in the substrate is varied. Specifically, as an experiment, wafers with different BMD densities in the substrate are produced by varying the nucleation heat treatment conditions for epitaxial wafers. The nucleation heat treatment conditions are not particularly limited, but can be, for example, 450° C./4 hours, 500° C./4 hours, and 650° C./4 hours. In this way, silicon wafers for preliminary tests are produced in which the BMD density in the substrate is varied.

[Second step]
The second step is a step of forming a pn junction in the preliminary test silicon wafer. The dopant for forming the pn junction is not particularly limited, but for example, boron (B) can be used as a p-type dopant and phosphorus (P) can be used as an n-type dopant.

[Third step]
The third step is the step of measuring the reverse leakage current. A reverse leakage current is measured for a preliminary test silicon wafer on which a pn junction is formed.

[Fourth step]
The fourth step is the step of measuring the concentration distribution. The dopant concentration distribution and the BMD density distribution of the preliminary test silicon wafer on which the pn junction is formed are measured. The measurement method is not particularly limited, but SIMS can be used, for example.

[Fifth step]
The fifth step is the step of constructing a computational model. The leakage current can be analytically calculated by using equations (1) to (3). At this time, the influence of impurities and defects on leakage current is considered as G or R in formulas (1) and (2), and G is dominant in the case of leakage current. Also, G or R can be calculated using equations (4) and (5). However, when calculating G, R _DD and R _DA described in formulas (4) and (5) correspond to G. When calculating G, the values used as physical property values are the energy level and the capture cross section, and particularly the energy level is in the range below the bandgap. For example, in the case of silicon, the value of the energy level can be arbitrarily determined within the range of 0 to 1.1 eV or less, and the value of the capture cross section can also be arbitrarily determined. Further, for example, by fixing the energy level and changing the capture cross-section, the leakage current calculation value can be changed, and the physical property value of the defect that can reproduce the experimental results can be determined. Specifically, for a given energy level, the higher the capture cross-section, the higher the leakage current. Conversely, the capture cross section can be constant, in which case leakage current increases as the energy level approaches the midgap. Either the energy level or the capture cross section may be constant. For example, in the case of a silicon wafer, the value of the energy level is not particularly limited as long as it is in a range equal to or lower than the bandgap. where Ec is the bottom of the conduction band.

[Sixth step]
The sixth step is the fitting step. As for the dopant concentration distribution, the measured values measured in the fourth step are used, and it is assumed that the actually measured BMD density generation centers are uniformly present in the wafer to the rear surface. Using the energy level or capture cross section of the generation center corresponding to BMD as a parameter, fitting is performed so that the actual measurement results can be reproduced. For example, in the case of a silicon wafer, the energy level can be fixed at Ec-0.56 eV, and fitting can be performed using the capture cross section as a parameter.

[Seventh step]
The seventh step is a step of obtaining physical property values. We obtain energy levels and capture cross-sections at the generation center that can reproduce the experimental results.

By obtaining the value of the energy level and the value of the capture cross section of the BMD through the above-described first to seventh steps, it is possible to perform a device simulation that considers the energy level and the capture cross section of the BMD.

At this time, it is preferable to set the value of the BMD energy level to Ec−0.56 eV and the value of the capture cross section to 5×10 ⁻¹¹ cm ² . With such a value, the result of the actual measurement can be well reproduced, and the electrical characteristics of the device can be evaluated with high accuracy.

Moreover, it is preferable that the electrical property of the device to be evaluated is the reverse leakage current property. According to the evaluation of the electrical characteristics of the device by the device simulation of the present invention, it is possible to evaluate the reverse leakage current characteristics with extremely high accuracy.

EXAMPLES The present invention will be described in detail below with reference to examples, but these are not intended to limit the present invention.

(Example)
Precipitation heat treatment (450° C., 500° C., 650° C./4 h+800° C./4 h+1000° C.) was performed on a silicon wafer for preliminary test of n/n-EPW (epitaxial wafer) with an epitaxial layer thickness of 5 μm and a substrate thickness of 725 μm and a diameter of 200 mm. /1 h) to vary the BMD density of the substrate.

A pn junction was formed on the surface layer of these wafers, and a reverse voltage (up to 10 V) was applied to measure the leakage current at 55°C. Also, the B and P concentration distributions were measured by SIMS. Furthermore, the BMD density of the substrate was actually measured.

In the device simulation, the dopant concentration distribution in the case of the experiment was assumed, and further, it was assumed that generation centers corresponding to BMD were uniformly present from a position of 5 μm from the front surface to the back surface. The densities of the generation centers were the measured values of the BMD densities (5.7×10 ⁸ , 2.6×10 ⁹ , 5.0×10 ⁹ /cm ³ ). FIG. 2 shows the density distribution at this time.

Also, the energy level of the generation center was assumed to be Ec-0.56 eV, and the capture cross section was used as a fitting parameter. As other calculation conditions, the reverse applied voltage was 0.25 to 10 V, and the calculation temperature was 55° C., and the simulation was performed.

Experimental results show that the leakage current increases as the BMD density increases. Also, it was found that the device simulation agrees well with the measured value by setting the capture cross-section at the generation center to 5×10 ⁻¹¹ cm ² . The results are shown in FIG. From this result, when performing calculations in consideration of BMD in device simulation, the electrical characteristics can be improved by setting the energy level of BMD to Ec-0.56 eV and the capture cross section to 5×10 ⁻¹¹ cm ² . can be predicted accurately.

Furthermore, by performing a device simulation using this energy level (Ec-0.56 eV) and capture cross section (5×10 ⁻¹¹ cm ² ), it is possible to predict the actual electrical characteristics (reverse leakage current characteristics). gone.

As a prediction of the reverse leakage current characteristics, a pn junction was formed in the n/n-EPW with a diameter of 200 mm and a thickness of 5 μm in the epitaxial layer subjected to the deposition heat treatment, and the reverse leakage current was measured. The BMD density of this wafer is known to be 5.7×10 ⁸ /cm ³ . The results of the reverse leakage current characteristics were compared with the results of a device simulation assuming a generation center corresponding to BMD (energy level of Ec-0.56 eV, capture cross section of 5×10 ⁻¹¹ cm ² ). The pn junction structure in the device simulation was set to the conditions imitating the actual measurement, and the calculation temperature was set to 55° C., which is the same as the actual measurement. As a result, as shown in FIG. 4, it was found that the actual measurement results could be reproduced well.

(Comparative example)
The electrical characteristics of an actual device were compared with the electrical characteristics using a device simulation that considered the influence of BMD and the electrical characteristics using a device simulation that did not consider the influence of BMD.

The result of the actual measurement for comparison is the leak current of a device in which a pn junction diode is fabricated on a wafer having a diameter of 200 mm and having been subjected to heat treatment on n/n-EPW. The BMD density of the wafer in actual measurement is 5×10 ⁹ /cm ³ . The structure of the device simulation imitates the actual measurement. Furthermore, the calculated temperature was 55° C., which is the same as the actual measurement.

FIG. 5 shows the results of measured and calculated reverse leakage current characteristics. As can be seen from FIG. 5, the device simulation considering the effect of BMD, which is the method for evaluating the electrical characteristics of the device of the present invention, can reproduce the actual measurement results well. On the other hand, the device simulation of the comparative example, which does not consider the effect of BMD, cannot reproduce the experimental results and cannot evaluate the electrical characteristics of the device.

As described above, the method of evaluating the electrical characteristics of a device according to the present invention can take into account the effect of BMD, thereby enabling highly accurate evaluation of the electrical characteristics of a device.

In addition, this invention is not limited to the said embodiment. The above-described embodiment is an example, and any device having substantially the same configuration as the technical idea described in the claims of the present invention and exhibiting the same effect is the present invention. included in the technical scope of

Claims (2)

A method for evaluating the electrical characteristics of a device formed on a silicon wafer by the CZ method by device simulation,
A preliminary test silicon wafer was prepared in advance, and the relationship between the BMD density in the preliminary test silicon wafer and the reverse leakage current measured by forming a pn junction on the preliminary test silicon wafer was obtained. , preparing the energy level value and the capture cross section value of the BMD, and performing a device simulation using the prepared energy level value and the capture cross section value of the device formed on the silicon wafer for evaluation. A method for evaluating electrical characteristics of a device, comprising evaluating reverse leakage current characteristics as the electrical characteristics. 2. Electrical characteristics of the device according to claim 1, wherein the value of the energy level of the BMD determined in advance is Ec-0.56 eV, and the value of the capture cross section is 5×10 ⁻¹¹ cm ^{2 .} evaluation method.

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