JP7296602B2 - SiC substrate manufacturing method - Google Patents

Description

The present invention relates to a method for manufacturing a SiC substrate.

A trench type metal oxide semiconductor field effect transistor (MOSFET (Metal -Oxide-Semiconductor Field Effect Transistor) devices are known. A power semiconductor device using a SiC substrate has advantages such as a small on-resistance and a small power loss as compared with a conventional device using a Si substrate.

On the other hand, in order to increase the electrical withstand voltage of the device, it is desirable to alleviate the local electric field concentration on the gate insulating film provided on the inner surface of the trench.

Patent Literature 1 proposes that after forming a recess (trench) in a semiconductor layer, isotropic dry etching is performed to round the corners of the bottom surface of the recess (that is, the boundary between the side surface and the bottom surface). there is

Patent Literature 2 proposes different etching conditions for the first dry etching and the second dry etching, which are performed in order, in order to flatten the bottom.

JP-A-2004-253576 Japanese Patent Application Laid-Open No. 2007-324503

In the case of a Si substrate, for example, since the reactivity between Si and fluorine radicals is high, the bottom of the groove can be easily processed into a curved surface. However, SiC substrates have a large Si—C bond energy and are difficult to process. If a high bias power is applied, the SiC substrate can be etched at a practical rate, but the contribution of physical sputtering increases, and the corners of the bottom of the groove tend to be sharp.

According to one aspect of the present invention, a SiC substrate is provided with a mask having an opening, and a first plasma generated using a first process gas is used to remove a SiC portion of the SiC substrate exposed from the opening. A first etching step of anisotropically etching to form a groove, and a second plasma generated using a second process gas containing at least CH ₂ F ₂ , further etching the SiC portion corresponding to the groove to form the groove. and a second etching step of forming a bottom of the groove with chamfered corners.

According to the present invention, a SiC substrate having grooves with chamfered bottom corners can be manufactured at a practical etching rate.

1 is a schematic diagram of a plasma processing apparatus for forming grooves in a SiC substrate; FIG. It is process drawing of the manufacturing method of the SiC substrate which concerns on one Embodiment of this invention. It is process drawing of the manufacturing method of the SiC substrate which concerns on another embodiment of this invention. 4 is a scanning electron microscope (SEM) photograph showing a cross section of a corner portion of the bottom of the groove of the SiC substrate obtained in Example 1. FIG.

The method for manufacturing a SiC substrate having grooves according to the present embodiment includes (i) the steps of preparing a SiC substrate having a mask having openings, and (ii) using a first plasma generated using a first process gas. a first etching step of anisotropically etching the SiC portions exposed from the openings of the mask to form grooves; and (iii) after the first etching step, using a second process gas containing at least CH ₂ F ₂ . and a second etching step of further etching the SiC portion corresponding to the trench with the generated second plasma to form a bottom of the trench with chamfered corners.

A SiC substrate refers to a substrate obtained by processing a SiC crystal, in which carbon (C) and silicon (Si) are covalently bonded at an atomic ratio of 1:1, into a plate shape. The bandgap of SiC crystal is about 3.25 eV, which is about three times that of Si crystal, and the electric field strength leading to dielectric breakdown is as high as about 10 times that of Si crystal. In addition, SiC crystal has a thermal conductivity three times or more that of Si, so that stable electrical characteristics can be obtained even at high temperatures, and power loss is small.

The manner in which the corners (or corners) of the bottom of the groove are chamfered can be observed in a cross section perpendicular to the length direction of the groove (hereinafter also simply referred to as a cross section of the groove). The embodiment in which the corners of the bottom are chamfered includes all cases where the bottom of the groove does not have sharp corners in cross section. For example, if the corners are curved (i.e., rounded), if the corners are tapered (i.e., the groove width decreases towards the bottom), there are no corners. , the bottom is generally curved (for example, the bottom is U-shaped). Hereinafter, chamfering a corner is also referred to as rounding the corner.

The anisotropic etching in the first etching step is an etching method in which the etching rate differs depending on the direction, and satisfies the relationship of etching rate Rd in the depth direction>etching rate Rw in the width direction of the groove. The larger the Rd/Rw ratio, the sharper the corners of the groove.

On the other hand, in the second etching step, an etching reaction product is deposited on at least a part of the side wall of the groove in the process of formation, forming a minute eaves. Since etching does not progress easily under the eaves, the bottom corners of the grooves are chamfered when the etching is finished.

The radius of curvature of the corners of the bottom of the chamfered groove may be, for example, 10 nm to 80 nm, and may be 10 nm to 50 nm. Especially when manufacturing a trench-type MOSFET, if the radius of curvature is within the above range, the local electric field concentration on the gate insulating film provided on the inner surface of the trench is remarkably relaxed, and a high-quality product can be obtained.

After completion of the second step, the depth of the groove may be, for example, 1 to 10 μm. Also, the aspect ratio of the groove depth to the groove width may be, for example, 1.0 to 10.

Next, the process gas will be further explained.
(First process gas)
The first process gas used in the first etching step may have a composition that allows anisotropic etching to proceed efficiently. The first process gas is selected such that the sidewalls of the trenches formed in the first etching step are highly linear. As a result, a SiC substrate having grooves that are fine and aesthetically pleasing can be obtained.

The first process gas may include, for example, _SF6 and _O2 . The volume ratio of oxygen to SF ₆ (=O ₂ /SF ₆ ) may be, for example, 0.5 to 2.0.

The first process gas may further contain a noble gas. Rare gases have the effect of moderately diluting SF ₆ and O ₂ . The ratio of the rare gas contained in the first process gas is, for example, 75-95% by volume, and may be 80-95% by volume. The noble gas can be ionized in the reaction chamber and participate primarily in the physical etching of the SiC substrate. Rare gases such as Ar and He can be used, among which Ar is inexpensive and readily available.

By using the first process gas having the above composition, it is possible to increase the etching rate in the first etching step and further improve the linearity of the side surfaces of the groove.

(Second process gas)
The second process gas used _in the second etching step contains at least _CH2F2 . CH ₂ F ₂ is a gas that tends to form a polymer as a reaction product when plasmatized. Fluorocarbon gases such as C ₄ F ₈ also produce polymers when plasmatized, but CH ₂ F ₂ tends to produce polymers even under high temperature conditions compared to fluorocarbon gases such as C ₄ F ₈ . It is considered that such effects are related to the ratio of carbon atoms and fluorine atoms contained in CH ₂ F ₂ .

Etching of SiC substrates composed of Si—C bonds with high bond energy is performed at relatively high temperatures. Therefore, CH ₂ F ₂ is particularly suitable as an additive gas for controlling the shape of grooves in etching SiC substrates.

Specifically, in the second etching step, CH ₂ F ₂ serves to deposit polymer on the bottom and sides of the grooves formed in the first etching step. Then, in the second etching step, the polymer deposited on the bottom surface of the groove is more easily removed than the polymer deposited on the side surface of the groove due to etching anisotropy caused by applying a bias to the SiC substrate. As a result, the corners of the bottom of the groove can be chamfered in good condition.

_The second process gas may contain fluorohydrocarbons other than _CH2F2 . A fluorohydrocarbon is a hydrocarbon in which at least one hydrogen atom has been replaced with a fluorine atom. _The second process gas may contain fluorohydrocarbons other than _CH2F2 , such as _CHF3 . However, it is desirable that 50% by volume or more of the fluorohydrocarbon is CH ₂ F ₂ .

The second process gas may further contain a noble gas. By using a mixed gas of CH ₂ F ₂ and a rare gas, it becomes easier to control the shape of the bottom of the groove. The rare gas moderately dilutes CH ₂ F ₂ , restricts the isotropic progress of etching by CH ₂ F ₂ , suppresses the formation of so-called undercuts, and can improve the aesthetics of the groove side surfaces. The ratio of the rare gas contained in the second process gas may be, for example, 50-98% by volume, or may be 75-95% by volume. As the rare gas, for example, Ar, He, or the like can be used. Among them, Ar is inexpensive and easily available.

The second etching process includes a step A of etching the mask to enlarge the opening of the mask to expose a new SiC portion in the upper portion of the trench, and etching the newly exposed SiC portion to expose the upper portion of the trench. B. chamfering the SiC portion of the corners of the . This makes it possible to chamfer not only the corners of the bottom of the groove but also the corners of the top of the groove at the same time. If there is a sharp corner at the top of the trench, dielectric breakdown may occur due to electric field concentration when the MOSFET is formed in the trench. Therefore, it is desirable to chamfer the corner at the top of the trench.

The first etching process and the second etching process are usually performed in a reaction chamber of a plasma processing apparatus capable of dry etching.

FIG. 1 is a schematic diagram of a plasma processing apparatus used to form grooves in a SiC substrate.
The plasma processing apparatus 21 of FIG. 1 is an inductively coupled plasma (ICP) type dry etching apparatus. The plasma processing apparatus 21 includes a chamber 23 that provides a space for generating plasma (that is, a reaction chamber). The chamber 23 has a gas introduction port 23a for introducing a process gas (etching gas) into the reaction chamber, and an exhaust port 23b for exhausting gas from the reaction chamber. A gas supply source 24 for supplying a process gas into the reaction chamber is connected to the gas inlet 23a. A decompression mechanism 25 including a decompression pump for evacuating the inside of the reaction chamber is connected to the exhaust port 23b.

The top of chamber 23 is closed with a dielectric wall 26 . An antenna 27 as an upper electrode is arranged above the dielectric wall 26 . High-frequency power is applied to the antenna 27 from the first high-frequency power supply 28A. A stage 11 is arranged below the chamber 23 , and a SiC substrate 22 is placed on the stage 11 . The stage 11 is arranged on a metal block 12 , and the metal block 12 is accommodated within the base portion 13 . The metal block 12 is electrically connected to the second high frequency power supply 28B, and can apply the second high frequency power to the SiC substrate 22 as a lower electrode.

When the decompression mechanism 25 is operated, the pressure inside the chamber 23 is decompressed. When a high-frequency voltage is applied between the dielectric wall 26 and the stage 11 by the first high-frequency power source 28A while the process gas is introduced into the decompressed chamber 23, the introduced process gas is turned into plasma. The process gas flow rate and the output of the decompression mechanism 25 are each controlled by the controller 19 . The opening degrees of the introduction port 23a and the exhaust port 23b are also controlled by the controller 19, respectively. In addition, the controller 19 also controls each element constituting the plasma processing apparatus 21 .

The stage 11 includes a cooling device 14 and an electrostatic attraction electrode 16 for electrostatically attracting the SiC substrate 22 . The cooling device 14 includes a coolant channel 12a formed in the metal block 12, and a coolant circulation device 15 for circulating temperature-controlled coolant in the coolant channel 12a. The electrostatic attraction electrode 16 is electrically connected to a driving power source 17 . A heat transfer gas supply hole (not shown) is provided at the position of the stage 11 where the substrate 22 is placed, and the heat transfer gas is supplied from the heat transfer gas source 18 to this supply hole.

Each step will be described in more detail below with reference to the drawings.
(First embodiment)
FIG. 2 is a process diagram of a method for manufacturing a SiC substrate according to one embodiment of the present invention.
(Mask forming process)
FIG. 2(a) shows a SiC substrate 1 with a mask 2 having openings 2a corresponding to the grooves. 1(b) and 1(c) correspond to cross-sectional views of the SiC substrate 1 cut in a direction perpendicular to the length direction of the groove 1a.

As a mask, a resist, a metal thin film, or the like can be used, but when it is desirable to form a trench with substantially vertical sidewalls, as in a trench-type MOSFET device, a relatively high etching selectivity is ensured with respect to the SiC substrate. It is desirable to use a SiO ₂ film (SiO ₂ mask) that can be used. The use of _SiO2 films is also suitable for suppressing contamination of SiC substrates.

The method for manufacturing the SiC substrate according to the present embodiment need not include a mask forming step, but may include a series of mask forming steps such as the first etching step and the second etching step. For example, the SiO ₂ film may be formed on the surface of the SiC substrate 1 by a vapor phase method such as CVD.

Next, by photolithography, a resist film having openings corresponding to the grooves is formed on the SiO ₂ film. By etching the SiO ₂ film exposed from the openings of the resist film, an SiO ₂ mask 2 having openings 2a at positions corresponding to the grooves is formed. Etching of the SiO ₂ film can be performed by dry etching.

After etching the SiO ₂ film, the resist film remaining on the SiO ₂ mask may be removed by ashing with oxygen plasma or the like, cleaning with an organic solvent such as acetone, or the like.

The thickness of the SiO ₂ film is, for example, 0.5 μm to 5 μm, and may be 1 μm to 3 μm. When the thickness of the mask is within the above range, the mask remains appropriately after the second etching step, so unnecessary etching of the SiC substrate can be suppressed.

(First etching step)
In a first etching step, RF power is supplied to the upper electrode while supplying a first process gas to the reaction chamber to convert the first process gas into a first plasma.

In the first etching step, the high-frequency power (first high-frequency power) supplied to the upper electrode is, for example, 300W to 4000W, preferably 700W to 3000W. Also, the frequency of the first high-frequency power may be, for example, 13.56 MHz.

In the first etching step, the bias power (second high-frequency power) applied to the SiC substrate has a power density of, for example, 0.5 W/cm ² to 2.5 W/cm ² . A high etching rate can be ensured when the power density is in such a range.

The SiC portion exposed from the opening 2a of the mask 2 is anisotropically etched by the first plasma to form the groove 1a. When anisotropically etching the SiC substrate 1, a high bias power is applied to the SiC substrate 1, so the contribution of physical sputtering increases. As a result, as shown in FIG. 1(b), the bottom of the groove 1a has sharp corners, and the side surfaces of the groove 1a are highly linear. The cross section of the groove 1a in FIG. 1(b) is generally rectangular.

When the first process gas contains _SF6 and _O2 , the first plasma contains fluorine radicals, oxygen radicals, and the like. Fluorine radicals and oxygen radicals react with Si and C contained in the SiC substrate 1 to generate highly volatile SiF ₄ , CO ₂ and the like as reaction products. SiF ₄ , CO ₂ , etc. are discarded from the reaction chamber, and grooves 1 a are formed in the SiC substrate 1 .

The first etching step may be performed at a temperature of 200° C. or less, and may be 180° C. or less or 150° C. or less. The first etching step may be performed at a temperature of 50° C. or higher, and may be performed at a temperature of 70° C. or higher or 80° C. or higher. The etching temperature may be, for example, 50-200°C, 70-200°C, 80-200°C or 70-180°C. The etching temperature is the temperature of the SiC substrate during etching.

The atmospheric pressure P1 (pressure inside the reaction chamber) in the first etching step is, for example, 0.5 to 10 Pa, and may be 0.6 to 6 Pa. When the atmospheric pressure is in such a range, it is easy to secure a suitable etching rate. Moreover, the straightness of the sidewalls of the grooves is improved, making it suitable for fabricating trench-type MOSFET devices.

(Second etching step)
In a second etching step, RF power is supplied to the upper electrode while supplying the second process gas to the reaction chamber to convert the second process gas into a second plasma. In the second etching step, the high-frequency power (first high-frequency power) supplied to the upper electrode is, for example, 300W to 4000W, preferably 700W to 3000W. Also, the frequency of the first high-frequency power may be, for example, 13.56 MHz.

In the second etching step, the power density of the bias power (second high-frequency power) applied to the SiC substrate is, for example, 0.02 W/cm ² to 0.4 W/cm ² . A high etching rate can be ensured when the power density is in such a range.

When the second process gas contains CH ₂ F ₂ , the CH ₂ F ₂ in the second plasma is decomposed in the plasma, and the C atoms from which the F atoms are removed combine to form a polymer as a reaction product. . Therefore, reaction products may be deposited on the sidewalls and bottom of the groove 1a during formation. At this time, due to the anisotropy of etching due to the bias applied to the substrate, the polymer deposited on the bottom surface of the groove is more easily removed than the polymer deposited on the side surface of the groove. As a result, the portion near the side wall of the bottom of the groove 1a (mainly the corner of the bottom) is masked by the polymer deposited on the side surface of the groove, and the amount of ions incident on the corner decreases, making it difficult for etching to proceed. . On the other hand, the etching progresses preferentially except for the corners of the bottom of the groove 1a. As a result, the corners of the bottom are, for example, tapered or curved. That is, a chamfered corner 101 is formed at the bottom of the groove 1a.

In FIG. 1(c), the bottom of the groove 1a is formed with tapered corners and a substantially flat main portion. grooves 1a may be formed.

After that, a step of removing the minute eaves and the remaining mask 2 may be performed. Such a removing process may be performed in the reaction chamber of the plasma processing apparatus following the first etching process and the second etching process. For example, if fluorine-based plasma is used, the mask of the SiO ₂ film and the minute eaves can be easily removed.

The atmospheric pressure P2 (pressure inside the reaction chamber) in the second etching step is, for example, 0.1 to 5 Pa, and may be 0.3 to 1 Pa. When the atmospheric pressure is within such a range, the corners of the grooves are appropriately chamfered, which is suitable for fabricating a trench type MOSFET element.

The ratio W1/W2 between the amount W1 of SiC etched in the first etching process and the amount W2 of SiC etched in the second etching process may be 4 to 20, for example. Here, the etching amount in each etching process corresponds to the volume of the SiC substrate that decreases from the start to the end of each etching process, and more simply, the etching amount is measured from the change in the depth of the groove. obtain. The change in the depth of the groove can be calculated from the product of the etching rate and the etching time in each etching process.

(Second embodiment)
FIG. 3 is a process diagram of a method for manufacturing a SiC substrate according to another embodiment of the present invention. This embodiment is substantially the same as the first embodiment except that the second etching step is different.

In the second etching step of the present embodiment, not only the chamfered corners 101 are formed at the bottom of the grooves 1a, but also the chamfered corners 102 are formed at the upper corners of the grooves 1a. In the second etching process, the corners of the ends of the openings 2a of the mask 2 are etched by incident ions and chamfered into a tapered shape.

When the mask 2 has an appropriate thickness at the start of the second etching, when the mask 2 recedes as the second etching progresses, the opening edge of the opening 2a (that is, the vicinity of the groove 1a) is not covered by the mask. 2 can expose new SiC portions. That is, a part of the second etching process also serves as step A for enlarging the opening 2a of the mask 2. As shown in FIG.

The newly exposed SiC portions are etched by the second plasma, eg, tapered, to form chamfered corners 102 . In other words, part of the second etching step also serves as step B for chamfering the SiC portion of the upper corner of the groove 1a. The timing at which steps A and B are completed can be controlled by the thickness of the mask, the etching selectivity, or the like.

(Mask removal process)
After forming the grooves in the SiC substrate, the mask formed on the surface of the SiC substrate is removed. The mask may be removed by a known method depending on the type of mask. For example, the _SiO2 mask can be removed by dry etching.

EXAMPLES The present invention will be specifically described below based on examples and comparative examples, but the present invention is not limited to the following examples.

<<Example 1>>
(1) Mask Forming Step A SiO ₂ mask (line and space L/S=2/4, thickness 2 μm) having a predetermined pattern was formed on one surface of a SiC substrate (thickness: 300 μm) by the procedure described above.

(2) First Etching Step The SiC substrate with the SiO ₂ mask formed thereon was carried into the reaction chamber provided in the plasma processing apparatus and placed on the stage provided in the reaction chamber.

While supplying the first process gas into the reaction chamber, the inside of the reaction chamber was evacuated, the first plasma was generated in the reaction chamber, and the SiC portion exposed from the opening of the SiO ₂ mask was etched. More specifically, the pressure in the reaction chamber was maintained at 0.6 Pa by evacuating the reaction chamber while introducing the first process gas into the reaction chamber. A first high frequency power of 1800 W (frequency: 13.56 MHz) is supplied to the upper electrode, and a bias power ( ^second RF power) was applied. The SiC substrate was etched by exposing the surface of the SiC substrate at a temperature of 80° C. for 45 seconds to the first plasma generated in the reaction chamber.

A groove having a rectangular cross section and a depth of 0.4 μm was formed in the SiC substrate by the first etching process. The etching rate in the first etching step was approximately 0.6 μm/min. Note that the etching rate Rw in the width direction of the groove is below the lower limit of measurement in SEM observation.

As the first process gas, a mixed gas of SF ₆ , O ₂ and Ar was supplied at a flow rate of SF ₆ /O ₂ /Ar=12 sccm/6 sccm/72 sccm.

(3) Second etching step Following the first etching step, the reaction chamber is evacuated while supplying the second process gas into the reaction chamber, the second plasma is generated in the reaction chamber, and the pressure in the reaction chamber is reduced to 0.6 Pa. maintained at Next, a first high-frequency power of 1800 W is supplied to the upper electrode, and a bias power (second high-frequency power) of 30 W (power density per substrate area: about 0.03 W/cm ² ) is applied from the lower electrode to the SiC substrate. bottom. By exposing the surface of the SiC substrate at a temperature of 80° C. to the second plasma generated in the reaction chamber for 90 seconds, the bottom corners of the grooves of the SiC substrate were rounded to form a curved surface. The radius of curvature of the groove corners was 50 nm.

As the second process gas, a mixed gas of CH ₂ F ₂ and Ar was supplied at a flow rate of CH ₂ F ₂ /Ar=12 sccm/72 sccm.

The groove formed in the SiC substrate had a depth of 0.5 μm and an aspect ratio of 1.0. A SEM image of the cross-sectional shape of the bottom of the groove is shown in FIG. As shown in FIG. 4, it can be confirmed that the bottom corners are chamfered to form a curved surface.

<<Example 2>>
The same operation as in Example 1 was performed except that the thickness of the SiO ₂ mask was changed to 1 μm. As a result, the opening of the SiO ₂ mask was enlarged in the second etching step (step A). In addition, since the opening of the mask was enlarged, the SiC portion of the upper corner of the groove was etched, the corner was rounded, and a curved surface was formed (Step B). The radius of curvature of the upper corners of the grooves was about 50 nm.

According to the present invention, grooves with chamfered bottom corners can be formed in a SiC substrate at a practical etching rate. Therefore, the present embodiment can be used for various purposes for forming trenches in a SiC substrate, and is particularly useful for trench-type MOSFET devices.

1: SiC substrate, 1a: groove, 2: mask, 2b: opening, 11: stage, 12: metal block, 13: base, 14: cooling device, 15: refrigerant circulation device, 16: electrostatic adsorption electrode , 17: drive power supply, 18: heat transfer gas source, 19: controller, 21: plasma processing apparatus, 23a: introduction port, 23b: exhaust port, 24: gas supply source, 25: decompression mechanism, 26: dielectric wall, 27: antenna, 28A: first high-frequency power supply, 28B: second high-frequency power supply, 101, 102: chamfered corners

Claims (8)

providing a SiC substrate with a mask having openings;
a first etching step of anisotropically etching the SiC portion exposed from the opening of the SiC substrate by a first plasma generated using a first process gas to form a groove;
A second plasma generated using a second process gas containing at least CH ₂ F ₂ and a noble gas further etches the SiC portion corresponding to the trench to form a chamfered bottom of the trench. and a second etching step. The method for manufacturing a SiC substrate according to claim 1, wherein the first process gas contains _SF6 and _O2 . 3. The method for manufacturing a SiC substrate according to claim 1 , wherein the radius of curvature of the bottom corner of said chamfered groove is 10 nm to 80 nm. providing a SiC substrate with a mask having openings;
a first etching step of anisotropically etching the SiC portion exposed from the opening of the SiC substrate by a first plasma generated using a first process gas to form a groove;
at least CH ₂ F. ₂ a second etching step of further etching the SiC portion corresponding to the groove by a second plasma generated using a second process gas containing ,
a step A in which the second etching step etches the mask to enlarge the opening to expose a new SiC portion above the trench;
Etching the newly exposed SiC portion to chamfer SiC portions at upper corners of the grooves. The first process gas is SF ₆ and O ₂ The method for manufacturing the SiC substrate according to claim 4, comprising: 6. The method for manufacturing a SiC substrate according to claim 4, wherein the radius of curvature of corners of the bottom of said chamfered groove is 10 nm to 80 nm. The method for manufacturing a SiC substrate according to any one of claims 4 to 6, wherein said second process gas further contains a rare gas. The method for manufacturing a SiC substrate according to any one of claims 1 to 7 , wherein said mask is a SiO ₂ film.

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