JP7307622B2 - receiver - Google Patents

Description

The present invention relates to the technical fields of satellite broadcasting, terrestrial broadcasting, fixed communication and mobile communication, and more particularly to a digital data receiving device.

In the digital transmission system, a multilevel modulation system is often used so that more information can be transmitted in the frequency bandwidth available for each service. In order to increase the frequency utilization efficiency, it is effective to increase the number of bits (modulation order) assigned to one symbol of the modulated signal. Limited by the Shannon limit. Satellite digital broadcasting is an example of a form of information transmission using a satellite broadcasting transmission path.

In satellite digital broadcasting currently in use, information correction is performed in a receiver using an error correction code. By adding a redundant signal called a parity bit to the information to be sent, it is possible to control the signal redundancy (encoding rate) and improve resistance to noise.

Error correction codes and modulation schemes are closely related, and the theoretical upper limit of frequency utilization efficiency with respect to the signal-to-noise ratio is called the Shannon limit. LDPC (Low Density Parity Check) code was proposed by Gallagher in 1962 as one of the powerful error correction codes having performance approaching the Shannon limit (see, for example, Non-Patent Document 1).

An LDPC code is a linear code defined by a very sparse parity check matrix H (parity check matrix elements consist of 0s and 1s and the number of 1s is very small).

The LDPC code is a powerful error-correcting code that can obtain transmission characteristics approaching the Shannon limit by increasing the code length and using an appropriate parity check matrix. LDPC codes are also adopted in ARIB STD-B44 (hereinafter referred to as an advanced satellite broadcasting system; see, for example, Non-Patent Document 2), which defines the transmission system of . Combining multilevel modulation with powerful error correction codes such as LDPC codes has enabled transmission with higher frequency utilization efficiency.

Taking the advanced satellite broadcasting system as an example, the code length of the LDPC code in this system is composed of Forward Error Correction (FEC) frames and is 44880 bits. It has been shown that the performance is within about 1 dB from the theoretical upper limit of the frequency utilization efficiency with respect to the signal-to-noise ratio when .

In the advanced satellite broadcasting system, the LDPC coding rate is 41/120 (≈ 1/3), 49/120 (≈ 2/5), 61/120 (≈ 1/2), 73/120 (≈ 3/5), 81/120 (≈ 2/3), 89/120 (≈ 3/4), 93/120 (≈ 7/9), 97/120 (≈ 4/5), 101/120 (≈ 5/6), 105/120 (≈7/8), and 109/120 (≈9/10).

R. G. Gallager, “Low-Density Parity-Check Codes,” in Research Monograph series Cambridge, MIT Press, December 1963. "Transmission system for advanced wideband satellite digital broadcasting (ISDB-S3) Standard ARIB STD-B44 Version 2.1", [online], revised March 25, 2016, ARIB, [searched July 8, 2001] , Internet <URL: https://www.arib.or.jp/kikaku/kikaku_hoso/std-b44.html> Suzuki et al., “Design of LDPC Code for Advanced BS Digital Broadcasting”, Journal of The Institute of Image Information and Television Engineers, Institute of Image Information and Television Engineers, Image Information Media vol.62, No.12, December 1, 2008, pp.1997 -2004

As described above, by applying the LDPC code to the example of the advanced satellite broadcasting transmission system, the conventional receiver can obtain reception performance approaching the Shannon limit, but the reception performance is saturated due to the Shannon limit. , theoretically, a significant reception performance cannot be expected.

FIG. 9 is a block diagram showing a schematic configuration of a general satellite broadcasting receiver 100 of the advanced satellite broadcasting system in the prior art. Receiving apparatus 100 includes tuning section 11 , orthogonal demodulation section 12 , and error correction decoding section 13 . Note that the receiving apparatus 100 has a control function of detecting information such as the setting of the transmission method from the TMCC signal multiplexed with the main signal and setting the modulation method, coding rate, etc. of the main signal. , the detailed illustration thereof is omitted.

The tuning section 11 has a frequency designation/tuning section 111 , an automatic gain control (AGC) section 112 , an intermediate frequency (IF)/baseband conversion section 113 and a low pass filter (LPF) 114 .

The frequency designation/tuning unit 111 sets the reception target frequency to the IF/baseband conversion unit 113 by externally designated tuning.

The AGC unit 112 performs automatic gain control with reference to the output value of the analog/digital (A/D) conversion unit 121 in the quadrature demodulation unit 12 in the subsequent stage for the input signal (modulated wave signal for satellite broadcasting to be transmitted). and output to IF/baseband conversion section 113 .

The IF/baseband conversion unit 113 extracts the set reception target frequency from the input modulated wave signal after automatic gain control, frequency-converts it to a center frequency (IF), and outputs it to the LPF 114. .

The LPF 114 filters the tuned and frequency-converted signal with a low-pass filter to generate a baseband IQ signal consisting of two baseband signals, an in-phase component (In-phase) and a quadrature-phase component (Quadrature-phase). Output to the quadrature demodulator 12 .

The quadrature demodulation unit 12 includes an analog/digital (A/D) conversion unit 121, a symbol timing recovery unit 122, a synchronous detection unit 123, a root (√) roll-off filter 124, an adaptive equalization unit 125, a phase error control unit 126, and an absolute phasing unit 127 .

The A/D conversion unit 121 receives the baseband IQ signal from the tuning unit 11, samples the analog value with the sampling signal ST, performs analog/digital conversion processing for converting to a digital IQ signal, and converts the digital IQ signal into a digital IQ signal. The signal is output to symbol timing recovery section 122 .

The symbol timing recovery unit 122 generates a symbol timing recovery signal according to the modulation scheme for recovering the symbol timing of the main signal in the digital IQ signal, and outputs it to the coherent detection unit 123 together with the digital IQ signal. Prior to the demodulation/decoding process of the main signal (data), the receiving apparatus 100 once synchronizes based on the synchronization byte of the TMCC signal periodically multiplexed as a multiplex frame, and the TMCC stored in the TMCC signal is synchronized. Based on the information, the modulation system of the main signal (data) and the information on the error correction code are detected. Therefore, the symbol timing recovery unit 122 monitors the timing of the signal after the adaptive equalization processing by the subsequent adaptive equalization unit 125 based on the periodically multiplexed pilot signal corresponding to the modulation scheme, while monitoring the signal timing. Generate a symbol timing recovery signal. Also, the error correction code information is used in the error correction decoding unit 13 .

The synchronous detection unit 123 corrects the symbol timing reproduction signal based on the information of the phase error obtained from the subsequent phase error control unit 126, and generates the digital IQ signal to be received based on the phase error corrected symbol timing reproduction signal. , and outputs the detected digital IQ signal to the root roll-off filter 124 .

Root roll-off filter 124 performs filter processing by root roll-off filtering on the detected digital IQ signal, and outputs the filtered digital IQ signal to adaptive equalization section 125 .

Adaptive equalization section 125 performs adaptive equalization processing on the digital IQ signal after filter processing by root roll-off filtering, and outputs the digital IQ signal to absolute phase conversion section 127 . In the adaptive equalization process, a pilot signal is extracted from the input digital IQ signal after filter processing, and the amplitude and phase change amount between the pilot signal at a known ideal signal point and the pilot signal as the actual received signal are calculated. This is a process of detecting and correcting the digital IQ signal of the main signal to be received.

The phase error control unit 126 detects the amount of phase change obtained by monitoring the signal after the adaptive equalization processing by the adaptive equalization unit 125 as a phase error, and outputs the information of the phase error to the synchronous detection unit 123. do. As a result, synchronization of the digital IQ signal of the main signal to be received by the synchronous detection unit 123 is ensured.

Absolute phasing section 127 generates a digital IQ signal by subjecting the signal after adaptive equalization processing by adaptive equalization section 125 to absolute phasing processing, and outputs the digital IQ signal to error correction decoding section 13 .

The error correction decoding unit 13 performs likelihood determination on the digital IQ signal after the absolute phasing process obtained from the demodulation unit 12, and applies it to the input signal (modulated wave signal for satellite broadcasting to be transmitted). Decoding processing corresponding to a predetermined error correction code is performed to generate a decoded bitstream, which is output to the outside as an output signal.

FIG. 10 is a block diagram showing a schematic configuration of the error correction decoding section 13 in a general satellite broadcasting receiving apparatus of the advanced satellite broadcasting system in the prior art.

The error correction decoding unit 13 shown in FIG. 10 includes an a priori log-likelihood ratio calculation unit 131 , an LDPC decoding unit 132 and a BCH decoding unit 133 . In particular, the good reception performance for white noise is governed by the decoding performance of the LDPC code used in LDPC decoding section 132 .

The a priori log-likelihood ratio calculator 131 uses the digital IQ signal in the main signal section after the absolute phasing process obtained from the demodulator 12, and applies it to the input signal (modulated wave signal for satellite broadcasting to be transmitted). LDPC decoding section 132 performs likelihood determination for constructing an error correction frame corresponding to a predetermined error correction code that has been used, and outputs the error correction frame after likelihood determination to LDPC decoding section 132 .

The LDPC decoding unit 132 performs decoding processing of an LDPC code in a concatenated code in which an inner code is an LDPC code and an outer code is a BCH code as the predetermined error correcting code for the error correction frame after the likelihood determination. Output to BCH decoding section 133 .

After decoding the LDPC code, the BCH decoding unit 133 decodes the BCH code through the energy despreading process, generates a decoded bitstream, and outputs it to the outside as an output signal.

By the way, in the receiving apparatus 100, the deterioration of reception C/N due to rain attenuation can be mentioned as a factor that greatly deteriorates the reception performance. In particular, rainfall attenuation causes the received input signal (modulated wave signal for satellite broadcasting to be transmitted) to drop in signal power, while the background noise also rises. .

At this time, since the noise component is predominantly white noise, especially in the preceding stage of the error correction decoding unit 13 in the receiving apparatus 100 shown in FIG. 9, if the effect of white noise can be reduced, By improving the decoding performance of the LDPC decoding unit 132 shown, an equivalent improvement in reception C/N can be expected. In addition, since the advanced satellite broadcasting transmission system has already started practical service, there is a demand for a technical solution that can reduce the effect of white noise only on the receiver side without changing the specifications of the transmitter side.

SUMMARY OF THE INVENTION An object of the present invention is to provide a receiving apparatus capable of reducing the influence of white noise on reception of digital signals in a digital transmission system.

A digital signal receiving apparatus according to the present invention is a digital signal receiving apparatus, and includes tuning means for selecting and receiving a modulated wave signal to be transmitted and outputting a baseband IQ signal of a channel to be received ; A baseband IQ signal of a channel to be received is input from one tuning unit configured as a channel selection means, and the baseband IQ signal of the channel to be received is sampled in parallel at different timings and digitized. parallel demodulation means for demodulating a signal to generate a plurality of phase-synchronized digital IQ signals; and from each of the plurality of digital IQ signals, based on signal arrangement information known between transmission and reception, the modulated wave Detecting the head position of a predetermined error correction code applied to the signal, and determining the likelihood for constructing an error correction frame of the predetermined error correction code using the digital IQ signal in each main signal section. a pre-likelihood ratio synchronous calculation means for synchronously generating a plurality of error-corrected frames after likelihood determination having respective pre-log-likelihood ratios; , a priori log-likelihood ratio selection means for comparing the a priori log-likelihood ratios to select a maximum value and generating one error correction frame having the maximum value of the a priori log-likelihood ratios; error correction decoding means for performing decoding processing of the predetermined error correction code on one error correction frame having a maximum logarithmic likelihood ratio.

Further, the digital signal receiving apparatus of the present invention is a digital signal receiving apparatus, and includes tuning means for selecting and receiving a modulated wave signal to be transmitted and outputting a baseband IQ signal of a channel to be received. a baseband IQ signal of the same channel to be received, which is selected from a plurality of channel selection units configured as the channel selection means, based on the modulated wave signal as the same input signal ; Parallel processing for generating a plurality of phase-synchronized digital IQ signals by demodulating the digitized signals obtained by sampling the baseband IQ signals of the same receiving target channel in parallel at separate and different timings. Demodulation means, based on signal arrangement information known between transmission and reception from each of the plurality of digital IQ signals, detects the head position of a predetermined error correction code applied to the modulated wave signal, and detects each By performing likelihood determination for constructing an error correction frame of the predetermined error correction code using the digital IQ signal in the main signal section, a plurality of errors after likelihood determination having respective a priori log-likelihood ratios an a priori likelihood ratio synchronous calculation means for synchronously generating a correction frame; comparing the a priori log-likelihood ratios in units of bits of bit strings in each of the plurality of error correction frames to select a maximum value; a priori log-likelihood ratio selection means for generating an error-corrected frame having a maximum log-likelihood ratio; and error correction decoding means for decoding the correction code .

Advantageous Effects of Invention According to the present invention, it is possible to reduce the influence of white noise associated with reception of digital signals in a digital transmission system, and to equivalently improve reception C/N and reception performance.

1 is a block diagram showing a schematic configuration of a receiver according to a first embodiment of the present invention; FIG. FIG. 3 is a block diagram showing a schematic configuration of a parallel demodulation section in the receiver of the first embodiment according to the present invention; FIG. 3 is a block diagram showing a schematic configuration of a prior log-likelihood ratio synchronization calculator and a prior log-likelihood ratio selector in the receiving apparatus of the first embodiment according to the present invention; FIG. 4 is a diagram showing the structure of a multiplex frame composed of 120 modulation slots as a digital IQ signal after demodulation of the advanced satellite broadcasting transmission system according to the receiver of the first embodiment according to the present invention; FIG. 5 is a diagram showing the effect of improving reception performance in the receiver of the first embodiment according to the present invention; FIG. 11 is a block diagram showing a schematic configuration of a receiving device according to a second embodiment of the present invention; FIG. FIG. 11 is a block diagram showing a schematic configuration of a parallel demodulator in the receiver of the second embodiment according to the present invention; FIG. 11 is a block diagram showing a schematic configuration of a receiver according to a third embodiment of the present invention; FIG. 1 is a block diagram showing a schematic configuration of a general satellite broadcasting receiving apparatus of an advanced satellite broadcasting system in the prior art; FIG. FIG. 10 is a block diagram showing a schematic configuration of an error correction decoding unit in a general satellite broadcasting receiver of an advanced satellite broadcasting system in the prior art;

A receiver 1 according to each embodiment of the present invention will be described below with reference to the drawings.

[First Embodiment]
(overall structure)
FIG. 1 is a block diagram showing a schematic configuration of a receiver 1 according to the first embodiment of the invention. 1, the same reference numerals are given to the same components as those shown in FIGS. 9 and 10. FIG. The receiving apparatus 1 also has a control function of detecting information such as the setting of the transmission method from the TMCC signal multiplexed with the main signal and setting the modulation method, coding rate, etc. of the main signal. , the detailed illustration thereof is omitted.

In order to be able to compare the receiver 1 shown in FIG. 1 with the receiver 1 shown in FIGS. This is an example of a forward error correction type receiving apparatus configured for reception, and includes a tuning section 11, a parallel demodulation section 12P, and an error correction decoding section 13P.

The tuning unit 11 shown in FIG. 1 is a functional unit that selects and receives an input signal (modulated wave signal for satellite broadcasting to be transmitted) and outputs a baseband IQ signal of a channel to be received. Since it is configured in the same manner as the tuning unit 11 shown, further description is omitted.

The parallel demodulator 12P includes n (n is an integer equal to or greater than 2) quadrature demodulators 12 (first quadrature demodulator 12-1, second quadrature demodulator 12-2, third quadrature demodulator 12-3, . . . , n-th orthogonal demodulation section 12-n), the configuration of the receiver 100 shown in FIG. Each of the n quadrature demodulators 12 shown in FIG. 1 is composed of components similar to those of the quadrature demodulator 12 shown in FIG. ST3, . It is different from the configuration of the receiving device 100 shown.

The error correction decoding unit 13P includes a prior log-likelihood ratio synchronization calculation unit 131A, a prior log-likelihood ratio selection unit 131B, an LDPC decoding unit 132, and a BCH decoding unit 133. Instead, it differs from the configuration of receiving apparatus 100 shown in FIG. 9 in that a prior log-likelihood ratio synchronization calculation section 131A and a prior log-likelihood ratio selection section 131B are provided.

Therefore, in the following description, the parallel demodulator 12P, the prior log-likelihood ratio synchronization calculator 131A, and the prior log-likelihood ratio selector 131B will be described in order in detail.

(Parallel demodulator 12P)
FIG. 2 is a block diagram showing a schematic configuration of the parallel demodulator 12P in the receiver 1 of the first embodiment according to the present invention. The parallel demodulation unit 12P receives the baseband IQ signal of the channel to be received from one tuning unit 11, and outputs n (n is an integer equal to or greater than 2) quadrature demodulation units 12 (first quadrature demodulation unit 12-1, The second quadrature demodulator 12-2, the third quadrature demodulator 12-3, . n digital IQ signals #1, #2, #3, .

That is, each quadrature demodulation section in the parallel demodulation section 12P is composed of the same components as the quadrature demodulation section 12 shown in FIG. 9, and performs the same operation. , ST3, .

In the example of the first embodiment shown in FIG. 1, since the baseband IQ signal output from one tuning unit 11 is input to the parallel demodulation unit 12P, the AGC unit 112 in the tuning unit 11 (FIG. 9 ) performs automatic gain control with reference to the output value of the A/D converter 121 in the first quadrature demodulator 12-1 shown in FIG. I do.

In this way, the same baseband IQ signal input from the tuning unit 11 is distributed to the individual quadrature demodulators 12 in the parallel demodulator 12P. Since the signals are A/D-converted in parallel at different timings, each quadrature demodulator 12 decorrelates the noise signal. Also, the greater the parallel number n of the individual orthogonal demodulators in the parallel demodulator 12P, the more the non-correlation of the noise signal is improved, and an equivalent improvement in reception C/N can be expected.

FIG. 3 is a block diagram showing a schematic configuration of the prior log-likelihood ratio synchronization calculator 131A and the prior log-likelihood ratio selector 131B in the receiver 1 of the first embodiment according to the present invention.

(Preliminary Log-Likelihood Ratio Synchronous Calculation Unit 131A)
The a priori log-likelihood ratio synchronization calculation unit 131A shown in FIG. -2, . , n-th a priori log-likelihood ratio calculator 1312-n).

n error-correcting code head position detectors 1311 receive n phase-synchronized digital IQ signals #1, #2, #3, . From each of the digital IQ signals, based on the known signal arrangement information between the transmitter and receiver, the leading position of the specified error correction code applied to the input signal (modulated wave signal for satellite broadcasting to be transmitted) is detected. Then, along with the n digital IQ signals, the head position information of each error correction code is output to the n prior log-likelihood ratio calculators 1312, respectively.

FIG. 4 is a diagram showing the structure of a multiplex frame composed of 120 modulation slots as a digital IQ signal after demodulation of the advanced satellite broadcasting transmission system according to the receiver 1 of the first embodiment according to the present invention. As shown in FIG. 4, the digital IQ signal after demodulation in the advanced satellite broadcasting transmission system is transmitted by dividing information for one multiplexed frame into modulation slots #1 to #120. A π/2 shift BPSK-modulated frame synchronization signal FSync is assigned to the head of one multiplexed frame, and thereafter, a slot synchronization signal PSync and an inverted pattern frame synchronization signal are assigned to the heads of even-numbered and odd-numbered modulated slots, respectively. ! FSync is assigned. A pilot signal P corresponding to the modulation scheme of the modulation slot is arranged immediately after the frame synchronization signal and the slot synchronization signal. Within one modulation slot, after the pilot signal P, the data of the main signal in which the video, audio, data broadcasting, etc. are multiplexed, modulated by the modulation method specified by the TMCC signal, and the TMCC modulated by π/2 shift BPSK. signals are alternately transmitted 66 times. By constantly monitoring the information of the TMCC signal, the receiving apparatus 1 adjusts the modulation method, coding rate, etc. even if transmission control such as various modulation methods and coding rates is performed on the transmitting side. You can switch.

Therefore, the n error-correcting code head position detectors 1311 shown in FIG. By using known signal arrangement information between one or more transmission and reception, or using some of them at the same time, appropriately setting the number of times of forward protection or backward protection, and applying a signal detection method such as correlation detection, errors can be detected. Detect the start position of the correction code. Then, after detecting the head position of each error correction code in each digital IQ signal, the n error correction code head position detection unit 1311 detects the head position information of each error correction code together with the n digital IQ signals. are output to n a priori log-likelihood ratio calculators 1312, respectively.

The n a priori log-likelihood ratio calculators 1312 shown in FIG. input, and use the digital IQ signal in each main signal section to configure an error correction frame corresponding to a predetermined error correction code applied to the input signal (modulated wave signal for satellite broadcasting to be transmitted) n error correction frames after likelihood determination with respective a priori log-likelihood ratios #1, #2, . . . , #n is synchronously generated and output to a priori log-likelihood ratio selection section 131B.

That is, the n a priori log-likelihood ratio calculators 1312 use the digital IQ signals in the main signal section after detecting the head positions of the error correction codes in the respective digital IQ signals #1, #2, . . . , #n. , performs the transformation from the IQ signal to the a priori log-likelihood ratio. A formula for calculating the log-likelihood ratio when the IQ signal is represented by symbols is shown below.

In the case of the advanced satellite broadcasting transmission system, since the error correction frame (code length) of the error correction code is 44880 bits, the likelihood ratio λ _m (m = 1 to 44880) is calculated based on the transmission symbol x _m and the reception symbol y _m ), the log-likelihood ratio λ _m is the ratio of likelihoods of bits 0 and 1 to be transmitted, and is expressed by Equation (1) using transmitted symbols x _m and received symbols y _m .

λ _m = ln {P(y _m |x _m =0)/P(y _m |x _m =1)} (1)

Here, the n prior log-likelihood ratio calculators 1312 generate in parallel n error-corrected frames after likelihood determination that are synchronized each having a log-likelihood ratio for the n digital IQ signals. Therefore, the log-likelihood ratios corresponding to the corresponding indices {#1 to #n} are defined as λ _n,m . Through the above processing, the a priori log-likelihood ratio synchronization calculation unit 131A can detect the leading position of each error correction code for n digital IQ signals and obtain a plurality of log-likelihood ratios in parallel. becomes.

(A priori log-likelihood ratio selection unit 131B)
Prior log-likelihood ratio selection section _131B shown in FIG. of error-corrected frames (m bits) are input, and the a priori log-likelihood ratios λ _n,m are compared in bit units (for each value of m) of the bit string in each error-corrected frame, and the maximum value, Max(λ _{n , m} ) are selected, one error correction frame (m bits) having the maximum value Max(λ _n,m ) of the a priori log-likelihood ratios λ _n, m is generated, and output to LDPC decoding section 132 .

Specifically, when m=1, the value that maximizes the a priori log-likelihood ratio is selected from the options of λ _1,1 , λ _2,1 , . . . , λ _n,1 . This makes it possible to obtain log-likelihood ratios for error-correcting codes composed of maximum a priori log-likelihood ratios from a plurality of input sources with uncorrelated white noise.

Finally, LDPC decoding section 132 _shown in FIG. 1 _performs the predetermined In the concatenated code in which the inner code is the LDPC code and the outer code is the BCH code as the error correcting code, the LDPC code is decoded and output to the BCH decoding unit 133 .

After decoding the LDPC code, the BCH decoding unit 133 decodes the BCH code through the energy despreading process, generates a decoded bitstream, and outputs it to the outside as an output signal.

FIG. 5 is a diagram showing the effect of improving reception performance in the receiver 1 of the first embodiment according to the present invention. That is, in FIG. 5, in order to confirm the effectiveness of the example of the first embodiment, the error correction code (LDPC coding rate 7/9) of the advanced satellite broadcasting transmission system and the modulation method 16APSK are applied, and n=2 , m=44880, C/N versus bit error rate (BER) characteristics of the receiver 1 of the first embodiment.

As shown in FIG. 5, a C/N improvement of about 2.2 dB can be confirmed at the BER=1×10 ⁻² point compared to the conventional technology (corresponding to n=1).

As described above, according to the receiving device 1 of the first embodiment, it is possible to reduce the influence of white noise related to the reception of digital signals in the digital transmission system, and to equivalently improve the reception C/N and reception performance. can.

In the above-described embodiment, the parallel demodulation unit 12P receives the baseband IQ signal of the channel to be received from one tuning unit 11, and the n quadrature demodulation units 12 sample and digitize the signals at different timings. An example of demodulating the obtained signal, generating n digital IQ signals #1, #2, #3, . , a configuration using a plurality of tuning units 11 is also possible. The receivers 1 of the second embodiment and the third embodiment using a plurality of tuning units 11 will be described in order below.

[Second embodiment]
(overall structure)
FIG. 6 is a block diagram showing a schematic configuration of the receiver 1 of the second embodiment according to the invention. Also, FIG. 7 is a block diagram showing a schematic configuration of the parallel demodulator 12P in the receiver 1 of the second embodiment according to the present invention. 6 and 7, the same reference numerals are given to the same components as those shown in FIGS. 1 and 2. FIG. The receiving apparatus 1 also has a control function of detecting information such as the setting of the transmission method from the TMCC signal multiplexed with the main signal and setting the modulation method, coding rate, etc. of the main signal. , the detailed illustration thereof is omitted.

Compared to the first embodiment shown in FIG. 1, the receiving apparatus 1 shown in FIG. The difference is that they include (first tuning section 11-1, second tuning section 11-2, third tuning section 11-3, . . . , n-th tuning section 11-n).

Each of the n tuning units 11 shown in FIG. 6 selects and receives an input signal (modulated wave signal for satellite broadcasting to be transmitted), and based on the modulated wave signal as an individual input signal, It is a functional unit that outputs the baseband IQ signal of the same reception target channel that has been selected. More specifically, each of the n number of tuning units 11 shown in FIG. 6 is configured in the same manner as the tuning unit 11 shown in FIG. From n input signals (modulated wave signals), n baseband IQ signals obtained by selecting the same channel to be received are output to the parallel demodulator 12P.

As in the first embodiment, the parallel demodulation unit 12P shown in FIGS. 6 and 7 includes n (n is an integer equal to or greater than 2) orthogonal demodulation units 12 (first orthogonal demodulation unit 12-1, second orthogonal demodulation unit 12-1). section 12-2, third orthogonal demodulation section 12-3, . . . , n-th orthogonal demodulation section 12-n). However, each of the n orthogonal demodulators 12 shown in FIGS. 6 and 7 is composed of components similar to those of the orthogonal demodulator 12 shown in FIG. , ST2, ST3, . It has an A/D converter 121 that converts to .

That is, in the second embodiment, since the baseband IQ signal input from each of the n tuning units 11 may be output from each tuning unit 11 at different timings, each of the n quadrature demodulation units 12 Even if the sampling timing in the A/D converter 121 is the common sampling signal ST, the parallel demodulator 12P shown in FIGS. 6 and 7 has substantially different sampling timings for the baseband IQ signals to be demodulated. , different digital IQ signals can be obtained and output to the error correction decoding unit 13P. However, also in the second embodiment, as in the first embodiment, each A/D conversion unit 121 of the n orthogonal demodulation units 12 positively generates separate sampling signals ST1 and ST2 with staggered sampling timings. , ST3, .

Therefore, as shown in FIGS. 6 and 7, the parallel demodulator 12P of this embodiment receives the respective baseband IQ signals output from the n channel selectors 11, and the n quadrature demodulators 12 Demodulate the digitized signals sampled at separate timings or at common timings to generate n digital IQ signals #1, #2, #3, . and output to the error correction decoding unit 13P.

In the example of the second embodiment, since each baseband IQ signal output from the n tuning units 11 is input to the parallel demodulation unit 12P, the AGC units 112 ( 9) refer to the output values of the A/D converters 121 in each of the n quadrature demodulators 12 shown in FIG. automatic gain control.

In this way, the individual quadrature demodulators 12 in the parallel demodulator 12P according to the second embodiment are supplied with the baseband IQ signals of the same reception target channel from the n tuning units 11, respectively. Since the n baseband IQ signals of the target channel are A/D-converted in parallel at substantially different timings, each quadrature demodulator 12 decorrelates the noise signal. Also in the second embodiment, the greater the parallel number n of the individual orthogonal demodulation units in the tuning unit 11 and the parallel demodulation unit 12P, the more the noise signal decorrelation is improved, equivalently receiving C /N can be expected to improve.

The error correction decoding unit 13P is configured in the same manner as in the first embodiment, and further description thereof is omitted. It is possible to detect the head position and obtain multiple log-likelihood ratios in parallel. Further, the a priori log-likelihood ratio selection unit 131B acquires a log-likelihood ratio for error correction code composed of the maximum value of a priori log-likelihood ratios from a plurality of input sources in which white noise is uncorrelated. In particular, by improving the decoding performance of the LDPC code, the reception performance of the entire receiver 1 can be improved.

As described above, even in the receiving device 1 of the second embodiment, it is possible to reduce the influence of white noise related to the reception of digital signals in the digital transmission method, and to equivalently improve the reception C/N and reception performance. .

[Third Embodiment]
(overall structure)
FIG. 8 is a block diagram showing a schematic configuration of the receiver 1 of the third embodiment according to the invention. In FIG. 8, the same reference numerals are given to the same components as those shown in FIGS. The receiving apparatus 1 also has a control function of detecting information such as the setting of the transmission method from the TMCC signal multiplexed with the main signal and setting the modulation method, coding rate, etc. of the main signal. , the detailed illustration thereof is omitted.

Compared with the second embodiment shown in FIG. 6, the receiving apparatus 1 shown in FIG. 8 has n tuning units 11 (first tuning unit 11-1, second tuning unit 11 -2, third tuning section 11-3, .

Here, each of the n tuning units 11 is a functional unit that selects and receives an input signal (modulated wave signal for satellite broadcasting to be transmitted) and outputs a baseband IQ signal of a channel to be received. However, the difference is that each channel is selected based on the same input signal, and the baseband IQ signals of the same reception target channel are output to the parallel demodulator 12P. are doing.

As in the second embodiment, the parallel demodulator 12P shown in FIG. 8 includes n (n is an integer equal to or greater than 2) quadrature demodulators 12 (first quadrature demodulator 12-1, second quadrature demodulator 12- 2, a third orthogonal demodulator 12-3, . . . , an n-th orthogonal demodulator 12-n). Each of the n orthogonal demodulators 12 shown in FIG. 8 is composed of the same components as those of the orthogonal demodulator 12 shown in FIG. Analog baseband IQ signals of the same channel to be received which are respectively input from the n number of tuning units 11 by separate sampling signals ST1, ST2, ST3, . . . , STn or by sampling signals ST with common sampling timing It has an A/D converter 121 (see FIG. 7) that samples values and converts them into respective digital IQ signals.

That is, in the third embodiment as well, since the baseband IQ signals input from the n tuning units 11 may be output from the respective tuning units 11 with a slight timing shift, the n quadrature demodulation units 12 Even if the sampling timing in each A/D conversion unit 121 is the common sampling signal ST, the parallel demodulation unit 12P shown in FIG. Different digital IQ signals can be obtained and output to the error correction decoding unit 13P. However, also in the third embodiment, as in the first embodiment, each A/D converter 121 of the n orthogonal demodulators 12 positively generates separate sampling signals ST1 and ST2 with staggered sampling timings. , ST3, .

Therefore, the parallel demodulation unit 12P of the present embodiment receives the baseband IQ signal of the same channel to be received which is tuned from each of the n tuning units 11 based on the modulated wave signal as the same input signal. Then, n quadrature demodulators 12 demodulate the digitized signals sampled at separate timings or at common timings, and generate n digital IQ signals #1 and #2 each phase-synchronized. , #3, . . . , #n and output to the error correction decoding unit 13P.

In the third embodiment shown in FIG. 8, similarly to the second embodiment shown in FIG. 7, each baseband IQ signal output from the n tuning units 11 is input to the parallel demodulation unit 12P. Therefore, the AGC units 112 (see FIG. 9) in the n tuning units 11 convert the input signal (modulated wave signal for satellite broadcasting to be transmitted) into the n orthogonal demodulation units 12 shown in FIG. Automatic gain control is performed with reference to the output value of the A/D converter 121 in each of the .

In this way, the individual quadrature demodulators 12 in the parallel demodulator 12P according to the third embodiment receive the baseband IQ signals of the same reception target channel from the n tuning units 11, respectively. Since the baseband IQ signal of the target channel is A/D-converted in parallel at substantially different timings, each quadrature demodulator 12 decorrelates the noise signal. Also in the third embodiment, the greater the parallel number n of the individual orthogonal demodulation units in the tuning unit 11 and the parallel demodulation unit 12P, the more the noise signal decorrelation is improved, equivalently receiving C /N can be expected to improve.

The error correction decoding unit 13P is configured in the same manner as in the first embodiment, and further description thereof is omitted. It is possible to detect the head position and obtain multiple log-likelihood ratios in parallel. Further, the a priori log-likelihood ratio selection unit 131B acquires a log-likelihood ratio for error correction code composed of the maximum value of a priori log-likelihood ratios from a plurality of input sources in which white noise is uncorrelated. In particular, by improving the decoding performance of the LDPC code, the reception performance of the entire receiver 1 can be improved.

As described above, also in the receiver 1 of the third embodiment, it is possible to reduce the influence of white noise related to the reception of digital signals in the digital transmission method, and to equivalently improve the reception C/N and reception performance. .

A program for configuring a computer functioning as the receiving device 1 and causing each means of the receiving device 1 to function can be preferably used for the above-described embodiment. Specifically, a control unit for controlling each means can be configured by a central processing unit (CPU) in a computer, and at least a storage unit for appropriately storing programs required to operate each means It can be configured with one memory. That is, by causing the CPU of such a computer to execute the program, the functions of the above-described means can be realized. Further, a program for realizing the function of each means can be stored in a predetermined area of the aforementioned storage section (memory). Such a storage unit can be configured with a RAM or ROM inside the device, or can be configured with an external storage device (eg, hard disk). Also, such a program can be made up of a part of software (stored in a ROM or an external storage device) on an OS used in a computer. Furthermore, a program for causing such a computer to function as each means can be recorded on a computer-readable recording medium. Moreover, each of the means described above can be configured as a part of hardware or software, and can be realized by combining them.

Although the above embodiments have been described based on specific examples, various applications are possible. For example, although 16APSK has been described as an example of the modulation scheme, other modulation schemes are also applicable. It is also applicable to other transmission systems such as satellite broadcasting, terrestrial broadcasting, mobile communication, and fixed communication, and can be applied to various transmission paths by appropriately designating the transmission path. Accordingly, the present invention is not limited to the examples of embodiments described above, but only by the description of the appended claims.

According to the present invention, it is possible to reduce the influence of white noise related to the reception of digital signals in the digital transmission system, and to equivalently improve the reception C / N and reception performance, so that the digital signal in the digital transmission system It is useful for the use of the receiving device of

1 Receiving Device 11 Tuning Unit 11-1 First Tuning Unit 11-2 Second Tuning Unit 11-3 Third Tuning Unit 11-n nth Tuning Unit 12 Quadrature Demodulator 12P Parallel Demodulator 12-1 First Quadrature Demodulator 12-2 second quadrature demodulator 12-3 third quadrature demodulator 12-n n-th quadrature demodulator 13 error correction decoder 13P error correction decoder 111 frequency designation/tuning unit 112 automatic gain control (AGC) unit 113 intermediate Frequency (IF)/baseband converter 114 Low-pass filter (LPF)
121 analog/digital (A/D) conversion unit 122 symbol timing recovery unit 123 synchronous detection unit 124 roll-off filter 125 adaptive equalization unit 126 phase error control unit 127 absolute phasing unit 131A prior log-likelihood ratio synchronization calculation unit 131B prior Log-likelihood ratio selection unit 132 LDPC decoding unit 133 BCH decoding unit 1311 Error correction code start position detection unit 1311-1 First error correction code start position detection unit 1311-2 Second error correction code start position detection unit 1311-n n error correction code start position detector 1312 prior log-likelihood ratio calculator 1312-1 first prior log-likelihood ratio calculator 1312-2 second prior log-likelihood ratio calculator 1312-n n-th prior log-likelihood ratio calculator

Claims (2)

A receiving device for a digital signal,
a channel selection means for selecting and receiving a modulated wave signal to be transmitted and outputting a baseband IQ signal of a channel to be received;
A baseband IQ signal of a channel to be received is input from one tuning unit configured as the channel selection means, and the baseband IQ signals of the channel to be received are sampled in parallel at separate and different timings and digitized. parallel demodulation means for demodulating the obtained signal to generate a plurality of phase-synchronized digital IQ signals;
From each of the plurality of digital IQ signals, based on known signal arrangement information between transmission and reception, the leading position of the predetermined error correction code applied to the modulated wave signal is detected, and in each main signal section synchronizing a plurality of error correction frames after likelihood determination having respective a priori log-likelihood ratios by performing likelihood determination for constructing an error correction frame of the predetermined error correction code using the digital IQ signal; an a priori likelihood ratio synchronization calculation means for generating;
comparing the a priori log-likelihood ratios in bit units of bit strings in each of the plurality of error-corrected frames to select a maximum value, and selecting one error-corrected frame having the maximum value of the a priori log-likelihood ratios; a priori log-likelihood ratio selection means for generating;
error correction decoding means for performing decoding processing of the predetermined error correction code on one error correction frame having the maximum value of the a priori log-likelihood ratio;
A receiving device comprising: A receiving device for a digital signal,
a channel selection means for selecting and receiving a modulated wave signal to be transmitted and outputting a baseband IQ signal of a channel to be received;
The baseband IQ signals of the same channel to be received are respectively selected based on the modulated wave signal as the same input signal from a plurality of channel selection units configured as the channel selection means, and the respective selected channels are input. Parallel demodulation for generating a plurality of phase-synchronized digital IQ signals by demodulating the baseband IQ signals of the same reception target channel in parallel at different timings and demodulating the digitized signals. means and
From each of the plurality of digital IQ signals, based on known signal arrangement information between transmission and reception, the leading position of the predetermined error correction code applied to the modulated wave signal is detected, and in each main signal section synchronizing a plurality of error correction frames after likelihood determination having respective a priori log-likelihood ratios by performing likelihood determination for constructing an error correction frame of the predetermined error correction code using the digital IQ signal; an a priori likelihood ratio synchronization calculation means for generating;
comparing the a priori log-likelihood ratios in bit units of bit strings in each of the plurality of error-corrected frames to select a maximum value, and selecting one error-corrected frame having the maximum value of the a priori log-likelihood ratios; a priori log-likelihood ratio selection means for generating;
error correction decoding means for performing decoding processing of the predetermined error correction code on one error correction frame having the maximum value of the a priori log-likelihood ratio;
A receiving device comprising :

Images