JP7323264B2 - power converter - Google Patents

Description

TECHNICAL FIELD Embodiments of the present invention relate to power converters.

2. Description of the Related Art There are power converters that have a plurality of semiconductor elements and perform power conversion by switching the plurality of semiconductor elements. In such a power conversion device, when the threshold of the drive voltage (e.g., gate voltage) for the change from the off state to the on state of the plurality of semiconductor elements and the threshold of the drive voltage for the change from the on state to the off state change, switching loss increase in Further, for example, when a plurality of semiconductor elements are used in parallel, the current balance between the parallel lines deteriorates, which may lead to breakage of the semiconductor elements.

In this way, changes in the threshold values of a plurality of semiconductor elements may cause failure of the semiconductor elements or shutdown of the device at unintended timing, causing serious damage to the power conversion device. In particular, semiconductor devices using relatively new semiconductor materials such as SiC (Silicon Carbide) have a short history of practical application, and during long-term field operation, unexpected application of voltage and current duty, aging, or An unknown event or the like may cause the threshold to change.

For this reason, it is desired that the power converter be capable of detecting changes in the threshold values of a plurality of semiconductor elements.

JP 2020-43687 A

Embodiments of the present invention provide a power conversion device capable of detecting changes in threshold values of multiple semiconductor devices.

According to an embodiment of the present invention, a conversion unit having a plurality of semiconductor elements and converting electric power by switching the plurality of semiconductor elements; a plurality of drive units that receive signal inputs and drive the plurality of semiconductor elements based on the input drive signals, the plurality of semiconductor elements each having a pair of main terminals and a control terminal; wherein the plurality of driving units are connected to the control terminal of the corresponding semiconductor element among the plurality of semiconductor elements, and apply control to the control terminal of the corresponding semiconductor element based on the drive signal. a drive circuit that drives the corresponding semiconductor element by switching the magnitude of the voltage; and a threshold change detection circuit that detects a change in threshold of the control voltage of the corresponding semiconductor element, wherein the drive signal has a first state for turning off the corresponding semiconductor element and a second state for turning on the corresponding semiconductor element, and the threshold change detection circuit includes the corresponding a voltage detection circuit connected to the pair of main terminals of a semiconductor element and detecting an element voltage applied between the pair of main terminals; a delay time calculation circuit for calculating a delay time from the signal switching timing to the element voltage switching timing, and detecting a change in the delay time as a change in the threshold. .

A power converter is provided that can detect changes in threshold values of a plurality of semiconductor devices.

BRIEF DESCRIPTION OF THE DRAWINGS It is a block diagram which represents typically the power converter device which concerns on embodiment. It is a graph which represents typically an example of operation|movement of a drive part. It is a block diagram which represents typically the modification of the power converter device which concerns on embodiment. It is a block diagram which represents typically the modification of the power converter device which concerns on embodiment.

Each embodiment will be described below with reference to the drawings.
Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each portion, the size ratio between portions, and the like are not necessarily the same as the actual ones. Also, even when the same parts are shown, the dimensions and ratios may be different depending on the drawing.
In addition, in the present specification and each figure, the same reference numerals are given to the same elements as those described above with respect to the already-appearing figures, and detailed description thereof will be omitted as appropriate.

FIG. 1 is a block diagram schematically showing a power conversion device according to an embodiment.
As shown in FIG. 1 , the power conversion device 10 includes a conversion section 12 and a plurality of drive sections 14 .

The conversion unit 12 has a plurality of semiconductor elements 20 and performs power conversion by switching the plurality of semiconductor elements 20 . The plurality of semiconductor elements 20 are bridge-connected, for example. The plurality of semiconductor elements 20 includes an upper arm semiconductor element 20 and a lower arm semiconductor element 20 . A plurality of drive units 14 are provided corresponding to each of the plurality of semiconductor elements 20 . The drive units 14 receive drive signals from a control device (not shown) and drive the semiconductor elements 20 based on the drive signals.

In other words, the plurality of drive units 14 switch the semiconductor element 20 between the ON state and the OFF state based on the drive signal. In other words, the plurality of drive units 14 drive power conversion by the conversion unit 12 based on drive signals. The conversion unit 12 converts electric power by switching between an ON state and an OFF state of the plurality of semiconductor elements 20 by driving the plurality of driving units 14 .

In FIG. 1, only two semiconductor elements 20 constituting upper and lower arms of one leg of the conversion section 12 and two drive sections 14 corresponding to the two semiconductor elements 20 are shown for convenience. there is

The conversion unit 12 is, for example, a two-level three-phase inverter in which six semiconductor elements 20 are three-phase bridge-connected. In the conversion unit 12 , the connection point between the semiconductor element 20 on the upper arm and the semiconductor element 20 on the lower arm is the AC connection point 21 . The conversion unit 12 is connected to an AC load (not shown) via an AC connection point 21, and by switching a plurality of semiconductor elements 20, for example, converts DC power to AC power and vice versa. Perform at least one of the transforms. The AC load is, for example, an AC power system or a motor that operates on AC power.

However, the configuration of the conversion unit 12 is not limited to this. The conversion unit 12 may be, for example, a single-phase inverter. The conversion unit 12 may be, for example, a multi-level inverter such as a 3-level inverter. The configuration of the conversion unit 12 may be any configuration that converts power by switching a plurality of semiconductor elements 20 . The power conversion by the conversion unit 12 may be, for example, conversion from AC power to another AC power having a different voltage or frequency, or conversion from DC power to another DC power having a different voltage. The conversion of power by conversion unit 12 may be any conversion to another power.

The multiple semiconductor elements 20 have a pair of main terminals 20a and 20b and a control terminal 20c. The main terminal 20a is, for example, a drain. The main terminal 20b is, for example, a source. The control terminal 20c is, for example, a gate.

The multiple semiconductor elements 20 include, for example, SiC (Silicon Carbide). The multiple semiconductor elements 20 are, for example, SiC elements made of SiC. The plurality of semiconductor elements 20 are, for example, self-excited switching elements such as MOSFETs and IGBTs made of SiC. However, the semiconductor material of the plurality of semiconductor elements 20 is not limited to SiC, and may be silicon, GaN (Gallium Nitride), or the like. The plurality of semiconductor elements 20 may be self-excited switching elements made of any semiconductor material.

Each of the multiple drive units 14 has a drive circuit 30 and a threshold change detection circuit 32 . The drive circuit 30 is connected to the control terminal 20c of the corresponding semiconductor element 20 among the plurality of semiconductor elements 20 . The drive circuit 30 receives a drive signal input from a control device (not shown), and determines the magnitude of a voltage (hereinafter referred to as a control voltage) to be applied to the control terminal 20c of the corresponding semiconductor element 20 based on the input drive signal. By switching the height, the corresponding semiconductor element 20 is driven. The number of corresponding semiconductor elements 20 may be one, or may be plural in the case of a parallel configuration.

The drive circuit 30 switches the magnitude of the control voltage between a first voltage for turning off the semiconductor element 20 and a second voltage for turning on the semiconductor element 20 . The first voltage is, for example, Low. The second voltage is, for example, Hi. The magnitude of the second voltage is greater than the magnitude of the first voltage. However, the first voltage and the second voltage may be opposite to the above.

The threshold change detection circuit 32 detects a change in the first threshold of the control voltage when the corresponding semiconductor element 20 changes from the off state to the on state at turn-on, and at the turn-off when the corresponding semiconductor element 20 changes from the on state to the off state. to detect a change in the second threshold of the control voltage of . However, the threshold change detection circuit 32 does not necessarily need to detect changes in both the first threshold and the second threshold. The threshold change detection circuit 32 may detect changes in at least one of the first threshold and the second threshold.

Note that when there are a plurality of semiconductor elements 20 corresponding to the driving section 14, a plurality of threshold change detection circuits 32 are provided for each of the plurality of semiconductor elements 20, for example. The multiple semiconductor elements 20 detect, for example, the first and second thresholds of the corresponding multiple semiconductor elements 20 .

The threshold change detection circuit 32 has a voltage detection circuit 40 , a delay time calculation circuit 42 , a first determination circuit 51 and a second determination circuit 52 .

The voltage detection circuit 40 is connected to the pair of main terminals 20a and 20b of the corresponding semiconductor element 20 and detects the voltage applied between the pair of main terminals 20a and 20b (hereinafter referred to as element voltage). The voltage detection circuit 40 is connected to the delay time calculation circuit 42 . The voltage detection circuit 40 inputs the detection result of the element voltage to the delay time calculation circuit 42 .

The delay time calculation circuit 42 receives the detection result of the element voltage and the control signal input from the control device.

FIG. 2 is a graph schematically showing an example of the operation of the driving section.
As shown in FIG. 2, the drive signal has a first state S1 for turning off the corresponding semiconductor element 20 and a second state S2 for turning on the corresponding semiconductor element 20. . The drive circuit 30 applies the first voltage V1 to the control terminal 20c when the drive signal is in the first state S1, and applies the second voltage V2 to the control terminal 20c when the drive signal is in the second state S2. .

As shown in FIG. 2, the control voltage of the control terminal 20c of the semiconductor element 20 is switched from the first voltage V1 to the second voltage V2 by the drive signal when the drive signal is switched from the first state S1 to the second state S2. As a result, the voltage gradually changes from the first voltage V1 to the second voltage V2 according to the time constant of the circuit. Similarly, the control voltage of the control terminal 20c of the semiconductor element 20 changes from the second state S2 to the first state S1 of the drive signal and the drive circuit 30 switches from the second voltage V2 to the first voltage V1. The voltage gradually changes from the second voltage V2 to the first voltage V1 depending on the time constant and the like.

After the drive circuit 30 applies the second voltage V2 to the control terminal 20c, the semiconductor element 20 switches from the off state to the on state in response to the control voltage exceeding the first threshold value Vth1. The semiconductor element 20 switches from an off state to an on state, for example, when the control voltage changes from less than the first threshold Vth1 to greater than or equal to the first threshold Vth1. Therefore, between the timing at which the drive signal switches from the first state S1 to the second state S2 and the timing at which the semiconductor element 20 switches from the OFF state to the ON state, the second voltage corresponding to the change in the control voltage is required. One delay time Td1 occurs.

Similarly, after the drive circuit 30 applies the first voltage V1 to the control terminal 20c, the semiconductor element 20 switches from the ON state to the OFF state in response to the control voltage exceeding the second threshold Vth2. The semiconductor element 20 switches from the on state to the off state, for example, when the control voltage changes from being equal to or greater than the second threshold value Vth2 to being less than the second threshold value Vth2. Therefore, between the timing at which the drive signal switches from the second state S2 to the first state S1 and the timing at which the semiconductor element 20 switches from the on state to the off state, there is a delay time corresponding to the change in the control voltage. 2 delay time Td2 occurs.

The first delay time Td1 changes according to changes in the first threshold Vth1. More specifically, when the first threshold Vth1 changes to the higher side, the first delay time Td1 becomes longer, and when the first threshold Vth1 changes to the lower side, the first delay time Td1 becomes shorter. The second delay time Td2 changes according to changes in the second threshold Vth2. More specifically, when the second threshold Vth2 changes to the higher side, the second delay time Td2 becomes shorter, and when the second threshold Vth2 changes to the lower side, the second delay time Td2 becomes longer. Therefore, by detecting changes in the first delay time Td1 and changes in the second delay time Td2, changes in the first threshold Vth1 and changes in the second threshold Vth2 can be detected.

The delay time calculation circuit 42 calculates the first delay time Td1 and the second delay time Td2 based on the detection result of the element voltage and the control signal.

When the semiconductor element 20 is in the OFF state, a predetermined voltage appears between the pair of main terminals 20a and 20b. On the other hand, when the semiconductor element 20 is in the ON state, the voltage between the pair of main terminals 20a and 20b is substantially zero. Therefore, the delay time calculation circuit 42 detects the OFF state and ON state of the semiconductor element 20 based on the detection result of the element voltage. In other words, the delay time calculation circuit 42 detects the timing at which the control voltage exceeds the first threshold Vth1 and the timing at which the control voltage exceeds the second threshold Vth2 based on the detection result of the element voltage.

The delay time calculation circuit 42 measures the time from the timing of switching the drive signal from the first state S1 to the second state S2 to the timing of switching from the high state to the low state of the element voltage, thereby calculating the first delay. Calculate the time Td1. Then, the delay time calculation circuit 42 measures the time from the timing of switching the drive signal from the second state S2 to the first state S1 to the timing of switching from the low state to the high state of the element voltage. 2 Calculate the delay time Td2.

Thus, the threshold change detection circuit 32 detects, for example, changes in the first delay time Td1 as changes in the first threshold Vth1, and detects changes in the second delay time Td2 as changes in the second threshold Vth2. However, the method for detecting the change in the first threshold Vth1 and the change in the second threshold Vth2 is not limited to this. For example, the voltage of the control terminal 20c may be detected, and changes in the voltage of the control terminal 20c at the timing when the element voltage is switched may be detected as changes in the first threshold value Vth1 and the second threshold value Vth2.

The converter 12 further has, for example, a current detector 22 . The current detection unit 22 is provided for each leg of the conversion unit 12, for example. For example, when the conversion unit 12 has a configuration of two legs, two current detection units 22 are provided in the conversion unit 12, and when the conversion unit 12 has a configuration of three legs, three current detection units 22 are provided. is provided in the conversion unit 12 .

The current detection unit 22 is provided between an AC connection point 21 between the upper arm semiconductor element 20 and the lower arm semiconductor element 20 and an AC load. The current detection unit 22 determines that the direction of current flowing from the AC connection point 21 to the AC load is positive, and the direction of the current flowing from the AC load to the AC connection point 21 is negative. Detects current polarity. The current detection unit 22 is also connected to the delay time calculation circuit 42 and inputs the detection result of the polarity of the current flowing through the AC connection point 21 to the delay time calculation circuit 42 .

In the semiconductor element 20 of the upper arm, when the polarity of the current flowing through the AC connection point 21 is negative, the timing of the change of the element voltage is determined by the switching timing of the semiconductor element 20 of the lower arm. Therefore, when the polarity of the current flowing through the AC connection point 21 is negative, the first delay time Td1 and the second delay time Td2 of the upper arm semiconductor element 20 cannot be detected correctly. Therefore, the delay time calculation circuit 42 of the drive unit 14 corresponding to the semiconductor element 20 of the upper arm, based on the detection result of the current detection unit 22, determines the first delay time only when the polarity of the current flowing through the AC connection point 21 is positive. The delay time Td1 and the second delay time Td2 are calculated, and when the polarity of the current flowing through the AC connection point 21 is negative, the first delay time Td1 and the second delay time Td2 are not calculated.

Similarly, in the semiconductor element 20 of the lower arm, when the polarity of the current flowing through the AC connection point 21 is positive, the timing of the change in the element voltage is determined by the switching timing of the semiconductor element 20 of the upper arm. Therefore, when the polarity of the current flowing through the AC connection point 21 is positive, the first delay time Td1 and the second delay time Td2 of the lower arm semiconductor element 20 cannot be detected correctly. Therefore, the delay time calculation circuit 42 of the drive section 14 corresponding to the semiconductor element 20 of the lower arm, based on the detection result of the current detection section 22, determines the first delay time only when the polarity of the current flowing through the AC connection point 21 is negative. The delay time Td1 and the second delay time Td2 are calculated, and when the polarity of the current flowing through the AC connection point 21 is positive, the first delay time Td1 and the second delay time Td2 are not calculated.

In this example, information on the polarity of the current flowing through the AC connection point 21 is input from the current detection section 22 to the delay time calculation circuit 42 . Without being limited to this, information on the polarity of the current flowing through the AC connection point 21 may be input to the delay time calculation circuit 42 from a host controller or the like, for example.

The polarity of the current flowing through the AC connection point 21 corresponds to the polarity of the device voltage. Therefore, instead of the polarity of the current flowing through the AC connection point 21, the polarity of the device voltage may be used to determine whether to detect the first delay time Td1 and the second delay time Td2. In other words, information on the polarity of the current flowing through the AC connection point 21 may be acquired based on the polarity of the element voltage. In this case, the polarity of the element voltage may be detected by the voltage detection circuit 40, for example. Alternatively, the polarity of the element voltage may be input to the delay time calculation circuit 42 from a host controller or the like.

The delay time calculation circuit 42 is connected to the first determination circuit 51 and the second determination circuit 52 . The delay time calculation circuit 42 inputs the calculation result of the first delay time Td1 when the semiconductor element 20 is turned on to the first determination circuit 51 . Then, the delay time calculation circuit 42 inputs the calculation result of the second delay time Td2 when the semiconductor element 20 is turned off to the second determination circuit 52 .

The first determination circuit 51 has comparators 60 and 62 and an OR circuit 64 . A calculation result of the first delay time Td1 is input to the non-inverting input terminal of the comparator 60 . A determination value on the upper limit side of the first delay time Td1 is input to the inverting input terminal of the comparator 60 . As a result, the comparator 60 outputs Lo to the OR circuit 64 when the calculation result of the first delay time Td1 is less than the upper limit side judgment value, and the calculation result of the first delay time Td1 is the upper limit side judgment value. If it is greater than or equal to the value, it outputs Hi to the OR circuit 64 . In other words, the comparator 60 determines whether or not the calculation result of the first delay time Td1 is equal to or greater than the upper limit side determination value.

A determination value on the lower limit side of the first delay time Td1 is input to the non-inverting input terminal of the comparator 62 . A calculation result of the first delay time Td1 is input to the inverting input terminal of the comparator 62 . As a result, the comparator 62 outputs Lo to the OR circuit 64 when the calculation result of the first delay time Td1 is equal to or greater than the lower limit side judgment value, and the calculation result of the first delay time Td1 is lower limit side judgment value. If less than the value, Hi is output to the OR circuit 64 . In other words, the comparator 62 determines whether or not the calculation result of the first delay time Td1 is less than the lower limit side determination value.

The OR circuit 64 outputs Lo when both outputs of the comparators 60 and 62 are Lo, and outputs Hi when at least one of the outputs of the comparators 60 and 62 is Hi. That is, the OR circuit 64 outputs Lo when the calculation result of the first delay time Td1 is greater than or equal to the lower limit side judgment value and less than the upper limit side judgment value, and the calculation result of the first delay time Td1 is lower limit side. is less than the judgment value of or equal to or greater than the judgment value on the upper limit side, Hi is output.

In this manner, the first determination circuit 51 determines whether or not the calculated result of the first delay time Td1 is equal to or greater than the upper limit side decision value, and whether or not the calculated first delay time Td1 is less than the lower limit side decision value. determine whether or not

If the calculation result of the first delay time Td1 is greater than or equal to the lower limit judgment value and less than the upper limit judgment value, it can be determined that the first threshold value Vth1 is within an appropriate range. When the calculation result of the first delay time Td1 is less than the lower limit judgment value or equal to or greater than the upper limit judgment value, it can be determined that the first threshold value Vth1 has changed beyond the appropriate range.

The first determination circuit 51 outputs the output of the OR circuit 64 to an external control device or the like as the detection result of the change in the first threshold Vth1. As a result, an external control device or the like can grasp whether or not the first threshold value Vth1 at the time of turn-on of the semiconductor element 20 is within an appropriate range.

The second determination circuit 52 has comparators 70 and 72 and an OR circuit 74 . Since the configuration of the second determination circuit 52 is the same as that of the first determination circuit 51, detailed description thereof will be omitted. The second determination circuit 52 outputs the output of the OR circuit 74 to an external control device or the like as the detection result of the change in the second threshold Vth2. As a result, an external control device or the like can grasp whether or not the second threshold Vth2 at the time of turn-off of the semiconductor element 20 is within an appropriate range.

As shown in FIG. 2, the second threshold Vth2 is different from the first threshold Vth1. Therefore, the determination value set for the second threshold Vth2 is also different from the determination value set for the first threshold Vth1. Therefore, when detecting the change in the first threshold Vth1 at turn-on and the change in the second threshold Vth2 of the control voltage at turn-off, the first determination for detecting the change in the first threshold Vth1 is performed as described above. It is necessary to provide a circuit 51 and a second determination circuit 52 for detecting a change in the second threshold Vth2. However, for example, when the first threshold Vth1 and the second threshold Vth2 are the same, the first threshold Vth1 and the second threshold Vth2 may be detected by one determination circuit.

Further, the respective determination values set in the first determination circuit 51 and the second determination circuit 52 are set in accordance with the initial values of the first threshold values Vth1 and the initial values of the second threshold values Vth2 of the plurality of semiconductor elements 20. is adjusted for each semiconductor element 20 of . Accordingly, variations in the first threshold Vth1 and the second threshold Vth2 among the plurality of semiconductor elements 20 can be dealt with.

If the external control device determines that the first threshold value Vth1 has changed more than an appropriate range based on the determination result of the first determination circuit 51, or based on the determination result of the second determination circuit 52, If it is determined that the second threshold value Vth2 has changed beyond the appropriate range, for example, a notification is issued to urge the administrator of the power conversion device 10 to replace the corresponding semiconductor element 20 . As a result, failure of the semiconductor element 20 at unintended timing, stoppage of the power conversion device 10 associated therewith, and the like can be suppressed, and serious damage to the power conversion device 10 can be suppressed.

If the external control device determines that the first threshold value Vth1 has changed more than an appropriate range based on the determination result of the first determination circuit 51, or based on the determination result of the second determination circuit 52, , the operation of the power converter 10 may be stopped, for example, when it is determined that the second threshold Vth2 has changed beyond the appropriate range. As a result, for example, it is possible to prevent the semiconductor element 20 from failing at an unintended timing and the range of the failure from expanding.

As described above, in the power conversion device 10 according to the present embodiment, the threshold change detection circuit 32 detects the first threshold Vth1 of the control voltage when the corresponding semiconductor element 20 changes from the off state to the on state. A change and a change in the second threshold Vth2 of the control voltage at the time of turn-off when the corresponding semiconductor element 20 changes from the ON state to the OFF state are detected.

Thereby, changes in the first threshold Vth1 and the second threshold Vth2 of the plurality of semiconductor elements 20 can be detected. For example, even when relatively new semiconductor materials such as SiC are used for the plurality of semiconductor elements 20, changes in the first threshold Vth1 and the second threshold Vth2 due to unknown events can be detected appropriately. Even when a relatively new semiconductor material such as SiC is used for the plurality of semiconductor elements 20, failure of the semiconductor elements 20 at unintended timing can be suppressed.

Further, as described above, the determination values set in the first determination circuit 51 and the second determination circuit 52 are set to the initial values of the first threshold Vth1 and the initial values of the second threshold Vth2 of the plurality of semiconductor elements 20, respectively. are adjusted for each of the plurality of semiconductor elements 20 according to. As a result, failure of the semiconductor element 20 at unintended timing can be suppressed more reliably.

It should be noted that the first determination circuit 51 and the second determination circuit 52 do not necessarily have to set the determination value on the upper limit side and the determination value on the lower limit side. For example, if it is known in advance whether the first threshold value Vth1 and the second threshold value Vth2 will change to the higher side or the lower side, one of the upper limit side judgment value and the lower limit side judgment value only need to be set. The first determination circuit 51 may determine whether or not the calculation result of the first delay time Td1 exceeds the determination value. The second determination circuit 52 may determine whether or not the calculation result of the second delay time Td2 exceeds the determination value.

Further, when the threshold change detection circuit 32 detects only the change of the first threshold Vth1, only the first determination circuit 51 may be provided without the second determination circuit 52 . When the threshold change detection circuit 32 detects only the change in the second threshold Vth2, the first determination circuit 51 is not provided, and only the second determination circuit 52 is provided.

FIG. 3 is a block diagram schematically showing a modification of the power converter according to the embodiment.
As shown in FIG. 3 , in the power conversion device 10a, the conversion unit 12 further includes multiple temperature sensors 24 . It should be noted that the same reference numerals are given to the parts that are substantially the same as those of the above-described embodiment in terms of function and configuration, and detailed description thereof will be omitted.

The plurality of temperature sensors 24 are provided corresponding to each of the plurality of semiconductor elements 20, measure the temperature of each of the plurality of semiconductor elements 20, and obtain temperature information representing the temperature of each of the plurality of semiconductor elements 20. . The multiple temperature sensors 24 input the acquired temperature information to the multiple drive units 14 corresponding to the multiple semiconductor elements 20 .

In the plurality of driving units 14 of the power electronics device 10a, the threshold change detection circuit 32 further includes a decision value computing unit 44. FIG. The drive unit 14 inputs the acquired temperature information of the corresponding semiconductor element 20 to the determination value calculation unit 44 .

The first threshold Vth<b>1 and the second threshold Vth<b>2 of the semiconductor element 20 may change according to the temperature of the semiconductor element 20 . The determination value calculation unit 44 corrects each determination value set in the first determination circuit 51 and the second determination circuit 52 based on the input temperature information of the corresponding semiconductor element 20, and calculates each determination value after correction. are set in the first determination circuit 51 and the second determination circuit 52 .

This makes it possible to cope with changes in the first threshold Vth1 and the second threshold Vth2 that accompany changes in the temperature of the semiconductor element 20 . As a result, failure of the semiconductor element 20 at unintended timing can be suppressed more reliably. Further, for example, due to changes in the first threshold Vth1 and the second threshold Vth2 due to changes in the temperature of the semiconductor element 20, it is unnecessary to determine that the first threshold Vth1 and the second threshold Vth2 have changed beyond the appropriate range. It is also possible to suppress

It should be noted that the method of acquiring the temperature information of the semiconductor element 20 is not necessarily limited to the method of measuring with the temperature sensor 24 . The temperature information of the semiconductor element 20 may be obtained by calculating, for example, the ON time of the semiconductor element 20, the magnitude of the voltage applied to the semiconductor element 20, and the like. Also, the temperature information may be input to the determination value calculation unit 44 from an external control device or the like, for example.

FIG. 4 is a block diagram schematically showing a modification of the power converter according to the embodiment.
As shown in FIG. 4, in the power conversion device 10b, the first determination circuit 51 and the second determination circuit 52 are omitted from the threshold change detection circuit 32 of the drive unit 14. FIG.

In the power converter 10b, the threshold change detection circuit 32 externally outputs the first delay time Td1 and the second delay time Td2 calculated by the delay time calculation circuit 42 as the detection results of the changes in the first threshold Vth1 and the second threshold Vth2. output to a control device, etc.

In this manner, the first delay time Td1 and the second delay time Td2 are output to an external control device or the like so that the change tendencies of the first delay time Td1 and the second delay time Td2 can be accumulated by the external control device or the like. can be For example, an administrator of the power conversion device 10b may determine when to replace the semiconductor element 20 based on the tendency of change in the first delay time Td1 and the second delay time Td2.

In this case, for example, by providing the first determination circuit 51 and the second determination circuit 52 in an external control device, it is possible to determine whether the first threshold Vth1 and the second threshold Vth2 have changed beyond the appropriate range. Whether or not it can be determined may be determined on the side of an external control device.

While several embodiments of the invention have been described, these embodiments have been presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and modifications can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the scope of the invention described in the claims and equivalents thereof.

DESCRIPTION OF SYMBOLS 10, 10a, 10b... Power converter, 12... Conversion part, 14... Drive part, 20... Semiconductor element, 20a, 20b... Main terminal, 20c... Control terminal, 21... AC connection point, 22... Current detection part, 24 Temperature sensor 30 Drive circuit 32 Threshold change detection circuit 40 Voltage detection circuit 42 Delay time calculation circuit 44 Decision value calculation unit 51 First decision circuit 52 Second decision circuit 60, 62, 70, 72... Comparators, 64, 74... OR circuits

Claims (9)

a conversion unit having a plurality of semiconductor elements and performing power conversion by switching the plurality of semiconductor elements;
a plurality of driving units provided corresponding to each of the plurality of semiconductor elements, receiving an input of a driving signal, and driving the plurality of semiconductor elements based on the input driving signal;
with
The plurality of semiconductor elements have a pair of main terminals and a control terminal,
The plurality of drive units are
It is connected to the control terminal of the corresponding semiconductor element among the plurality of semiconductor elements, and by switching the magnitude of the control voltage to be applied to the control terminal of the corresponding semiconductor element based on the drive signal. a driving circuit for driving the semiconductor element to
a threshold change detection circuit that detects a change in the threshold of the control voltage of the corresponding semiconductor element;
has
the drive signal has a first state for turning off the corresponding semiconductor element and a second state for turning on the corresponding semiconductor element;
The threshold change detection circuit is
a voltage detection circuit connected to the pair of main terminals of the corresponding semiconductor element and detecting an element voltage applied between the pair of main terminals;
a delay time calculation circuit that calculates a delay time from the switching timing of the driving signal to the switching timing of the element voltage based on the driving signal and the detection result of the voltage detection circuit;
and detecting a change in the delay time as a change in the threshold . The delay time calculation circuit measures the time from the timing of switching of the drive signal from the first state to the second state to the timing of switching from the high state to the low state of the element voltage, whereby the A first delay time at the turn-on of the semiconductor element is calculated, and from the timing of switching from the second state to the first state of the drive signal to the timing of switching from the low state to the high state of the device voltage. 2. The power converter according to claim 1 , wherein the second delay time at the turn-off of said semiconductor element is calculated by measuring the time of . 3. The power converter according to claim 1 , wherein the threshold change detection circuit further includes a determination circuit that determines whether or not the delay time calculation result exceeds a determination value. 4. The determination circuit according to claim 3 , wherein the determination circuit determines whether or not the calculated result of the delay time is equal to or greater than the upper limit side decision value, and determines whether or not the calculated delay time value is less than the lower limit side decision value. Power converter. 5. The power converter according to claim 3 , wherein said judgment value is adjusted for each of said plurality of semiconductor elements. The plurality of drive units acquire temperature information representing the temperature of the corresponding semiconductor elements,
The threshold change detection circuit corrects the determination value set in the determination circuit based on the temperature information of the corresponding semiconductor element, and performs determination value calculation for setting the corrected determination value in the determination circuit. The power converter according to any one of claims 3 to 5, further comprising a unit. 3. The power converter according to claim 1 , wherein the threshold change detection circuit outputs the delay time to the outside so that the trend of change in the delay time can be accumulated outside. The plurality of semiconductor elements are bridge-connected and have an upper arm semiconductor element and a lower arm semiconductor element,
The conversion unit is connected to an AC load through an AC connection point between the semiconductor element of the upper arm and the semiconductor element of the lower arm, and converts DC power to AC power by switching the plurality of semiconductor elements. performing at least one conversion of alternating current power to direct current power,
The delay time calculation circuit acquires information on the polarity of the current flowing through the AC connection point,
As for the polarity of the current flowing through the AC connection point, the direction of the current flowing from the AC connection point toward the AC load is positive, and the direction of the current flowing from the AC load toward the AC connection point is negative;
The delay time calculation circuit of the driving unit corresponding to the semiconductor element of the upper arm calculates the delay time only when the polarity of the current flowing through the AC connection point is positive, and flows through the AC connection point. When the polarity of the current is negative, the calculation of the delay time is not performed,
The delay time calculation circuit of the driving unit corresponding to the semiconductor element of the lower arm calculates the delay time only when the polarity of the current flowing through the AC connection point is negative, and flows through the AC connection point. The power converter according to any one of claims 1 to 7 , wherein the delay time is not calculated when the polarity of the current is positive. The power converter according to any one of claims 1 to 8 , wherein the plurality of semiconductor elements contain SiC.

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