JP7361665B2 - Power supply device for plasma reactor - Google Patents

Description

The present invention relates to a plasma reactor power supply device for driving a plasma reactor.

Exhaust gas emitted from an internal combustion engine such as a diesel engine includes CO (carbon monoxide), HC (hydrocarbons), NOx (nitrogen oxides), PM (particulate matter), and the like.

In contrast, a method has been proposed in which PM and the like contained in exhaust gas are removed using a plasma reactor. A plasma reactor includes, for example, a plurality of positive and negative electrode panels. These electrode panels have electrodes built into a dielectric body, and the positive and negative electrode panels have positive and negative electrode panels facing each other alternately at intervals in a direction perpendicular to the flow direction of exhaust gas. It is arranged as follows. When a pulsed high voltage is applied between the positive electrode panel and the negative electrode panel from the plasma reactor power supply device, a dielectric barrier discharge (silent discharge) occurs, and low-temperature plasma ( Non-equilibrium plasma) is generated, and PM and the like in the exhaust gas flowing between the positive and negative electrode panels is oxidized to CO ₂ , H ₂ O, etc. and removed or rendered harmless. Additionally, a plasma reactor may be used to generate ozone from oxygen or air.

A flyback step-up transformer is used for the plasma reactor power supply. For example, in Patent Document 1, the ground potential side of the primary coil of this flyback step-up transformer is grounded via a switch element, while the power source side of this primary coil is directly connected to the positive terminal of a DC power source. Also, the secondary coil of the flyback step-up transformer is connected to the electrode of the plasma reactor. When the switch element is turned on, current flows through the primary coil of the flyback step-up transformer, and energy is stored in the primary coil. After that, when the switch element is turned off, a back electromotive force is generated in the primary coil, which generates a pulse-like high voltage in the secondary coil of the flyback step-up transformer according to the turns ratio with the primary coil. do. Therefore, by repeating on and off of the switch element at a certain period, a pulse-like high voltage is generated in the secondary coil intermittently, and this is applied between the electrodes of the plasma reactor to cause an intermittent discharge. cause to occur.

For example, in the plasma reactor power supply device of Patent Document 2, in addition to grounding the ground potential side (low side) of the primary coil of the flyback step-up transformer via a switch element, the power source side (high side) of the primary coil is grounded via a switch element. is connected to the positive terminal of the DC power supply via another switch element. Also, the secondary coil of the flyback step-up transformer is connected to the electrode of the plasma reactor. When the two switch elements are turned on, current flows through the primary coil of the flyback step-up transformer, and energy is stored in the primary coil. Then, when the low-side switch element is turned off, a back electromotive force is generated in the primary coil, which generates a pulsed high voltage in the secondary coil of the flyback step-up transformer according to the turns ratio with the primary coil. occurs. Therefore, by repeating on and off of the switch element at a certain period, a pulse-like high voltage is generated intermittently in the secondary coil, which is applied between the electrodes of the plasma reactor, causing an intermittent discharge. let

In addition, in the power supply device of Patent Document 2, in order to increase the primary voltage applied to the primary coil of the flyback step-up transformer, a snubber circuit, a diode, a step-up capacitor, etc. connected in parallel with the low-side switch element are provided. The energy remaining after generating a pulsed high voltage in the secondary coil is stored in the boost capacitor. Then, when the low-side switch element is turned on again, the voltage applied to the primary coil is the sum of the voltage of the DC power supply and the voltage of the step-up capacitor, and is higher than the voltage of the DC power supply.

JP 2017-150456 Publication Japanese Patent Application Publication No. 2017-118751

However, in the plasma reactor power supply device disclosed in any of the documents, only one pulse-like high voltage is generated in the secondary coil when the low-side switch element is turned on and then turned off. In other words, these plasma reactor power supplies generate one pulse-like high voltage in the secondary coil each time the low-side switch element is turned on and then turned off, and the energy accumulated in the primary coil is used to generate a high voltage pulse. could not be fully utilized for dielectric barrier discharge in plasma reactors, resulting in low energy efficiency.

The present invention has been made in view of the current situation, and provides a power supply device for a plasma reactor that can generate alternating positive and negative discharges in a plasma reactor multiple times by charging the primary coil with energy once. Furthermore, a power supply device for a plasma reactor with good energy efficiency is provided.

One aspect of the present invention for solving the above problems is to provide a flyback step-up transformer that has a primary coil including a ground side terminal and a power supply side terminal, and a secondary coil that connects a plasma reactor to both ends; A low side switch element connected between the ground side terminal of the coil and the ground potential, and a high side switch element connected between the power side terminal of the primary coil and a power side terminal connected to the positive terminal of the DC power source. a switch element, a low-side driver that turns on and off the low-side switch element, a high-side driver that turns on and off the high-side switch element, and a switch element that turns on and off the low-side switch element and the high-side switch element by the low-side driver and the high-side driver. A power supply device for a plasma reactor, comprising: a driver control unit for controlling the plasma reactor; the plasma reactor power supply device is configured to cause alternating positive and negative discharges over a plurality of times in the connected plasma reactor by charging the primary coil with energy once; The low-side voltage detection section detects a low-side voltage that is the voltage of the ground-side terminal of the primary coil with respect to the ground potential, and outputs a binary low-side voltage signal indicating high and low levels with a positive first threshold voltage as a boundary. a microcontroller configured to be able to execute a first signal generation process that generates a first signal that provides a low-side turn-on permissible period for allowing turn-on of the low-side switch element, and a hardware logic circuit; 1 signal and the low-side voltage signal, the drive logic circuit outputs a low-side drive control signal directed to the low-side driver and a high-side drive control signal directed to the high-side driver, the drive logic circuit comprising: The high-side switch element is turned on, and a low-side voltage drop edge indicating that the low-side voltage has fallen below the first threshold voltage occurs within the low-side turn-on permissible period and in the low-side voltage signal. and a drive logic circuit configured to output the low-side drive control signal that turns on the low-side switch element and charges the primary coil by energizing the primary coil at a first timing. It is a device system.

In this plasma reactor power supply device, a single charge of energy to the primary coil causes multiple positive and negative alternating discharges in the connected plasma reactor, so a voltage that alternates between positive and negative is generated in the primary coil as well, although it is attenuated. However, a voltage that changes over time is applied to the low-side element according to the alternating voltage generated in the primary coil. Therefore, in order to turn on the low-side element by so-called soft switching, it is necessary to appropriately select the turn-on timing.

On the other hand, in the above-mentioned device, when the low-side switch element (hereinafter also simply referred to as low-side element) is turned on and charged by energizing the primary coil, the low-side voltage applied to the low-side element is the positive first voltage. So-called soft switching is performed in which the low-side element is turned on at a first timing when the voltage is lower than the threshold voltage. Therefore, the loss during turn-on of this low-side element can be reduced, and a device with improved energy efficiency can be achieved.

Note that the microcontroller in the driver control section does not directly instruct turn-on of the low-side element by the generated first signal, but gives a low-side turn-on permissible period. On the other hand, in the drive logic circuit of the driver control section, the high-side switch element (hereinafter also simply referred to as high-side element) is turned on, and within the low-side turn-on permissible period (given by the first signal). , and a low-side drive that turns on a low-side switch element at a first timing when a low-side voltage drop edge indicating that the low-side voltage has fallen below a first threshold voltage is input, and charges the primary coil by energizing the primary coil. The control signal is configured to output a control signal.

In this way, by using a microcontroller in the driver control section, the software running on this microcontroller can take into account fluctuation factors such as the operating state of the internal combustion engine and differences in the product number of the plasma reactor used. The beginning (start timing), length, end (end timing), etc. of the low side turn-on permissible period given by the signal can be appropriately and easily set. On the other hand, since a drive logic circuit that can process predetermined logic processing in a short time is also used, the high-side switch element is turned on, and within the low-side turn-on tolerance period set by the first signal, At a first timing when a low-side voltage drop edge indicating that the low-side voltage has fallen below the first threshold voltage is input from the voltage detection section, the low-side element is turned on and charged by energizing the primary coil. A low side drive control signal can be output without delay.

Note that as the low-side switch element and the high-side switch element, it is preferable to use a switch element for power control with a high withstand voltage, and for example, a power MOSFET, IGBT, thyristor, GTO, triac, etc. can be used.

Further, the low-side driver turns on and off the low-side switch element according to a low-side drive control signal input from the drive logic circuit of the driver control section. Similarly, the high-side driver turns on and off the high-side switch element according to a high-side drive control signal input from the drive logic circuit of the driver control section.

The driver control section includes a low-side voltage detection section, a microcontroller, and a drive logic circuit. Of these, the low-side voltage detection section outputs a low-side voltage signal given in two values, a high level and a low level, indicating the level of the low-side voltage. Further, the microcontroller has a CPU, a ROM, a RAM, and an input/output interface section, and operates according to software (program) stored in the ROM or the like. The drive logic circuit is composed of a hardware logic circuit. Specifically, for example, it can be configured by combining individual logic circuits, gate circuits such as AND gates included in general-purpose logic ICs, programmable logic devices (PLDs), ASICs, etc. It can also be configured.

Among the low-side voltage signals output by the low-side voltage detection section, the "low-side voltage drop edge" indicates that the low-side voltage has decreased below the first threshold voltage in the waveform of the low-side voltage signal represented by a binary value. Refers to switching from high level to low level or from low level to high level.

Further, examples of the plasma reactor include those used to remove PM from exhaust gas from an internal combustion engine, and those that generate ozone using supplied air and oxygen, as described above.
Examples of the DC power source include, for example, a DC stabilized power source, a battery, and a DC power source consisting of a battery and a DC-DC converter that outputs an output voltage that is boosted or stepped down from the battery voltage.

In the above-mentioned power supply device for a plasma reactor, the microcontroller may determine, in the first signal generation process, a cycle securing period from an instruction to turn on the low-side switch element in the drive logic circuit at the first timing. It is preferable that the plasma reactor power supply device generates the first signal for starting the next low-side turn-on permissible period at the elapsed second timing.

A plasma reactor is a capacitive load, and the magnitude of its capacitive component varies depending on the temperature and humidity of the gas (exhaust gas, etc.) surrounding the electrode panel. Therefore, when causing the plasma reactor to generate alternating positive and negative discharges multiple times, the alternating cycle of the alternating discharges varies depending on the variation in the capacitance component of the plasma reactor. Therefore, if the cycle of repeatedly charging energy to the primary coil (charging cycle) is set to a fixed length in advance, the changing low-side voltage Vlds and the timing of turning on the low-side element can be matched as described above. There is a possibility that so-called soft switching may not be possible.

In contrast, in this plasma reactor power supply device, the microcontroller generates a first signal for starting the next low-side turn-on permissible period (referred to as period P2) at a second timing. Therefore, it is sufficient to turn on the low-side element during the low-side turn-on tolerance period P2, and even if the alternating period of the alternating discharge changes due to changes in the capacitance component of the plasma reactor, an appropriate The low-side element can be turned on at the timing (first timing).

However, it is not possible to accurately determine the charging period (referred to as period Tloo) from the previous turn-on of the low-side element (first timing) to the next turn-on of the low-side element (next first timing). However, this charging period Tloo can be set in a range that is greater than or equal to the period securing period (referred to as period P1) and less than or equal to the sum of the period securing period P1 and the low-side turn-on permissible period P2 (P1≦Ploo≦P1+P2). In this way, it is possible to control the repetition of charging in the plasma reactor by roughly setting the value of the charging period Tloo, which is the repetition period of charging the primary coil, within the above range.

Furthermore, in the plasma reactor power supply device described above, the microcontroller performs a first timing detection process of detecting the first timing using the low side drive control signal, and a first timing detection process in the first timing detection process. In addition to a cycle securing timer process that measures time from timing detection to the second timing when the cycle securing period has elapsed, the first signal that starts the low side turn-on permissible period is generated when the second timing has elapsed. It is preferable that the plasma reactor power supply device is configured to be able to execute the first signal generation process.

In the above device, the first timing detection process of the microcontroller detects the first timing from the low-side drive control signal output by the drive logic circuit, and the cycle securing timer process waits until the second timing when the cycle securing period has elapsed. . In the first signal generation process, the first signal that starts the low-side turn-on permissible period is generated when the second timing elapses, so that the cycle securing period P1 can be reliably secured.

Furthermore, in the plasma reactor power supply device according to any one of the above, the microcontroller includes a second signal that generates a second signal that provides a high-side turn-on permissible period that allows turn-on of the high-side switch element. The drive logic circuit is also configured to be able to execute signal generation processing, and the drive logic circuit is configured such that the low-side switch element is turned off, and the low-side voltage is within the high-side turn-on permissible period and in the low-side voltage signal. A plasma reactor configured to output the high-side drive control signal that turns on the high-side switch element at a third timing when a low-side voltage rising edge indicating that the voltage has exceeded the first threshold voltage occurs. It is recommended to use it as a power supply device.

In the above-mentioned device, in order to turn on the high-side element in advance in preparation for charging by energizing the primary coil (started by turning on the low-side element), the third timing when the low-side voltage exceeds the first threshold voltage is used. Then, the high side element is turned on. Incidentally, the fact that the low-side voltage exceeds the first threshold voltage also indicates that the high-side voltage has fallen below the second threshold voltage corresponding to the first threshold voltage in the low-side voltage. Therefore, the turn-on of the high-side element at this third timing is soft switching. Therefore, it is possible to reduce the loss during turn-on of this high-side element, and it is possible to provide a device with further improved energy efficiency.

In addition, the microcontroller does not directly instruct turn-on of the high-side element by the generated second signal, but provides a high-side turn-on permissible period. On the other hand, in the drive logic circuit, the low-side element is turned off, and the high-side element turns on at the third timing when the low-side voltage rising edge is input within the high-side turn-on tolerance period (given by the second signal). It is configured to output a high side drive control signal that turns on the side switch element.

In this way, by using a microcontroller, the software running on this microcontroller takes into account fluctuation factors such as the operating state of the internal combustion engine and differences in the model number of the plasma reactor used, and adjusts the high level given by the second signal. The beginning (start timing), length, end (end timing), etc. of the side turn-on permissible period can be appropriately and easily set. On the other hand, since a drive logic circuit that can process predetermined logic processing in a short time is also used, the low-side element is turned off, and the low-side voltage is within the high-side turn-on tolerance period set by the second signal. At the third timing when the rising edge is input, the high-side drive control signal that turns on the high-side element can be output without delay.

Furthermore, in the above-mentioned power supply device for a plasma reactor, the microcontroller controls the above-mentioned microcontroller at a fourth timing when a charge period has elapsed from the instruction to turn on the low-side switch element in the drive logic circuit at the first timing. The drive logic circuit is configured to be able to execute a turn-off signal generation process that generates a turn-off signal instructing to turn off the low-side switch element, and the drive logic circuit turns off the low-side switch element by inputting the turn-off signal at the fourth timing. The plasma reactor power supply device is configured to output the low side drive control signal that turns off the plasma reactor.

In this device, the microcontroller generates a turn-off signal that instructs to turn off the low-side switch element at the fourth timing, and the drive logic circuit outputs a low-side drive control signal that turns off the low-side element upon input of the turn-off signal. do. As a result, in this device, the length of the charging period (referred to as period Pc) to the primary coil can be made the same each time, and the length of the charging period (referred to as period Pc) to the primary coil can be adjusted as appropriate depending on the operating status of the internal combustion engine, etc., using software executed on the microcontroller. The length can be adjusted. Therefore, for example, by making the length of the charging period the same each time, the energy charged to the primary coil can be made the same, and the discharge conditions (number of alternating discharges, discharge strength, etc.) can be made the same for each time. be able to. In addition, the amount of energy stored in one charge can be increased or decreased by changing the length of the charging period to an appropriate length depending on the state of the gas that reaches the plasma reactor, such as the operating state of the internal combustion engine. It is also possible to increase or decrease the exhaust gas purification ability.

Note that the microcontroller outputs the generated turn-off signal separately from the first signal and the second signal, and the drive logic circuit inputs this turn-off signal separately from the first signal and the second signal. good. Further, the second signal output by the microcontroller and input to the drive logic circuit can also be used as a turn-off signal.

Moreover, in the above-mentioned power supply device for a plasma reactor, the microcontroller may adjust the low-side voltage to the first threshold voltage at the fourth timing or following the fourth timing in the second signal generation process. The drive logic circuit generates the second signal that instructs to turn off the high-side switch element within a high-side turn-off allowable period that exceeds . The plasma reactor power supply device may be configured to output the high side drive control signal that turns off the plasma reactor.

In this device, the microcontroller issues an instruction to turn off the high-side element as the second signal at the same fourth timing as when the low-side element is turned off, or within a high-side turn-off tolerance period following the fourth timing. The drive logic circuit outputs a high-side drive control signal that turns off the high-side element in response to the input of the second signal.
As a result, the high-side element is turned off, current does not flow to the high-side element, voltage is applied, and the high-side voltage becomes positive. Therefore, a positive/negative alternating voltage is generated in the primary coil and the secondary coil, and the plasma It is possible to generate alternating positive and negative discharges in the reactor.
Moreover, at the fourth timing, which is the same as the turn-off of the low-side element, or when the low-side voltage exceeds the first threshold voltage, the high-side voltage corresponds to the first threshold voltage at the low-side voltage. The high-side element is turned off within the high-side turn-off allowable period in which the voltage is lower than the second threshold voltage. Therefore, even when the high-side element is turned off, so-called soft switching can be performed. Therefore, it is possible to reduce the loss during turn-off of this high-side element, and furthermore, it is possible to provide a device with improved energy efficiency.

Furthermore, in the plasma reactor power supply device described above, the microcontroller also performs the turn-off signal generation process in the second signal generation process, and instructs to turn off the low-side switch element at the fourth timing. and generates the second signal that instructs to turn off the high-side switch element, and upon input of the second signal, the drive logic circuit generates the low-side drive control signal that turns off the low-side switch element. The plasma reactor power supply device may be configured to output the high-side drive control signal that turns off the high-side switch element.

In this device, the second signal simultaneously turns off the low-side switch element and the high-side switch element at the fourth timing, which facilitates control in the microcontroller and also allows the control of the signal input from the microcontroller to the drive logic circuit. By reducing the number of drivers, the configuration of the driver control section can be simplified.

FIG. 1 is an explanatory diagram showing a schematic configuration of a plasma reactor driven by a plasma reactor power supply device according to an embodiment. FIG. 2 is an explanatory diagram showing a schematic circuit configuration of a plasma reactor power supply device according to an embodiment, which is connected to a battery and a plasma reactor. It is a flowchart of drive control of the power supply device for plasma reactors concerning an embodiment. It is a timing chart which shows the operation|movement of each part when the power supply device for plasma reactors which concerns on embodiment is driven.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a schematic configuration of a plasma reactor PR, and FIG. 2 shows a schematic configuration of a plasma reactor power supply device 10 according to an embodiment. Further, FIG. 3 shows a flowchart of drive control of the plasma reactor power supply device 10.

<Description of plasma reactor>
First, the plasma reactor PR driven by the plasma reactor power supply device 10 will be explained. The plasma reactor PR is interposed in the middle of the exhaust pipe EX of the engine, for example, in order to remove PM, CO, HC, NOx, etc. contained in the exhaust gas GS discharged from an automobile engine (not shown).

The plasma reactor PR (see FIG. 1) is driven by a plasma reactor power supply device 10 connected to a battery BT (battery voltage Vs, for example, Vs=12V (nominal)). In this plasma reactor PR, a positive electrode panel PNp has a rectangular plate-shaped positive discharge electrode Dp built in a rectangular plate-shaped dielectric Dd, and a rectangular plate-shaped negative discharge electrode Dn is built in a rectangular plate-shaped dielectric Dd. It has built-in negative electrode panels PNn, which are alternately stacked in the thickness direction with gaps GP in between. The stacked positive electrode panel PNp and negative electrode panel PNn are arranged such that the gap GP extends in the direction along the flow of the exhaust gas GS (left-right direction in FIG. 1). An example of the material for the positive discharge electrode Dp and the negative discharge electrode Dn is tungsten. In addition, an example of the material of the dielectric Dd is alumina.

In this embodiment, as will be described later, a high voltage is applied between the positive discharge electrode Dp and the negative discharge electrode Dn of the plasma reactor PR in the form of a sinusoidal wave that is output from the plasma reactor power supply 10 and is alternately positive and negative while attenuating. The secondary coil output voltage VL2 (see column (g) in FIG. 4) is repeatedly applied (for example, at a frequency of about 100 kHz). When the output voltage VL2 of the plasma reactor power supply device 10 is applied between the discharge electrodes Dp and Dn, a dielectric barrier discharge occurs between the positive electrode panel PNp and the negative electrode panel PNn, and this dielectric barrier discharge causes a low temperature in the gap GP. Plasma is generated. Due to the generation of this low-temperature plasma, PM and the like contained in the exhaust gas GS flowing between the electrode panels PNp and PNn is oxidized (burned) and removed, thereby rendering it harmless.

<Description of power supply device for plasma reactor>
Next, the plasma reactor power supply device 10 that drives the plasma reactor PR will be explained. This plasma reactor power supply device 10 includes a flyback step-up transformer 1, a low-side element 4 and a high-side element 5 for controlling current flow, a snubber capacitor 6, and controls on/off of the above-mentioned low-side element 4 and high-side element 5. An element control section 11 is provided. The element control section 11 includes a low side gate driver 12 that turns on and off the low side element 4, a high side gate driver 13 that turns on and off the high side element 5, and a controller (driver control section) 15. The controller 15 includes a voltage detection section 14L that detects the low-side voltage Vlds, a microcontroller 20, and a drive logic circuit 30.

The flyback step-up transformer 1 has a primary coil 2 and a secondary coil 3. The power supply terminal 2s of the primary coil 2 is connected to the power supply terminal 10bp via the high side element 5. A positive terminal BTP of the battery BT is connected to this power supply side terminal 10bp. On the other hand, the ground side terminal 2e of the primary coil 2 is connected (grounded) to the ground potential GND via the low side element 4. One end of the secondary coil 3 on the upper side in FIG. 2 is used as a positive electrode terminal 3p, and is connected to a positive discharge electrode Dp of the plasma reactor PR. On the other hand, the other end of the secondary coil 3 is made into a negative electrode terminal 3n, and is connected to the negative discharge electrode Dn of the plasma reactor PR.

In addition, in this embodiment, the primary coil voltage VL1 generated in the primary coil 2 takes a positive value when the power supply side terminal 2s has a high potential with respect to the ground side terminal 2e, as shown by the arrow in FIG. In the opposite case, it takes a negative value. Further, it is assumed that the primary coil current IL1 flowing through the primary coil 2 takes a positive value when flowing from the power supply side terminal 2s toward the grounding side terminal 2e, and takes a negative value when flowing in the opposite direction. Further, the secondary coil output voltage VL2 generated in the secondary coil 3 takes a positive value when the positive terminal 3p has a high potential with respect to the negative terminal 3n, and takes a negative value when the opposite occurs. .

In this embodiment, as shown in FIG. 2, the low-side element 4 is, for example, an enhancement type nMOSFET, whose drain terminal D is connected to the ground side terminal 2e of the primary coil 2, and whose source terminal S is connected to the ground potential GND. It is connected. On the other hand, the gate terminal G is connected to a low-side gate driver 12, and the low-side element 4 is turned on and off by a gate drive signal Slg from the low-side gate driver 12. Note that this low-side element 4 has a parasitic diode between its drain and source.

On the other hand, in this embodiment, the high-side element 5 is, for example, an enhancement type nMOSFET, as shown in FIG. It is connected to the positive terminal BTP of the battery BT through the side terminal 10bp. On the other hand, the gate terminal G is connected to a high-side gate driver 13, and the high-side element 5 is turned on and off by a gate drive signal Shg from the high-side gate driver 13. Note that this high-side element 5 also has a parasitic diode between the drain and the source.

The snubber capacitor 6 is electrically connected to the ground side terminal 2e and the power supply side terminal 2s of the primary coil 2, and is connected in parallel to the primary coil 2. Note that the snubber capacitor 6 may be composed of a plurality of capacitors connected in series or in parallel.

As described above, the element control section 11 includes the low side gate driver 12, the high side gate driver 13, and the controller 15. The low-side gate driver 12 sends out a gate drive signal Slg to turn on and off the low-side element 4 according to instructions from the low-side drive control signal Sldr output from the controller 15 . Further, the high-side gate driver 13 sends out a gate drive signal Shg to turn on and off the high-side element 5 according to instructions from the high-side drive control signal Shdr output from the controller 15.

As described above, the controller 15 includes the voltage detection section 14L, the microcontroller 20, and the drive logic circuit 30.
Of these, the voltage detection section 14L detects the low-side voltage Vlds generated between the drain and source of the low-side element 4, that is, the voltage at the ground-side terminal 2e of the primary coil 2 (the potential at the ground-side terminal 2e) with respect to the ground potential GND. , outputs a low-side voltage signal Slvd (see column (h) in FIG. 4) that takes a binary value of high level/low level indicating high/low level with the positive first threshold voltage Vth1 as the boundary (see column (h) in FIG. 4) toward the drive logic circuit 30. . The first threshold voltage Vth1 is set to a predetermined value (for example, 20V) lower than the battery voltage Vs.
Note that in the voltage detection unit 14L of this embodiment, as can be understood from columns (e) and (h) in FIG. While the voltage signal Slvd is set to a high level, it is set to be set to a low level when the low side voltage Vlds exceeds the first threshold voltage Vth1 (Vlds>Vth1).

The microcontroller 20 shown by a dashed line in FIG. 2 includes a CPU, ROM, RAM, input/output circuit, etc. (not shown), and operates according to a predetermined program (software) stored in advance. The microcontroller 20 generates a first signal Sg1 to be outputted to the drive logic circuit 30 for various controls such as charge control, alternating discharge control, high side off control, and regeneration control when driving the plasma reactor PR. A first signal generation process 21 for generating a second signal Sg2, a second signal generation process 22 for generating a second signal Sg2, a first time detection process 23, a cycle securing timer process 24, a turn-off signal generation process 25, etc. can be executed. There is. Note that in this embodiment, the turn-off signal generation process 25 is executed as a part of the second signal generation process 22.

The drive logic circuit 30 shown by a broken line in FIG. 2 is a hardware logic circuit, and is specifically configured by combining general-purpose logic ICs, and receives a first signal Sg1 and a second signal Sg2 from the microcontroller 20. Further, while a low side voltage signal Slvd is inputted from the voltage detection section 14L, it is ethically processed to generate a low side drive control signal Sldr directed to the low side gate driver 12 and a high side drive control signal Shdr directed to the high side gate driver 13. Output as . Specifically, the drive logic circuit 30 in this embodiment includes, for example, two SR flip-flops 33 and 34, an AND gate 31, and a NOR gate 32, which are connected as shown in FIG.

More specifically, the drive logic circuit 30 inputs the first signal Sg1 from the microcontroller 20 and the low-side voltage signal Slvd from the voltage detection section 14L to the AND gate 31, and outputs the AND output from the low-side SR flip-flop. It is input to the S terminal (set terminal) of 33 (also referred to as low side FF). Furthermore, the second signal Sg2 from the microcontroller 20 is input to the R terminal (reset terminal) of the low-side FF 33, and the low-side drive control signal Sldr is sent from the Q output terminal of the low-side FF 33 to the low-side gate driver 12. It is configured to output. On the other hand, the second signal Sg2 and the low-side voltage signal Slvd are input to the NOR gate 32, and the NOR output thereof is input to the S terminal of the high-side SR flip-flop (also referred to as high-side FF) 34. Also, the second signal Sg2 is input to the R terminal of the high side FF 34 as well as the R terminal of the low side FF 33, and a high signal is sent from the QB output terminal that outputs notQ of the high side FF 34 to the high side gate driver 13. The configuration is such that a side drive control signal Shdr is output.

Therefore, the AND gate 31 outputs a high level only when both the input first signal Sg1 and low side voltage signal Slvd become high level, and this output is sent to the S terminal of the low side FF 33. (See columns (h), (j), and (l) in FIG. 4). In the low-side FF 33, when a high-level signal is input to the S terminal, the Q output terminal continues to output a high-level signal until a high-level signal is input to the R terminal, while a high-level signal is input to the R terminal. When a signal is input, the Q output terminal continues to output a low level signal until a high level signal is input to the S terminal. According to the instruction of the low-side drive control signal Sldr output from the Q output terminal of the low-side FF 33, the gate drive signal Slg is output from the low-side gate driver 12 and the low-side element 4 is turned on and off. It changes in synchronization with the gate drive signal Slg output from the driver 12 (see columns (b) and (l) in FIG. 4).

On the other hand, the NOR gate 32 outputs a high level only when the input second signal Sg2 and low-side voltage signal Slvd both become low level, and this output is sent to the S terminal of the high-side FF 34. (See columns (h), (i), and (k) in FIG. 4). In the high-side FF 34, when a high-level signal is input to the S terminal, the QB output terminal continues to output a low-level signal until a high-level signal is input to the R terminal, while the high-level signal is input to the R terminal. When this signal is input, the QB output terminal continues to output a high level signal until a high level signal is input to the S terminal. According to the instruction of the high-side drive control signal Shdr output from the QB output terminal of the high-side FF 34, the gate drive signal Shg is output from the high-side gate driver 13 and the high-side element 5 is turned on and off, thereby controlling the high-side drive. The inversion of the signal Shdr and the gate drive signal Shg output from the high-side gate driver 13 change in synchronization (see columns (a) and (k) in FIG. 4).

Note that the low-side drive control signal Sldr output from the Q output terminal of the low-side FF 33 is branched and input to the microcontroller 20 as well.

<Control of plasma reactor power supply>
Control of the plasma reactor power supply device 10 for operating the plasma reactor PR will be explained using the flowchart of FIG. 3 and the timing chart of FIG. 4.
In this embodiment, under the control of the plasma reactor power supply device 10, the plasma reactor PR receives a high voltage in the form of a sinusoidal wave (for example, a frequency of about 100 kHz) that attenuates while alternating positive and negative, as shown in column (g) of FIG. The secondary coil output voltage VL2 is intermittently and repeatedly applied every charging period Tloo of approximately 50-odd microseconds (see column (b) in FIG. 4). Thereby, repeated dielectric barrier discharge is caused intermittently in the plasma reactor PR at every charging period Tloo.

First, it is assumed that before the first time T1 and the second time T2 (third time T3, which will be described later), the gate drive signal Shg of the high side gate driver 13 is set to high level by the controller 15 in advance, and the gate drive signal Shg of the high side gate driver 13 is set to high level. Consider a state in which the side element 5 is turned on (see column (a) in FIG. 4). As a result, the high side voltage Vhds (see column (d) in FIG. 4) is approximately zero. However, at this point, since the low-side element 4 is turned off, the primary coil 2 is not energized.

Note that the high-side gate driver 13 outputs a gate drive signal Shg corresponding to the input high-side drive control signal Shdr toward the gate terminal G of the high-side switch element 5 to turn the high-side switch element 5 on and off. let The high-side gate driver 13 logically inverts the input high-side drive control signal Shdr and shifts the voltage level to the positive side, so that the high-side gate driver 13 has a size suitable for driving the gate terminal G of the high-side switch element 5 (specifically Specifically, a gate drive signal Shg is output whose high level is higher than the positive electrode potential of battery BT, and whose low level is lower than the positive electrode potential of battery BT.

On the other hand, the low-side gate driver 12 outputs a gate drive signal Slg corresponding to the input high-side drive control signal Sldr toward the gate terminal G of the low-side switch element 4 to turn the low-side switch element 4 on and off. The low-side gate driver 12 adjusts the voltage level of the input low-side drive control signal Sldr to a level suitable for driving the gate terminal G of the low-side switch element 4 (specifically, the high level is higher than the ground potential, A gate drive signal Slg of a low level (a potential lower than the ground potential) is output.

Further, after a second time T2 when a predetermined cycle securing period P1 (for example, 50 μs in this embodiment) has elapsed from the previous first time T1 (the time when charging to the primary coil 2 was started last time), the low side A low-side turn-on tolerance period P2 (in this embodiment, for example, 10 μs) is provided to allow turn-on of the element 4. Specifically, the microcontroller 20 executes a first signal generation process 21 (see FIG. 2) that generates a first signal Sg1 that provides a low-side turn-on tolerance period P2 that allows the low-side element 4 to be turned on. That is, from the second time T2 to the low-side turn-on permissible period P2, the first signal Sg1 (see column (j) in FIG. 4) at a high level is generated by the microcontroller 20 and sent to the AND gate 31 of the drive logic circuit 30. input.

More specifically, the microcontroller 20 performs a first time detection process 23 that detects the first time T1 using the low side drive control signal Sldr obtained from the Q output terminal of the low side FF 33; In addition to executing the period securing timer process 24 that measures the time from the detection of the first time T1 at 1 to the second time T2 at which the period securing period P1 (for example, 50 μs in this embodiment) has elapsed, the first signal generation described above is performed. In process 21, when the second time T2 has elapsed, a first signal Sg1 that starts the low-side turn-on permissible period P2 is generated.

However, at this second time T2, since the low side voltage Vlds (see column (e) in FIG. 4) is higher than the first threshold voltage Vth1 (Vlds>Vth1), the voltage from the voltage detection section 14L to the AND gate 31 is Since the input low-side voltage signal Slvd is at a low level, the output of the AND gate 31 (input to the S terminal of the low-side FF 33) remains at a low level. Further, the second signal Sg2 input to the R terminal of the low-side FF 33 is also set to a low level. The low-side drive control signal Sldr, which is output from the Q output terminal of the low-side FF 33 and input to the low-side gate driver 12, is also set to a low level.

Thereafter, in a charging step S1 (see FIG. 3), the controller 15 of the element control section 11 performs charging control. Specifically, as described above, the high-side element 5 is already turned on, and the low-side element 4 is turned on at the first time T1 within the low-side turn-on allowable period P2. Specifically, since the low-side voltage Vlds (see columns (e) and (f) in FIG. 4), which changes with alternating changes in the primary coil voltage VL1, has fallen below the first threshold voltage Vth1 (Vlds<Vth1), The low-side element 4 is turned on at a first time T1 when a low-side voltage drop edge Egll in which the low-side voltage signal Slvd (see column (h) in FIG. 4) outputted by the voltage detection section 14L switches from a low level to a high level occurs. At the first time T1, when the low-side voltage signal Slvd switches from low level to high level, the output of the AND gate 31 switches to high level and is input to the S terminal of the low-side FF 33. Therefore, the low-side drive control signal Sldr output from the Q output terminal of the low-side FF 33 also switches to high level and is input to the low-side gate driver 12. Therefore, the gate drive signal Slg is also switched, and the low-side element 4 is turned on.

Then, the primary coil current IL1 starts to flow from the battery BT toward the ground potential GND through the high-side element 5, the primary coil 2 of the flyback step-up transformer 1, and the low-side element 4 (see column (c) in FIG. 4). . Note that due to the inductance of the primary coil 2, the primary coil current IL1 becomes a positive current with a triangular wave pattern that increases with time. As a result, energy is charged (stored) in the primary coil 2.

In the device 10 of this embodiment, when the low-side element 4 is turned on and charged by energizing the primary coil 2, the low-side voltage Vlds applied between the drain and source of the low-side element 4 is set to a positive first threshold. So-called soft switching is performed in which the low-side element 4 is turned on at a first time T1 when the voltage is lower than Vth1. Therefore, the loss during turn-on of the low-side element 4 can be reduced, and the device 10 can have improved energy efficiency.

Furthermore, the microcontroller 20 of the controller 15 does not directly instruct turn-on of the low-side element by the generated first signal, but gives a low-side turn-on permissible period P2. On the other hand, in the drive logic circuit 30 of the controller 15, at a first time T1 when the high side element 5 is already turned on, within the low side turn-on tolerance period P2, and when the low side voltage drop edge Egll is input, It is configured to output a low-side drive control signal Sldr that turns on the low-side element 4 and charges the primary coil 2 by energizing it.

In this way, by using the microcontroller 20, the software running on the microcontroller 20 takes various factors into account and determines the start of the low-side turn-on permissible period P2 (second time T2: start) given by the first signal Sg1. Timing), length, end period (end timing), etc. can be set appropriately and easily. On the other hand, since the drive logic circuit 30 that can process predetermined logic processing in a short time is also used, the high side element 5 is already turned on, and the low side turn-on permissible period P2 set by the first signal Sg1 is used. The low-side drive control signal Sldr can be output without delay at the first time T1 when the low-side voltage drop edge Egll from the voltage detection section 14L is input.

Moreover, in the first signal generation process 21, the microcontroller 20 generates the next signal at a second time T2 when the period securing period P1 has elapsed from the instruction to turn on the low-side element 4 in the drive logic circuit 30 at the first time T1. A first signal Sg1 (see column (j) in FIG. 4) for starting the low side turn-on permissible period P2 is generated.

The plasma reactor PR is a capacitive load, and its size varies. Therefore, when the plasma reactor PR is caused to generate alternating positive and negative discharges multiple times, the alternating cycle of the alternating discharges also varies. Therefore, if the charging period of the primary coil is set to a fixed length, it becomes difficult to match the changing low-side voltage Vlds with the timing of turning on the low-side element as described above, and so-called soft switching may not be possible. There is a possibility.

However, in this device 10, the microcontroller 20 generates the first signal Sg1 for starting the low-side turn-on permissible period P2 at the second time T2. Therefore, it is sufficient to turn on the low-side element 4 during the low-side turn-on tolerance period P2, and even if the alternating cycle of the alternating discharge changes due to changes in the capacitance component of the plasma reactor PR, so-called soft switching will occur. The low-side element 4 can be turned on at an appropriate timing (first time T1).

However, the charging period Tloo from the previous turn-on of the low-side element 4 (first time T1) to the next turn-on of the low-side element 4 (next first time T1) cannot be determined accurately. However, this charging period Tloo can be set in a range that is greater than or equal to the period securing period P1 and less than or equal to the sum of the period securing period P1 and the low side turn-on permissible period P2 (P1≦Ploo≦P1+P2). In this way, it is possible to control the repetition of charging in the plasma reactor PR by roughly setting the value of the charging period Tloo, which is the repetition period of charging the primary coil, within the above range.
In addition, in this embodiment, by doing this, in the plasma reactor PR (see column (g) in FIG. 4), from the first time T1 to the next first time T1, a plurality of positive and negative alternating discharges (positive discharge 3 The length of the period in which the negative discharge occurs intermittently (a total of 5 times, 2 times and 2 times) can be set in the range of P1 to P1+P2 (in the present embodiment, in the range of 50 to 60 μs).

In this device 10, the first time detection process 23 of the microcontroller 20 detects the first time T1 from the low-side drive control signal Sldr output by the drive logic circuit 30 (low-side FF 33), and the period securing timer process 24 detects the first time T1. The process waits until the second time T2 when the cycle securing period P1 has elapsed. Then, in the first signal generation process 21, the first signal Sg1 that starts the low-side turn-on permissible period P2 is generated when the second time T2 has elapsed, so that the cycle securing period P1 can be reliably secured.

Next, when the charging period Pc determined by the microcontroller 20 has elapsed from the first time T1 when the low-side element 4 was turned on (fourth time T4), the controller 15 performs alternating discharge control in an alternating discharge step S2 (see FIG. 3). . Specifically, the microcontroller 20 issues an instruction to turn off the low-side element 4 at a fourth time T4 after a charging period Pc has elapsed from an instruction to turn on the low-side element 4 in the drive logic circuit 30 at the first time T1. A turn-off signal generation process 25 is also executed to generate a turn-off signal Sgf. However, in this embodiment, the microcontroller 20 does not generate the turn-off signal Sgf separately from the first signal Sg1 and the second signal Sg2, but uses the second signal Sg2 as the turn-off signal Sgf. That is, at the fourth time T4, the second signal Sg2 that switches from low level to high level is generated.

At the same time, the drive logic circuit 30 of the present embodiment outputs a low-side drive control signal Sldr that turns off the low-side element 4 upon input of the turn-off signal Sgf (second signal Sg2) at the fourth time T4, and outputs a low-side drive control signal Sldr that turns off the low-side gate driver 12. is configured to input. Specifically, by inputting a high-level turn-off signal Sgf (second signal Sg2) to the R terminal of the low-side FF 33 at the fourth time T4, the Q output terminal of the low-side FF 33 is turned off regardless of the signal level of the S terminal. The low-side drive control signal Sldr output from the low-side drive control signal Sldr is set to a low level and is output toward the low-side gate driver 12. As a result, as described above, after the fourth time T4, the low-side gate driver 12 immediately outputs the gate drive signal Slg that turns off the low-side element 4, and the low-side element 4 is forcibly turned off (Fig. (See column 4(b)). In this way, when the low-side element 4 is turned off at the fourth time T4 and the primary coil current IL1 flowing through the primary coil 2 is cut off, immediately after the fourth time T4, the primary coil 2 is connected to the ground side terminal rather than the power supply side terminal 2s. 2e generates a negative high voltage VL1 at a high potential (see column (f) in FIG. 4). Therefore, the low-side voltage Vlds applied between the drain and source of the low-side element 4 has a large positive waveform (see column (e) in FIG. 4).

Note that after the fourth time T4 when the low-side element 4 is turned off, the snubber capacitor 6 absorbs the surge voltage generated in the primary coil 2 to reduce overvoltage and protect the low-side element 4 and the high-side element 5. There is.

In this way, after the fourth time T4, the energy stored in the primary coil 2 is released, and the secondary coil 3 of the flyback step-up transformer 1 first receives a high voltage secondary coil in the form of a positive pulse. Coil output voltage VL2 is generated (see column (g) in FIG. 4). As a result, in the plasma reactor PR connected to the secondary coil 3, first, a dielectric barrier discharge (positive electrode discharge) occurs in which the positive discharge electrode Dp side is set to a positive potential.

Furthermore, due to the resonance between the capacitive plasma reactor PR and the secondary coil 3, and the resonance between the primary coil 2 and the snubber capacitor 6, as shown in column (g) of FIG. 3, a sinusoidal alternating voltage that alternates between positive and negative while attenuating is generated as the secondary coil output voltage VL2. As a result, in the plasma reactor PR, a positive discharge in which the positive discharge electrode Dp side is at a positive potential and, conversely, a negative discharge in which the positive discharge electrode Dp side is at a negative potential are alternately generated. In this embodiment, by charging the primary coil 2 once from the first time T1 to the fourth time T4, the secondary coil output voltage VL2 increases from the fourth time T4 to the next first time T1. An example is shown in which a pulse whose waveform swings four times to the positive side and three times to the negative side is generated.

In this device 10, as described above, the microcontroller 20 generates the turn-off signal Sgf (second signal Sg2) that instructs to turn off the low-side element 4 at the fourth time T4, and the drive logic circuit 30 generates the turn-off signal Sgf (second signal Sg2) that instructs to turn off the low-side element 4. In response to input of the signal Sgf, a low-side drive control signal Sldr that turns off the low-side element 4 is output. As a result, in this device 10, the length of the charging period Pc to the primary coil 2 can be made the same for each charge, or can be adjusted as appropriate depending on the operating status of the internal combustion engine, etc., using the software executed by the microcontroller 25. The length can be adjusted. For this reason, for example, by making the length of the charging period the same each time, the energy charged to the primary coil 2 can be made the same, and the discharge status (number of alternating discharges, intensity of discharge, etc.) of each time can be made the same. You can arrange them. In addition, the amount of energy that can be stored in one charge can be increased or decreased by changing the length of the charging period Pc to an appropriate length depending on the state of the gas that reaches the plasma reactor PR, such as the operating state of the internal combustion engine. It is also possible to increase or decrease the exhaust gas purification ability by changing the intensity of the discharge.

Furthermore, in this embodiment, simultaneously with the start of the alternating discharge step S2 at the fourth time T4, the high side off step S3 is also executed, and the controller 15 also performs high side off control (see FIG. 2). That is, in this embodiment, as shown in columns (a) and (b) of FIG. 4, at the fourth time T4, the low-side element 4 is forcibly turned off and at the same time, the high-side element 5 is also turned off. Specifically, the microcontroller 20 executes a second signal generation process 22 (see FIG. 2) that generates a second signal Sg2, which will be described below. Specifically, at the fourth time T4, a second signal Sg2 is generated that instructs to turn off not only the low-side element 4 but also the high-side element 5. More specifically, as shown in column (i) of FIG. 4, the second signal Sg2 that switches from low level to high level is generated at the fourth time T4. The second signal Sg2 is then input to the R terminal of the low side FF 33, the R terminal of the high side FF 34, and the NOR gate 32 of the drive logic circuit 30, respectively. Note that, as described above, the second signal Sg2 also serves as the turn-off signal Sgf.

The drive logic circuit 30 of this embodiment is configured to output a high-side drive control signal Shdr that turns off the high-side element 5 in response to the input of the second signal Sg2, and input it to the high-side gate driver 13. . Specifically, by inputting the high-level second signal Sg2 to the R terminal of the high-side FF 34 at the fourth time T4, the signal from the QB output terminal of the high-side FF 34 is transmitted, regardless of the signal level of the S terminal. A high-level high-side drive control signal Shdr is output toward the high-side gate driver 13. The high-side gate driver 13 is configured to operate with negative logic, and after the fourth time T4, a gate drive signal Shg that turns off the high-side element 5 is immediately output, and the high-side element 5 is turned off. Ru.

In this device 10, by doing as described above, it is possible to turn off the high-side element 5, to realize a state in which no current flows through the high-side element 5 but a voltage is applied thereto, and the high-side voltage Vhds becomes positive, so that the primary coil 2 and the secondary coil 3 to generate a positive/negative alternating voltage, it is possible to generate a positive/negative alternating discharge in the plasma reactor PR.
Furthermore, at the fourth time T4, the high side voltage Vhds is 0V. That is, no voltage is applied between the drain and source of the high-side element 5 (see column (d) in FIG. 4). Therefore, the turn-off of the high-side element 5 at the fourth time T4 is also a so-called soft switching, and it is possible to reduce the loss during the turn-off of the high-side element 5, and furthermore, it is possible to realize a device with improved energy efficiency. can do.

In particular, in the device 10 of this embodiment, as described above, the microcontroller 20 also functions as the turn-off signal generation process 25 in the second signal generation process 22 (see FIG. 2), and at the fourth time T4, the microcontroller 20 also functions as the turn-off signal generation process 25. It generates a second signal Sg2 that instructs to turn off the high-side element 5 as well as instructs to turn off the high-side element 5. In response to input of the second signal Sg2 (which also serves as the turn-off signal Sgf), the drive logic circuit 30 outputs a low-side drive control signal Sldr that turns off the low-side element 4 and a high-side drive control signal that turns off the high-side element 5. It is configured to output Shdr.

Therefore, in this device 10, the low-side element 4 and the high-side element 5 are simultaneously turned off at the fourth time T4 by the second signal Sg2, so that the control in the microcontroller 20 is facilitated, and the drive logic By reducing the number of signals input to the circuit 30, the configuration of the controller 15 can be simplified.

As can be understood from the columns (d) and (f) in FIG. 4, during the high-side turn-off tolerance period P5 starting from the fourth time T4, the ground side terminal 2e has a higher potential than the power supply side terminal 2s. Since the high primary coil voltage VL1 is generated and the primary coil current IL1 is not flowing, the high side voltage Vhds becomes almost zero. Therefore, the high side off step S3 can also be executed after the start of the alternating discharge step S2. That is, the high-side element 5 can also be turned off during this period P5 following the fourth time T4.

That is, in the second signal generation process 22 of the microcontroller 20, the high-side element 5 is turned off during the high-side turn-off tolerance period P5 following the fourth time T4 during which the low-side voltage Vlds exceeds the first threshold voltage Vth1. A second signal Sg2 is generated that instructs to do so. At the same time, the drive logic circuit 30 may be configured to output a high-side drive control signal Shdr that turns off the high-side element 5 in response to the input of the second signal Sg2, and input the high-side drive control signal Shdr to the high-side gate driver 13. Specifically, in the period P5 following the fourth time T4, by inputting the high-level second signal Sg2 to the R terminal of the high-side FF 34, the high-level high-side drive control signal Shdr is output from the QB output terminal. You can let me. Even in this case, after the input of the second signal Sg2 within the period P5, the high-side gate driver 13 operating with negative logic immediately outputs the gate drive signal Shg that turns off the high-side element 5, and the high-side gate driver 13 operates with negative logic. 5 is turned off.

Even in this case, it is possible to realize a state in which the high-side element 5 is turned off, current does not flow through the high-side element 5, voltage is applied, and the high-side voltage Vhds becomes positive, so that the primary coil 2 and the secondary coil 3 It is possible to generate a positive/negative alternating voltage and generate a positive/negative alternating discharge in the plasma reactor PR.
Moreover, the high-side voltage Vhds is 0V also in the period P5 (see column (d) in FIG. 4). Therefore, the turn-off of the high-side element 5 during the period P5 can also be done by so-called soft switching, and the loss in the turn-off of the high-side element 5 can be reduced, and a device with improved energy efficiency can be achieved.

Next, in regeneration step S4 (see FIG. 3), when a predetermined high-side off period P3 has elapsed since the low-side element 4 was turned off at the fourth time T4 (third time T3), the high-side element 5 is turned on. Thereby, even after the high-side turn-off permissible period P5 has elapsed, a period in which alternating positive and negative discharges occur in the plasma reactor PR is ensured. On top of that, during the subsequent high-side turn-on tolerance period P4, a portion of the energy still remaining in the secondary coil 3 and plasma reactor PR, as well as in the primary coil 2 and snubber capacitor 6, is transferred to the battery. Let BT regenerate. Furthermore, as described above, the high-side element 5 can be turned on in advance in preparation for charging by energizing the primary coil 2, which is started by turning on the low-side element 4.

Specifically, in the microcontroller 20, from the fourth time T4, a predetermined high side off period P3 (for example, in the present embodiment, after the fourth time T4, the low side voltage Vlds swings to the positive side twice, and then three times. A second signal Sg2 (see column (i) in FIG. 4) is generated to be at a high level during the period (before swinging), and during this period P3, the high-side element 5 is prohibited from turning on and kept in the off state. maintain it. Thereby, alternating positive and negative discharges can be generated in the plasma reactor PR over at least the high side off period P3.

On the other hand, turn-on of the high-side element 5 is allowed during the high-side turn-on permissible period P4 from the end of the high-side off period P3 until the fourth time T4 when the next high-side off period P3 starts. Then, at a third time T3 after the start of the high-side turn-on permissible period P4, a high-side drive control signal Shdr that turns on the high-side element 5 is output. Specifically, in the second signal generation process 22, the microcontroller 20 turns on the high-side element 5 from after the high-side off period P3 has elapsed until the fourth time T4 when the next high-side off period P3 starts. A second signal Sg2 is generated that provides a permissible high side turn-on period P4. More specifically, the microcontroller 20 generates the second signal Sg2 (see column (i) in FIG. 4) at a low level over the high-side turn-on permissible period P4, and the NOR gate 32 of the drive logic circuit 30, It is input to the R terminals of the low-side FF 33 and high-side FF 34, respectively.

On the other hand, in the drive logic circuit 30, the low-side element 4 is turned off (see column (ab) in FIG. 4), and within the high-side turn-on permissible period P4, and the low-side voltage signal Slvd (see column (h) in FIG. 4). ), at the third time T3 when the low-side voltage rising edge Eghl indicating that the low-side voltage Vlds (see column (e) in FIG. 4) exceeds the first threshold voltage Vth1 occurs, the high-side voltage that turns on the high-side element 5 occurs. It is configured to output a side drive control signal Shdr. Specifically, as described above, the second signal Sg2 is at a low level during the high-side turn-on permissible period P4. In the low-side voltage signal Slvd (see column (h) in FIG. 4), when a low-side voltage rising edge Eghl that switches from high level to low level occurs at the third time T3, the NOR gate to which the second signal at low level has already been input The output of 32 switches from low level to high level at third time T3. Therefore, the high-side drive control signal Shdr switched from high level to low level is output from the QB output terminal of the high-side FF 34 to which the output of the NOR gate 32 is input to the S terminal. The high-side gate driver 13 to which this signal Shdr is input turns on the high-side element 5 (see column (a) in FIG. 4).

In the above-described device 10, in order to turn on the high-side element 5 in advance in preparation for charging by energizing the primary coil 2 which is started by turning on the low-side element 4 as described above, the low-side voltage Vlds is set to the first threshold. At the third time T3 when the voltage exceeds Vth1, the high side element 5 is turned on. By the way, the fact that the low side voltage Vlds exceeds the first threshold voltage Vth1 (Vlds>Vth1) means that the high side voltage Vhds is higher than the second threshold voltage Vth2 corresponding to the first threshold voltage Vth1 at the low side voltage Vlds. It also indicates that the voltage has decreased (Vhds<Vth2). This will be explained below.

As can be understood from the columns (d) and (e) of FIG. 2 and FIG. 4(a) and (b)), the potential of the source terminal S of the low-side element 4 is originally fixed to the ground potential GND, while the potential of the drain terminal D is separated from the ground potential GND. It becomes. Similarly, in the high-side element 5, the potential of the source terminal S is originally fixed to the potential of the positive terminal BTP of the battery BT (for example, +12V), while the potential of the drain terminal D is separated from the potential of the positive terminal BTP. The situation is as follows. Among them, as described above, a primary coil voltage VL1 (see column (f) in FIG. 4) which alternates between positive and negative is generated in the primary coil 2. Therefore, the period in which the positive low-side voltage Vlds is generated and the period in which the positive high-side voltage Vhds is generated are opposite periods.

Therefore, in this embodiment, when the low-side voltage signal Slvd (see column (h) in FIG. 4) is at a high level, it not only indicates that the low-side voltage Vlds is equal to or lower than the first threshold voltage Vth1, but also indirectly indicates that This indicates that the high side voltage Vhds has a larger positive value than the second threshold voltage Vth2, which is lower than the battery voltage Vs. Conversely, when this low-side voltage signal Slvd is at a low level, it not only indicates that the low-side voltage Vlds has a positive value larger than the first threshold voltage Vth1, but also indirectly indicates that the high-side voltage Vhds This indicates that the second threshold voltage Vth2 is lower than the second threshold voltage Vth2. Therefore, at the timing when the low-side voltage rising edge Eghl at which the low-side voltage signal Slvd changes from high level to low level occurs (for example, at the third time T3), the high-side voltage Vhds is higher than the second threshold voltage Vth2. It also indicates that the value has changed from a positive value to a value equal to or lower than the second threshold voltage Vth2.

Then, at the third time T3, after the high side off period P3 has elapsed, the oscillating primary coil voltage VL1 changes from a positive value to a negative value. This is the timing when the voltage Vhds changes from a positive value to approximately 0, which is smaller than the second threshold voltage Vth2 (Vhds<Vth2). That is, at this third time T3, no large voltage is applied between the drain and source of the high-side element 5 (see column (d) in FIG. 4). Therefore, the turn-on of the high-side element 5 at the third time T3 is so-called soft switching. Therefore, the loss during turn-on of the high-side element 5 can be reduced, and the device 10 can have further improved energy efficiency.

In addition, in the microcontroller 20 of this embodiment, the generated second signal Sg2 does not directly instruct turn-on of the high-side element 5, but provides a high-side turn-on permissible period P4. On the other hand, the drive logic circuit 30 is configured to output a high-side drive control signal that turns on the high-side element 5 at the third time T3.

In this way, by using the microcontroller 20, the software running on the microcontroller 20 can control the second signal by taking into consideration fluctuation factors such as the operating state of the internal combustion engine and differences in the product numbers of the plasma reactors PR used. The start time (fourth time T4: start timing), length, end time (end timing), etc. of the high side turn-on permissible period P4 given by Sg2 can be appropriately and easily set. On the other hand, since the drive logic circuit 30 that can process predetermined logic processing in a short time is also used, the low-side element 4 is already turned off, and within the high-side turn-on permissible period P4 set by the second signal Sg2. , and the high-side drive control signal Shdr can be output without delay at the third time T3 when the low-side voltage rising edge Eghl is input.

Moreover, by turning on the high side element 5 at the third time T3, as shown in columns (c), (d), and (f) of FIG. During the previous period, a positive voltage (higher than the battery voltage Vs) is generated as the primary coil voltage VL1, and the high-side voltage Vhds is supposed to have a positive value during the period from the fifth time T5 to the sixth time T6. , only a primary coil voltage VL1 approximately equal to the battery voltage Vs and a very low high side voltage Vhds are generated, while a negative primary coil current IL1 is flowing toward the battery BT. In this way, energy can be regenerated toward the battery BT, and the energy efficiency of the plasma reactor power supply device 10 can be further improved. In addition, by sufficiently reducing the energy remaining in the primary coil 2, etc. in this way, energy can be charged smoothly to the primary coil 2 during the next charging period Pc from the first time T1 to the fourth time T4. There are also benefits to be gained.
Note that, as shown in column (g) of FIG. 4, due to regeneration, the magnitude of the secondary coil output voltage VL2 also becomes very small from time T5 to T6.

In the present embodiment, as shown in FIG. 4, the timing at which the low-side voltage signal Slvd in the voltage detection section 14L changes from high level to low level is used as the third time T3.
However, for example, during the period of the high-side turn-on permissible period P4, after the low-side voltage signal Slvd changes from a high level to a low level and continues to be at a low level for 1 μs, the period of the high-side turn-on permissible period P4 During the period in which it is detected that the high side voltage Vhds indirectly detected by the voltage detection unit 14L is equal to or lower than the second threshold voltage Vth2 (that is, the period in which the low side voltage signal Slvd is at a low level). A soft-on control for turning on the high-side element 5 may be executed by setting an appropriate timing selected from the above as the third time T3.

After turning on the high side element 5 at the third time T3, the charging step S1 to the regeneration step S4 are repeated from the next first time T1 onward.

Although the present invention has been described above based on the embodiments, it goes without saying that the present invention is not limited to the above-described embodiments, and can be applied with appropriate modifications without departing from the gist thereof.

PR Plasma reactor GND Ground potential BT Battery (DC power supply)
Vs Battery voltage (DC power supply output voltage)
BTP (battery) positive terminal 10 Plasma reactor power supply 1 Flyback step-up transformer 2 (flyback step-up transformer) primary coil 2e (primary coil) ground terminal 2s (primary coil) power supply terminal 3 ( Secondary coil 3p (of flyback step-up transformer) Positive terminal 3n (of secondary coil) Negative terminal VL2 (of secondary coil) Secondary coil output voltage 4 Low-side switch element Vlds Low-side voltage 5 High-side switch element Vhds High-side voltage 6 Snubber capacitor 11 Element control section 14L Voltage detection section (low side voltage detection section)
Slvd Low-side voltage signal Egll Low-side voltage drop edge Eghl Low-side voltage rise edge 15 Controller (driver control section)
20 Microcontroller 21 First signal generation process 22 Second signal generation process 23 First time detection process (first timing detection process)
24 Period securing timer processing 25 Turn-off signal generation processing Tloo Charge period Pc Charge period P5 High side turn-off tolerance period Sg1 First signal Sg2 Second signal Sgf Turn-off signal T1 First time (first timing)
T2 Second time (second timing)
T3 to T6 Time TP1 First elapsed timing 30 Drive logic circuit Sldr Low-side drive control signal Shdr High-side drive control signal 31 AND gate 32 NOR gate 33 Low-side SR flip-flop 34 High-side SR flip-flop Vth1 First threshold voltage Vth2 Second Threshold voltage S1 Charge step S2 Alternate discharge step S3 High side off step S4 Regeneration step

Claims (7)

a primary coil including a ground side terminal and a power side terminal, and
a flyback step-up transformer having a secondary coil connected to both ends of the plasma reactor;
a low side switch element connected between the ground side terminal of the primary coil and ground potential;
a high side switch element connected between the power supply side terminal of the primary coil and a power supply side terminal connected to the positive terminal of the DC power supply;
a low-side driver that turns on and off the low-side switch element;
a high-side driver that turns on and off the high-side switch element;
a driver control unit that controls on/off of the low side switch element and the high side switch element by the low side driver and the high side driver,
A power supply device for a plasma reactor that generates positive and negative alternating discharges multiple times in the connected plasma reactor by charging energy once to the primary coil,
The above driver control section is
a low-side voltage detection unit that detects a low-side voltage that is a voltage of the ground-side terminal of the primary coil with respect to a ground potential, and outputs a binary low-side voltage signal indicating high and low levels with a positive first threshold voltage as a boundary;
a microcontroller configured to be able to execute a first signal generation process that generates a first signal that provides a low-side turn-on tolerance period that allows turn-on of the low-side switch element;
Consists of hardware logic circuits,
the first signal; and
The above low side voltage signal is input,
a low-side drive control signal directed to the low-side driver, and
A drive logic circuit that outputs a high-side drive control signal directed to the high-side driver,
The above high side switch element is turned on,
Within the above low side turn-on permissible period, and
In the low-side voltage signal, a low-side voltage drop edge indicating that the low-side voltage has decreased below the first threshold voltage has occurred;
At the first timing,
a drive logic circuit configured to output the low-side drive control signal that turns on the low-side switch element and charges the primary coil by energizing it. The plasma reactor power supply device according to claim 1,
The microcontroller is
In the first signal generation process, the next low-side turn-on permissible period starts at a second timing when a period ensuring period has elapsed from the instruction to turn on the low-side switch element in the drive logic circuit at the first timing. A power supply device for a plasma reactor that generates the first signal. The plasma reactor power supply device according to claim 2,
The microcontroller is
a first timing detection process of detecting the first timing using the low side drive control signal;
In addition to cycle securing timer processing that measures time from the detection of the first timing in the first timing detection processing to the second timing when the cycle securing period has elapsed;
A power supply device for a plasma reactor configured to be capable of executing the first signal generation process of generating the first signal for starting the low-side turn-on permissible period when the second timing has elapsed. A power supply device for a plasma reactor according to any one of claims 1 to 3,
The microcontroller is
It is also configured to be able to execute a second signal generation process that generates a second signal that provides a high-side turn-on permissible period that allows turn-on of the high-side switch element,
The drive logic circuit is
the low side switch element is turned off;
Within the above high side turn-on permissible period, and
A low-side voltage rising edge indicating that the low-side voltage exceeds the first threshold voltage has occurred in the low-side voltage signal;
At the third timing,
A power supply device for a plasma reactor configured to output the high side drive control signal that turns on the high side switch element. The plasma reactor power supply device according to claim 4,
The microcontroller is
Turn-off signal generation that generates a turn-off signal that instructs to turn off the low-side switch element at a fourth timing when a charge period has elapsed from an instruction to turn on the low-side switch element in the drive logic circuit at the first timing. It is configured to be able to execute processing as well.
The drive logic circuit is
A power supply device for a plasma reactor configured to output the low-side drive control signal that turns off the low-side switch element upon input of the turn-off signal at the fourth timing. The plasma reactor power supply device according to claim 5,
The microcontroller is
In the second signal generation process,
At the fourth timing, or
Following the fourth timing, within a high-side turn-off tolerance period during which the low-side voltage exceeds the first threshold voltage,
generating the second signal that instructs to turn off the high-side switch element;
The drive logic circuit is
A power supply device for a plasma reactor configured to output the high-side drive control signal that turns off the high-side switch element upon input of the second signal. The plasma reactor power supply device according to claim 6,
The microcontroller is
The second signal generation process also serves as the turn-off signal generation process,
At the fourth timing,
Instructing to turn off the low side switch element, and
instructing to turn off the high side switch element;
generating the second signal;
The drive logic circuit is
By inputting the above second signal,
Outputting the low side drive control signal that turns off the low side switch element,
A power supply device for a plasma reactor configured to output the high side drive control signal that turns off the high side switch element.

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