JP7415643B2 - Simulation system, simulation method, and program - Google Patents

Description

The present invention relates to a simulation system, a simulation method, and a program.

Conventionally, various techniques have been proposed for testing a test device such as a power conversion device using hardware-in-the-loop simulation (see, for example, Patent Documents 1 and 2 and Non-Patent Document 1).
Patent Document 1: Japanese Patent Application Publication No. 2014-204503 Patent Document 2: Japanese Patent Application Publication No. 2017-77077 Non-Patent Document 1 Wei Ren, et al. "Improve the Stability and the Accuracy of Power Hardware-in the Loop Simulation by Selecting appropriate Interface Algorithms ," IEEE Trans. Industry Applications, vol. 44, No. 4, 2008

In hardware-in-the-loop simulation, the simulation becomes unstable due to the interface (IF), and even in a situation where the device under test normally operates stably, the operation of the device under test may become unstable. Therefore, there is a risk that the hardware-in-the-loop simulation characteristics that should be simulated may not be obtained, or that the test machine or simulation device may be damaged due to unstable operation of the test machine.

In order to solve the above problems, a first aspect of the present invention provides a simulation system that performs a hardware-in-the-loop simulation of a test device to be connected to a connection target circuit. The simulation system may include an interface circuit that includes a variable impedance element and is connected to the device under test. The simulation system is connected to the device under test via an interface circuit, and includes a circuit to be connected, and a virtual interface circuit that includes a virtual impedance element having an impedance equal to the variable impedance element and compensates for simulation errors due to connection via the interface circuit. The simulation device may include a simulation device for simulating a simulation target circuit including . The simulation system may include a detection device that detects the impedance value of the variable impedance element at which the simulation by the simulation device converges.

The simulation system may further include a setting device that sets the impedance of the variable impedance element to the impedance value detected by the detection device.

The detection device may include a determination unit that determines whether the simulation executed by the simulation device converges each time the setting device changes the impedance of the variable impedance element.

The simulation system may further include a stop device that stops the simulation when the determination unit determines that the simulation diverges.

The detection device may detect the minimum impedance of the variable impedance element at which the simulation by the simulation device converges.

The detection device may detect the minimum impedance by causing the setting device to sequentially decrease the impedance of the variable impedance element starting from the first impedance.

The determination unit may make the determination based on a signal waveform obtained in a simulation performed by a simulation device using the test device.

The detection device may include a storage unit that stores a threshold value based on a feature amount of a reference signal waveform obtained by a simulation performed by a simulation device using another test device having known characteristics. The determination unit may perform the determination based on a comparison result between the feature amount of the signal waveform and a threshold value based on the feature amount of the reference signal waveform.

The detection device may include a storage unit that stores a threshold value of a voltage signal or a current signal obtained in a simulation performed by a simulation device using a test device. The determination unit may make the determination based on a comparison result between the peak value of the signal waveform and a threshold value.

The determination unit may make the determination based on whether the slope of the envelope of the signal waveform is positive.

The determination unit makes a determination based on a Nyquist diagram or a Bode diagram derived from a round transfer function of a circuit in which the device under test and the simulated circuit to be connected are connected via an interface circuit and a virtual interface circuit. You can go.

The simulation system has a detection mode in which the impedance of the variable impedance element is detected when the simulation by the simulation device converges, and a test in which the test device is tested by the simulation device with the variable impedance element set to the impedance detected by the detection mode. The simulation system may further include a switching device that switches the operation mode of the simulation system between the two modes.

In a second aspect of the present invention, a simulation method is provided that performs a hardware-in-the-loop simulation of a test device to be connected to a connection target circuit. The simulation method is to compensate for simulation errors caused by connection via the interface circuit, which includes a circuit to be connected and a virtual impedance element with an impedance equal to that of the variable impedance element, which is connected to the device under test via an interface circuit that includes a variable impedance element. The simulation step may include a simulation stage for simulating a simulation target circuit including a virtual interface circuit that performs a simulation. The simulation method may include a detection step of detecting an impedance value of the variable impedance element at which the simulation by the simulation step converges.

In a third aspect of the present invention, a program is provided. The program is a simulation device that performs a hardware-in-the-loop simulation of a device under test to be connected to a circuit to be connected to a computer, and is connected to the device under test via an interface circuit including a variable impedance element, and is connected to the circuit to be connected. and a virtual interface circuit that includes a virtual impedance element having an impedance equal to the variable impedance element and compensates for simulation errors due to connection via the interface circuit. The program may cause the computer to implement a detection device that detects the impedance value of the variable impedance element at which the simulation by the simulation device converges.

Note that the above summary of the invention does not list all the necessary features of the invention. Furthermore, subcombinations of these features may also constitute inventions.

A simulation system 1 according to an embodiment is shown together with a test machine 2. A calculation device 13 is shown. Setting device 17 is shown together with phase compensation filter 1119. A virtual circuit 1002(1) including a connection circuit 115 is shown. A virtual circuit 1002(2) including a connection circuit 116 is shown. The operation by the simulation system 1 is shown. The attenuation impedance adjustment process is shown. The phase compensation filter 1119 setting process is shown. The phase compensation filter 1119 setting process is shown. An example of a gain characteristic curve of a transfer function is shown. A simulation system 1A according to a modified example is shown. The operation by the simulation system 1A is shown. The common impedance adjustment process is shown. The flow of signals in the hardware-in-the-loop circuit 1001 is shown. 10 is a block diagram of a hardware-in-the-loop circuit 1001. FIG. The time response signal waveform obtained by simulation is shown. 22 illustrates an example computer 2200 in which aspects of the invention may be implemented, in whole or in part.

Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to the claims. Furthermore, not all combinations of features described in the embodiments are essential to the solution of the invention.

[1. Simulation system]
FIG. 1 shows a simulation system 1 according to this embodiment together with a test machine 2. As shown in FIG. The simulation system 1 performs a hardware-in-the-loop simulation of a device under test 2 to be connected to a circuit to be connected. In this embodiment, as an example, the circuit to be connected is simulated, and the device under test 2 is to be connected to a circuit to be connected. Test operation when connected to a circuit. The simulation system 1 may include an interface circuit 10, a simulation device 11, a calculation device 13, an adjustment device 14, a setting device 17, and a switching device 18.

[1.1. Test machine]
The test device 2 is a device to be tested by the simulation system 1. For example, the test device 2 may be a power conversion device, and in this embodiment, as an example, it may be a PCS (Power Conditioning System), a UPS (Uninterruptible Power Supply), or an inverter. The test device 2 may be an actual product, or may be a mini model that has the same functions as the actual device but has a scaled-down capacity and the like. The device under test 2 may have an internal impedance _ZL . The impedance _ZL of the test device 2 may include a resistance component _RL and a reactance component _LL . Analog input and output may be performed on the test device 2.

The connection target circuit to which the device under test 2 is to be connected may supply power to the device under test 2 or may receive power from the device under test 2 . In this embodiment, as an example, the connection target circuit may be a power system that supplies power to the device under test 2 as a power conversion device.

[1.2. Interface circuit]
The interface circuit 10 is connected to the device under test 2. The interface circuit 10 may be a power amplifier that mediates the exchange of signals and power between the test device 2 and the simulation device 11. The interface circuit 10 includes a secondary impedance element Rab, a voltage source 101, a voltage measuring section 102, a current measuring section 103, AD converters 104 and 105, and a DA converter 106.

The secondary impedance element Rab is a so-called common impedance element, and is connected in series with the voltage source 101 between the power terminal of the device under test 2 and the ground. The secondary impedance element Rab is an example of a variable impedance element and may have variable impedance. For example, the secondary impedance element Rab may be a variable resistor. Although the impedance of the secondary impedance element Rab is automatically changed in this embodiment, it may be changed manually. The voltage source 101 supplies an AC voltage to the test device 2 based on a control signal from the simulation device 11 . The DA converter 106 is provided between the voltage source 101 and the simulation device 11 , converts a digital signal of a control signal from the simulation device 11 into an analog signal, and supplies the analog signal to the voltage source 101 .

The voltage measurement unit 102 measures the voltage applied to the device under test 2 between the secondary impedance element Rab and the device under test 2, and supplies the measurement result to the AD converter 104. The AD converter 104 is provided between the voltage measurement unit 102 and the simulation device 11 , converts an analog signal of the measurement result by the voltage measurement unit 102 into a digital signal, and supplies the digital signal to the simulation device 11 .

The current measurement unit 103 measures the current flowing through the voltage source 101 and the device under test 2, and supplies the measurement results to the AD converter 105. The AD converter 105 is provided between the current measuring section 103 and the simulation device 11 and converts the analog signal of the measurement result by the current measuring section 103 into a digital signal and supplies the digital signal to the simulation device 11.

[1.3. Simulation device]
The simulation device 11 is connected to the test device 2 via the interface circuit 10 . The simulation device 11 simulates a simulation target circuit 1000 including a connection target circuit 110, a virtual interface circuit 111, and a phase compensation filter 1119 provided in the virtual interface circuit 111. The simulation target circuit 1000 may be connected to the device under test 2 via the interface circuit 10 . The simulation device 11 may be able to further simulate the hardware-in-the-loop circuit 1001 including at least the connection target circuit 110 and the device under test 2 as a virtual circuit 1002 (see FIGS. 4 and 5). Digital input and output may be performed to the simulation device 11.

[1.3.1. Circuit to be connected]
The connection target circuit 110 is a simulation of the connection target circuit to which the device under test 2 is to be connected. In order to test the reaction of the device under test 2, the connection target circuit 110 may cause various abnormal states such as failures and accidents that are difficult to realize in the actual connection target circuit. The circuit to be connected 110 may include a voltage source 1101 that should supply AC voltage to the device under test 2 when the circuit to be connected 110 and the device under test 2 are actually connected. Note that when the simulation is performed, the voltage that should be supplied to the device under test 2 from the voltage source 1101 is supplied to the device under test 2 from the voltage source 101 of the interface circuit 10. An internal impedance Rs(s) may exist between the voltage source 1101 and the output terminal of AC power in the circuit 110 to be connected. When the connection target circuit 110 is a power system, the internal impedance Rs(s) may be the impedance inside the power system.

[1.3.2. Virtual interface circuit]
The virtual interface circuit 111 is a circuit that connects the connection target circuit 110 and the interface circuit 10, and compensates for simulation errors caused by connection via the interface circuit 10. The simulation error may be a simulation error that occurs due to the transfer characteristics of the interface circuit 10, and may be, for example, a simulation error regarding the behavior when the device under test 2 is connected to an actual circuit to be connected. The virtual interface circuit 111 is, for example, a damped impedance type (DIM) interface circuit in this embodiment. The virtual interface circuit 111 includes a voltage source 1111, a current source 1112, and a voltage measuring section 1113, as well as a primary side impedance element Rab _s (also referred to as a common impedance) and an attenuation impedance circuit 1115.

The voltage source 1111 generates a voltage according to the digital signal supplied from the AD converter 104 of the interface circuit 10. The voltage source 1111 may be connected between the circuit to be connected 110 and ground.

The primary impedance element Rab _s is an example of a virtual impedance element, and has the same impedance as the secondary impedance element Rab of the interface circuit 10. The primary side impedance element Rab _s may be provided between the circuit to be connected 110 and the voltage source 1111.

The attenuation impedance circuit 1115 has variable impedance, and is adjusted based on the impedance _ZL of the device under test 2. The damping impedance circuit 1115 may include a series circuit of a single resistor R _dmp and a single coil L _dmp or a capacitor (not shown). The attenuation impedance circuit 1115 may be provided between the primary impedance element Rab _s and the voltage source 1111.

The current source 1112 generates a current according to the digital signal supplied from the AD converter 105 of the interface circuit 10. The current source 1112 may be provided between the primary impedance element Rab _s and the attenuated impedance circuit 1115 and ground. Current source 1112 may be of a sink type and may flow current to ground.

The voltage measurement unit 1113 measures the voltage supplied from the connection target circuit 110 and supplies it to the DA converter 106 in the interface circuit 10 .

[1.3.3. Phase compensation filter]
The phase compensation filter 1119 compensates for the transmission delay of signals communicated between the connection target circuit 110 and the device under test 2. Note that the transmission delay between the connection target circuit 110 and the device under test 2 includes a transmission delay of a signal (also referred to as a first signal) communicated from the device under test 2 to the connection target circuit 110, and a transmission delay between the connection target circuit 110 and the connection target circuit 110. This includes a transmission delay of a signal (also referred to as a second signal) communicated from to the test device 2. The phase compensation filter 1119 may be provided on either the first signal path or the second signal path, and in this embodiment, it is provided on the second signal path as an example. More specifically, phase compensation filter 1119 may be provided in the communication path between voltage measurement section 1113 and DA converter 106.

[1.4. Calculation device]
The calculation device 13 calculates the impedance _ZL of the test device 2. Calculation device 13 may calculate impedance based on a signal from either one of voltage measurement section 102 and AD converter 104 and a signal from either one of current measurement section 103 and AD converter 105, and may be supplied to the regulating device 14. In this embodiment, as an example, the calculation device 13 is at least partially virtually realized within the virtual interface circuit 111 by the simulation device 11, and is illustrated within the virtual interface circuit 111. However, the calculation device 13 may be virtually realized within the connection target circuit 110, may be physically provided within the interface circuit 10, or may be a separate device from the simulation device 11 and the interface circuit 10. It may be provided as The same applies to the adjustment device 14, setting device 17, and switching device 18, which will be described later.

[1.5. Adjustment device]
The adjustment device 14 adjusts the impedance of the virtual interface circuit 111 based on the calculated impedance _ZL of the device under test 2. In this embodiment, as an example, the adjustment device 14 may adjust the impedance of the attenuation impedance circuit 1115.

[1.6. Setting device]
Setting device 17 sets parameters of phase compensation filter 1119. The setting device 17 calculates an equivalent transmission summarizing the transmission delay of the first signal from the device under test 2 to the circuit to be connected 110 and the transmission delay of the second signal from the circuit to be connected 110 to the device under test 2. The parameters of the phase compensation filter 1119 may be set so that the delay is compensated by the phase compensation filter 1119. Instead of/in addition to this, the setting device 17 configures a signal generated by the circuit to be connected 110 when the circuit to be connected 110 is directly connected to the device under test 2, and a signal generated by the device under test 2. A transfer function G _org (s) (see FIG. 4, where s is a complex variable) expressing the relationship, and when the connection target circuit 110 is connected to the test device 2 via the virtual interface circuit 111 and the interface circuit 10. A transfer function G _IF (s, p) (see FIG. 5) representing the relationship between the signal generated by the circuit to be connected 110 and the signal generated by the device under test 2 is calculated, and the phase compensation filter 1119 is applied so that the two approximate each other. You may set the parameters of

The transfer function G _org (s) is calculated by input u and output y when the input u is the voltage Vs of the voltage source 1101 in the simulated connection target circuit 110 and the output y _org is the voltage VL applied to the device under test 2. It may be a function representing a relationship with _{y org} (for example, a function that converts an input u to an output y _org ). The test device 2 may be a simulated device with respect to the transfer function G _org (s).

Further, the transfer function G _IF (s, p) is calculated when the input u is the voltage Vs of the voltage source 1101 in the simulated connection target circuit 110, and the output y _IF is the voltage V _Back applied to the device under test 2. It may be a function representing the relationship between input u and output y _IF . The test device 2 may be a simulated device regarding the transfer function G _IF (s, p).

[1.7. Switching device]
The switching device 18 switches the operation mode of the simulation system 1 between an online setting mode, an offline setting mode, and a test mode. The switching device 18 may switch the operation mode according to an operator's operation, and may supply an operation mode switching signal to the calculation device 13, the setting device 17, and the like.

In the online setting mode, at least one of the impedance adjustment by the adjustment device 14 and the parameter setting by the setting device 17 is performed by a simulation (also referred to as online simulation) executed when the simulation device 11 is connected to the test device 2. It may be a mode. For example, in the online setting mode, parameters may be set to compensate for the propagation delay of the interface circuit 10 in the online simulation.

In the online setting mode, a device with known characteristics (also referred to as the calibration test device 2) may be connected to the simulation device 11 as the test device 2. In the online simulation, the simulation device 11 may simulate the simulation target circuit 1000.

The offline setting mode may be a mode in which parameters are set by the setting device 17 by simulating the virtual circuit 1002 including at least the connection target circuit 110 and the device under test 2. The virtual circuit 1002 may be a circuit realized on software through simulation. The simulation of the virtual circuit 1002 is also referred to as an offline simulation because the test device 2 does not need to be connected to the simulation apparatus 11.

In the offline setting mode, the transfer function G _org (s) in the offline simulation of the virtual circuit 1002 (1) (see FIG. 4) in which the connection target circuit 110 is directly connected to the simulated test device 2; The phase compensation filter 1119 is designed so that the transfer function G _IF (s, p) of the virtual circuit 1002(2) (see FIG. 5) including the phase compensation filter 1119 whose parameters are set as initial values in the online setting mode is approximated. Parameters may be set. Virtual circuit 1002(2) may further include virtual interface circuit 111 and simulated interface circuit 10.

The test mode may be a mode in which the simulation device 11 is connected to the device under test 2 and the test device 2 is tested using the simulation target circuit 1000 in a simulation executed. The simulation target circuit 1000 in the test mode may include a phase compensation filter 1119 whose parameters are set in the offline setting mode.

According to the above simulation system 1, the transmission delay of the first signal from the device under test 2 to the circuit to be connected 110 and the transmission delay of the second signal from the circuit to be connected 110 to the device under test 2 are added together. Since the parameters of the phase compensation filter 1119 are set so that the combined equivalent transmission delay is compensated by the phase compensation filter 1119, it is possible to compensate for the transmission delay of the first signal and the transmission delay of the second signal separately. By comparison, the simulation can be simplified.

In addition, a transfer function G _org (s) representing the relationship between the signal generated by the connection target circuit 110 and the signal generated by the test machine 2 when the connection target circuit 110 is directly connected to the EUT 2; , transmission representing the relationship between the signal generated in the connection target circuit 110 and the signal generated in the test device 2 when the connection target circuit 110 is connected to the device under test 2 via the virtual interface circuit 111 and the interface circuit 10 Since the parameters of the phase compensation filter 1119 are set so that the function G _IF (s, p) approximates, the transmission delay between the circuit to be connected 110 and the device under test 2 can be compensated for. Therefore, since the hardware-in-the-loop circuit 1001 can reproduce accurate operating waveforms when the device under test 2 and the actual circuit to be connected are connected, the precision of the simulation can be increased and the test on the device under test 2 can be performed. accuracy can be increased.

Furthermore, since the impedance of the virtual interface circuit 111 (in this embodiment, the impedance of the attenuation impedance circuit 1115 as an example) is adjusted based on the impedance Z _L of the device under test 2, the simulated connection target circuit 110 and the test device The influence of the interface circuit 10 and the virtual interface circuit 111 on communication with the machine 2 can be eliminated. Therefore, since the hardware-in-the-loop circuit 1001 can reproduce accurate operating waveforms when the device under test 2 and the actual circuit to be connected are connected, the precision of the simulation can be increased and the test on the device under test 2 can be performed. accuracy can be increased.

Furthermore, in the online setting mode, the parameters of the phase compensation filter 1119 are set so as to compensate for the transmission delay of the interface circuit 10 in the online simulation executed when the simulation device 11 is connected to the device under test 2. Therefore, the parameters of the phase compensation filter 1119 can be set in accordance with the transmission delay of the interface circuit 10 when the simulation device 11 and the device under test 2 are actually connected.

In addition, in the offline setting mode, the transfer function G _IF (s, p) in the virtual circuit 1002 (2) including the phase compensation filter 1119 whose parameters are set as initial values in the online setting mode is the transfer function G _org (s ) parameters are set to approximate. Therefore, the time and cost for calculating suitable parameters can be reduced.

In addition, in the test mode, the device under test 2 is tested using the simulation target circuit 1000 including the phase compensation filter 1119 whose parameters have been set in the offline setting mode. Test accuracy can be increased.

[2. Calculation device]
FIG. 2 shows the calculation device 13. The calculation device 13 may include a supply section 131 , a measurement section 132 , and a specification section 133 . Note that, for simplification of illustration, the phase compensation filter 1119, setting device 17, switching device 18, etc. are omitted in FIG.

The supply unit 131 supplies a reference AC voltage to the device under test 2 . For example, the supply unit 131 may supply the reference AC voltage to the device under test 2 via the voltage source 101 of the interface circuit 10 by supplying a control signal to the DA converter 106 of the interface circuit 10 . The supply unit 131 supplies reference AC power to the device under test 2 in a steady state (in this embodiment, as an example, power conversion is being performed), but in a standby state (in this embodiment, as an example, power is not being output). The reference AC power may be supplied to the test device 2 in a state in which there is no power. The supply unit 131 may be virtually realized in the virtual interface circuit 111 or the connection target circuit 110 by the simulation device 11.

The measurement unit 132 measures the voltage applied to the device under test 2 and the current flowing therethrough. The measurement unit 132 may measure each of the voltage and current at a side closer to the device under test 2 with respect to the AD converters 104, 105 and the DA converter 106 of the interface circuit 10. As an example, the measurement section 132 may be the voltage measurement section 102 and the current measurement section 103 of the interface circuit 10. With this, for example, when measuring current or voltage on the side of the simulation device 11 rather than the AD converters 104, 105 or the DA converter 106 (for example, by measuring the control signal from the supply section 131 to the DA converter 106, (when converting into a voltage of Furthermore, since the measuring unit 132 measures the voltage closer to the device under test 2 than the secondary impedance element Rab, unlike the case where the voltage is measured closer to the voltage source 101 than the secondary impedance element Rab, The voltage applied to test device 2 can be accurately measured. The measurement unit 132 may supply the measurement results to the identification unit 133.

The specifying unit 133 specifies the impedance _ZL of the test device 2 from the measurement result by the measuring unit 132. The identification unit 133 may be virtually implemented in the virtual interface circuit 111 by the simulation device 11. The specifying unit 133 may supply the specified impedance to the adjustment device 14.

According to the calculation device 13 described above, the reference AC voltage is supplied to the device under test 2, the voltage applied to the device under test 2 and the current flowing therein are measured, and the impedance is specified from the measurement results, so an external configuration can be used. The impedance _ZL of the test device 2 can be specified without any problem. Therefore, the impedance _ZL of the test device 2 can be easily specified.

Note that the calculation device 13 may specify the impedance in an online setting mode in which the simulation device 11 is connected to the device under test 2 to be tested.

[3. Setting device]
FIG. 3 shows the setting device 17 together with a phase compensation filter 1119. The setting device 17 may include an acquisition section 171, a calculation section 172, and a setting section 173.

In the online setting mode, the acquisition unit 171 acquires the device under test 2 (as an example in this embodiment) when the simulated connection target circuit 110 is connected to the device under test 2 via the virtual interface circuit 111 and the interface circuit 10. Obtain the voltage applied to the calibration test device 2) and the current flowing through it. The acquisition unit 171 may acquire each of the voltage and current from a signal from either the voltage measurement unit 102 or the AD converter 104, or from a signal from either the current measurement unit 103 or the AD converter 105. . The acquisition unit 171 may supply the acquired voltage value and current value to the calculation unit 172.

In the offline setting mode, the acquisition unit 171 acquires the voltage and current applied to the device under test 2 in the offline simulation of virtual circuits 1002 (1) and (2) connected to the device under test 2 in which the connection target circuit 110 is simulated. Get the current. The acquisition unit 171 may further acquire the impedance of the device under test 2 (as an example, the device under test 2 to be tested) specified by the calculation device 13 in the online setting mode. The acquisition unit 171 may supply the acquired voltage value, current value, and impedance to the calculation unit 172.

In the online setting mode, the calculation unit 172 calculates the difference between the connection target circuit 110 and the device under test 2 (in this embodiment, the calibration test device 2 as an example) from the voltage value and current value acquired from the acquisition unit 171. Calculate the transmission delay of the signal being communicated. The calculation unit 172 calculates an equivalent transmission summed up by adding the transmission delay of the first signal from the device under test 2 to the circuit to be connected 110 and the transmission delay of the second signal from the circuit to be connected 110 to the device under test 2. The delay may be calculated as a multi-order transmission delay (for example, a second-order transmission delay) or may be approximated and calculated as a first-order delay. The calculation unit 172 may calculate values of parameters of the phase compensation filter 1119 that compensate for the calculated transmission delay. The calculation unit 172 may supply the calculated parameter values to the setting unit 173.

In the offline setting mode, the calculation unit 172 calculates the transfer function G _org (s) in the offline simulation of the virtual circuit 1002 (1) in which the simulated connection target circuit 110 is directly connected to the device under test 2. You may do so. In addition, the calculation unit 172 calculates the transfer function G IF in the offline simulation of the virtual circuit 1002 (2) in which the simulated connection target circuit 110 is connected to the device under test 2 via the virtual interface circuit 111 and the interface circuit _10. (s, p) may be calculated. The calculation unit 172 may calculate the transfer function G _org (s) and the transfer function G _IF (s, p) from the voltage value and current value acquired from the acquisition unit 171. Note that in the offline simulation, the impedance _ZL of the device under test 2 specified by the calculation device 13 in the online setting mode may be used as the simulated impedance of the device under test 2 in the virtual circuit 1002.

Furthermore, the calculation unit 172 may calculate the value of the parameter p such that the calculated transfer function G _IF (s, p) approximates the transfer function G _org (s). The calculation unit 172 may use the parameter set in the online setting mode as the initial value of the parameter p of the phase compensation filter 1119 when calculating the transfer function G _IF (s, p). The calculation unit 172 may calculate the value of the parameter p such that the transfer function G (s, p), which is obtained by normalizing the transfer function G _IF (s, p) by the transfer function G _org (s), approximates to 1. . The calculation unit 172 may supply the calculated value of the parameter p to the setting unit 173.

The setting unit 173 sets the value of the parameter p calculated by the calculation unit 172 in the phase compensation filter 1119 in each of the online setting mode and the offline setting mode.

According to the setting device 17 described above, in the online setting mode, the signal transmission delay is calculated using the calibration test device 2 having known characteristics, and the phase compensation filter 1119 is adjusted to compensate for this transmission delay. Since the parameters are set, it is possible to reliably compensate for the transmission delay of the interface circuit 10 in the online setting mode. Therefore, even in the test mode in which the same interface circuit 10 as in the online setting mode is used, the transmission delay of the interface circuit 10 can be reliably compensated for, thereby increasing the accuracy of the test on the test device 2.

In addition, in the offline setting mode, the value of the parameter p is calculated such that the transfer function G (s, p), which is obtained by normalizing the transfer function G _IF (s, p) by the transfer function G _org (s), approximates to 1. Therefore, the transfer function G _IF (s,p) can be approximated to the transfer function G _org (s) regardless of the amplitude of the transmitted signal or the dimension of the transmission delay. Therefore, the phase compensation filter 1119 can be adjusted so that the transmission delay between the circuit to be connected 110 and the device under test 2 is reliably compensated for. Further, since the parameters set in the online setting mode are used as initial values of the parameters of the phase compensation filter 1119, the time and cost for calculating suitable parameters can be reduced. Furthermore, since the impedance _ZL of the device under test 2 specified by the calculation device 13 in the online setting mode is used as the impedance of the device under test 2 simulated in the virtual circuit 1002, it is possible to improve the precision of the offline simulation. can.

[3.1. Connection circuit 115]
FIG. 4 shows a software-based virtual circuit 1002(1) in which the connection target circuit 110 is directly connected to the simulated test device 2. The connection target circuit 110 in the offline simulation and the simulated test device 2 are connected by a connection circuit 115. The connection circuit 115 may simulate a circuit in which the main terminal of the circuit to be connected 110 and the main terminal of the device under test 2 are directly connected by wiring. When the voltage Vs output from the circuit to be connected 110 is the input u, and the voltage V _L applied between the main terminals of the device under test 2 is the output y _ORG , the output y _ORG is the result of the simulation in the simulation device 11. It may follow the input u later by a delay. In this case, the transfer function G _org (s) may be a function that transforms the input u into the output y _ORG .

[3.2. Connection circuit 116]
FIG. 5 shows a virtual circuit 1002 ( 2 ) in which the circuit to be connected 110 is connected to the simulated test device 2 via the virtual interface circuit 111 and the interface circuit 10 . The connection target circuit 110 in the offline simulation and the simulated test device 2 are connected by a connection circuit 116. The connection circuit 116 may simulate the virtual interface circuit 111 and the interface circuit 10 that mediate between the main terminal of the circuit to be connected 110 and the main terminal of the simulated device under test 2. When the voltage Vs output from the connection target circuit 110 is input u, and the voltage V _back applied between the main terminals of the simulated device under test 2 is output y _IF , the output y _IF is may follow the input u with a delay due to the simulation delay in . In this case, the transfer function G _IF (s) may be a function that transforms the input u to the output y _IF . Note that the simulated impedance of the test device 2 may be the impedance _ZL of the test device 2 specified by the calculation device 13 in the online setting mode, and may be the impedance of the damping impedance circuit 1115 adjusted by the adjustment device 14. It's good to be equal.

[4. motion]
FIG. 6 shows the operation of the simulation system 1. The simulation system 1 performs a hardware-in-the-loop simulation of the test device 2 by performing steps S1 to S11. Note that at the start of this operation, the operation mode of the simulation system may be set to the online setting mode by the switching device 18. Further, in this operation, the impedance Z _ab of the secondary impedance element Rab and the primary impedance element Rab _s may be set to zero.

In step S1, the adjustment device 14 adjusts the impedance of the virtual interface circuit 111 (in this embodiment, the impedance of the attenuation impedance circuit 1115 as an example) based on the impedance _ZL of the device under test 2. The adjustment device 14 may adjust the impedance of the virtual interface circuit 111 in cooperation with the calculation device 13, and the voltage and The calculation device 13 may calculate the impedance _ZL of the test object 2 from the current, and the adjustment device 14 may adjust the impedance of the attenuation impedance circuit 1115 based on this calculation result. As an example, the adjustment device 14 may adjust the impedance of the damped impedance circuit 1115 to the impedance Z _L calculated by the calculation device 13.

In step S3, the setting device 17 sets the parameter p of the phase compensation filter 1119. The setting device 17 may adjust the parameter p of the phase compensation filter so as to cancel the transmission delay of the interface circuit 10. The setting device 17 may set the parameter p of the phase compensation filter so that the transmission delay of the interface circuit 10 is compensated for in an online simulation using the calibration test device 2 having known characteristics.

In step S5, the switching device 18 switches the operation mode of the simulation system 1 from the online setting mode to the offline setting mode.

In step S7, the setting device 17 sets the parameter p of the phase compensation filter 1119. The setting device 17 may set parameters so that the transfer function G _org (s) and the transfer function G _IF (s, p) approximate in an offline simulation of the virtual circuit 1002. The transfer function G _IF (s,p) may be calculated by off-line simulation of the virtual circuit 1002(2) including the phase compensation filter 1119 whose parameters are set as initial values by the process of step S3.

In step S9, the switching device 18 switches the operation mode of the simulation system 1 from the offline setting mode to the test mode.

In step S11, the simulation system 1 simulates the simulation target circuit 1000 including the connection target circuit 110, the virtual interface circuit 111, and the phase compensation filter 1119, and tests the test device 2.

[4.1. Attenuation impedance adjustment processing]
FIG. 7 shows the attenuation impedance adjustment process. The adjustment device 14 and the calculation device 13 adjust the attenuation impedance of the virtual interface circuit 111 (in this embodiment, the impedance of the attenuation impedance circuit 1115 as an example) by performing the processing of steps S21 to S25.

In step S21, the supply unit 131 of the calculation device 13 supplies the command value of the voltage applied to the device under test 2 to the DA converter 106, and the measurement unit 132 measures the voltage applied to the device under test 2 and the current flowing therein. For example, the supply unit 131 may supply the DA converter 106 with a command value of a reference AC voltage V(t) at a rated voltage and a rated frequency expressed by the following equation (1). As a result, the test device 2 is driven with the reference AC voltage V(t).

V(t)=V _0・sin(ω ₀ t)...(1)
However, in the formula, V ₀ is the amplitude of the reference AC voltage, and ω ₀ is the angular frequency of the reference AC voltage.

Furthermore, the measurement unit 132 may measure the voltage V(t) applied to the device under test 2 and the current I(t) flowing therethrough.

In step S23, the specifying unit 133 of the calculation device 13 calculates the attenuation impedance of the test machine 2. The specifying unit 133 may approximate the measurement result as a sine wave having the same frequency as the reference AC voltage V(t), as expressed by the following equation (2).

I(t)≒I _0・sin(ω ₀ t−θ) …(2)
However, in the formula, I ₀ is the amplitude of the current, and θ is the delayed phase from the voltage waveform.

Further, the identification unit 133 may specify the impedance _ZL of the equipment under test 2 by simplifying the equipment under test 2 into a series circuit of a single resistor and a single coil or capacitor. For example, the specifying unit 133 may specify the impedance _ZL of the device under test 2 using the following equation (3).

Z _L =R ₀ +jX ₀ ...(3)
However, in the formula, R ₀ is a resistance component of impedance Z _L , and is calculated from R ₀ =V ₀ /I ₀ ·cosθ. X ₀ is a reactance component of impedance Z _L , and is calculated from X ₀ =V ₀ /I ₀ sinθ.

When the reactance component X ₀ is positive (0≦θ≦π/2), the identifying unit 133 calculates the inductive reactance L ₀ from the formula X ₀ =ω ₀ L ₀ , and if the reactance component X ₀ is negative. In the case (-π/2≦θ<0), the capacitive reactance C ₀ may be calculated from the formula X ₀ =-1/(ω ₀ C ₀ ). Thereby, the attenuation impedance of the test device 2 is calculated.

In step S25, the adjustment device 14 adjusts the attenuation impedance of the virtual interface circuit 111 (in this embodiment, the impedance of the attenuation impedance circuit 1115 as an example). The adjustment device 14 may adjust the combined impedance Z _dmp of the resistance R _dmp of the attenuation impedance circuit 1115 and the coil L _dmp or the capacitor (not shown) to the impedance calculated in step S21.

According to the above attenuation impedance adjustment process, the impedance when the device under test 2 is simplified to a series circuit of a single resistor and a single coil or capacitor is calculated, so the impedance of the device under test 2 _ZL can be easily calculated.

[4.2. Phase compensation filter setting process (1)]
FIG. 8 shows the setting process of the phase compensation filter 1119 in step S3. The setting device 17 sets the parameters of the phase compensation filter 1119 by performing the processing of steps S31 to S35.

In step S31, the acquisition unit 171 acquires the voltage measurement unit 102 and the AD converter in the online simulation when the simulated connection target circuit 110 is connected to the calibration EUT 2 via the virtual interface circuit 111 and the interface circuit 10. 104, and a signal from either current measuring section 103 or AD converter 105.

In step S33, the calculation unit 172 adds the transmission delay of the first signal from the device under test 2 to the circuit to be connected 110 and the transmission delay of the second signal from the circuit to be connected 110 to the device under test 2. The combined equivalent propagation delays are calculated as multi-order propagation delays. The calculation unit 172 may approximate the multi-order transmission delay to a simple first-order transmission delay. The calculation unit 172 may calculate the value of the parameter p of the phase adjustment filter such that the obtained transmission delay is compensated for.

In step S35, the setting unit 173 sets the calculated value of the parameter p to the phase compensation filter 1119. As a result, the transmission delay of the interface circuit 10 (transmission delay of the first signal from the device under test 2 to the circuit to be connected 110 and delay in transmission of the second signal from the circuit to be connected 110 to the device under test 2) is summarized. (equivalent transmission delay) is compensated by the phase compensation filter 1119.

[4.3. Phase compensation filter setting process (2)]
FIG. 9 shows the setting process of the phase compensation filter 1119 in step S7. The setting device 17 sets the parameters of the phase compensation filter 1119 by performing the processing of steps S41 to S45.

In step S41, the acquisition unit 171 performs an off-line simulation of the virtual circuits 1002(1) and (2) in which the connection target circuit 110 is connected to the simulated test device 2. Obtain the voltage and current flowing. The acquisition unit 171 may further acquire the impedance of the device under test 2 (as an example, the device under test 2 to be tested) specified by the calculation device 13 through the process of step S23. Further, the acquisition unit 171 may acquire the equivalent transmission delay (in this embodiment, a multi-order transmission delay as an example) calculated in the process of step S33 as the transmission delay characteristic of the interface circuit 10.

In step S43, the calculation unit 172 calculates the transfer function G _org (s) and the transfer function G _IF (s, p) by off-line simulation of the virtual circuit 1002. In calculating the transfer function G _IF (s, p), the equivalent transfer delay (in this embodiment, as an example, a multi-order transfer delay) calculated in the process of step S33 may be used as the transfer delay of the interface circuit 10. Note that the transfer function G _org (s) may not be calculated by the calculation unit 172 but may be acquired from the operator by the acquisition unit 171.

The calculation unit 172 calculates the value of the parameter p such that the transfer function G _IF (s, p) approximates the transfer function G _org (s). The calculation unit 172 may calculate the value of the parameter p such that G(s, p)=G _IF (s, p)/G _org (s) approximates 1. The calculation unit 172 calculates the transfer function G(s, p) every time the value of the parameter p is changed, and calculates the parameter p such that the transfer function G(s, p) approximates the transfer function G _org (s). You may calculate the value of In this case, the parameters set for the phase compensation filter 1119 through the process of step S3 may be used as initial values.

The calculation unit 172 may calculate the value of the parameter p such that the transfer function G _IF (s, p) approximates the transfer function G _org (s) in the reference frequency band. The reference frequency band may include a frequency band included in a phenomenon to be simulated. The phenomenon to be simulated may be, for example, a steady state. In this case, the frequency band may be 50-60Hz. Further, the phenomenon to be simulated may be, for example, a transient state. In this case, the frequency band may be in the ultra-high frequency region. The reference frequency band may be arbitrarily set by the operator, and may be set so that, for example, frequency fluctuations that may occur in the connection target circuit 110 are included within the band.

In step S45, the setting unit 173 sets the calculated value of the parameter p to the phase compensation filter 1119. As a result, the value of the parameter p is set so that the transfer function G _IF (s, p) approximates the transfer function G _org (s), and the transfer delay between the circuit to be connected 110 and the device under test 2 is Compensation filter 1119 compensates.

According to the above phase compensation filter setting process, the parameter p is such that the transfer function G _IF (s, p) approximates the transfer function G _org (s) in the reference frequency band that includes the frequency band of the phenomenon to be simulated. Since an appropriate value is calculated, it is possible to compensate even a high frequency band unnecessary for the evaluation of the test device 2, and to prevent a parameter p that would amplify noise from being calculated and set in the phase compensation filter 1119. I can do it.

Furthermore, since the transfer function G _IF (s, p) is calculated by using the multi-order transmission delay calculated in step S33 in the online setting process as the transmission delay of the interface circuit 10, the high-order complicated transmission delay can be directly processed. The parameters of the phase compensation filter 1119 can be adjusted by incorporating into offline simulation. Therefore, the accuracy of the test on the test machine 2 can be further improved.

[4.4. Operation example]
FIG. 10 shows an example of a gain characteristic curve of a transfer function. In the figure, the left graph shows an example of the gain characteristic curve of the transfer functions G _org (s) and G _IF (s, p), and the center graph shows the transfer function G (s, p) before changing the parameter p. An example of a gain characteristic curve is shown, and the graph on the right side shows an example of a gain characteristic curve of the transfer function G (s, p) after changing the parameter p. The vertical axis of each graph indicates gain (dB), and the horizontal axis indicates frequency. Note that 0 dB on the vertical axis means that the magnification is 1.

The calculation unit 172 of the setting device 17 may calculate the transfer functions G _org (s) and G _IF (s, p) as shown in the graph on the left side of the figure. Further, the calculation unit 172 of the setting device 17 calculates that the transfer function G (s, p) shown in the center graph in the figure is approximated to 0 dB (1 times), and the transfer function G shown in the right graph in the figure is The value of the parameter p may be calculated such that (s, p). For example, the calculation unit 172 calculates a parameter p that minimizes the integration result of the absolute value of the difference between the gain characteristic curve of the transfer function G (s, p) and zero (dB) (the shaded part in the figure). The value may be calculated as the value of the parameter p such that the transfer function G(s, p) approximates 1. Instead, the calculation unit 172 calculates the value of the parameter p that minimizes the integration result of the square of the difference between the gain characteristic curve of the transfer function G (s, p) and zero (dB). It may be calculated as a value of the parameter p such that (s, p) approximates 1. The calculation unit 172 also calculates the maximum deviation value between the gain characteristic curve of the transfer function G (s, p) and zero (dB) (see "||G (s)|| _∞ " in the figure). However, the value of the parameter p for which the calculated maximum deviation value is the smallest may be calculated as the value of the parameter p such that the transfer function G(s, p) approximates 1. By calculating the value of the parameter p as described above, the transfer function G _IF (s, p) can be reliably approximated to the transfer function G _org (s).

In the above embodiment, since the impedance _ZL of the test device 2 is simply the resistance component _RL and the reactance component _LL , strictly speaking, the impedance _Zdmp of the attenuation impedance circuit 1115 and the test device 2 The impedance Z and _L may not match. Therefore, each time a signal is transmitted via the interface circuit 10, the simulation error is amplified, and the simulation may become unstable. A modification example that solves this problem will be described next.

[5. Modified example]
FIG. 11 shows a simulation system 1A according to a modification. In the simulation system 1A according to the present embodiment, the operations that are substantially the same as those of the simulation system 1 shown in FIG.

The simulation system 1A includes a detection device 30, a stop device 31, a setting device 32, and a switching device 18A. In addition, in this modification, as an example, the detection device 30, the stop device 31, the setting device 32, and the switching device 18A are physically and/or virtually provided in the simulation device 11A, but at least one of these is provided in the simulation device 11A. The device 11 and the interface circuit 10 may be provided as separate devices, or may be included within the interface circuit 10.

[5.1. Detection device 30]
The detection device 30 detects the impedance value (also referred to as a convergence impedance value) of the variable impedance element (in this modification, the secondary impedance element Rab as an example) on which the simulation by the simulation device 11A converges. A simulation converging may mean that the simulation does not diverge. For example, convergence of the simulation means that the interface circuit 10 and the virtual interface circuit 1000 do not cause simulation divergence; in other words, the simulation divergence caused by the interface circuit 10 and the virtual interface circuit 1000 is prevented. It may be. In this embodiment, as an example, convergence of the simulation may mean convergence of a simulation simulating the case where the device under test 2 is connected to an actual circuit to be connected and operates stably; A simulation simulating a case where the circuit is connected to an actual connection target circuit and does not operate stably may diverge.

Generally, in hardware-in-the-loop simulation, from the viewpoint of reducing the influence of the interface circuit 10 and the virtual interface circuit 111, it is preferable that the impedance of the secondary impedance element Rab and the primary impedance element Rab _s be small. However, if the identification accuracy of the impedance _ZL of the device under test 2 is low in the process of step S1 described above, and the impedance of the attenuation impedance circuit 1115 does not match the impedance _ZL of the device under test 2, the secondary side impedance element If the impedance of Rab and the primary impedance element Rab _s is small, the simulation may diverge. Therefore, the detection device 30 in this modification detects a convergent impedance value in order to prevent the simulation from diverging.

The detection device 30 may detect convergent impedance values within a predetermined range. This prevents simulations that are far removed from the real environment and improves simulation accuracy.

If the simulation by the simulation device 11A converges at each of a plurality of impedance values within a predetermined range, the detection device 30 may detect the minimum convergent impedance value at which the simulation converges. The detection device 30 may supply the detected convergent impedance value to the setting device 32.

The detection device 30 may include a determination section 300. The determining unit 300 may determine whether the simulation executed by the simulation device 11A converges each time the impedance of the secondary impedance element Rab is changed. The detection device 30 may detect the convergent impedance value based on the determination result by the determination unit 300. Note that the determination result of the determination unit 300 may also be supplied to the stopping device 31.

[5.2. Stop device 31]
The stopping device 31 stops the simulation when the determining unit 300 determines that the simulation diverges. When the stopping device 31 is provided outside the simulation device 11A, the stopping device 31 may supply a signal to the simulation device 11A and the test machine 2 to stop the simulation. For example, the stop device 31 may be an overcurrent protection device that prevents overcurrent of the device under test 2.

[5.3. Setting device 32]
The setting device 32 sets the impedance of the secondary impedance element Rab to the convergence impedance value detected by the detection device 30. When the impedance of the secondary impedance element Rab is changed, the impedance of the primary impedance element Rab _s is automatically changed to the same value. In this modification, as an example, the setting device 32 may change the impedance of the primary impedance element Rab _s to match the impedance of the secondary impedance element Rab.

[5.4. Switching device 18A]
The switching device 18A switches the operation mode of the simulation system 1 between a detection mode and a test mode. The switching device 18A may further switch the operation mode to the online setting mode, offline setting mode, and test mode in the above-described embodiment.

The detection mode may be a mode for detecting a convergent impedance value of the secondary impedance element Rab.

In this modification, the test mode may be a mode in which the test device 2 is tested by the simulation device 11A with the secondary impedance element Rab set to a convergent impedance value.

According to the above simulation system 1A, the convergence impedance value at which the simulation converges is detected as the impedance value of the secondary impedance element Rab. Therefore, by setting the impedance of the secondary impedance element Rab and, by extension, the primary impedance element Rab _s to the detected convergence impedance value, it is possible to prevent the simulation from diverging.

Further, since the detection device 30 detects the minimum impedance at which the simulation converges, the influence of the interface circuit 10 on the simulation can be minimized and the accuracy of the simulation can be improved.

Furthermore, since the impedance of the secondary impedance element Rab is set by the setting device 32 to the detected convergence impedance value, it is possible to save the effort of manually setting the impedance of the secondary impedance element Rab.

Moreover, since the determination unit 300 determines whether the simulation converges each time the impedance of the secondary impedance element Rab is changed, the convergence impedance value can be automatically detected.

Further, when it is determined that the simulation diverges, the simulation is stopped by the stopping device 31, so that the test machine 2 is prevented from operating unstably due to the divergent simulation. Therefore, the safety of simulation can be improved.

Further, since the operating mode is switched between the detection mode and the test mode by the switching device 18A, the test device 2 can be tested by performing simulation under conditions that allow the simulation to converge.

[5.5. Operation of modified example]
FIG. 12 shows the operation of the simulation system 1A. In this modification, the process in step S2 is performed between the process in step S1 and the process in step S11 (in this modification, as an example, between the processes in steps S1 and S3).

In the process of step S2, the setting device 32 cooperates with the detection device 30 and the stop device 31 to adjust the impedance of the secondary impedance element Rab. For example, the detection device 30 may detect the convergence impedance value of the secondary impedance element Rab at which the simulation by the simulation device 11A converges, and the setting device 32 adjusts the impedance of the secondary impedance element Rab to the detected convergence impedance value. You may do so. The setting device 32 may adjust the impedance of the primary impedance element Rab _s in the same way as the impedance of the secondary impedance element Rab. As a result, the simulation is performed under conditions that allow the simulation to converge, and the test device 2 is tested. Note that the simulation performed by the simulation device 11A may be a simulation performed in at least one of steps S3, S7, and S11.

FIG. 13 shows the common impedance adjustment process. The setting device 32 adjusts the impedance of the secondary impedance element Rab and the impedance of the primary impedance element Rab _s by performing the processing of steps S51 to S61 in cooperation with the detection device 30 and the stopping device 31.

In step S51, the determination unit 300 of the detection device 30 connects the device under test 2 (in this modification, the device under test 2 as an example) and the simulated connection target circuit via the interface circuit 10 and the virtual interface circuit 111. 110 (hardware-in-the-loop circuit 1001 as an example in this modification) is obtained.

The detection device 30 may externally acquire a round transfer function calculated from the circuit equation of the hardware-in-the-loop circuit 1001, or may obtain a signal transmitted within the hardware-in-the-loop circuit 1001 (for example, The open loop transfer function may be calculated based on signals output from the voltage measurement units 102 and 1113, the current measurement unit 103, the AD converters 104 and 105, the DA converter 106, etc. When calculating the open-loop transfer function based on the signal transmitted within the hardware-in-the-loop circuit 1001, the detection device 30 calculates the loop transfer function based on the signal transmitted within the hardware-in-the-loop circuit 1001. A round transfer function may be calculated based on the signal.

In step S53, the determination unit 300 determines whether the simulation executed by the simulation device 11A converges. For example, the determination unit 300 may make the determination based on a Nyquist diagram or a Bode diagram derived from the open-loop transfer function. The determination based on the Nyquist diagram or the Bode diagram may be performed by a conventionally known method such as determination based on gain margin or phase margin. However, as long as it is determined whether the simulation converges, the Nyquist diagram or Bode diagram does not necessarily need to be drawn.

If it is determined that the simulation converges through the process in step S53 (step S53; Yes), the detection device 30 may move the process to step S55. Further, if it is determined that the simulation does not converge (step S53; No), the detection device 30 may shift the process to step S57.

In step S55, the detection device 30 causes the setting device 32 to make the impedance of the secondary impedance element Rab smaller than the current value, and the process moves to step S51. The detection device 30 may set the impedance of the primary impedance element Rab _s to be similar to the impedance of the secondary impedance element Rab.

The detection device 30 may set the initial value of the impedance of the secondary impedance element Rab as the first impedance. As a result, the process of step S55 is performed a plurality of times, so that the impedance of the secondary impedance element Rab becomes smaller sequentially from the first impedance. The detection device 30 may reduce the impedance of the secondary impedance element Rab to zero. The amount of decrease in impedance may be set arbitrarily.

The first impedance may be any value. Further, the first impedance may be a value obtained by adding a margin to the convergence impedance value detected in advance by the processing of steps S51 to S59 using the calibration test device 2. In the processing of step S55 of the processing of steps S51 to S59 using the calibration test device 2, the detection device 30 may sequentially decrease the impedance of the secondary impedance element Rab from an arbitrary value, or It may be increased sequentially from 0. Note that when acquiring the first impedance using the calibration test device 2, a virtual circuit 1002(1) (in which the connection target circuit 110 is directly connected to the simulated calibration test device 2) It is preferable to perform an offline simulation (see FIG. 4) in advance and perform the processing in steps S51 to S59 using simulation conditions under which the offline simulation converges. As a result, the initial values (first impedance) of the impedance elements Rab _s and Rab under the conditions where the simulation simulating the case where the test device 2 is connected to the actual connection target circuit and operates stably converges can be obtained. I can do it.

In step S57, the stopping device 31 stops the simulation by the simulation device 11A. Thereby, the simulation is stopped when it is determined that the simulation diverges. Note that if the simulation device 11A does not perform simulation in the process of step S51, the process of step S57 does not need to be performed.

In step S59, the detection device 30 detects the impedance of the secondary impedance element Rab set in the process of step S55 performed previously among the processes of step S55 performed multiple times as a convergence impedance value. Thereby, the minimum impedance at which the simulation converges is detected.

In step S61, the setting device 32 sets the impedance of the secondary impedance element Rab and the primary impedance element _{Rab_s} to the convergence impedance value detected by the detection device 30.

According to the above operation, since the determination is made based on the Nyquist diagram or the Bode diagram derived from the open-loop transfer function, it is possible to correctly determine whether the simulation converges.

In addition, in the process of searching for the convergence impedance value, the impedance of the secondary impedance element Rab is successively reduced, so if the impedance is made too small and the simulation diverges, the previously set impedance is changed to the convergence impedance. It can be detected as a value. Therefore, compared to the case where the impedance is sequentially increased in the process of searching for a convergent impedance value, the number of executions of a divergent simulation can be reduced, so that a convergent impedance value can be safely detected.

[5.6. Open-loop transfer function]
FIG. 14 shows the signal flow in the hardware-in-the-loop circuit 1001. In the hardware-in-the-loop circuit 1001 of FIG. 14, the signal Z ₁ and the signal r ₂ are sequentially transmitted from the simulated circuit to be connected 110 toward the device under test 2, and from the device under test 2 to the circuit to be connected 110. Signals Z ₁₁ , Z ₁₂ and signals r ₁₁ , r ₁₂ are sequentially transmitted toward the side.

FIG. 15 is a block diagram of the hardware-in-the-loop circuit 1001. Hardware-in-the-loop circuit 1001 includes transfer elements T ₁₁ , T ₁₂ , T ₂₁ , T ₂₂ , _TFWD , and _TBCK .

The transmission element T ₁₁ transmits the input signal u 1 to the virtual interface circuit 111 in the simulated connection target circuit 110 . The transmission element T ₁₂ transmits the feedback signal r ₁ from the virtual interface circuit 111 in the simulated connection target circuit 110 . The signals transmitted by the transmission elements T ₁₁ and T ₁₂ are added at a summing point p1 and supplied to the virtual interface circuit 111 as a signal z ₁ (=V _forward ). In this embodiment, as an example, the addition point p1 may be near the voltage measurement section 1113. The signal r ₁ may be signals r ₁₁ and r ₁₂ supplied from the ADCs 104 and 105 to the voltage source 1111 and the current source 1112.

The transmission element T ₂₁ transmits the signal r ₂ from the interface circuit 10 in the machine under test 2, and the transmission element T ₂₂ transmits the input signal u ₂ (in this embodiment, as an example, u ₂ =0) to the machine under test 2. introduce. The signals transmitted by the transmission elements T ₂₁ and T ₂₂ may be summed at a summing point p2 and supplied to the interface circuit 10 as a signal z ₂ . In this embodiment, as an example, the signal _z2 may be an output signal from the voltage measuring section 102 or the current measuring section 103, and the addition point p2 may be near the voltage measuring section 102 or the current measuring section 103.

The transmission element T _FWD transmits the signal z ₁ from the simulated connection target circuit 110 to the virtual interface circuit 111 and the interface circuit 10 and outputs it as a signal r ₂ . The transmission element T _BCK transmits the signal z ₂ from the device under test 2 through the virtual interface circuit 111 and the interface circuit 10 and outputs it as a signal r ₁ .

In the above block diagram, the round transfer function _GLP of the signal that goes round starting from the superposition point p1 may be expressed by the following equation.

Note that in the formula, Z _s (s) is the impedance of the simulated circuit 110 to be connected. Z _L (s) is the impedance of the test device 2. Z _dmp (s) is the impedance of the damping impedance circuit 1115. Z _ab (s) is the secondary impedance element Rab and is therefore also the impedance of the primary impedance element Rab _s . e ^−sT is a term representing signal transmission delay.

Here, the absolute value of the round transfer function _GLP represents the loop gain when a signal goes around once in the feedback system constituted by the interface circuit 10 and the virtual interface circuit 1000, so the larger the absolute value, the more unstable the simulation becomes. It becomes easy to dissipate. From this, it can be seen that the larger the impedance Z _ab (s) of the secondary impedance element Rab and the primary impedance element Rab _s , the smaller the gain of the open loop transfer function, that is, the loop gain, and the more stable the simulation. I understand.

However, if the impedance Z _ab (s) increases, there is a possibility that the accuracy of the simulation will decrease accordingly. Therefore, if the simulation error is not amplified, for example, the impedance Z _L of the device under test 2 can be accurately specified, and the impedance Z _L of the device under test 2 and the impedance Z _dmp of the attenuation impedance circuit 1115 can be set to approximately the same value. If the impedance Z ab (s) can be set to 0, the impedance Z _ab (s) may be set to 0 in order to improve simulation accuracy. In this case, it is possible to simulate an ideal hardware-in-the-loop circuit in which the virtual interface circuit 111 and the interface circuit 10 are not interposed between the circuit to be connected 110 and the device under test 2.

Note that the absolute value of the open loop transfer function G _LP can also be adjusted by the impedance Z _s (s) of the circuit 110 to be connected. Therefore, in step S51 described above, the impedance Z _s (s) of the connection target circuit 110 in the hardware-in-the-loop circuit 1001 for which the open-loop transfer function is calculated may be adjusted. For example, in step S51, the open loop transfer function G _LP may be calculated by setting the impedance Z _s (s) to a value smaller (or larger) than the impedance of the connection target circuit to which the device under test 2 is actually connected. . In addition, in the processing of steps S3, S7, and S11, simulation may be performed using the impedance of the connection target circuit to which the device under test 2 is actually connected as impedance Z _s (s). In this case, the test device 2 can be tested under strict conditions that make convergence more difficult (or gentle conditions that make convergence easier) in the test process of step S11. As an example, if the connection target circuit to which the device under test 2 is actually connected is a power grid with a large impedance, in the process of step S51, a value smaller than this is set as the impedance Z _s (s) and the loop transfer function is _GLP may be calculated.

[5.7. Other determination methods]
In the above modification, the determination unit 300 determines whether or not the simulation converges based on the Nyquist diagram derived from the open-loop transfer function of the hardware-in-the-loop circuit 1001. This method may also be used. For example, the determination unit 300 may make the determination based on a signal waveform obtained in a simulation performed by the simulation device 11A using the test device 2, and as an example, the following methods (1) to (3) may be used. You may make a judgment based on In this case, since the determination is made based on the actual signal waveform obtained in the simulation, it is possible to correctly determine whether the simulation converges or not.

[5.7.1. Other determination methods (1)]
The determination unit 300 determines the characteristic amount of the signal waveform obtained by the simulation using the test device 2 to be tested and the characteristic amount obtained by the simulation executed by the simulation device 11A using another test device having known characteristics. The determination is made based on the comparison result with a threshold value based on the feature amount of the reference signal waveform. The threshold value based on the feature amount of the reference signal waveform may be stored in advance in a storage unit (not shown) included in the detection device 30. The other test machine with known characteristics may be the calibration test machine 2. The characteristic amount of the waveform may be a peak value of the waveform, an average value, or a point on the envelope of the waveform (for example, a straight line connecting a plurality of peaks). The threshold value based on the feature amount of the reference signal waveform may be a value obtained by multiplying the feature amount by a coefficient (1.2 as an example), or may be a value obtained by adding a margin to the feature amount. Note that the comparison of values may be performed by a comparator included in the determination unit 300. The same applies to methods (2) and (3) described later.

FIG. 16 shows a time response signal waveform obtained by simulation. The horizontal axis in the figure indicates time (seconds), and the vertical axis indicates signal value (V). Signal 1 indicates a reference signal waveform obtained by simulation using test device 2 for calibration. Signal 2 indicates a reference signal waveform obtained by simulation using the machine under test 2 to be tested.

The determination unit 300 calculates a value (V1) obtained by multiplying the signal value at an arbitrary time point (T) on the envelope of signal 1 by 1.2, and a signal value (V2) at a time point (T) on the envelope of signal 2. The determination may be made based on the comparison result. As an example, the determination unit 300 may determine that the simulation diverges when V1<V2, and determine that the simulation converges when V2≦V1.

[5.7.2. Other determination methods (2)]
The determination unit 300 makes a determination based on whether the slope of the envelope of the signal waveform obtained by simulation using the device under test 2 to be tested is positive. As an example, the determination unit 300 may compare two consecutive peak values in the signal waveform and determine whether the later peak value (P2) is larger than the earlier peak value (P1). The determination unit 300 may determine that the simulation converges when P1≧P2, and determine that the simulation diverges when P1<P2.

[5.7.3. Other determination methods (3)]
The determination unit 300 uses the peak value of the signal waveform obtained in the simulation using the device under test 2 to be tested and the device under test 2 (as an example, the device under test 2 to be tested). The determination is made based on the comparison result of the voltage signal or current signal with the threshold value obtained in the simulation. The threshold value may be the upper limit of the allowable range of current or voltage, or may be a value obtained by multiplying the peak value of the reference signal waveform by a coefficient (1.2 as an example), or may be a value obtained by multiplying the peak value of the reference signal waveform by a coefficient (1.2 as an example), or by adding a margin to these values. It may be an additional value. The threshold value may be stored in advance in a storage unit (not shown) included in the detection device 30.

[6. Other variations]
Note that in the above embodiment, the simulation system 1 has been described as including the calculation device 13 and the switching device 18, but it may not include either of these. For example, if the simulation system 1 does not include the calculation device 13, the impedance _ZL of the device under test 2 may be supplied from the calculation device 13 external to the simulation system 1.

Further, although the simulation system 1 has been described as including the adjustment device 14 and the setting device 17, it may not include either one. Furthermore, if the simulation system 1 does not include the setting device 17, the switching device 18 does not need to switch the operation mode of the simulation system 1 to the offline setting mode.

In addition, it was set that the value of the parameter p is calculated such that the transfer function G (s, p), which is obtained by normalizing the transfer function G _IF (s, p) by the transfer function G _org (s), approximates 1. However, the value of the parameter p may be calculated such that the difference between the transfer function G _IF (s, p) and the transfer function G _org (s) approximates zero.

Further, although the test device 2 has been described as being simulated with respect to the transfer function G _IF (s, p), it may be an actual device that is not simulated (for example, an actual device or a mini model). In this case, in the processing of steps S41 to S43, the simulated connection target circuit 110 is transferred to the actual device under test 2 in a transfer function in a circuit connected via the virtual interface circuit 111 or the actual interface circuit 10. G _IF (s, p) may be calculated.

Although the simulation device 11 has been described as having digital input/output, analog input/output may also be performed. In this case, the interface circuit 10 does not need to include the AD converters 104 and 105 and the DA converter 106.

Furthermore, although the connection target circuit 110 has been described as a power system that supplies power to the device under test 2, it may also be a DC or AC power source, or one or more power systems that consume power supplied from the device under test 2. It can also be used as a load.

Furthermore, in the above modification, the simulation device 11A has been described as having the calculation device 13, the adjustment device 14, the setting device 17, the switching device 18A, the phase compensation filter 1119, the stopping device 31, and the setting device 32. It is good also as not having at least a part of. Even in such a case, if the simulation device 11A includes the detection device 30, divergence of the simulation can be prevented.

Moreover, although the detection device 30 has been described as sequentially decreasing the impedance of the secondary impedance element Rab in the process of searching for a convergent impedance value, it may be sequentially increased. For example, the detection device 30 may sequentially increase the impedance of the secondary impedance element Rab from 0.

Additionally, various embodiments of the invention may be described with reference to flowcharts and block diagrams, in which blocks represent (1) the stages of a process in which operations are performed or (2) the roles in which operations are performed. may represent a section of equipment that has Certain steps and sections may be implemented by dedicated circuitry, programmable circuitry provided with computer-readable instructions stored on a computer-readable medium, and/or a processor provided with computer-readable instructions stored on a computer-readable medium. It's okay. Specialized circuits may include digital and/or analog hardware circuits, and may include integrated circuits (ICs) and/or discrete circuits. Programmable circuits include logic AND, logic OR, logic Reconfigurable hardware circuits may include reconfigurable hardware circuits, including, for example.

A computer-readable medium may include any tangible device capable of storing instructions for execution by a suitable device, such that the computer-readable medium having instructions stored thereon is illustrated in a flowchart or block diagram. An article of manufacture will be provided that includes instructions that can be executed to create a means for performing the operations. Examples of computer readable media may include electronic storage media, magnetic storage media, optical storage media, electromagnetic storage media, semiconductor storage media, and the like. More specific examples of computer readable media include floppy disks, diskettes, hard disks, random access memory (RAM), read only memory (ROM), erasable programmable read only memory (EPROM or flash memory), Electrically Erasable Programmable Read Only Memory (EEPROM), Static Random Access Memory (SRAM), Compact Disc Read Only Memory (CD-ROM), Digital Versatile Disk (DVD), Blu-ray (RTM) Disc, Memory Stick, Integrated Circuit cards etc. may be included.

Computer-readable instructions include assembler instructions, Instruction Set Architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state configuration data, or object-oriented programming such as Smalltalk, JAVA, C++, etc. language, and either source code or object code written in any combination of one or more programming languages, including traditional procedural programming languages such as the "C" programming language or similar programming languages. good.

Computer-readable instructions may be implemented on a processor or programmable circuit of a general purpose computer, special purpose computer, or other programmable data processing device, either locally or over a wide area network (WAN), such as a local area network (LAN), the Internet, etc. ), computer-readable instructions may be executed to create a means for performing the operations specified in the flowchart or block diagrams. Examples of processors include computer processors, processing units, microprocessors, digital signal processors, controllers, microcontrollers, and the like.

FIG. 17 illustrates an example computer 2200 in which aspects of the invention may be implemented, in whole or in part. A program installed on computer 2200 may cause computer 2200 to function as an operation or one or more sections of an apparatus according to an embodiment of the present invention, or to perform one or more operations associated with an apparatus according to an embodiment of the present invention. Sections and/or computer 2200 may be caused to perform a process or a step of a process according to an embodiment of the invention. Such programs may be executed by CPU 2212 to cause computer 2200 to perform certain operations associated with some or all of the blocks in the flowcharts and block diagrams described herein.

Computer 2200 according to this embodiment includes a CPU 2212, RAM 2214, graphics controller 2216, and display device 2218, which are interconnected by host controller 2210. The computer 2200 also includes input/output units such as a communication interface 2222, a hard disk drive 2224, a DVD-ROM drive 2226, and an IC card drive, which are connected to the host controller 2210 via an input/output controller 2220. There is. The computer also includes legacy input/output units, such as ROM 2230 and keyboard 2242, which are connected to input/output controller 2220 via input/output chip 2240.

CPU 2212 operates according to programs stored in ROM 2230 and RAM 2214, thereby controlling each unit. Graphics controller 2216 obtains image data generated by CPU 2212, such as in a frame buffer provided in RAM 2214 or itself, and causes the image data to be displayed on display device 2218.

Communication interface 2222 communicates with other electronic devices via a network. Hard disk drive 2224 stores programs and data used by CPU 2212 within computer 2200. DVD-ROM drive 2226 reads programs or data from DVD-ROM 2201 and provides the programs or data to hard disk drive 2224 via RAM 2214. The IC card drive reads programs and data from and/or writes programs and data to the IC card.

ROM 2230 stores therein programs that are dependent on the computer 2200 hardware, such as a boot program that is executed by the computer 2200 upon activation. Input/output chip 2240 may also connect various input/output units to input/output controller 2220 via parallel ports, serial ports, keyboard ports, mouse ports, etc.

A program is provided by a computer readable medium such as a DVD-ROM 2201 or an IC card. The program is read from a computer readable medium, installed on hard disk drive 2224, RAM 2214, or ROM 2230, which are also examples of computer readable media, and executed by CPU 2212. The information processing described in these programs is read by the computer 2200 and provides coordination between the programs and the various types of hardware resources described above. An apparatus or method may be configured to implement the manipulation or processing of information according to the use of computer 2200.

For example, when communication is performed between the computer 2200 and an external device, the CPU 2212 executes a communication program loaded into the RAM 2214 and sends communication processing to the communication interface 2222 based on the processing written in the communication program. You can give orders. The communication interface 2222 reads transmission data stored in a transmission buffer processing area provided in a recording medium such as a RAM 2214, a hard disk drive 2224, a DVD-ROM 2201, or an IC card under the control of the CPU 2212, and transmits the read transmission data. Data is transmitted to the network, or received data received from the network is written to a reception buffer processing area provided on the recording medium.

Further, the CPU 2212 causes the RAM 2214 to read all or a necessary part of a file or database stored in an external recording medium such as a hard disk drive 2224, a DVD-ROM drive 2226 (DVD-ROM 2201), an IC card, etc. Various types of processing may be performed on data on RAM 2214. The CPU 2212 then writes back the processed data to the external recording medium.

Various types of information, such as various types of programs, data, tables, and databases, may be stored on a recording medium and subjected to information processing. The CPU 2212 performs various types of operations, information processing, conditional determination, conditional branching, unconditional branching, and information retrieval on the data read from the RAM 2214 as described elsewhere in this disclosure and specified by the instruction sequence of the program. Various types of processing may be performed, including /substitutions, etc., and the results are written back to RAM 2214. Further, the CPU 2212 may search for information in a file in a recording medium, a database, or the like. For example, if a plurality of entries are stored in the recording medium, each having an attribute value of a first attribute associated with an attribute value of a second attribute, the CPU 2212 search the plurality of entries for an entry that matches the condition, read the attribute value of the second attribute stored in the entry, and thereby associate it with the first attribute that satisfies the predetermined condition. The attribute value of the second attribute may be acquired.

The programs or software modules described above may be stored on computer readable media on or near computer 2200. Also, a recording medium such as a hard disk or RAM provided in a server system connected to a dedicated communication network or the Internet can be used as a computer-readable medium, thereby providing the program to the computer 2200 via the network. do.

Although the present invention has been described above using the embodiments, the technical scope of the present invention is not limited to the range described in the above embodiments. It will be apparent to those skilled in the art that various changes or improvements can be made to the embodiments described above. It is clear from the claims that such modifications or improvements may be included within the technical scope of the present invention.

The order of execution of each process, such as the operation, procedure, step, and stage in the apparatus, system, program, and method shown in the claims, specification, and drawings, is specifically defined as "before" or "before". It should be noted that they can be implemented in any order unless the output of the previous process is used in the subsequent process. Even if the claims, specifications, and operational flows in the drawings are explained using "first," "next," etc. for convenience, this does not mean that it is essential to carry out the operations in this order. It's not a thing.

1 Simulation System 1A Simulation System 2 Test Machine 10 Interface Circuit 11 Simulation Device 11A Simulation Device 13 Calculation Device 14 Adjustment Device 17 Setting Device 18 Switching Device 18A Switching Device 30 Detection Device 31 Stopping Device 32 Setting Device 101 Voltage Source 102 Voltage Measurement Unit 103 Current measurement section 104 AD converter 105 AD converter 106 DA converter 110 Connection target circuit 111 Virtual interface circuit 115 Connection circuit 116 Connection circuit 131 Supply section 132 Measurement section 133 Specification section 171 Acquisition section 172 Calculation section 173 Setting section 300 Judgment section 1000 Simulation Target circuit 1001 Hardware-in-the-loop circuit 1002 Virtual circuit 1101 Voltage source 1111 Voltage source 1112 Current source 1113 Voltage measuring section 1115 Attenuation impedance circuit 1119 Phase compensation filter 2200 Computer 2201 DVD-ROM
2210 Host controller 2212 CPU
2214 RAM
2216 Graphic Controller 2218 Display Device 2220 Input/Output Controller 2222 Communication Interface 2224 Hard Disk Drive 2226 DVD-ROM Drive 2230 ROM
2240 Input/output chip 2242 Keyboard

Claims (14)

A simulation system that performs a hardware-in-the-loop simulation of a test device to be connected to a connection target circuit,
an interface circuit that includes a variable impedance element and is connected to the device under test;
a virtual interface circuit that is connected to the device under test via the interface circuit, includes the connection target circuit and a virtual impedance element having an impedance equal to the variable impedance element, and compensates for simulation errors due to connection via the interface circuit; a simulation device for simulating a simulation target circuit including;
a detection device that detects the impedance value of the variable impedance element at which the simulation by the simulation device converges;
A simulation system equipped with The simulation system according to claim 1, further comprising a setting device that sets the impedance of the variable impedance element to the impedance value detected by the detection device. The simulation system according to claim 2, wherein the detection device includes a determination unit that determines whether the simulation executed by the simulation device converges each time the setting device changes the impedance of the variable impedance element. . The simulation system according to claim 3, further comprising a stop device that stops the simulation when the determination unit determines that the simulation diverges. 5. The simulation system according to claim 3, wherein the detection device detects the minimum impedance of the variable impedance element at which the simulation by the simulation device converges. The simulation system according to claim 5, wherein the detection device detects the minimum impedance by causing the setting device to sequentially decrease the impedance of the variable impedance element starting from a first impedance. The simulation system according to any one of claims 3 to 6, wherein the determination unit makes the determination based on a signal waveform obtained in a simulation performed by the simulation device using the test device. The detection device has a storage unit that stores a threshold value based on a feature amount of a reference signal waveform obtained in a simulation performed by the simulation device using another test device having known characteristics,
The simulation system according to claim 7, wherein the determination unit makes the determination based on a comparison result between the feature amount of the signal waveform and a threshold value based on the feature amount of the reference signal waveform. The detection device has a storage unit that stores a threshold value of a voltage signal or a current signal obtained in a simulation performed by the simulation device using the device under test,
The simulation system according to claim 7, wherein the determination unit makes the determination based on a comparison result between the peak value of the signal waveform and the threshold value. The simulation system according to claim 7, wherein the determination unit makes the determination based on whether the slope of the envelope of the signal waveform is positive. The determination unit is configured to calculate a Nyquist diagram or a Bode diagram derived from a round transfer function of a circuit to which the device under test and the simulated circuit to be connected are connected via the interface circuit and the virtual interface circuit. The simulation system according to any one of claims 3 to 7, which makes the determination based on. a detection mode for detecting the impedance of the variable impedance element in which the simulation by the simulation apparatus converges, and testing the test device by the simulation apparatus in a state where the variable impedance element is set to the impedance detected by the detection mode. The simulation system according to any one of claims 1 to 11, further comprising a switching device that switches the operation mode of the simulation system between a test mode in which the simulation system performs a test mode and a test mode in which the simulation system operates in a test mode. A simulation method for performing a hardware-in-the-loop simulation of a test device to be connected to a connection target circuit, the method comprising:
is connected to the test device via an interface circuit including a variable impedance element, and includes a virtual impedance element having an impedance equal to the circuit to be connected and the variable impedance element, and compensates for simulation errors due to connection via the interface circuit. a simulation stage for simulating a simulation target circuit including a virtual interface circuit to be used;
a detection step of detecting an impedance value of the variable impedance element at which the simulation in the simulation step converges;
A simulation method comprising: to the computer,
A simulation device that performs a hardware-in-the-loop simulation of a device under test to be connected to a circuit to be connected, the device being connected to the device under test via an interface circuit including a variable impedance element, and connected to the circuit to be connected and the variable impedance device. a virtual interface circuit that includes a virtual impedance element having an impedance equal to that of the impedance element and compensates for simulation errors due to connection via the interface circuit; a simulation device that simulates a simulation target circuit;
a detection device that detects the impedance value of the variable impedance element at which the simulation by the simulation device converges;
A program that makes this possible.