JP7456100B2 - Power storage devices, control devices, and power storage systems - Google Patents

Description

The present invention relates to a power storage device, a control device, and a power storage system.

With the advancement of IoT (Internet of Things) technology, efforts are underway to make the power supply to edge devices battery-less using energy harvesting technology. Applications have been realized in which LEDs (Light Emitting Diodes) and the like are driven by power generated by peel-off charging and frictional charging by piezoelectric elements and power-generating rubber, or by electrostatic induction by electrets.

However, power generation using piezoelectric elements, frictional charging, and electrostatic induction generates a high voltage and a small current, so although it is suitable for applications such as connecting LEDs in series to light them up momentarily, it does not meet the voltage and current required for the CPU (Central Processing Unit) operation, sensor drive, and wireless transmission required for IoT edge devices. For this reason, there is a demand for the development of technology that can efficiently utilize generated power even if the generated voltage is high and the current is small.

Generally, in the case of a small amount of generated power, the generated power is stored in a capacitor and converted to a driving voltage required for an edge device using a DC/DC (Direct Current/Direct Current) converter. However, since power generation devices using piezoelectric elements and electrostatic induction have high output impedance, if electricity is directly stored in a capacitor with low impedance, electricity will be stored in a low voltage state during storage, and the storage efficiency may be low.

Therefore, Patent Document 1 and the like disclose a power supply circuit that generates operating power for an electric circuit using minute power generated by a power generation element that has high output impedance and outputs a low current.

However, the power supply circuit of Patent Document 1 has room for improvement in terms of improving power storage efficiency or power supply efficiency.

The disclosed technology aims to improve power storage efficiency and power supply efficiency.

A power storage device according to one aspect of the disclosed technology includes: a power storage unit including a plurality of power storage devices that store electric power; a series-parallel switching unit that switches the connection of the plurality of power storage devices to either series or parallel; a series-parallel switching control unit that controls switching by the series-parallel switching unit; and a series-parallel switching control unit that controls the series-parallel switching control unit so that the connection of the plurality of power storage devices is switched from parallel to series based on the output current of the power storage unit. a return control section, the series-to-parallel switching control section includes hysteresis generated by a hysteresis generation circuit, and when the input voltage increases and reaches a predetermined first voltage value, the hysteresis generation circuit A control signal that controls the series-parallel switching unit is switched from a high level to a low level, and when the input voltage decreases and reaches a predetermined second voltage value different from the first voltage value, the control signal is switched from the low level. Switch to High level .

According to the disclosed technology, power storage efficiency and power supply efficiency can be improved.

FIG. 1 is a block diagram illustrating a configuration example of a power storage system according to an embodiment. FIG. 2 is a block diagram showing the configuration of a power storage system according to a comparative example. It is a figure showing an example of operation of a power generation element with which a power storage system is provided. FIG. 3 is a diagram showing a capacitor connected to a power generating element, in which (a) is an equivalent circuit diagram when storing power using the power generating element, and (b) is a diagram showing an example of power storage efficiency depending on conditions for storing power in the capacitor. 2 is a diagram showing a resistive load connected to a power generation element, (a) is an equivalent circuit diagram when power is supplied by a resistive load using a power generation element, and (b) is a diagram showing an example of power supply efficiency depending on conditions for supplying power to a resistive load. be. FIG. 1 is a diagram showing an example of a series connection of two capacitors. FIG. 3 is a diagram showing an example of parallel connection of two capacitors. FIG. 2 is a diagram illustrating a first configuration example of a series/parallel switching control unit. It is a figure which shows the 2nd example of a structure of a serial-parallel switching control part. 1 is a diagram illustrating an example of a circuit configuration of a power storage device according to an embodiment. FIG. 2 is a circuit diagram showing an example of the flow of current in the power storage device according to the embodiment, in which (a) is a diagram showing when power is being stored, and (b) is a diagram showing when power is being supplied. FIG. 1 is a diagram illustrating an example of a circuit configuration of a power storage system according to an embodiment. 1 is a diagram illustrating a configuration example of an IC-based power storage system including a control circuit using a communication module. 4 is a timing chart showing an example of the operation of the power storage device according to the embodiment. FIG. 3 is a diagram showing the transition of current during power storage and power supply according to a comparative example, where (a) is a circuit diagram with a fixed capacitor capacity, and (b) is a diagram showing the power storage current and voltage, and the voltage between the capacitor terminals during power supply. It is a diagram showing the transition. It is a figure which shows the transition example of the electric current at the time of power storage and power supply based on embodiment, (a) is a circuit diagram which switches the series and parallel of a capacitor, (b) is a power storage current, a power storage voltage, and the between capacitor terminals at the time of power supply. FIG. 3 is a diagram showing changes in voltage. FIG. 2 is a diagram showing an example of the configuration of a circuit in which four capacitors are connected in series. FIG. 2 is a diagram showing a configuration example of a capacitor multi-stage connection circuit. FIG. 1 is a block diagram showing a configuration example of a power storage system according to a first embodiment. 1 is a diagram illustrating an example of a circuit configuration of a power storage device according to a first embodiment; 2 is a circuit diagram showing a flow of current during charging of the power storage device according to the first embodiment. FIG. 2 is a circuit diagram showing a flow of current during power supply in the power storage device according to the first embodiment. FIG. 5 is a timing chart showing an example of the operation of the power storage device in the first embodiment. FIG. 7 is a diagram illustrating an example of a circuit configuration of a power storage device according to a first modification. FIG. 2 is a block diagram showing a configuration example of a power storage system according to a second embodiment. 7 is a timing chart showing an example of the operation of the power storage device in the second embodiment. It is a block diagram showing the example of composition of the electricity storage system concerning the 2nd modification.

Below, a description will be given of an embodiment of the present invention with reference to the drawings. In the following drawings, the same components are given the same reference numerals, and duplicated descriptions may be omitted.

In addition, in the terminology of the embodiment, "electric power" is synonymous with "electrical energy". Furthermore, "use of power", "supply of power", "power supply", and "discharge" are synonymous.

Moreover, in the terminology of the embodiment, "series-parallel switching" refers to switching an electric circuit from direct connection to parallel connection, or switching an electric circuit from parallel connection to direct connection.

<Configuration example of power storage system 100 according to embodiment>
First, the power storage system 100 will be described using FIG. 1. FIG. 1 is a block diagram showing an example of the configuration of a power storage system (energy storage system) 100. As shown in FIG. 1 , power storage system 100 includes power storage device 1 , power generation element 2 , load circuit 3 , and rectifier circuit 4 .

Of these, the energy storage device 1 includes a series/parallel switching control unit 5, a series/parallel switching unit 6, and an energy storage unit 7. The energy storage unit 7 is composed of capacitors C1 and C2, which are an example of a plurality of energy storage devices. Under the control of the series/parallel switching control unit 5, the series/parallel switching unit 6 can switch the connection of the capacitors C1 and C2 between either series or parallel.

The power generating element 2 is an element that generates power using power generating rubber, a piezoelectric element, or electrostatic induction, and generates power at high voltage and low current. Power generation by the power generation element 2 will be described in detail separately using FIG. 3.

The load circuit 3 is a load composed of, for example, an LED (Light Emitting Diode), an IC (Integrated Circuit) having a CPU (Central Processing Unit) function, a sensor, a wireless transmission IC, and the like. An example is an IoT device.

In the power storage system 100, the power generated by the power generation element 2 is rectified by the rectifier circuit 4, and then stored in capacitors C1 and C2 connected in series in the power storage unit 7. The stored power is supplied to the load circuit 3 by the capacitors C1 and C2, which are switched to parallel connection by the series-parallel switching section 6.

More specifically, the rectifier circuit (an example of a rectifier unit) 4 rectifies the AC power generated by the power generating element 2. Under the control of the series-parallel switching control unit 5, the series-parallel switching unit 6 connects the capacitors C1 and C2 in the power storage unit 7 in series, and the capacitors C1 and C2 store the power (storage voltage) input from the rectifier circuit 4.

After that, when the stored voltage reaches a predetermined voltage value (first voltage value), the series-parallel switching unit 6 is activated under the control of the series-parallel switching control unit 5, and the capacitors C1 and C2 are switched to parallel connection. It will be done. The capacitors C1 and C2 supply power to the load circuit 3 while being connected in parallel.

Thereafter, when the voltage supplied from the capacitors C1 and C2 becomes lower than a predetermined voltage (second voltage value), the series-parallel switching section 6 is activated under the control of the series-parallel switching control section 5, and the capacitor C1 , C2 are switched to series connection. The power generated by the power generation element 2 is stored in the capacitors C1 and C2 again with the capacitors C1 and C2 connected in series.

<Configuration example of power storage system 100X according to comparative example>
Here, as a comparative example, a system that stores power generated by an energy harvesting element and supplies power to a load circuit will be described. FIG. 2 is a block diagram showing the configuration of a power storage system 100X according to a comparative example. Note that in FIG. 2, components having the same functions as the power storage system 100 shown in FIG. 1 are given the same part numbers for convenience.

The energy storage system 100X is a typical energy harvesting system. The energy storage system 100X stores the power generated by the energy harvesting element in the energy storage device 1X via the rectifier circuit 4, and supplies the stored power to the load circuit 3.

As shown in FIG. 2, power storage device 1X includes a first power storage unit 101 that is a power generation side power storage unit, a power conversion circuit 102, and a second power storage unit 103 that is a power supply side power storage unit.

The voltage stored in the first power storage unit 101 is converted into the operating voltage of the load circuit 3 by a power conversion circuit 102 such as a DC/DC converter, and then stored in the second power storage unit 103. Thereafter, the power stored in the second power storage unit 103 is supplied to the load circuit 3.

In such power storage device 1X, the following problems may occur.
(A): Occurrence of loss due to current consumption in the power conversion circuit 102 (B): Occurrence of loss due to conversion efficiency (C): Increase in number of components such as inductors

More specifically, in power storage system 100X, it is necessary to convert the voltage up or down depending on the relationship between the voltage stored in first power storage unit 101 and the voltage stored in second power storage unit 103. For example, if the stored voltage of the second power storage unit 103 is higher than the stored voltage of the first power storage unit 101, step-up conversion is required, and in order to store power at a lower voltage, the power storage device It is necessary to increase the size of the 1X first power storage unit 101.

ここで、Ｗは蓄電電力、Ｃはコンデンサ容量、Ｖは蓄電電圧である。

Here, W is stored power, C is capacitor capacity, and V is stored voltage.

In addition, since the stored power is proportional to the square of the stored voltage, storage using the power generating element 2, which outputs high voltage and low current power generated by piezoelectric elements, power generating rubber, and electrostatic induction, is not efficient in increasing the stored voltage. Since the power consumption is poor and a loss occurs due to current consumption in the power conversion circuit 102, the power storage efficiency becomes low (A).

Next, if the stored voltage of the first power storage unit 101 is higher than the stored voltage of the second power storage unit 103, step-down conversion is required. In this case, based on (Formula 1), since electricity can be stored in the first power storage unit 101 at a high voltage, the first power storage unit 101 of the power storage device 1X can be made smaller and power can be stored at a high voltage. However, since a difference occurs between the stored voltage of the first power storage unit 101 and the stored voltage of the second power storage unit 103, the current consumption in the power conversion circuit 102 becomes a loss, and the power conversion efficiency decreases (B).

As described above, in the power storage system 100X, the loss due to the increased current consumption in the power conversion circuit 102 and the loss due to voltage conversion become large, and the power storage device may become larger due to the increase in the number of components. Ta.

In comparison, in the power storage system 100 according to the embodiment, power loss during voltage conversion can be suppressed by using the power storage unit 7 having a plurality of capacitors both during power storage and power supply. can.

<Example of power generating element>
Next, a description will be given of the operation of the power generating element 2 included in the power storage system 100. FIG.

The power generating element 2 is made of power generating rubber or the like, and generates electric power by generating electric charges when subjected to peel force, friction force, vibration force, or deformation force. Further, the power generation element 2 may generate power using pressure.

The amount of power generated by the power generation element 2 is a power generation voltage of 10 to 1000V (for example, 40V) and a power generation current of 50 nA to 100 μA (for example, 6 μA).

As shown in FIG. 3, the power generating element 2 made of power generating rubber or a piezoelectric element has a high resistance and outputs a current due to a predetermined charge, so it can be approximated by a current source 21 and an internal resistance 22. The resistance value of the internal resistor 22 is 1 to 100 MΩ (megaohm) (for example, 10 MΩ).

Here, the capacitor and resistive load connected to the power generation element 2 will be explained using FIGS. 4 and 5.

FIG. 4(a) is an equivalent circuit diagram during power storage using the power generation element 2, and FIG. 4(b) is a diagram illustrating power storage efficiency depending on conditions for storing power in the capacitor.

FIG. 4B shows a change in the ratio (%) of the power generated and stored by the power generation element 2 with the capacitor capacity, assuming that the maximum stored power is 100%.

When the capacitor capacity is set to the area indicated by the white arrow in Figure 4(b), impedance matching is achieved between the capacitor and the power generating element 2 (output side), which consists of a constant current source and internal resistance, and power can be stored most efficiently. .

Figure 5(a) is an equivalent circuit diagram when power is supplied from a resistive load using the power generating element 2, and Figure 5(b) is a diagram explaining the power supply efficiency depending on the conditions for supplying power to the resistive load.

FIG. 5B shows a change in the ratio (%) of the power generated and supplied by the power generation element 2 with the resistance value of the load resistance, assuming that the maximum power supply is 100%.

When the resistance value of the load resistor is set to the part indicated by the white arrow in FIG. (output side) and impedance matching can be achieved to provide the most efficient power supply.

<Example of capacitor connection>
Next, a connection example of capacitors C1 and C2 in power storage unit 7 will be described with reference to FIGS. 6 and 7. FIG. 6 is a diagram showing an example of series connection of capacitors C1 and C2, and FIG. 7 is a diagram showing an example of parallel connection of capacitors C1 and C2.

As shown in FIG. 6, the serial-parallel switching unit 6 includes three switches Sw1, Sw2, and Sw3. Power storage unit 7 includes two capacitors C1 and C2. A capacitor is an example of a power storage device, and various power storage devices such as an electric double layer capacitor, a lithium ion capacitor, a lithium ion battery, or a lead storage battery can be used.

As shown in FIG. 6, the switch Sw2 of the series-parallel switching section 6 is on and the switches Sw1 and Sw3 are off, so that the capacitors C1 and C2 of the power storage section 7 are connected in series.

Further, as shown in FIG. 7, the switches Sw1 and Sw3 of the series-parallel switching section 6 are on and the switch Sw2 is off, so that the capacitors C1 and C2 of the power storage section 7 are connected in parallel.

<Configuration example of serial-parallel switching control section 5>
Next, the configuration of the serial-parallel switching control section 5 will be explained with reference to FIGS. 8 and 9. FIG. 8 is a diagram illustrating a first configuration example of the serial-parallel switching control section 5. As shown in FIG. As shown in FIG. 8, the series-parallel switching control section 5 includes a series-parallel switching control section 50, two resistors R1 and R2, and two switches Sw4 and Sw5.

The series/parallel changeover switch control section 50 functions as a voltage monitoring circuit (an example of a voltage monitoring section) that monitors the input voltage Vin, which is a reference for switching between series and parallel, and outputs a control signal S1. Then, the serial/parallel changeover switch control section 50 generates a control signal S1 according to the detection result of the input voltage Vin to the terminal 11, and controls the switch Sw4 and the switch Sw5 with the generated control signal S1.

Furthermore, in the series-parallel switching control section 5, the resistor R1 and switch Sw4 form an inverter 51 driven by high impedance, and the resistor R2 and switch Sw5 form an inverter 52 driven by high impedance. The switches Sw4 and Sw5 are configured by, for example, Nch (N channel) transistors such as FETs (Field Effect Transistors).

The serial-parallel switching control section 5 generates a control signal φ1 for controlling the serial-parallel switching section 6, and outputs it from the terminal 53. Further, the serial-parallel switching control section 5 generates a control signal φ2 for controlling the serial-parallel switching section 6, and outputs this from the terminal 54.

In the serial-parallel switching control section 5, the serial-parallel switching control section 50 and the inverter 51 function as a hysteresis generation circuit H. The hysteresis generation circuit H quickly detects changes in the input voltage Vin, and also applies hysteresis to the switching threshold to prevent the signal from switching unstablely once it has switched from Low level to High level (or from High level to Low level). (difference) is established. In the embodiment, when the input voltage Vin increases and reaches a predetermined first voltage value, the hysteresis generation circuit H switches the control signal φ1 from High level to Low level. Further, when the input voltage Vin decreases from the first voltage value and reaches a predetermined second voltage value, the control signal φ1 is switched from the Low level to the High level. More details will be described later in conjunction with FIG.

In the embodiment, by using a high-impedance resistor R1 for the inverter 51 and a high-impedance resistor R2 for the inverter 52, a high-impedance output that is a high voltage and low current generated by a piezoelectric element or electrostatic induction is achieved. It is possible to drive the circuit of the power storage device 1 even with the power generating element 2 . The resistance values of the resistors R1 and R2 are 1MΩ to 500MΩ, etc.

Next, FIG. 9 is a diagram illustrating a second configuration example of the series/parallel switching control unit 5. In FIG.
The series-parallel switching control section 5A shown in FIG. 9 includes a series-parallel switching control section 50, two constant current sources IC1 and IC2, and two switches Sw4 and Sw5.

Further, in the series/parallel switching control section 5A, the constant current source IC1 and the switch Sw4 form a high impedance driven inverter 51A, and the constant current source IC2 and the switch Sw5 form a high impedance driven inverter 52A. The switches Sw4 and Sw5 are composed of Nch (N channel) transistors and the like.

The control signal S1 generated by the serial-parallel changeover switch control section 50 controls the switches Sw4 and Sw5, and generates the control signal φ1 that controls the serial-parallel changeover section 6 and outputs it from the terminal 53. A control signal φ2 for controlling the section 6 is generated and outputted from 54. In the serial-parallel switching control section 5A, the serial-parallel switching control section 50 and the inverter 51A function as a hysteresis generation circuit H.

In the embodiment, by using the high impedance constant current source IC1 for the inverter 51A and the high impedance constant current source IC2 for the inverter 52A, high voltage and low current generated by piezoelectric elements and electrostatic induction can be generated. Even a certain high-impedance output power generating element 2 can drive the circuit of the power storage device 1. The current value generated by each of the constant current sources IC1 and IC2 is 10 nA to 100 μA or the like.

<Example of circuit configuration of power storage device 1>
Next, the circuit configuration of power storage device 1 will be explained. FIG. 10 is a diagram illustrating an example of a circuit configuration of power storage device 1.

As shown in FIG. 10, power storage device 1 includes a serial-parallel switching control section 5B, a serial-parallel switching section 6, a power storage section 7, and an output switch section 8 (an example of an output section). Note that the power storage device 1 may be combined into one IC and configured as a power storage IC.

The serial-parallel switching control section 5B includes a serial-parallel switching control section 50B, two depletion type transistors Tr1 and Tr3, and two Nch transistors Tr2 and Tr4.

In the embodiment, the series/parallel changeover switch control section 50B includes an Nch transistor Tr5 and three resistors R3, R4, and R5. The three resistors R3, R4, and R5 are high resistance resistors with high resistance values (high impedance). The Nch transistor Tr5 is a hysteresis generating switch, and a signal indicating the state of the load circuit 3 may be input thereto.

The series/parallel changeover switch control unit 50B monitors the input voltage Vin, which is a voltage for switching from series connection to parallel connection, and outputs a control signal S1.

The serial-parallel switching control section 5B includes two inverters 51B and 52B that are controlled by a control signal (S1) generated by the serial-parallel switching control section 50B.

The inverter 51B includes a depletion type transistor Tr1 and an Nch transistor Tr2. Control signal φ1 from inverter 51B is taken out at terminal 53.

The series/parallel changeover switch control section 50B and the inverter 51B constitute a hysteresis generation circuit H. The inverter 52B is composed of a depletion type transistor Tr3 and an Nch transistor Tr4. Control signal φ2 from inverter 52 is taken out at terminal 54. Note that each of the inverters 51B and 52B may be configured to include an Nch transistor and a resistor.

Note that the depletion type transistors Tr1 and Tr3 function as constant current sources IC1 and IC2 in FIG. 9. Nch transistors Tr2 and Tr4 function as switches Sw4 and Sw5 in FIG. 9.

During the charge storage period, the series-parallel switching control unit 5B outputs a high-level control signal φ1 and a low-level control signal φ2 to connect the multiple capacitors C1 and C2 in series. Then, when the input voltage Vin reaches a predetermined first voltage value, it outputs a low-level control signal φ1 and a high-level control signal φ2 to connect the capacitors C1 and C2 in parallel.

Thereafter, when the voltage Vin decreases and becomes smaller than a predetermined second voltage value due to power usage by the load circuit, a high-level control signal φ1 and a low-level control signal φ2 are activated to connect the capacitors C1 and C2 in series. Output.

Further, the serial-parallel switching section 6 is formed by a Pch (P channel) transistor Tr6, an Nch transistor Tr7, and analog switches Tr8 and Tr9.

In the series/parallel switching unit 6, the Pch transistor Tr6 corresponds to the switch Sw1 in FIGS. 6 and 7, the Nch transistor Tr7 corresponds to the switch Sw3, and the switch Sw2 is an analog switch consisting of two transistors Tr8 and Tr9. has been done.

By configuring the series-parallel switching section 6 and the output switch section 8 using transistors that are analog switches, no voltage loss (potential difference) occurs. For comparison, if the switch is constructed with a diode, voltage loss occurs. By configuring the serial-parallel switching section 6 and the output switch section 8 using transistors that are analog switches, it becomes possible to operate the switches without a potential difference.

In the series-parallel switching unit 6, the Pch transistor Tr6 and the Nch transistor Tr7 may be replaced with diodes. For the Pch transistor Tr6, the cathode of the diode is connected to the Vin line and the anode is connected to one terminal of the analog switch, and for the Nch transistor Tr7, the cathode of the diode is connected to one terminal of the analog switch and the anode is connected to the GND line.

Furthermore, in the series-parallel switching section 6, the Pch transistor Tr6 and the Nch transistor Tr7 may be connected in parallel with the diode. For the Pch transistor Tr6, connect the cathode of the diode to the Vin line and the anode to one terminal of the analog switch, and for the Nch transistor Tr7, connect the cathode of the diode to one terminal of the analog switch and the anode to the GND line. Connect to.

Although not shown in FIG. 1 described above, the power storage device 1 may include an output switch section 8 for supplying power to the load circuit 3 when connected in parallel, as shown in FIG. 10. The output switch section 8 is formed of an analog switch including a Pch transistor Tr10 and an Nch transistor Tr11.

In the power storage device 1, the output switch section 8 that supplies power to the load circuit when connected in parallel may be configured only with the Pch transistor Tr10.

In power storage device 1, since high resistance and constant current transistors are used that have high resistance, series-parallel switching control section 5B has high impedance (high impedance). Therefore, power storage device 1 can be driven with even lower current (for example, 60 nA) than power generation element 2 which generates power at high voltage and low current (for example, 400 V, 6 μA).

In the configuration of FIG. 10, the total impedance of the elements constituting the series-parallel switching control section 5B, the series-parallel switching section 6, and the output switch section 8 can be made equal to or greater than the internal impedance of the power generation element 2. Thereby, the drive power consumption required for serial-parallel switching of power storage device 1 can be suppressed, and power storage efficiency can be increased.

Since the elements constituting the serial-parallel switching section 6 and the output switch section 8 are composed of MOS (Metal Oxide Semiconductor) transistors, the serial-parallel switching section 6 and the output switch section 8 are controlled by the serial-parallel switching control section 5B. The power consumed in 8 is only the power for driving the gate of the MOS transistor when the switch section is on and off, and the power storage efficiency can be increased.

Furthermore, the impedance of power storage device 1 during power storage is higher than the impedance of power storage device 1 during power supply. Therefore, the power storage device 1 can store power at high voltage and low current, and can improve power storage efficiency. Further, when power is supplied, the power supply voltage of the power storage device 1 is, for example, 3V, and it is possible to drive an electronic device such as a CPU that requires a current consumption of several mA.

In FIG. 10, the inverters 51B and 52B composed of depletion type transistors and Nch transistors have a two-stage configuration, but if a gain is required, the number of stages of similar inverters may be increased. In that case, it is preferable to synchronize the signal change timings of the control signal φ1 of the inverter 51B and the control signal φ2 of the inverter 52B with the switch switching timing of the serial-parallel switching unit 6.

Here, the flow of current in power storage device 1 of FIG. 10 will be explained with reference to FIG. 11. FIG. 11 is a circuit diagram showing the flow of current in the power storage device 1. (a) is a diagram showing a state in which capacitors C1 and C2 are connected in series during power storage, and (b) is a diagram showing a state in which capacitors C1 and C2 are connected in series during power supply. FIG.

Since the control signal φ1 is input to the gate of the Pch transistor Tr6 constituting the switch Sw1, the control signal φ1 is at a low level, that is, turned on during power supply.

Since the control signal φ2 is input to the gate of the Nch transistor Tr7 constituting the switch Sw3, the control signal φ2 is turned on at a high level, that is, when power is supplied.

A control signal φ2 is input to the gate of the Pch transistor Tr8 constituting the switch Sw2, and a control signal φ2 is input to the gate of the Nch transistor Tr9. Therefore, the switch Sw2 is turned on when the control signal φ2 is at a low level and the control signal φ1 is at a high level, that is, when power is stored.

Further, in the switch Sw4 of the output switch unit 8, the control signal φ1 is input to the gate of the Pch transistor Tr10, and the control signal φ2 is input to the gate of the Nch transistor Tr11. Therefore, the switch Sw4 is turned on when the control signal φ1 is at a low level and the control signal φ2 is at a high level, that is, when power is supplied to the load circuit 3.

Current flows through the switches Sw1, Sw2, and Sw3 included in the series/parallel switching section 6 and the switch Sw4 of the output switch section 8 in order to change the states of the switches only when switching between series and parallel. Therefore, current consumption during power storage and power supply can be reduced.

<Example of circuit configuration of power storage system 100>
Next, the circuit configuration of power storage system 100 will be described with reference to FIG. 12. FIG. 12 is a diagram illustrating an example of a circuit configuration of power storage system 100.

The rectifier circuit 4 is constituted by a diode bridge consisting of four diodes D1, D2, D3, and D4. The rectifier circuit 4 performs full-wave rectification of the AC power output from the power generation element 2.

The rectified power is stored in the capacitors C1 and C2 connected in series in the power storage device 1, and when the first voltage value is reached, the capacitors C1 and C2 in FIG. 11(b) are switched to a state in which they are connected in parallel. , the power stored in the capacitors C1 and C2 is supplied to the load circuit 3.

<Example of IC conversion>
Next, an example in which the power storage system 100 is integrated into an IC will be described with reference to FIG. 13. FIG. 13 is a diagram illustrating an example of the configuration of an IC-based power storage system 100C including a control circuit based on the communication module 31.

As shown in FIG. 13, load circuit 3 in power storage system 100C includes a communication module 31 and a sensor 32. Furthermore, the power storage device 1C includes a serial-parallel switching IC 9 in which a serial-parallel switching control section 5, a serial-parallel switching section 6, and an output switch section 8 are integrated.

The serial-parallel switching IC 9 has a function of controlling the timing of serial-parallel switching in cooperation with the communication module 31 equipped with a microcomputer. The power storage system 100C supplies power to the communication module 31 and the sensor 32 using the output voltage Vout of the series-parallel switching IC 9.

When the capacitors C1 and C2 are connected in parallel, the series-parallel switching IC 9 outputs a signal _SST to the microcomputer included in the communication module 31 to indicate that they are connected in parallel, and the communication module 31 is powered on. Let us know that it is possible.

After the system operation of the communication module 31 is completed, at a predetermined timing, the communication module 31 outputs a signal _SEND to the series/parallel switching IC 9 indicating that power supply is no longer required to the microcomputer, instructing it to shift to power storage. do. Upon receiving the instruction, power storage device 1 switches capacitors C1 and C2 to a series connection state and starts charging. Here, the signal S _END is a signal that changes the connection of the capacitors C1 and C2 from parallel to series by controlling the voltage at the gate of the Nch transistor Tr5 of the series-parallel switching control section 5 in FIG.

With the configuration of the power storage system 100C, the power storage device 1C can improve power storage efficiency by cooperating with the CPU on the load side.

Moreover, the power storage system 100C can also utilize the result of signal processing of the signal from the sensor 32 by a microcomputer provided in the communication module 31 as an IoT edge terminal through communication means such as wireless.

<Operation of power storage device 1>
Next, the operation of power storage device 1 will be explained with reference to FIG. 14. FIG. 14 is a timing chart showing an example of the serial-parallel switching operation of power storage device 1.

Electric power generated by power generation element 2 is rectified by rectifier circuit 4 and input to power storage device 1 .

At time T0, capacitors C1 and C2 are not charged.

At time T1, when the rectified power starts to be input to the power storage device 1, the circuit is activated by the power outputted from the power generation element 2 at high impedance because the series/parallel switching control section 5B has a high impedance configuration. Control signals φ1 and φ2 are generated.

When power storage starts, the control signal φ1 becomes High level, the control signal φ2 becomes Low level, the series/parallel switching section 6 is activated, switches Sw1 and Sw3 are turned off, switch Sw2 is turned on, and the capacitor of the power storage section 7 is turned off. C1 and C2 are connected in series.

When the input voltage Vin, which is the power from the power generation element 2, reaches 10V (first voltage value) in a state where the capacitors C1 and C2 are connected in series, the series/parallel changeover switch control section 50B operates at time T2, The control signal φ1 is switched to Low level, and the control signal φ2 is switched to High level. In response to this, the series/parallel switching section 6 is activated, the switch Sw2 is turned off, the switches Sw1 and Sw3 are turned on, and the capacitors C1 and C2 in the power storage section 7 are connected in parallel. When capacitors C1 and C2 switch from series connection to parallel connection, the voltage changes from the state of (Vin=V _C1 +V _C2 ) to the state of (Vin=V _C1 =V _C2 ), so the storage voltage (input voltage Vin) is reduced by half (10V ⇒ 5V). Here, V _C1 is the voltage stored in the capacitor C1, and V _C2 is the voltage stored in the capacitor C2.

At time T3, when the load circuit 3 is driven, power (output voltage Vout) is supplied to the load circuit 3, and the input voltage Vin also decreases.

Note that here, it is assumed that no power is input from the power generation element 2 from time T2 to time T4.

When the input voltage Vin decreases and reaches 2V (second voltage value), at time T4, the control signal φ1 becomes High level, the control signal φ2 becomes Low level, switches Sw1 and Sw3 are off, and switch Sw2 is on. As a result, the capacitors C1 and C2 of the power storage unit 7 are connected in series, and the power from the power generation element 2 is stored.

After this, when the input voltage Vin increases and reaches 10V, the capacitors C1 and C2 are switched to parallel connection.

The above operation continues.

Here, although FIG. 14 shows an example in which the timing at which the input voltage Vin becomes 10V is time T2, and the timing at which the input voltage Vin becomes 2V is time T4, the first voltage value corresponding to time T2 and T4 is and the second voltage value are not limited to these. By changing the resistance values of the resistors R3, R4, and R5 of the series/parallel changeover switch control section 50B, each of the first voltage value and the second voltage value can be set to an arbitrary voltage.

It is also possible to continue inputting power from the power generation elements 2 in parallel. In that case, the voltage drop of the input voltage Vin from time T3 to time T4 may be gradual or may increase.

Next, an example of the operation of the power storage system 100C (see FIG. 13) will be described with reference to the right side of FIG. 14. In the power storage system 100C, the operation from time T0 to time T5 is the same.

At time T6, the serial-parallel switching IC 9 outputs a signal _SST indicating that the parallel state has been established to the microcomputer included in the communication module 31, and notifies the communication module 31 that power can be supplied. . Note that in FIG. 14, the periods from time T3 to T4 and from time T6 to T7 are the load circuit operation period (power supply period, system operation period) during which the power storage device 1 is synchronizing with the communication module 31 and feeding power to the communication module 31. ).

After the system operation of the communication module 31 is completed at time T7, when the signal _SEND is input from the communication module 31 to the series/parallel switching IC9 at time T8, the capacitors C1 and C2 are switched to the series connection state, Charging will start.

When power storage device 1 operates in cooperation with communication module 31, power supply is stopped during the power supply period when the voltage drops to 2V or when signal _SEND is output, whichever comes first. In the example of FIG. 14, since the signal _SEND was output before the voltage dropped to 2V, the power supply was stopped at that point, the connection state of capacitors C1 and C2 was switched in series, and the state was shifted to power storage operation. There is.

<Example of stored power>
Here, the electric power stored in the capacitor will be explained.

The electric power W(J) that can be stored in the capacitor can be expressed by the following (Formula 1).

また、コンデンサをｎ個、直列接続すると、容量Ｃｓｎは、以下の（式２）で表せる。

Further, when n capacitors are connected in series, the capacitance Csn can be expressed by the following (Formula 2).

コンデンサをｎ個、並列接続すると、容量Ｃｐｎは、以下の（式３）で表せる。

When n capacitors are connected in parallel, the capacitance Cpn can be expressed by the following (Equation 3).

コンデンサｎ個直列接続で蓄電できる電力Ｗｓは、以下の（式４）で表せる。

The electric power Ws that can be stored by connecting n capacitors in series can be expressed by the following (Equation 4).

コンデンサｎ個並列接続で蓄電できる電力Ｗｐは、以下の（式５）で表せる。

The power Wp that can be stored by connecting n capacitors in parallel can be expressed by the following (Formula 5).

例えば、具体的に、ｎ＝２、Ｃ＝１(μＦ；マイクロファラッド)、Ｖ＝５（Ｖ；ボルト）とすると、コンデンサ２個を直列接続で蓄電できる電力Ｗｓは、以下の（式６）のように計算できる。

For example, specifically, if n = 2, C = 1 (μF; microfarad), and V = 5 (V; volt), the power Ws that can be stored by connecting two capacitors in series is calculated using the following (Equation 6). It can be calculated as follows.

コンデンサ２個並列接続で蓄電できる電力Ｗｐは、以下の（式７）のように計算できる。

The electric power Wp that can be stored by connecting two capacitors in parallel can be calculated as shown in (Equation 7) below.

As described above, Ws=Wp, and the same amount of power can be stored in the capacitors even if n capacitors of the same capacity are stored in series or in parallel. In order to store electricity in n capacitors connected in series, it is necessary to store electricity at a high voltage n×V (V).

On the other hand, in systems such as IoT, the stored power is required to drive a CPU or supply power to electronic devices connected to sensors and the like. These devices are required to be driven by about 1 to 3 lithium batteries, for example, with a voltage of about 3 to 10 V and a current of about several μA to several mA.

Here, n capacitors with the same capacity C are connected in series to store electricity in a high impedance state, and by switching those capacitors from series connection to parallel connection, the power stored in the capacitors can be maintained and the voltage can be lowered. It is possible to drive IoT systems etc. in a low impedance state.

When the resistance value of the resistor provided on the circuit is R, the impedance Z is defined by the following (Equation 8).

コンデンサをｎ個直列にした場合の回路のインピーダンスＺｓｎは、（式２）のように表されるため、以下の（式９）のように表すことができる。

Since the impedance Zsn of the circuit when n capacitors are connected in series is expressed as in (Formula 2), it can be expressed as in (Formula 9) below.

コンデンサをｎ個並列にした場合の回路のインピーダンスＺｐｎは、（式３）のように表されるため、以下の（式１０）のように表すことができる。

Since the impedance Zpn of the circuit when n capacitors are connected in parallel is expressed as in (Formula 3), it can be expressed as in (Formula 10) below.

となる。ここで、回路上に設けられる抵抗の抵抗値Ｒを小さくすると、直列時のインピーダンスＺｎｓ（式９）が高く、並列時のインピーダンスＺｐｎ（式１０）が低くなる。

becomes. Here, if the resistance value R of the resistor provided on the circuit is reduced, the impedance Zns (Formula 9) when connected in series becomes high, and the impedance Zpn (Formula 10) when connected in parallel becomes low.

As described above, by switching the capacitors in series, electricity is stored at high impedance at a high voltage n×V (V) from (Equation 4) and (Equation 9) during power storage, and (Equation 5) during power supply. From (Equation 10), power can be efficiently supplied to the load circuit with a low voltage V (V).

When power is generated by electrostatic induction in piezoelectric elements or power generating rubber, a high voltage of several tens of volts to several hundred volts is generated. Furthermore, the output current is a low current in the order of nA to μA, and can be seen as a constant current power supply with high output impedance. Therefore, the power stored in a capacitor at a high voltage using a piezoelectric element or electrostatic induction is converted with high efficiency into power supplied to a load circuit driven with a voltage of about 3 to 10 V and a current of several μA to several mA. A circuit is required to do this.

Here, Figure 15 shows, as a comparative example, the progress of the current during storage and power supply when the capacitance of the capacitor is fixed, and Figure 16 shows the progress of the current during storage and power supply when the capacitance of the capacitor is switched between series and parallel as in the embodiment.

More specifically, FIG. 15(a) is a circuit diagram in which the capacity of the capacitor is fixed, and FIG. 15(b) is a diagram showing the storage current and voltage in the state of FIG. 15(a), and the voltage between the capacitor terminals during power supply. FIG.

Figure 15 shows an example in which one capacitor with a capacity of 0.25 μF is used and the device operates at a capacity of 0.25 μF both during charging and power supply.

Generally, the driving voltage for CPU operation, sensor driving, and wireless transmission IC is about 2 to 5V. As shown in FIG. 15(b), in the comparative example, the voltage value suddenly drops due to the small capacity stored in the capacitor during power supply, and the time when the voltage value is in the range of 2 to 4.5 V is 20 ms. It is. Therefore, power can only be used for 20ms.

In contrast, Figure 16(a) is a circuit diagram for switching between series and parallel capacitors, and Figure 16(b) is a diagram showing the changes in the storage current and storage voltage in the state of Figure 16(a), and the voltage between the capacitor terminals when power is supplied.

Figure 16 shows an example in which two capacitors with a capacitance of 0.5 μF are connected in series and operated with a capacitance of 0.25 μF during charging, and are connected in parallel and operated with a capacitance of 1.0 μF during power supply. There is.

As shown in FIG. 16(b), in the embodiment, when power is supplied, by switching the capacitors from series connection to parallel connection, the voltage value is halved at the time of switching, but after that, power supply using a capacitor with a large capacity The voltage value drops slowly, so the time period during which the voltage value is in the range of 2 to 4.5 V is 84 ms. Compared to FIG. 15(b), although the capacity of the capacitor during charging is the same, switching from series connection to parallel connection increases the time during which power can be used during power supply by more than four times.

As shown in FIG. 16, in the energy storage system according to the embodiment, by switching between series and parallel connection of the capacitors, during energy storage, it is possible to store energy with impedance matching at high voltage and high impedance. On the other hand, during power supply, it is possible to supply energy with impedance matching at low impedance at the voltage required for an IoT system or the like.

<Example of installing multiple capacitors in a power storage device>
Although the above describes the configuration in which the power storage device 1 includes two capacitors, the number of the plurality of capacitors is not limited to two. FIG. 17 is a diagram illustrating a configuration example of a circuit that connects four capacitors in series. FIG. 17 shows an internal block of a power storage unit 70 including four capacitors and a four-series/parallel switching IC 90 that switches connections between the four capacitors.

The serial-parallel changeover switch section 60 corresponds to the serial-parallel changeover section 6 of FIG. 10, and is composed of switch groups 61, 62, and 63. The switch groups 61 and 63 are turned on when the capacitors C1, C2, C3, and C4 are connected in parallel, and turned off when they are connected in series. The switch group 62 is turned on when the capacitors C1, C2, C3, and C4 are connected in series, and turned off when they are connected in parallel. Further, the switch 80 corresponds to the output switch section 8 in FIG.

The series-parallel switching control section 5B' corresponds to the series-parallel switching control section 5B for switching two capacitors in FIG. and a master/slave switching circuit 55 for switching between the slave side and the slave side.

Next, FIG. 18 is a diagram showing a configuration example of a capacitor multistage connection circuit. In FIG. 18, a capacitor multi-stage connection circuit 90E includes a 4-series/parallel switching master IC 91 and 4-series/parallel switching slave ICs 92, 93, 94, and 95.

By providing the master IC 91 with the master/slave switching circuit 55 shown in FIG. 17, the four ICs 92, 93, 94, and 95 are configured to be connected in cascode as slave ICs, and the respective output voltages Vout can be switched in four series/parallel to the master IC 91. It can be connected to IC91 and multi-stage connection is possible.

In this way, when performing multi-stage connection, the cascode connection is controlled in a master-slave manner. This allows more multi-stage capacitors to be connected, making it possible to further improve efficiency.

As described above, the energy storage device according to the embodiment can detect the switching voltage at high voltage and low current, and can operate at high voltage and low current to switch between series and parallel connections and store energy with high efficiency.

Note that in the above-described embodiment, the series-parallel switching control section 5 provided hysteresis for the control signal φ1 by providing the hysteresis generation circuit H therein, but the series-parallel switching control section 5 provides hysteresis. If possible, the hysteresis generation circuit may be provided outside the series/parallel switching control section 5.

[First embodiment]
Next, a power storage system 100a according to the first embodiment will be described.

In the power storage system 100 according to the embodiment described above, the capacitors C1 and C2, which are switched to parallel connection during power supply, maintain the parallel connection state until the storage voltage becomes equal to or lower than the second voltage value. Therefore, when storing power after power supply to the load circuit ends, switching to series connection may not be possible until the stored power voltage becomes equal to or lower than the second voltage value, and the power storage efficiency may not increase.

For example, in power storage device 1 (see Figure 1), when capacitors C1 and C2 are connected in parallel to supply power to load circuit 3, load circuit 3 stops operating and the output current becomes 0A (ampere). In this case, the capacitors C1 and C2 remain connected in parallel until the stored voltage becomes equal to or lower than the second voltage value. When power is input from the power generation element 2 in this state, the capacitors C1 and C2 store power in a parallel connection state, so that the power storage efficiency may not increase.

In contrast, in this embodiment, the connection of the multiple power storage devices is switched from parallel to series based on the output current of a power storage unit having multiple power storage devices. For example, when the output current becomes equal to or lower than a first current value while the multiple power storage devices are connected in parallel, the connection of the multiple power storage devices is switched from parallel to series. This allows power to be stored in the multiple power storage devices connected in series without waiting for the storage voltage to become equal to or lower than a second voltage value, improving power storage efficiency.

<Configuration example of power storage system 100a>
The configuration of power storage system 100a will be described with reference to FIG. 19. FIG. 19 is a block diagram showing an example of the configuration of power storage system 100a.

As shown in FIG. 19, the energy storage system 100a includes an energy storage device 1a. The energy storage device 1a also includes an output current series return control device 15 that includes an output current detection unit 13 and a series return control unit 14.

Similar to the power storage system 100 described above, the power storage system 100a rectifies the power generated by the power generation element 2 by the rectifier circuit 4, and then stores the power by the capacitors C1 and C2 connected in series in the power storage unit 7. Then, when the stored voltage reaches the first voltage value, the series-parallel switching section 6 is activated under the control of the series-parallel switching control section 5, and the capacitors C1 and C2 are switched to parallel connection. Capacitors C1 and C2 supply power to the load circuit 3 in a parallel-connected state.

Further, the output current detection unit 13 detects the current output from the power storage device 1a to the load circuit 3, and outputs the detection result to the series return control unit 14. The series return control unit 14 causes the series-parallel switching control unit 5 to connect the capacitors C1 and C2 when the output current detected by the output current detection unit 13 becomes equal to or less than a predetermined current value (first current value). Switch from parallel to series. The series-parallel switching section 6 operates under the control of the series-parallel switching control section 5, and the connection of the capacitors C1 and C2 is switched from parallel to series. The capacitors C1 and C2 are connected in series and store the power generated by the power generation element 2.

<Configuration example of power storage device 1a>
Next, an example of the circuit configuration of power storage device 1a will be described with reference to FIG. 20. FIG. 20 is a diagram illustrating an example of a circuit configuration of power storage device 1a.

As shown in FIG. 20, the power storage device 1a includes a series-parallel switching control section 5B, a series-parallel switching section 6, a power storage section 7, an output switch section 8, an output current detection section 13, and a series return control section 14. Equipped with. Note that the power storage device 1a includes an IC in which a series-parallel switching control section 5B, a series-parallel switching section 6, a power storage section 7, an output switch section 8, an output current detection section 13, and a series return control section 14 are integrated. Good too.

The output current detection unit 13 includes a Pch transistor Tr12, which is SW5, which is turned on during a period when the output current Iout is output, a Pch transistor Tr13 that detects the output current Iout, and a Pch transistor Tr14 that constitutes a current comparator. , and a depletion type transistor Tr15. Here, the Pch transistor Tr13 is an example of a "monitor transistor". Furthermore, the output current detection section 13 may include a resistor instead of the depletion transistor Tr15.

Here, the current flowing through the depletion type transistor Tr15 becomes a constant current Itr15, and since the Pch transistor Tr14 and the depletion type transistor Tr15 operate as a current comparator, when the current Itr14 of the Pch transistor Tr14 is larger than the constant current Itr15, the output The signal φ3 becomes High level. On the other hand, when the current Itr14 is smaller than the constant current Itr15, the output signal φ3 becomes Low level. The first current value can be set by the transistor size ratio of the Pch transistor Tr14 and the depletion type transistor Tr15.

Furthermore, since the output current of power storage device 1a depends on the size of Pch transistor Tr10, which is Sw4, the first current value can be set by adjusting the size ratio of Pch transistor Tr10 and Pch transistor Tr13. However, since the Pch transistor Tr13 and the Pch transistor Tr14 are configured by a current mirror circuit, the size ratio of the Pch transistor Tr13 and the Pch transistor Tr14 may be adjusted.

The series return control unit 14 includes an Nch transistor Tr17, which is Sw6, which is turned on during the period when the output current Iout is output, a depletion type transistor Tr16, which constitutes an inverter that generates the series return signal φ4, and an Nch transistor. Tr18, a capacitor C3, and an Nch transistor Tr19 that controls the series-parallel switching control section 5B. The series return control unit 14 may include a resistor instead of the depletion transistor Tr16.

Here, when the output current Iout is larger than the first current value, the output signal φ3 is at High level and the series return signal φ4 is at Low level, but when the output current Iout becomes smaller than the first current value, the series return signal φ4 becomes High level, and the Nch transistor Tr19 is turned on. As a result, a high-level control signal φ1 and a low-level control signal φ2 for connecting the capacitors C1 and C2 in series are output to the series/parallel switching control section 5B.

Further, the serial-parallel switching unit 6 includes a Pch transistor Tr6, an Nch transistor Tr7, and analog switches Tr8 and Tr9.

Here, FIGS. 21A to 21B show the flow of current in power storage device 1A of FIG. 20. FIG. 21A is a diagram showing the flow of current during power storage, and FIG. 21B is a diagram showing the flow of current during power supply.

Since the control signal φ1 is input to the gate of the Pch transistor Tr6 constituting the switch Sw1, the control signal φ1 is at a low level, that is, turned on during power supply.

The control signal φ2 is input to the gate of the Nch transistor Tr7 that constitutes the switch Sw2, so that the control signal φ2 is at a high level, i.e., when power is being supplied, the transistor is turned on.

A control signal φ2 is input to the gate of the Pch transistor Tr8 constituting the switch Sw3, and a control signal φ1 is input to the gate of the Nch transistor Tr9. Therefore, the switch Sw3 is turned on when the control signal φ2 is at a low level and the control signal φ1 is at a high level, that is, when power is stored.

Further, in the switch Sw4 of the output switch unit 8, the control signal φ1 is input to the gate of the Pch transistor Tr10, and the control signal φ2 is input to the gate of the Nch transistor Tr11. Therefore, the switch Sw4 is turned on when the control signal φ1 is at a low level and the control signal φ2 is at a high level, that is, when power is supplied to the load circuit 3.

A control signal φ1 is input to the gate of the Pch transistor Tr12 constituting the switch Sw5. The switch Sw5 is turned on when the control signal φ1 is at a low level, that is, when power is supplied to the load circuit 3.

A control signal φ2 is input to the gate of the Nch transistor Tr17 constituting the switch Sw6. The switch Sw6 is turned on when the control signal φ2 is at a high level, that is, when power is supplied to the load circuit 3.

The switches Sw1, Sw2, and Sw3 included in the series/parallel switching section 6, the switch Sw4 of the output switch section 8, the switch Sw5 of the output current detection section 13, and the switch Sw6 of the series return control section are set only when switching between series and parallel. , a current flows to change the state of the switch. Therefore, current consumption during power storage and power supply can be reduced.

<Example of operation of power storage device 1a in the first embodiment>
Next, the operation of power storage device 1a will be explained with reference to FIG. 22. FIG. 22 is a timing chart showing an example of the operation of power storage device 1a in this embodiment.

The electric power generated by the power generation element 2 is rectified by the rectifier circuit 4, and is supplied to the power storage device 1a.

At time T0, capacitors C1 and C2 are not charged.

At time T1, when the rectified power starts to be supplied to the power storage device 1a, the series-parallel switching control unit 5B is in a high impedance configuration, so the circuit is started by the power output at high impedance from the power generating element 2, and control signals φ1 and φ2 are generated.

When power storage starts, the control signal φ1 becomes High level, the control signal φ2 becomes Low level, the series/parallel switching unit 6 is activated, switches Sw1 and Sw3 are turned off, switch Sw2 is turned on, and the power storage unit 7 is turned off. Capacitors C1 and C2 are connected in series. Furthermore, the output signal φ3 from the output current detection section 13 becomes Low level, and the series return signal φ4 from the series return control section 14 becomes Low level.

When the capacitors C1 and C2 are connected in series and the input voltage Vin, which is the power from the power generating element 2, reaches 10V (becomes equal to or greater than the first voltage value), at time T2, the series-parallel changeover switch control unit 50B operates, switching the control signal φ1 to a low level and the control signal φ2 to a high level. In response to this, the series-parallel changeover unit 6 operates, the switch Sw2 is turned off, the switches Sw1 and Sw3 are turned on, and the capacitors C1 and C2 are connected in parallel. When the capacitors C1 and C2 are switched from a series connection to a parallel connection, the voltage changes from (Vin=V _C1 +V _C2 ) to (Vin=V _C1 =V _C2 ), and the storage voltage (input voltage Vin) is reduced to half (10V⇒5V).

At time T3, when the load circuit 3 is driven, power (output voltage Vout) is supplied to the load circuit 3. Further, the output signal φ3 from the output current detection section 13 becomes High level, and the serial return signal φ4 from the series return control section 14 becomes Low level. Furthermore, the input voltage Vin also decreases.

Note that here, it is assumed that no power is input from the power generation element 2 from time T2 to time T4.

When the input voltage Vin decreases and reaches 2V (second voltage value) at time T4, the control signal φ1 becomes High level, the control signal φ2 becomes Low level, switches Sw1 and Sw3 are turned off, and switch Sw2 is turned on. . Thereby, the capacitors C1 and C2 are connected in series, and the power from the power generation element 2 is stored. Further, the output of the output current Iout to the load circuit 3 is stopped, the output signal φ3 becomes Low level, and the series return signal φ4 becomes Low level.

When the capacitors C1 and C2 are connected in series and the input voltage Vin, which is the power from the power generation element 2, reaches 10V, the series/parallel changeover switch control section 50B operates at time T5, and the control signal φ1 goes to Low level, and the control The signal φ2 switches to High level. In response to this, the series/parallel switching unit 6 is activated, the switch Sw2 is turned off, the switches Sw1 and Sw3 are turned on, and the capacitors C1 and C2 are connected in parallel. When the capacitors C1 and C2 of the power storage unit 7 are switched from series connection to parallel connection, the voltage changes from the state (Vin=V _C1 +V _C2 ) to the state (Vin=V _C1 =V _C2 ), so the storage voltage ( The input voltage Vin) is reduced by half (10V⇒5V).

After that, at time T6, when the load circuit 3 is driven, power (output voltage Vout) is supplied to the load circuit 3, the output signal φ3 of the output current detection section 13 becomes High level, and the series return control section 14 returns to series. The signal φ4 becomes Low level. Furthermore, the input voltage Vin also decreases.

Thereafter, at time T7, when the current in the load circuit 3 changes, the input voltage Vin decreases in accordance with the magnitude of the output current Iout.

Note that here, it is assumed that no power is input from the power generation element 2 from time T5 to time T11.

After that, at time T8, if the operation of the load circuit 3 stops and the output current Iout becomes 0A, or if the current of the load circuit 3 becomes 0.5 mA or less (first current value) or less, the output current The detection unit 13 detects the current flowing through the Pch transistor Tr13, and at time T9, the output signal φ3 of the output current detection unit 13 becomes Low level.

After that, at time T10, the serial restoration signal φ4 by the serial restoration control section 14 becomes High level.

Thereafter, at time T11, the serial/parallel changeover switch control section 50B operates, and the control signal φ1 is switched to High level and the control signal φ2 is switched to Low level. In response to this, the serial-parallel switching unit 6 is activated, the switch Sw2 is turned on, and the switches Sw1 and Sw3 are turned off. The capacitors C1 and C2 are connected in series, and the power from the power generating element 2 is stored.

Thereafter, at time T12, the output signal φ3 of the output current detection section 13 becomes Low level, and the series return signal φ4 from the series return control section 14 becomes Low level.

In this way, the power storage device 1a stores the power generated by the power generation element 2 in the capacitors C1 and C2 connected in series, and when the stored voltage reaches the first voltage value, the power storage device 1a stores the power generated by the power generation element 2 in the capacitors C1 and C2. Can be switched to parallel connection. Furthermore, the power storage device 1a can switch the connection of the capacitors C1 and C2 from parallel to series when the output current detected by the output current detection unit 13 becomes equal to or less than the first current value.

<Functions and Effects of Power Storage System 100a>
As described above, in this embodiment, the connection of the capacitors C1 and C2 is switched from parallel to series based on the output current of the power storage unit 7 having the capacitors C1 and C2. For example, when the capacitors C1 and C2 are connected in parallel during power supply from the power storage device 1a, if the output current becomes equal to or lower than the first current value, the connection of the capacitors C1 and C2 is switched from parallel to series. This allows the series-connected capacitors C1 and C2 to store the power from the power generating element 2 without waiting for the storage voltage to become equal to or lower than the second voltage value, and allows for more efficient power storage.

The embodiment is particularly suitable for storing and supplying power from a low-frequency power generating element such as power generating rubber, but is not limited thereto. It can also be applied to power storage and power supply using high-frequency power generating elements such as energy harvesters.

In the above example, the first current value of the output current detection section 13 was set to 0.5 mA, but it is not limited to this and can be changed arbitrarily.

In addition, in FIG. 20, an example is shown in which the energy storage device 1a has two capacitors C1 and C2, but the number of capacitors is not limited to this and may be increased. Below, an energy storage device 1b having four capacitors will be described as a modified example of this embodiment.

(First modification)
FIG. 23 is a diagram illustrating an example of the circuit configuration of power storage device 1b according to the first modification.

FIG. 23 shows an internal block of a power storage unit 70 including four capacitors and a four-series/parallel switching IC 90b that switches connections between the four capacitors.

The serial-parallel changeover switch section 60 corresponds to the serial-parallel changeover section 6 of FIG. 20, and is composed of switch groups 61, 62, and 63. Each of the switch groups 61 and 63 is turned on when the capacitors C1, C2, C3, and C4 are connected in parallel, and turned off when they are connected in series. Further, the switch group 62 is turned on when the capacitors C1, C2, C3, and C4 are connected in series, and turned off when the capacitors C1, C2, C3, and C4 are connected in parallel. Switch 80 corresponds to output switch section 8 in FIG. 20.

The series-to-parallel switching control section 5B' is the same as the series-to-parallel switching control section 5B for switching two capacitors in FIG. 20, and the output current detection section 13 and the series return control section 14 are the same as in FIG. 22. When capacitors are connected in series in multiple stages in a cascode connection as shown in FIG. 18, a master/slave switching circuit 55 is installed to switch between the master side and the slave side.

By providing the master/slave switching circuit 55, a plurality of ICs can be connected in cascode as slave ICs, and each output voltage Vout can be connected to a four-series/parallel switching master IC, allowing multi-stage connection.

In this way, when performing multi-stage connection, the cascode connection is controlled in a master-slave manner. This allows more multi-stage capacitors to be connected, making it possible to further improve efficiency.

[Second embodiment]
Next, a power storage system 100e according to a second embodiment will be described.

In the power storage system 100 according to the embodiment described above, when the power storage device 1 is connected to a load-driven power storage device that can store and supply power, and the power stored in the power storage device 1 is stored in the load-driven power storage device, the load-driven power storage device The power storage device 1 maintains the state in which the plurality of capacitors are connected in parallel until the power storage voltage of the device becomes equal to or lower than the second voltage value. Therefore, until the storage voltage of the load-driven power storage device becomes equal to or lower than the second voltage value, power storage device 1 cannot be switched to a state in which a plurality of capacitors are connected in series, and the power storage efficiency may not increase.

Furthermore, in the power storage system 100, when a plurality of capacitors are connected in series, power cannot be supplied to the load circuit, and the power supply efficiency may not be improved.

On the other hand, in this embodiment, as in the first embodiment, the connection of the plurality of power storage devices is switched from parallel to series based on the output current of the power storage unit having the plurality of power storage devices. For example, when a plurality of power storage devices are connected in parallel and the output current becomes equal to or less than a first current value, the connection of the plurality of power storage devices is switched from parallel to series. Also, when connecting a load-driven power storage device and power storage device 1, power can be stored using multiple power storage devices connected in series without waiting for the power storage voltage of the load-driven power storage device to become equal to or lower than the second voltage value. , improve energy storage efficiency. Furthermore, it is possible to supply power to a load circuit with multiple capacitors connected in series, improving power supply efficiency.

<Example of configuration of power storage system 100e>
The configuration of power storage system 100e will be described with reference to FIG. 24. It is a block diagram showing an example of a composition of electricity storage system 100e. As shown in FIG. 24, power storage system 100e includes power storage device 1a and load-driven power storage device 10. The configuration of power storage device 1a is similar to that described in the first embodiment.

In the power storage system 100e, the power generated by the power generation element 2 is rectified by the rectifier circuit 4, and then stored in series-connected capacitors C1 and C2 in the power storage unit 7. Thereafter, power is supplied to both the load driving power storage device 10 and the load circuit 3 in parallel with the capacitors C1 and C2 connected in parallel.

Power storage device 1 a supplies power stored in power storage unit 7 to load driving power storage device 10 together with load circuit 3 .

The load-driven power storage device 10 is a device that includes various power storage devices such as an electric double layer capacitor, a lithium ion capacitor, a lithium ion battery, or a lead storage battery, and is capable of storing and supplying power. Load drive power storage device 10 supplies power to load circuit 3 to drive load circuit 3 .

The method of controlling the power supply to the load circuit 3 by the load driving power storage device 10 is not particularly limited, but for example, it may be controlled based on a control signal from an external device, or the load driving power storage device 10 may be equipped with a timer. The power supply may be controlled to be supplied at predetermined time intervals based on the time measured by .

As described above, when the stored voltage of the series-connected capacitors C1 and C2 reaches the first voltage value, the series-parallel switch 6 operates to connect the capacitors _C1 and C2 in parallel. Then, the power stored in the capacitors C1 and C2 is supplied to and stored in the load driving power storage device 10 and is also supplied to the load circuit 3 so that Vin = V _C1 = V C2 = V _och is satisfied. Here, V _och is the stored voltage of the load driving power storage device 10.

However, when the startup voltage of the load circuit 3 is set, if the storage voltage _Voch is lower than the startup voltage of the load circuit 3, power is supplied only to the load driving storage device 10, and if the storage voltage _Voch becomes equal to or higher than the startup voltage of the load circuit 3, power is supplied to both the load driving storage device 10 and the load circuit 3.

Thereafter, when the stored voltage of the power storage unit 7 becomes equal to or lower than the second voltage value, the series-parallel switching unit 6 is activated under the control of the series-parallel switching control unit 5, and the capacitors C1 and C2 are switched to be connected in series. The capacitors C1 and C2 are connected in series and store the power generated by the power generation element 2.

Further, output current detection section 13 detects the current output from power storage device 1a to load circuit 3 and load drive power storage device 10, and outputs the detection result to series return control section 14. The series return control unit 14 causes the series/parallel switching control unit 5 to switch the connection of the capacitors C1 and C2 from parallel to series when the output current detected by the output current detection unit 13 becomes equal to or less than the first current value. let The series-parallel switching section 6 operates under the control of the series-parallel switching control section 5, and the connection of the capacitors C1 and C2 is switched from parallel to series. The capacitors C1 and C2 are connected in series and store the power generated by the power generation element 2.

The power storage device 1a supplies power to the load circuit 3 and the load driving power storage device 10, and either when the storage voltage of the power storage unit 7 becomes a first voltage or less, or when the output current becomes a first current value or less In one case, the capacitors C1 and C2 are switched to be connected in series, and the power generated by the power generating element 2 can be stored, so that charging can be performed efficiently.

Furthermore, even when the power storage system 100e is storing power and power cannot be supplied from the power storage system 100e to the load circuit 3, the power stored in the load driving power storage device 10 can be supplied to the load circuit 3. It can be driven by

<Operation of power storage device 1a in second embodiment>
Next, the operation of power storage device 1a in this embodiment will be described with reference to FIG. 25. FIG. 25 is a timing chart showing an example of the operation of power storage device 1a in this embodiment. The operation up to time T1 is the same as that described with reference to FIG. 22, so a duplicate explanation will be omitted.

When the capacitors C1 and C2 are in series and the input voltage Vin, which is the power from the power generation element 2, reaches 10V (first voltage), the series/parallel changeover switch control section 50B operates at time T2, and the control signal φ1 changes. The low level control signal φ2 switches to high level. In response to this, the series/parallel switching unit 6 is activated, the switch Sw2 is turned off, the switches Sw1 and Sw3 are turned on, and the capacitors C1 and C2 of the power storage unit 7 are connected in parallel. When the capacitors C1 and C2 of the power storage unit 7 are switched from series connection to parallel connection, the voltage changes from the state (Vin=V _C1 +V _C2 ) to the state (Vin=V _C1 =V _C2 ), so the storage voltage ( At the same time, the input voltage Vin) is reduced by half (from 10 V to 5 V), and at the same time, the power stored in capacitors C1 and C2 of the power storage unit 7 is supplied to the load circuit 3 and the load drive power storage device 10, and the potential of the load drive power storage device 10 is increased. rises.

Further, at time T2, the output current Iout of the power storage device 1a starts flowing, and at time T3, the output signal φ3 of the output current detection section 13 becomes High level, and the series return signal φ4 from the series return control section 14 becomes Low level. . Furthermore, the input voltage Vin also decreases.

Note that here, it is assumed that no power is input from the power generation element 2 from time T2 to time T4. Further, it is assumed that no power is supplied to the load circuit 3.

When the input voltage Vin decreases and reaches 2V at time T4, the control signal φ1 goes to High level, the control signal φ2 goes to Low level, switches Sw1 and Sw3 are turned off, and switch Sw2 is turned on, so that the power storage unit 7 is turned off. Capacitors C1 and C2 are connected in series to store power from power generating element 2.

Further, at time T4, the output of the output current Iout to the load circuit 3 and the load driving power storage device 10 is stopped, and at time T5, the output signal φ3 becomes Low level and the series return signal φ4 becomes Low level.

When the capacitors C1 and C2 are in a series state and the input voltage Vin, which is the power from the power generating element 2, reaches 10V, the series/parallel changeover switch control section 50B operates at time T6, and the control signal φ1 goes to Low level, and the control signal φ2 switches to High level. In response to this, the series/parallel switching unit 6 is activated, the switch Sw2 is turned off, the switches Sw1 and Sw3 are turned on, and the capacitors C1 and C2 of the power storage unit 7 are connected in parallel. When the capacitors C1 and C2 of the power storage unit 7 are switched from series connection to parallel connection, the voltage changes from the state (Vin=V _C1 +V _C2 ) to the state (Vin=V _C1 =V _C2 ), so the storage voltage ( At the same time, the input voltage Vin) is reduced by half (from 10 V to 5 V), and at the same time, the power stored in capacitors C1 and C2 of the power storage unit 7 is supplied to the load circuit 3 and the load drive power storage device 10, and the potential of the load drive power storage device 10 is increased. rises.

As the potential of the voltage V _och of the load driving power storage device 10 increases, the input voltage Vin becomes 2V or more at time T8. Thereafter, when the output current Iout of the power storage device 1a decreases to 5 mA or less, at time T9, the output signal φ3 of the output current detection section 13 becomes Low level, and at the time T10, the series recovery signal φ4 from the series recovery control section 14 becomes High level.

After that, at time T11, the control signal φ1 becomes High level, the control signal φ2 becomes Low level, the switches Sw1 and Sw3 are turned off, and the switch Sw2 is turned on. Thereby, the capacitors C1 and C2 are connected in series, and the power from the power generation element 2 is stored.

Thereafter, at time T12, the serial restoration signal φ4 by the serial restoration control unit 14 becomes High level.

Note that here, it is assumed that no power is input from the power generation element 2 from time T6 to time T11. Further, it is assumed that the power supplied to the load circuit 3 is smaller than 5 mA.

The above operation continues.

In this way, even when connecting the load-driven power storage device and the power storage device 1, the power storage device 1a can be connected in series without waiting for the storage voltage of the load-driven power storage device to become equal to or lower than the second voltage value. Power can be stored using multiple power storage devices. Additionally, power can be supplied to a load circuit with multiple capacitors connected in series.

<Effects of power storage system 100e>
As explained above, in this embodiment, even when connecting the load-driven power storage device and the power storage device 1, the series connection is performed without waiting for the storage voltage of the load-driven power storage device to become equal to or lower than the second voltage value. Power can be stored using multiple connected power storage devices, and power storage efficiency can be improved. Furthermore, it is possible to supply power to a load circuit with a plurality of capacitors connected in series, thereby improving power supply efficiency.

Note that in the above example, the first current detection value of the output current detection section 13 was set to 5 mA, but it can be changed arbitrarily. In addition, the capacitance values, the first voltage value, the second voltage value, and the storage voltage of the load driving power storage device 10 of the capacitors C1 and C2 of the power storage unit 7 are adjusted according to the current consumption of the load circuit 3. Can be set to any operating voltage range. Thereby, the load circuit 3 can be operated continuously regardless of the timing of power generation by the power generation element 2.

[Second modification]
In the above-mentioned example, a method based on a control signal from an external device and a method based on time measurement using a timer have been shown for controlling the power supply to the load circuit 3 by the load driving power storage device 10, but power supply control using a normally-off circuit is shown. You can also do
FIG. 26 is a block diagram showing an example of the configuration of a power storage system 100f including such a normally-off circuit. As shown in FIG. 26, the power storage system 100f includes a load circuit 3f and a normally-off circuit 36. The load circuit 3f also includes a memory 33, an MPU (Micro Processing Unit) 34, and a wireless device 35. An IoT device etc. can be mentioned as the load circuit 3f.

The memory 33 stores various information such as various programs, data, measurement data acquired by IoT devices, and images. The memory 33 is composed of a storage device such as a volatile or nonvolatile semiconductor memory. Note that the memory 33 may include a ROM (Read Only Memory) and/or a RAM (Random Access Memory).

The MPU 34 is composed of a processor and the like, and controls the operation of each part of the load circuit 3 and the overall operation.

The wireless device 35 is connected to other devices or devices and functions as an interface for transmitting and receiving information. The wireless device 35 may include a USB connector or the like.

The normally-off circuit 36 is an electric circuit that normally cuts off power supply from the power storage device 1a and the load driving power storage device 10 to the load circuit 3f, and supplies power at the timing when it should be operated. The normally-off circuit 36 is configured to include MOSFETs and the like.

With the configuration of the power storage system 100f, power consumption can be reduced by cutting off power supply during normal times and supplying power only when it is necessary to operate. This is particularly suitable for IoT devices, etc., which normally cut off power supply and often acquire data or transmit/receive data only at predetermined intervals or under predetermined conditions.

Although the preferred embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and within the scope of the embodiments of the present invention described in the claims. Various modifications and changes are possible.

In the above-mentioned example, all the components are configured by hardware such as electric circuits, but some functions may be implemented by software.

Embodiments also include a controller. For example, the control device includes a plurality of power storage devices that store electric power, a series-parallel switching unit that switches the connection of the plurality of power storage devices to either series or parallel, and a series-parallel switching unit that controls switching by the series-parallel switching unit. A control device for controlling a power storage device including a parallel switching control unit, wherein the power storage device switches the connection of the plurality of power storage devices from parallel to series based on the output current of the power storage device. A control unit. With such a control device, effects similar to those of the power storage device described above can be obtained.

1, 1a Power storage device 2 Power generation element 3 Load circuit 33 Memory 34 MPU
35 Wireless device 4 Rectifier circuit (an example of a rectifier)
5 Series-to-parallel switching control unit 50 Series-to-parallel switching control unit (an example of a voltage monitoring unit)
51, 52 Inverter 55 Master/slave switching circuit 6 Series/parallel switching section 60 Series/parallel switching section 61, 62, 63 Switch group 7 Power storage section 8 Output switch section (an example of an output section)
9 Straight-to-parallel switching IC
91 Master IC
92, 93, 94, 95 Slave IC
10 Load drive power storage device 13 Output current detection section 14 Series return control section 15 Output current series return control device 31 Communication module 32 Sensors 100, 100C, 100a, 100e, 100f Power storage system C1, C2, C3, C4 Capacitor (power storage device)
H Hysteresis generation circuit Tr1, Tr3 Depletion type transistor Tr2, Tr4 Nch transistor φ1, φ2 Control signal φ3 Output signal φ4 Series return signal

Japanese Patent Application Publication No. 2013-236506

Claims (19)

a power storage unit having a plurality of power storage devices for storing power;
a series/parallel switching unit that switches the connection of the plurality of power storage devices to either series or parallel;
a series/parallel switching control unit for controlling switching by the series/parallel switching unit;
a series recovery control unit that controls the series/parallel switching control unit so that a connection of the plurality of power storage devices is switched from parallel to series based on an output current of the power storage unit ;
the series/parallel switching control section includes a hysteresis generated by a hysteresis generating circuit,
The hysteresis generation circuit switches a control signal for controlling the series-parallel switching unit from a high level to a low level when the input voltage increases and reaches a predetermined first voltage value, and switches the control signal from a low level to a high level when the input voltage decreases and reaches a predetermined second voltage value different from the first voltage value.
Energy storage device. The straight-to-parallel switching section is
When storing electricity by the electricity storage unit, the plurality of electricity storage devices are connected in series,
The power storage device according to claim 1, wherein the plurality of power storage devices are connected in parallel when power is supplied from the power storage unit. comprising a voltage monitoring unit that monitors the input voltage to the power storage device,
The straight-to-parallel switching section is
switching the connection of the plurality of power storage devices from series to parallel when the input voltage becomes equal to or higher than a first voltage value during power storage by the power storage unit ;
2. The connection of the plurality of power storage devices is switched from parallel to series if the input voltage becomes equal to or lower than a second voltage value lower than the first voltage value when power is supplied from the power storage unit, or 2. The power storage device according to 2. The series return control section is
When the output current becomes equal to or less than a first current value in a state where the plurality of power storage devices are connected in parallel, the series/parallel switching control section switches the connection of the plurality of power storage devices from parallel to series. The power storage device according to any one of claims 1 to 3. The load circuit connected to the power storage device includes an output section that outputs a voltage,
The total impedance of each of the series-parallel switching control section, the series-parallel switching section, and the output section is greater than or equal to the internal impedance of the power generating element that generates the electric power. Power storage device. The hysteresis generation circuit is
The power storage device according to any one of claims 1 to 5, comprising a resistor, an inverter, and a transistor. The series return control section is
The power storage device according to any one of claims 1 to 6 , comprising a resistor, an N-channel transistor, and a capacitor. The series return control section is
The power storage device according to any one of claims 1 to 7 , comprising a depletion type transistor, an N-channel transistor, and a capacitor. multiple power storage devices that store electricity,
a series-parallel switching unit that switches the connection of the plurality of power storage devices to either series or parallel;
A control device for controlling a power storage device including a serial-parallel switching control unit that controls switching by the serial-parallel switching unit,
a series return control unit that controls the series/parallel switching control unit so that the connection of the plurality of electricity storage devices changes from parallel to series based on the output current of the electricity storage device ;
The series-to-parallel switching control unit includes hysteresis generated by a hysteresis generation circuit,
When the input voltage increases and reaches a predetermined first voltage value, the hysteresis generation circuit switches a control signal that controls the series/parallel switching unit from a High level to a Low level, and when the input voltage decreases and reaches a predetermined first voltage value. When a predetermined second voltage value different from the first voltage value is reached, the control signal is switched from Low level to High level.
Control device. A power generation element,
a rectifier connected to the power generating element;
The control device according to claim 9 connected to the rectifier,
A power storage system comprising: a load circuit supplied with power from the power storage device. A power generation element,
a rectifier connected to the power generating element;
The power storage device according to any one of claims 1 to 8 , which is connected to the rectifier;
A power storage system comprising: a load circuit supplied with power from the power storage device. The signal that the power storage system sends from the load circuit to the power storage device is:
The power storage system according to claim 11 , wherein the signal is a signal that changes a voltage in response to a hysteresis input generated by a hysteresis generation circuit provided in the series-parallel switching control section. The amount of power generated by the power generation element is
The power storage system according to any one of claims 10 to 12 , wherein the generated voltage is 10 V to 1000 V, and the generated current is 50 nA to 100 μA. The power generation element is
The electricity storage system according to any one of claims 10 to 13 , which generates electricity using at least one of peeling force, frictional force, vibrational force, or deformation force. The power generation element is
The electricity storage system according to any one of claims 14 to 15, including a power generating rubber that generates electricity by at least one of peel force, friction force, vibration force, and deformation force. The power storage system according to any one of claims 10 to 15 , wherein the power generation element generates power using pressure. The power storage system according to any one of claims 10 to 16 , wherein the power generation element generates power by electrostatic induction. The power storage system according to any one of claims 10 to 17 , further comprising a load driving power storage device that supplies stored power to the load circuit. The load-driven power storage device includes:
The power storage system according to claim 18 , wherein the power storage system stores power supplied from the power storage device.

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