JP7501595B2 - Method for manufacturing group III nitride semiconductor device and method for manufacturing group III nitride semiconductor single crystal - Google Patents

Description

The technical field of this specification relates to a method for manufacturing a Group III nitride semiconductor device using the flux method and a method for manufacturing a Group III nitride semiconductor single crystal.

Methods for growing semiconductor crystals include vapor phase epitaxy such as metalorganic chemical vapor deposition (MOCVD) and hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), and liquid phase epitaxy. Liquid phase epitaxy includes the flux method, which uses a sodium flux.

In the flux method, a gallium nitride layer (GaN layer) is typically formed on a sapphire substrate or the like to serve as a seed crystal substrate, and a semiconductor single crystal is then grown on the seed crystal substrate in a melt. In this case, the seed crystal substrate, raw materials, and flux are placed inside a crucible, and the semiconductor single crystal is then grown inside a reaction chamber while adjusting the temperature and pressure.

However, when a GaN single crystal is grown on a seed crystal by the flux method, the GaN single crystal often warps. The degree of warping of the GaN single crystal is likely to vary from lot to lot. Patent Document 1 lists a slight lattice mismatch between the GaN crystal grown by the vapor phase epitaxy method and the GaN crystal grown by the liquid phase epitaxy method as a cause of the warping (see paragraph [0027] of Patent Document 1). It is disclosed that the cause of the lattice mismatch is due in particular to the difference in the amount of oxygen taken in (see paragraph [0027] of Patent Document 1). Thus, the cause of the warping includes the difference in quality between the seed crystal and the crystal grown on it. It is also known that the difference in the growth mode in the early stage of the growth of the GaN single crystal also causes the warping.

JP 2016-160151 A

When warping occurs in the GaN single crystal in this way, the crystallinity of the GaN single crystal may deteriorate. When a substrate is made by polishing a warped semiconductor single crystal, the normal to the substrate surface and the crystal orientation will have an angle that is not parallel. When a device is formed on this substrate, there is a risk of relatively large variations in the device characteristics. Therefore, it is preferable to suppress warping of the semiconductor single crystal.

In addition, miscellaneous crystals may occur inside the crucible in which the semiconductor single crystal is grown. These miscellaneous crystals may have a negative effect on the growth of the semiconductor single crystal, and may deteriorate the crystallinity of the semiconductor single crystal. As a result, there is a concern that the yield of the semiconductor single crystal may decrease.

The technology described in this specification has been made to solve the problems of the conventional technology described above. The problem that the technology described in this specification aims to solve is to provide a method for manufacturing a Group III nitride semiconductor device and a method for manufacturing a Group III nitride semiconductor single crystal that can suppress at least one of the occurrence of warping and the occurrence of miscellaneous crystals in a Group III nitride semiconductor single crystal by limiting the amount of oxygen taken up into the Na material.

The present invention relates to a method for producing a Group III nitride semiconductor in which a nitrogen-containing gas is supplied into a furnace to a mixed molten liquid obtained by mixing a metal and a flux, thereby growing a Group III nitride semiconductor on a seed substrate, the method comprising the steps of: controlling the oxygen concentration in Na by removing oxygen atoms contained in Na, which is a flux, outside the furnace; supplying Na with the controlled oxygen concentration into the furnace; and controlling the occurrence of warping or miscellaneous crystals in the Group III nitride semiconductor grown on the seed substrate by the oxygen concentration;
This method for producing a Group III nitride semiconductor is characterized in that the grain size of the Group III nitride semiconductor grown on the seed substrate in the initial stage of crystal growth is controlled by decreasing the oxygen concentration in Na to make the grains larger so as to reduce warping of the Group III nitride semiconductor grown on the seed substrate, and by increasing the oxygen concentration to make the grains smaller so as to reduce the amount of miscellaneous crystals generated.
Another invention relates to a method for producing a Group III nitride semiconductor, in which a nitrogen-containing gas is supplied into a furnace to a mixed molten liquid obtained by mixing a Group III metal and a flux, to grow a Group III nitride semiconductor on a seed substrate, the method comprising the steps of: controlling the oxygen concentration in Na by removing oxygen atoms contained in Na, which is the flux, outside the furnace; supplying Na with the controlled oxygen concentration into the furnace; controlling the occurrence of warping or miscellaneous crystals in the Group III nitride semiconductor grown on the seed substrate by the oxygen concentration; circulating the Na melt obtained by liquefying Na between a first state in which it is held at a first temperature and a second state in which it is held at a second temperature lower than the first temperature; removing oxygen from the Na melt in the second state; and controlling the second temperature to control the oxygen concentration contained in Na.
In the above invention, the Na with controlled oxygen concentration is Na liquid, and this Na liquid may be placed in a crucible, a seed substrate may be placed on the surface of the Na liquid, and the crucible may be placed in a furnace to grow a Group III nitride semiconductor.
In the above other invention, the second temperature is preferably controlled to a value in the range of 120° C. to 300° C. The second temperature is preferably controlled to a value in the range of 180° C. to 230° C.

This method for manufacturing a Group III nitride semiconductor single crystal can sufficiently remove oxygen atoms contained in the Na material. Therefore, the amount of oxygen contained in the semiconductor crystal is less than in the past. Therefore, the occurrence of warping in the semiconductor crystal is greatly suppressed. Alternatively, the amount of miscellaneous crystals generated is suppressed. In addition, the reproducibility of the degree of warping and the quality of the semiconductor single crystal for each manufacturing batch is improved. Also, the yield is improved.

This specification provides a method for manufacturing a Group III nitride semiconductor device and a method for manufacturing a Group III nitride semiconductor single crystal that can suppress at least one of the occurrence of warping and the occurrence of miscellaneous crystals in a Group III nitride semiconductor single crystal by limiting the amount of oxygen taken up into a Na material.

1 is a diagram showing a schematic configuration of a semiconductor single crystal according to a first embodiment; 1 is a conceptual diagram showing an overall image of a semiconductor single crystal manufacturing apparatus according to a first embodiment; 1 is a schematic configuration diagram of a crystal growth apparatus for producing a semiconductor single crystal according to a first embodiment. 1 is a schematic configuration diagram of a Na circulation device for producing a semiconductor single crystal according to a first embodiment. FIG. FIG. 2 is a schematic configuration diagram of a glove box for producing a semiconductor single crystal according to the first embodiment. FIG. 1 is a diagram (part 1) for explaining seed crystals and grains. FIG. 2 is a diagram (part 2) for explaining seed crystals and grains. FIG. 3 is a diagram (part 3) for explaining seed crystals and grains. FIG. 2 is a diagram showing a seed crystal for producing the semiconductor single crystal of the first embodiment. FIG. 11 is a schematic configuration diagram of a power element according to a second embodiment. FIG. 13 is a schematic configuration diagram of a lateral structure semiconductor device according to a second embodiment. 10 is a schematic configuration diagram of a semiconductor light emitting device according to a second embodiment. FIG. 1 is a graph showing the relationship between the temperature of a cold trap, warpage, and the amount of miscellaneous crystals generated.

Specific embodiments will be described below with reference to the figures, taking as examples a method for manufacturing a Group III nitride semiconductor device and a method for manufacturing a Group III nitride semiconductor single crystal. However, the technology of this specification is not limited to these embodiments. In addition, the stacked structures and electrode structures of the layers of the semiconductor device described below are merely examples. Of course, stacked structures different from those in the embodiments may also be used. Furthermore, the thickness ratios of the layers in each figure are shown conceptually, and do not represent the actual thickness ratios.

First Embodiment
1. Semiconductor Single Crystal Fig. 1 is a diagram showing a schematic configuration of a crystalline CR according to this embodiment. As shown in Fig. 1, the crystalline CR has a sapphire substrate 11, a buffer layer 12, a GaN layer 13, and a single crystal CR1. The single crystal CR1 is a single crystal made of a Group III nitride semiconductor. The single crystal CR1 is obtained by removing the sapphire substrate 11 and the like from the crystalline CR.

2. Semiconductor crystal manufacturing apparatus Fig. 2 is a conceptual diagram showing an overall image of the semiconductor single crystal manufacturing apparatus of this embodiment. As shown in Fig. 2, the manufacturing apparatus A1 has a crystal growth apparatus 1000, a Na circulation apparatus 2000, a glove box 3000, a relay chamber RM1, and pass boxes PB1 and PB2.

The crystal growth apparatus 1000 is a crystal growth furnace for growing a group III nitride semiconductor on a seed crystal. The Na circulation apparatus 2000 is an apparatus for adjusting the purity of the Na material. The glove box 3000 is an apparatus for carrying out the operation of storing the Na material and the Ga material inside the crucible. The relay chamber RM1 is for relaying the crucible to the crystal growth apparatus 1000. The pass box PB1 is an apparatus for sending raw materials, the crucible, etc. to the glove box 3000. The pass box PB2 is an apparatus for sending the crucible from the glove box 3000 to the relay chamber RM1.

3 shows a crystal growth apparatus 1000 for producing the crystalline CR of this embodiment. The crystal growth apparatus 1000 is for growing a single crystal of a Group III nitride semiconductor on a growth substrate by using a Na flux method.

As shown in FIG. 3, the crystal growth apparatus 1000 has a pressure vessel 1100, a pressure vessel lid 1110, an intermediate chamber 1200, a reaction chamber 1300, a reaction chamber lid 1310, a rotating shaft 1320, a turntable 1330, a side heater 1410, a lower heater 1420, a gas supply port 1510, a gas exhaust port 1520, a vacuum exhaust port 1530, a measurement vent port 1540, and a Qmass mounting port 1550.

The pressure vessel 1100 is the housing of the crystal growth apparatus 1000. The pressure vessel lid 1110 is disposed vertically below the pressure vessel 1100. The intermediate chamber 1200 is a chamber inside the pressure vessel 1100. The reaction chamber 1300 is a chamber that contains the crucible CB1 and grows a semiconductor single crystal therein. The reaction chamber lid 1310 is a lid for the reaction chamber 1300.

The rotating shaft 1320 is capable of rotating in both positive and negative directions. The rotating shaft 1320 can be driven to rotate by a motor (not shown). The turntable 1330 can rotate together with the rotating shaft 1320. The side heater 1410 and the lower heater 1420 are for heating the reaction chamber 1300.

The gas supply port 1510 is a supply port for supplying gas including nitrogen gas into the inside of the pressure vessel 1100. The gas exhaust port 1520 is for exhausting gas from inside the pressure vessel 1100. The vacuum exhaust port 1530 is for evacuating the pressure vessel 1100. The measurement vent port 1540 is for extracting gas inside the pressure vessel 1100 for measurement. An O2 sensor and a dew point meter are disposed downstream of the gas flow of the measurement vent port 1540. The Qmass attachment port 1550 is for attaching a Qmass device.

The crystal growth apparatus 1000 can adjust the temperature and pressure inside the crucible CB1 and rotate the crucible CB1. Therefore, inside the crucible CB1, a semiconductor single crystal can be grown from a seed crystal under desired conditions.

4. Na Circulation Apparatus 4-1. Configuration of the Na Circulation Apparatus FIG. 4 is a diagram showing a Na circulation apparatus 2000 used in the semiconductor single crystal manufacturing method of this embodiment. The Na circulation apparatus 2000 is an apparatus that controls the purity of Na while circulating Na. The Na circulation apparatus 2000 is connected to a glove box 3000. Therefore, the Na material whose purity has been increased by the Na circulation apparatus 2000 can be supplied to the inside of the glove box 3000. The Na material is supplied to the glove box 3000 whose dew point and atmosphere are controlled. Therefore, the Na material supplied to the glove box 3000 is suppressed from reacting with oxygen and moisture.

The sodium circulation device 2000 has a supply tank 2100, a dump tank 2200, a cold trap 2300, an electromagnetic pump 2400, an expansion tank 2500, a measuring tank 2600, a sodium sampling port 2700, and pipes 2810, 2820, and 2830. The sodium circulation device 2000 also has other pipes, valves, and a heating device that heats each part. The heating device can maintain the temperature of each part at a set temperature.

The sodium circulation device 2000 has a circulation path LP1 that liquefies the sodium material and causes it to flow. The circulation path LP1 has a cold trap 2300, an expansion tank 2500, an electromagnetic pump 2400, and pipes 2810, 2820, and 2830.

The supply tank 2100 is a tank for supplying the initial Na material to the Na circulation device 2000. The initial Na material is a Na material of a relatively high purity, but contains a trace amount of impurities. The initial Na material is a solid. Because the supply tank 2100 is heated, the Na material becomes liquid. The liquid Na material is then sent to the dump tank 2200.

The dump tank 2200 is capable of absorbing reflected shock waves.

The cold trap 2300 is used to remove impurities in the Na material. The cold trap 2300 also serves as a Na purity control unit that removes or adds impurities such as oxygen. Details of the cold trap 2300 will be described later.

The electromagnetic pump 2400 is for returning the Na material from the expansion tank 2500 to the cold trap 2300. The Na circulation device 2000 purifies the Na material by circulating the Na material between the cold trap 2300 and the expansion tank 2500.

The expansion tank 2500 is a sodium storage section for temporarily storing the sodium material from which impurities have been removed by the cold trap 2300.

The measuring tank 2600 is used to measure the amount of Na material extracted from the Na collection port 2700. The purity of the Na material stored in the measuring tank 2600 is sufficiently high.

The Na collection port 2700 is a supply port for supplying refined Na material to the glove box 3000.

4-2. Operation of the Na circulation device In this manner, the solid Na material is supplied to the supply tank 2100 of the Na circulation device 2000. The Na material is heated by the supply tank 2100 and becomes a liquid Na material. The liquid Na material is sent to the dump tank 2200. Then, the liquid Na material is gradually sent from the dump tank 2200 to the circulation path LP1. The liquid Na material circulates through the circulation path LP1.

The higher the temperature of the Na material, the higher the solubility of oxygen in Na. The cold trap 2300 is the lowest temperature point in the circulation path LP1. Therefore, for example, Na2O precipitates at the cold trap 2300. Na2O can be removed by a filter or the like.

The liquid Na material alternates between two states, a high temperature state and a low temperature state, while circulating through the circulation path LP1. As a result, oxygen is repeatedly removed from the liquid Na material. Then, a high-purity Na material is refined. The Na material supplied by the Na collection port 2700 is liquid. The liquid Na material is poured into a container inside the glove box 3000. The liquid Na material is cooled in the container and becomes solid.

4-3. Temperature of the cold trap The temperature of the cold trap 2300 is 120°C or higher and 300°C or lower. The temperatures of the expansion tank 2500 and the surrounding pipes 2810, 2820, 2830 are higher than the temperature of the cold trap 2300. Therefore, the impurities in the Na material can be removed by the cold trap 2300. There is a correlation between the set temperature of the cold trap 2300 and the oxygen concentration in the Na material. Therefore, by selecting the set temperature of the cold trap 2300 within the range of 120°C or higher and 300°C or lower, the oxygen concentration in the Na material, etc. can be controlled.

5. Glove Box FIG. 5 is a diagram showing a glove box 3000 used in the semiconductor device manufacturing method of this embodiment. The glove box 3000 is a processing chamber for processing Na materials and the like. The internal pressure of the glove box 3000 is slightly higher than 1 atmosphere. This is to prevent the atmosphere around the glove box 3000 from entering the inside of the glove box 3000. The glove box 3000 has a housing 3100, a glove GL1, a window WD1, a dew point meter 3110, an Ar circulation device 3200, an Ar supply pipe 3310, an Ar exhaust pipe 3320, an Ar vent 3321, and an O2 sensor.

The housing 3100 maintains the internal atmosphere under specified conditions. The glove GL1 is for an operator to process Na materials and the like inside the glove box 3000. The window WD1 is for an operator to view the inside of the glove box 3000. The dew point meter 3110 measures the dew point inside the glove box 3000.

The Ar circulation device 3200 is a device for supplying and recovering Ar gas. The Ar supply pipe 3310 is for supplying Ar gas from the Ar circulation device 3200 to the inside of the glove box 3000. The Ar exhaust pipe 3320 is for recovering the Ar gas to the Ar circulation device 3200. The Ar exhaust pipe 3320 branches into an Ar vent 3321 midway. An O2 sensor is located downstream of the Ar vent 3321.

As described above, since the Ar circulation device 3200 is provided, the inside of the glove box 3000 is an Ar atmosphere. The oxygen concentration inside the glove box 3000 is 0.05 ppm or less. The O2 sensor in the Ar vent 3321 measures the oxygen concentration inside the glove box 3000. An example of an O2 sensor is the DF-150E (manufactured by Servomex).

The moisture concentration inside the glove box 3000 is 0.05 ppm or less. The moisture concentration is measured by a dew point meter 3110. For example, a capacitance type dew point meter MMS35 (manufactured by GE Sensing & Inspection Technologies) can be used. 0.05 ppm corresponds to a dew point of -94°C.

6. Impurity concentration (oxygen intake)
In this embodiment, the manufacturing apparatus A1 grows a semiconductor single crystal while controlling the concentration of impurities that may be mixed into the crucible CB1. The main impurities include oxygen and moisture. In the crystal growth apparatus 1000, the oxygen concentration and hydrogen concentration are controlled with high precision.

7. Grains 7-1. Relationship between Oxygen Incorporation and Grains Here, the relationship between the oxygen incorporation amount into the Na material and the grains formed on the seed crystal in the early stage of growth will be described.

Figure 6 is a diagram (part 1) for explaining the seed crystal and grains. As shown in Figure 6, the semiconductor crystal has a seed crystal 10, grain Gr1, and semiconductor layer Ep1. Grain Gr1 has a hexagonal pyramid shape or a shape close to a hexagonal pyramid shape.

Figure 7 is a diagram (part 2) for explaining the seed crystal and grains. As shown in Figure 7, the semiconductor crystal has a seed crystal 10, grain Gr2, and semiconductor layer Ep2. Grain Gr2 has a hexagonal pyramid shape or a shape close to a hexagonal pyramid shape.

Grain Gr1 in FIG. 6 is larger than grain Gr2 in FIG. 7. Here, when the amount of oxygen absorbed into the melt is small, the grain size is large, as shown in FIG. 6. When the amount of oxygen absorbed into the melt is large, the grain size is small, as shown in FIG. 7. The larger the grain, the smaller the stress in the semiconductor crystal grown on it. This is thought to be because there are fewer points where the semiconductor crystals grow from the grains and join together. The larger the grain, the less warping there tends to be in the semiconductor single crystal.

7-2. Grain size Figure 8 is a cross-sectional view showing a cross section of a crystal CR. The average width W1 of the grain Gr1 at the boundary surface Sf1 is preferably 10 μm or more and 100 μm or less. In order to observe the grains, the grains are removed by polishing or the like up to the front of the cross section to be observed (several μm to several tens of μm) and flattened. The cross section is then observed by a fluorescence microscope or a cathode luminescence device.

Therefore, as described below, by removing oxygen atoms from the Na material, it is possible to grow semiconductor crystals with low internal stress. Of course, care must be taken to avoid excessive oxygen contamination inside the semiconductor manufacturing equipment or on the way there.

8. Manufacturing Method of Semiconductor Single Crystal This manufacturing method is a method for growing a Group III nitride semiconductor single crystal by a flux method. This manufacturing method includes a Na purity control step of controlling the Na purity of a Na material by using a Na circulation device, and a semiconductor growing step of placing a Na material, a Ga material, and a seed crystal in a crucible and growing a Group III nitride semiconductor on the seed crystal.

8-1. Seed Crystal Preparation Step First, a seed crystal is prepared. FIG. 9 is a diagram showing a schematic configuration of a seed crystal 10. As shown in FIG. 9, the seed crystal 10 has a sapphire substrate 11, a buffer layer 12, and a GaN layer 13. The seed crystal 10 is a template substrate before the single crystal CR1 in FIG. 1 is grown. First, the sapphire substrate 11 is prepared. Then, the buffer layer 12 is formed on the c-plane of the sapphire substrate 11 by MOCVD. The buffer layer 12 is, for example, GaN. It may also be TiN or AlN.

Next, a GaN layer 13 is formed on the buffer layer 12. This produces a seed crystal 10. The buffer layer 12 and the GaN layer 13 are seed layers. The GaN layer 13 is, of course, a layer made of GaN, but it may also be made of AlGaN, InGaN, or AlInGaN. This GaN layer 13 is a layer that may melt back in the flux depending on the growth conditions. In that case, part of the GaN layer 13 dissolves in the flux.

The seed crystal 10 may be purchased on the market. Alternatively, other substrates may be used as the seed crystal 10, such as a GaN substrate on which a mask is formed, a GaN substrate on which GaN has been processed, or a patterned substrate on which GaN has been selectively removed.

8-2. Na Purity Control Process First, the Na material is purified by the Na circulation device 2000. The solid Na material is heated to turn it into liquid Na. In liquid Na, the higher the temperature, the more oxygen dissolves.

The temperature of the cold trap 2300 is between 120°C and 300°C. The temperature of the expansion tank 2500 is higher than that of the cold trap 2300. Therefore, Na2O and other substances precipitate inside the cold trap 2300. Then, impurities such as Na2O are removed using a filter or the like. The molten Na material circulates between the cold trap 2300 and the expansion tank 2500. Therefore, impurities such as Na2O are gradually removed.

Meanwhile, a crucible CB1 is prepared inside the glove box 3000. Materials such as Ga are placed inside the crucible CB1. Next, the Na circulation device 2000 pours the molten Na material, whose Na purity has been controlled, into the crucible CB1 inside the glove box 3000 while measuring the supply amount. As a result, the Ga is immersed in the liquid Na material.

Then, a seed crystal 10 is placed on the liquid Na material. At this time, the liquid Na material is in contact with the bottom and side walls of the crucible CB1 and is covered by the seed crystal 10. Therefore, the area of the liquid Na material in contact with the surrounding atmosphere is very small. Therefore, impurities are unlikely to enter the liquid Na material after it is poured into the crucible CB1. The growth start surface of the seed crystal 10 faces the opposite side to the liquid Na material.

8-3. Semiconductor Growth Step Next, a semiconductor single crystal layer is grown on the seed crystal 10 using a flux method, which is a type of liquid phase epitaxy method. An example of the raw materials used here is shown in Table 1. The carbon ratio may be changed within a range of 0.1 mol % to 2.0 mol %. The values in Table 1 are merely examples, and other values may be used. Doping elements other than these may also be added.

The semiconductor single crystal grown here is, of course, a Group III nitride semiconductor single crystal. For example, GaN. It is advisable to bake the crystal growth apparatus 1000 before using it. This is to reduce oxygen and moisture inside the crystal growth apparatus 1000 as much as possible.

The crucible CB1 is placed in a triple growth vessel. This is to prevent the Na material from reacting with oxygen and moisture when the crucible CB1 is moved from the glove box 3000 to the reaction chamber 1300. It is also advisable to make the path along which the crucible CB1 is moved from the glove box 3000 to the reaction chamber 1300 a nitrogen atmosphere. This is because this can further prevent the reaction of the Na material.

The crucible CB1 is then placed on the turntable 1330 of the reaction chamber 1300. After this, the pressure vessel 1100 is evacuated and then the pressure and temperature are increased. Then, the crucible CB1 is rotated while growing a semiconductor single crystal. Note that the stirring method and timing are optional. Therefore, the crystal may be grown without stirring. Also, the presence or absence of stirring may be changed midway.

[Table 1]
Raw materials Amount of raw materials Ga/Na ratio 10-40 mol%
C 0.1 mol% to 2.0 mol% (relative to Na)

Here, the various conditions in the crucible used in this semiconductor single crystal formation process are shown in Table 2. The growth temperature of the semiconductor single crystal is, for example, 870°C. The pressure is, for example, 3 MPa. The growth time is approximately 20 to 200 hours. The oxygen concentration and moisture concentration inside the crystal growth apparatus 1000 can be measured by Qmass or the like.

[Table 2]
Temperature: 700℃ to 900℃ Pressure: 2MPa to 10MPa
Stirring speed: 0 rpm to 100 rpm
Growth time: 20 to 200 hours

9. Modification 9-1. Na Purity Control Step In the Na purity control step, the temperature of the cold trap 2300 may be set to close to 300° C. In that case, oxygen enters the cold trap 2300 from the atmosphere surrounding the Na circulation device 2000. Then, the oxygen is mixed into the molten Na material. This makes it possible to increase the oxygen concentration contained in the Na material. In this way, in the Na purity control step, the oxygen concentration in the Na used for growth can be controlled by controlling the temperature of the cold trap 2300. Also, it is possible to lower the oxygen concentration contained in the Na material, or to increase the oxygen concentration contained in the Na material.

9-2. Reuse as seed crystal The Group III nitride semiconductor grown in the semiconductor growth process may be used as a seed crystal. In this case, the Group III nitride semiconductor is regrown on the obtained seed crystal. In other words, the method includes a first semiconductor growth process in which a semiconductor is grown on a seed crystal, and a second semiconductor growth process in which a semiconductor is grown on the seed crystal using the semiconductor obtained in the first semiconductor growth process as a seed crystal. By using a seed crystal with small warpage and off-angle distribution, it is possible to grow a thick semiconductor single crystal with better quality than before.

9-3. Configuration of the Na Circulation Device The configuration of the Na circulation device 2000 may be different from that shown in FIG.

9-4. Combinations The above modifications may be freely combined.

Second Embodiment
In the first embodiment, a method for producing a single crystal of a Group III nitride semiconductor has been described. In the second embodiment, a semiconductor device using the single crystal of the Group III nitride semiconductor as a free-standing substrate will be described.

1. Vertical-structure semiconductor element A power element 100 according to this embodiment is shown in Fig. 10. The power element 100 is a semiconductor device with a vertical structure. The power element 100 has a drain electrode D1 as shown in the lower part of Fig. 10, and a gate electrode G1 and a source electrode S1 as shown in the upper part of Fig. 10.

The power element 100 has a plurality of semiconductor layers made of Group III nitride semiconductors. In addition to the electrodes described above, the power element 100 has a substrate 110, an n-type layer 120, a p-type layer 130, an n-type layer 140, and an insulating film 150, as shown in Fig. 10. The n-type layer 120 has, in order from the substrate 110 side, an n ⁺ GaN layer 121 and an n ^- GaN layer 122. The source electrode S1 is in contact with the n-type layer 140. The drain electrode D1 is in contact with the substrate 110.

2. Method for manufacturing a free-standing substrate The substrate 110 is a free-standing substrate made from the crystal CR of the first embodiment. Here, the free-standing substrate includes a disk-shaped one (wafer) as well as one after element separation. For this purpose, the sapphire substrate 11 and the like are removed from the crystal CR. This removal may be performed using a known technique such as a laser lift-off method. Then, the substrate 110 is obtained by processing both sides of the single crystal CR1, such as polishing. In addition, the substrate 110 may be formed with an uneven shape or the like. In addition, both sides may not be polished, and at least one of the two sides may be polished. In addition, the substrate 110 may be peeled off by utilizing thermal strain during cooling after the crystal growth process.

3. Manufacturing method of semiconductor device Each layer of a group III nitride semiconductor is grown on the above-mentioned free-standing substrate by MOCVD or the like. Next, a trench is formed in the semiconductor by etching technology. Also, an insulating film and an electrode are formed on the semiconductor. Then, the semiconductor is divided into each chip.

4. Modification 4-1. Semiconductor device with horizontal structure The semiconductor device of this embodiment is a semiconductor device with a vertical structure. However, the free-standing substrate of this embodiment may be applied to a semiconductor device 200 with a horizontal structure as shown in FIG. 11. The semiconductor device 200 of FIG. 11 is an HFET. The semiconductor device 200 has a substrate 210, a buffer layer 220, a first carrier travel layer 230, a second carrier travel layer 240, a carrier supply layer 250, an insulating film 260, a drain electrode D2, a source electrode S2, and a gate electrode G2. Here, the substrate 210 is a processed single crystal CR1.

4-2. Semiconductor Light Emitting Element The present invention may also be applied to a semiconductor light emitting element 300 as shown in FIG. 12. As described above, the single crystal CR1 obtained by the manufacturing method of the first embodiment can be applied to various semiconductor devices. The semiconductor light emitting element 300 has a substrate 310, a semiconductor layer, a p-electrode P3, and an n-electrode N3. Here, the substrate 310 is obtained by processing the single crystal CR1.

The semiconductor layer is formed by arranging, from above the main surface of the substrate 310, a buffer layer 320, an n-type contact layer 330, an n-type electrostatic breakdown voltage layer 340, an n-type cladding layer 350, a light-emitting layer 360, a p-type cladding layer 370, and a p-type contact layer 380 in this order. The p-electrode P3 is in contact with the p-type contact layer 380. The n-electrode N3 is in contact with the n-type contact layer 330.

(experiment)
1. Experimental Method GaN single crystals were produced using the production device A1. The seed crystal was a GaN layer formed on a sapphire substrate. The temperature of the cold trap 2300 was changed to investigate the relationship between the amount of warping or the amount of miscellaneous crystals. The temperature of the expansion tank 2500 was 400°C.

2. Experimental Results Figure 13 is a graph showing the relationship between the temperature of the cold trap 2300, warpage, and miscellaneous crystals. The horizontal axis of Figure 13 is the temperature of the cold trap. The vertical axis of Figure 13 is the amount of warpage or miscellaneous crystals. Warpage is expressed as the reciprocal of the radius of curvature (1/m). The amount of miscellaneous crystals is the weight of the miscellaneous crystals (g).

As shown in FIG. 13, the higher the temperature of the cold trap 2300, the greater the warping and the smaller the weight of the miscellaneous crystals. In other words, when considering warping, it is better for the temperature of the cold trap 2300 to be lower, and when considering the amount of miscellaneous crystals generated, it is better for the temperature of the cold trap 2300 to be higher. In other words, there is a trade-off between the magnitude of warping and the amount of miscellaneous crystals generated.

When the temperature of the cold trap 2300 is between 120°C and 300°C (region R1 in FIG. 13), at least one of the warping of the semiconductor and the amount of miscellaneous crystals generated is suppressed. In region R1, the warping is approximately 0.4/m or less, and the amount of miscellaneous crystals generated is approximately 8 g or less.

When the temperature of the cold trap 2300 is between 120°C and 230°C (region R2 in Figure 13), the warpage is approximately 0.3/m or less. In this way, the warpage of the semiconductor is suppressed.

When the temperature of the cold trap 2300 is between 180°C and 300°C (region R3 in Figure 13), the amount of miscellaneous crystals generated is approximately 2 g or less. In this way, the amount of miscellaneous crystals generated is suppressed.

When the temperature of the cold trap 2300 is 180°C or higher and 230°C or lower (region R4 in FIG. 13), the warpage of the semiconductor is 0.3/m or less, and the amount of miscellaneous crystals generated is 2 g or less. In this way, the warpage of the semiconductor and the amount of miscellaneous crystals generated are suppressed.

The smaller the warp of a semiconductor, the lower the dislocation density in the semiconductor tends to be. Therefore, the smaller the warp of a semiconductor, the better the crystallinity of the semiconductor. Also, crystals with smaller warp are easier to flatten through processing, and the off-angle distribution of the wafer can be reduced. However, if the semiconductor has a certain degree of warp, it is easier to remove the semiconductor single crystal from the seed crystal.

If there are a lot of miscellaneous crystals, the crystallinity of the Group III nitride semiconductor may deteriorate. In other words, there is a risk of the yield of the Group III nitride semiconductor decreasing. Therefore, generally, the fewer the amount of miscellaneous crystals, the better. However, in order to obtain semiconductor crystals of the desired quality, it is also possible to deliberately select conditions that will cause miscellaneous crystals to occur.

(Additional Note)
The method for producing a Group III nitride semiconductor single crystal in the first aspect is a method for producing a Group III nitride semiconductor single crystal by growing a Group III nitride semiconductor by a flux method. This production method includes a Na purity control step of controlling the Na purity of a Na material using a Na circulation device, and a semiconductor growth step of putting a Na material, a Ga material, and a seed crystal in a crucible and growing a Group III nitride semiconductor on the seed crystal. The Na circulation device has a circulation path for liquidizing the Na material and causing it to flow. The circulation path includes a Na purity control unit and piping. In the Na purity control step, the temperature of the Na purity control unit is set to 120° C. or more and 300° C. or less.

In the second embodiment of the method for producing a Group III nitride semiconductor single crystal, the Na circulation path has a Na storage section. The temperature of the Na storage section and the piping is higher than the temperature of the Na purity control section.

In the third aspect of the method for producing a Group III nitride semiconductor single crystal, after the Na purity control step, the liquid Na material is poured into a container inside the holding chamber while being measured from the Na circulation device.

In the fourth aspect of the method for producing a Group III nitride semiconductor single crystal, the Group III nitride semiconductor grown in the semiconductor growth step is used as a seed crystal, and the Group III nitride semiconductor is regrown on the seed crystal.

The method for manufacturing a Group III nitride semiconductor device in the fifth aspect is a method for manufacturing a Group III nitride semiconductor device in which a Group III nitride semiconductor is grown by a flux method. This manufacturing method includes a Na purity control step of controlling the Na purity of a Na material using a Na circulation device, and a semiconductor growth step of placing a Na material, a Ga material, and a seed crystal inside a crucible and growing a Group III nitride semiconductor on the seed crystal. The Na circulation device has a circulation path that liquidizes the Na material and flows it. The circulation path has a Na purity control unit and piping. In the Na purity control step, the temperature of the Na purity control unit is set to 120°C or higher and 300°C or lower.

In the sixth aspect of the method for manufacturing a Group III nitride semiconductor device, after the Na purity control step, the liquid Na material is poured into a container inside the holding chamber while being measured from the Na circulation device.

CR... crystal CR1... single crystal 10... template 11... sapphire substrate 12... buffer layer 13... GaN layer GB... glove box 100... power element 200... semiconductor device 300... semiconductor light emitting element 1000... crystal growth device 2000... Na circulation device

Claims (6)

1. A method for producing a Group III nitride semiconductor, comprising: supplying a nitrogen-containing gas into a furnace to a mixed melt of a Group III metal and a flux to grow a Group III nitride semiconductor on a seed substrate,
Outside the furnace, oxygen atoms contained in the Na flux are removed to control the oxygen concentration in the Na flux, and the Na flux having the controlled oxygen concentration is supplied into the furnace;
the oxygen concentration controls the occurrence of warpage or miscellaneous crystals in the Group III nitride semiconductor grown on the seed substrate ;
a grain size of the Group III nitride semiconductor grown on the seed substrate in an initial stage of crystal growth is controlled by decreasing the oxygen concentration in the Na to increase the grain size so as to reduce warping of the Group III nitride semiconductor grown on the seed substrate, and by increasing the oxygen concentration to decrease the grain size so as to reduce the amount of miscellaneous crystals generated . 1. A method for producing a Group III nitride semiconductor, comprising: supplying a nitrogen-containing gas into a furnace to a mixed melt of a Group III metal and a flux to grow a Group III nitride semiconductor on a seed substrate,
Outside the furnace, oxygen atoms contained in the Na flux are removed to control the oxygen concentration in the Na flux, and the Na flux having the controlled oxygen concentration is supplied into the furnace;
controlling the occurrence of warpage or miscellaneous crystals in the Group III nitride semiconductor grown on the seed substrate by adjusting the oxygen concentration;
a Na melt obtained by liquefying the Na is circulated between a first state in which the Na melt is held at a first temperature and a second state in which the Na melt is held at a second temperature lower than the first temperature, thereby removing oxygen from the Na melt in the second state, and controlling the oxygen concentration contained in the Na by controlling the second temperature. 3. The method for producing a Group III nitride semiconductor according to claim 1 or 2, characterized in that the Na with the controlled oxygen concentration is a Na liquid, the Na liquid is placed in a crucible, the seed substrate is placed on a surface of the Na liquid, and the crucible is placed in the furnace to grow the Group III nitride semiconductor. 3. The method for producing a Group III nitride semiconductor according to claim 2 , wherein the second temperature is controlled to a value in the range of 120° C. to 300° C. 3. The method for producing a Group III nitride semiconductor according to claim 2 , wherein the second temperature is controlled to a value in the range of 180° C. to 230° C. The circulation of the Na melt for controlling the oxygen concentration is carried out using a Na circulation device having a circulation path for making the Na liquid and flowing it;
The circulation path includes a Na storage unit, a Na purity control unit set to the second temperature, and a pipe;
6. The method for producing a Group III nitride semiconductor according to claim 2, wherein the temperatures of the Na storage unit and the piping are higher than the temperature of the Na purity control unit.

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