JP7533142B2 - Electronic information storage medium, initialization sequence execution method, and program - Google Patents

Description

The present invention relates to the technical field of electronic information storage media, such as IC (Integrated Circuit) cards that can accommodate multiple profiles.

For IC cards capable of carrying multiple applications, products that comply with the Java (registered trademark) Card and GlobalPlatform (registered trademark) specifications have become the de facto standard. With such products, one card can act as a cash card, a credit card, and an electronic money card. Such IC cards manage channels (logical channels), which are logical communication paths. The channel management function can assign different applications to each channel, as disclosed in Patent Document 1, for example. Furthermore, by opening multiple channels, multiple functions can be provided in parallel.

In addition, with the spread of IoT (Internet of Things), embedded IC modules called eUICC (embedded Universal Integrated Circuit Card) are now being used in applications where IC cards were previously used. Embedded IC modules often also come equipped with multiple functions, such as security functions to ensure security, payment functions, and authentication functions for connecting to mobile lines. Furthermore, compared to conventional IC cards, embedded IC modules are connected to a variety of external modules (e.g., payment servers and authentication servers), and therefore have multiple, diverse interfaces to accommodate these.

JP 2011-216068 A

Incidentally, as a method for easily changing the functions provided by an embedded IC module, the embedded IC module may be equipped with multiple profiles that group together multiple applications. In this case, the embedded IC module is designed to manage enable/disable on a profile-by-profile basis. When a profile equipped in the embedded IC module is updated, the functions provided to the external module change before and after the update. For this reason, communication between the application in the profile and the corresponding program must be terminated and reinitialized before and after the update, and it is desirable to execute an appropriate initialization sequence for each of the equipped profiles.

The present invention has been made in consideration of the above points, and aims to provide an electronic information storage medium, an initialization sequence execution method, and a program that are capable of executing an appropriate initialization sequence according to each loaded profile.

In order to solve the above problem, the invention described in claim 1 is an electronic information storage medium that has at least one interface and a function for setting each of a plurality of profiles to be valid or invalid, and stores initial response information linked to each of the profiles, and is characterized in that it has a first identification means that identifies a valid profile from among the plurality of profiles when a reset event of the interface occurs, and an execution means that executes an initialization sequence in the interface using the initial response information linked to the profile identified by the first identification means.

The invention described in claim 2 is characterized in that in the electronic information storage medium described in claim 1, the electronic information storage medium manages the profile linked to the interface, and the first identification means identifies the profile linked to the interface in which the reset event occurred, and, if the identified profile is valid, identifies the valid profile.

The invention described in claim 3 is an electronic information storage medium according to claim 1 or 2, further comprising a first determination means for determining whether the valid profile has been switched in response to a reset event of the interface, and a second identification means for identifying the valid profile linked to another interface different from the interface in which the reset event occurred when the first determination means determines that the valid profile has been switched, and the execution means executes an initialization sequence in the other interface using the initial response information linked to the profile identified by the second identification means.

The invention described in claim 4 is characterized in that, in the electronic information storage medium described in any one of claims 1 to 3, it further comprises a second determination means for determining whether the profile identified by the first determination means is linked to another interface different from the interface in which the reset event occurred, and when it is determined by the second determination means that the profile is linked to the other interface, an initialization sequence is executed in the other interface using the initial response information linked to the profile.

The invention described in claim 5 is characterized in that in the electronic information storage medium described in any one of claims 1 to 4, the electronic information storage medium further comprises a third identification means for managing channels that can be opened for the interface and identifying channels that can be opened for the interface in which the reset event has occurred, and the execution means executes an initialization sequence for any of the channels identified by the third identification means that are opened for the profile.

The invention described in claim 6 is characterized in that in the electronic information storage medium described in claim 5, the execution means executes an initialization sequence for another channel opened in the profile that is opened for the channel identified by the third identification means.

The invention described in claim 7 is an initialization sequence execution method executed by a computer in an electronic information storage medium that has at least one interface and a function for setting each of a plurality of profiles to be valid or invalid, and stores initial response information linked to each of the profiles, and is characterized in that it includes a step of identifying a valid profile from among the plurality of profiles when a reset event of the interface occurs, and a step of executing an initialization sequence in the interface using the initial response information linked to the identified profile.

The invention described in claim 8 is characterized in that a computer in an electronic information storage medium that has at least one interface and a function for setting each of a plurality of profiles to be valid or invalid, and stores initial response information linked to each of the profiles, functions as a first identification means that identifies a valid profile from among the plurality of profiles when a reset event of the interface occurs, and as an execution means that executes an initialization sequence in the interface using the initial response information linked to the profile identified by the first identification means.

According to the present invention, it is possible to execute an appropriate initialization sequence according to each of multiple profiles loaded on an electronic information storage medium.

FIG. 2 is a diagram illustrating an example of a schematic configuration of a communication device D according to the present embodiment. FIG. 2 is a diagram illustrating an example of a hardware configuration of an IC module 4. FIG. 13 is a diagram illustrating an example of a relationship between a profile, a channel, and an interface. 10 is a flowchart showing an example of a main process executed by an OS of an IC module when a reset event of an interface occurs. 5 is a flowchart showing details of the "reset target interface determination process" shown in step S6 of FIG. 4. 5 is a flowchart showing details of the "reset target channel determination process" shown in step S8 of FIG. 4.

The following describes in detail an embodiment of the present invention with reference to the drawings. The embodiment described below is an embodiment in which the present invention is applied to a communication device. Note that the communication device can be applied to, for example, a mobile terminal such as a smartphone, or an IoT device equipped with various sensors, etc.

[1. General configuration of communication device D]
First, a schematic configuration of a communication device D according to the present embodiment will be described with reference to Fig. 1 and the like. Fig. 1 is a diagram showing an example of a schematic configuration of a communication device D according to the present embodiment. As shown in Fig. 1, the communication device D includes a communication module 1, a communication module 2, a control module 3, and an IC module 4 (an example of an electronic information storage medium of the present invention). In the example of Fig. 1, the communication device D includes two communication modules, but may include three or more communication modules.

The communication module 1 is, for example, a contactless front-end (CLF) that performs contactless communication as defined by the NFC (Near Field Communication) standard, and communicates with a contactless reader provided in the payment device within a contactless field. Furthermore, the communication module 1 communicates with the IC module 4 via an interface IF1. The interface IF1 is, for example, an interface for performing communication according to the SWP (Single Wire Protocol).

The communication module 2 is, for example, a wireless communication modem for connecting to a mobile line (e.g., a 3G, 4G, or 5G network) and communicates with the base station of the mobile line. Furthermore, the communication module 2 communicates with the IC module 4 via an interface IF2. The communication module 2 and the IC module 4 are an interface for communicating according to a protocol defined by, for example, ISO7816.

The control module 3 is composed of a CPU (Central Processing Unit), RAM (Random Access Memory), ROM (Read Only Memory), etc., and controls various functions in the communication device D. The IC module 4 is composed of hardware such as an IC chip as a base, and is equipped with software such as an operating system (hereinafter referred to as "OS") and profiles. Here, the OS may be firmware. The IC module 4 may be mounted on an embedded board as an eUICC so that it cannot be easily removed or replaced from the communication device D, or may be removably attached to the communication device D as a card-type IC card.

2 is a diagram showing an example of the hardware configuration of the IC module 4. As shown in FIG. 2, the IC module 4 is configured with a CPU 41, a RAM 42, a ROM 43, an NVM (Nonvolatile Memory) 44, an I/O circuit 45, and the like. The I/O circuit 45 has eight terminals C1 to C8, for example, as defined by ISO7816. Here, the C1 terminal is a power supply terminal (VCC), the C2 terminal is a reset terminal (RST) for inputting a reset signal, the C3 terminal is a clock terminal (CLK) for inputting a clock signal, and the C5 terminal is a ground terminal (GND). The C6 terminal is a terminal that serves as an interface IF1 with the communication module 1, and the C7 terminal is a terminal that serves as an interface IF2 with the communication module 2. The C4 terminal and the C8 terminal can be used as terminals that serve as interfaces with communication modules other than the communication modules 1 and 2 (for example, an interface for USB (Universal Serial Bus) transfer).

The CPU 41 is a processor (computer) that executes a program (including the program of the present invention) stored in the ROM 43 or NVM 44. For example, a flash memory can be used as the NVM 44. The NVM 44 may be a non-volatile memory such as an "Electrically Erasable Programmable Read-Only Memory." The ROM 43 or NVM 44 stores an OS, a profile, interface management information, and profile management information. The ROM 43 or NVM 44 may also store initial response information specific to the IC module 4.

Here, a profile includes at least one or more applications (e.g., a phone application, a payment supplement, a bank application, etc.). An application is a collection of multiple instantiated objects, and is an entity that processes commands from the outside. A profile may also include data used by the application. Such data is stored in multiple files having a hierarchical structure composed of, for example, a Master File (MF), a Dedicated File (DF), and an Elementary File (EF). The MF is located at the top of the file structure, and the DF and EF are located in the hierarchy below the MF. An MF is provided, for example, for each application. An EF is a file that stores data used by an application. An EF is also divided into an IEF and a WEF. For example, a PIN (verification key) such as a session key is stored in the IEF.

The interface management information includes an interface list that describes the identifiers of each interface. In the interface list, the identifiers of profiles that are pre-linked to each interface are described in association with the identifiers of each interface. In addition, the interface list may also include a channel list that describes the identifiers of one or more channels that can be opened for each interface in association with the identifiers of each interface. A channel is a logical communication path for accessing a profile. The channels that can be opened for an interface are set in advance.

The profile management information also includes initial response information that is pre-linked to each profile. In the profile management information, each piece of initial response information is associated with the identifier of the profile to which it is linked. The initial response information is a parameter for communication settings, and differs depending on the profile (in other words, the type of profile).

Figure 3 is a diagram showing an example of the relationship between profiles, channels, and interfaces. In Figure 3, the OS has an interface management function that manages multiple interfaces, a channel management function that manages multiple channels, a profile management function that manages multiple profiles, a profile enable/disable setting function that sets each of the multiple profiles to be enabled or disabled, and a channel assignment function that assigns an enabled profile of the multiple profiles to one of the channels.

The interface management function uses interface management information to manage the profiles linked to each interface, and to set (link) and manage the channels that can be opened for each interface. In the example of Figure 3, profile PF1 and profile PF2 are linked to interface IF1, and profile PF2 and profile PF3 are linked to interface IF2. Also, in the example of Figure 3, channels Ch0 and Ch1 can be opened (in other words, linked) for interface IF1, and channels Ch2 and Ch3 can be opened for interface IF2. The profile management function uses profile management information to manage the initial response information linked to each profile.

The profile enable/disable setting function can enable all of the multiple profiles, or can enable only some of the profiles. In the example of FIG. 3, profiles PF1 and PF2 are enabled (i.e., enabled), and profile PF3 is disabled. The channel assignment function can also assign each of the multiple enabled profiles to each of the multiple channels. In the example of FIG. 3, profile PF1 is assigned channel Ch0 (i.e., opened), and profile PF2 is assigned channels Ch1 and Ch2. That is, profile PF1 has a session established with communication module 1 via channel Ch0. Also, profile PF2 has a session established with communication module 1 via channel Ch1, and a session established with communication module 2 via channel Ch2.

In the IC module 4 configured as described above, the OS functions as the first identification means, second identification means, third identification means, first determination means, second determination means, and execution means of the present invention in addition to the functions described above. Specifically, when a reset event occurs for an interface (e.g., IF1 or IF2), the OS identifies a profile linked to the interface in which the reset event occurred, determines whether the identified profile is valid, and if the identified profile is valid, executes an initialization sequence (activation procedure) for the interface using the initial response information linked to the profile (i.e., the initial response information of the profile).

That is, a valid profile is identified from among multiple profiles loaded on the IC module 4, and an initialization sequence is executed in the interface using the initial response information linked to the identified valid profile. This allows for a different initial response for each profile. If the initialization sequence is performed normally, the interface is activated.

Here, the reset event of interface IF1 occurs, for example, when the C6 terminal in I/O circuit 45 is set to a high state (pull-up). In this initialization sequence, an ACT_SYNC frame including initial response information (such as SWP bit durations) linked to the above-identified valid profile is sent from IC module 4 to communication module 1 via interface IF1. Then, as necessary, an ACT_POWER_MODE frame sent from communication module 1 via interface IF1 is received by IC module 4, and processing according to the contents of the ACT_POWER_MODE frame is performed. Note that, in addition to directly generating a reset event, a reset event may also occur when IC module 4 requests the opposing device to start a reset process via communication module 1.

On the other hand, a reset event of interface IF2 occurs, for example, when the C1 and C2 terminals of I/O circuit 45 are set to a high state. In this initialization sequence, an ATR including initial response information (e.g., protocol format such as T=0 or T=1 and communication speed) linked to the above-identified valid profile is transmitted from IC module 4 to communication module 2 via interface IF2. Then, if necessary (e.g., when changing communication parameters), a PPS (Protocol and Parameters Selection) request transmitted from communication module 2 via interface IF2 is received by IC module 4, and processing including a response to the PPS request is performed. Note that a reset event may occur when IC module 4 directly generates a reset event, or when IC module 4 requests the opposing device to start a reset process via communication module 2.

The OS may also determine whether a valid profile associated with the interface in which the reset event occurred is associated with another interface different from the interface in which the reset event occurred, and if it determines that the valid profile is associated with the other interface, may execute an initialization sequence in the other interface using the initial response information associated with the valid profile.

That is, in this case, in addition to the initialization sequence of the interface where the reset event occurred, the initialization sequence of the other interface is executed. This allows the initialization sequence of the other interface to be executed efficiently in conjunction with the reset event of the interface. If a valid profile is not linked to the other interface, the initialization sequence of the other interface is not executed. Therefore, it is possible to prevent other interfaces that are unrelated to the valid profile linked to the interface where the reset event occurred from being inadvertently initialized. However, if the other interface is an interface that generates a reset event such as ISO7816 only from the opposing device of the IC module 4, the OS of the IC module 4 cannot directly generate a reset event. In this case, the OS should wait for the next command to be received at the other interface, and send a reinitialization request for the other interface by adding a specific status word to the response to this command, and request the opposing device to execute the initialization sequence.

The OS may also determine whether or not the valid profile has been switched in response to a reset event of the interface, and if it determines that the valid profile has been switched, identify a valid profile associated with an interface other than the interface in which the reset event occurred. In this case, the OS executes an initialization sequence in the other interface using the initial response information associated with the valid profile. In this case, in addition to the initialization sequence of the interface in which the reset event occurred, the initialization sequence of the other interface is also executed. Note that if it is determined that the valid profile has not been switched, the initialization sequence of the interface other than the interface in which the reset event occurred is not executed.

In the above-mentioned interface initialization sequence, it is conceivable to initialize channels that have already been opened, but it is undesirable for a reset event for an interface that is not used by a valid profile to initialize channels that have been opened for an interface that is used by the valid profile. Therefore, the OS can separate the interface initialization sequence from the channel initialization sequence, identify channels that can be opened for the interface where the reset event occurred, and execute the initialization sequence for any of the identified channels that have been opened for a valid profile.

In the channel initialization sequence, for example, a memory area provided in, for example, RAM 42 to store information on opened channels is initialized. Such a memory area is, for example, divided for each opened channel. When an opened channel is reset individually, a limited memory area called a CLEAR_ON_DESELECT area is initialized, and when all channels are reset, a memory area called a CLEAR_ON_DESET area is initialized in addition to the CLEAR_ON_DESELECT area. The channel information includes, for example, the identifier of the profile assigned to the channel. In addition, in the channel initialization sequence, depending on the type of channel, a process may be performed to disconnect an opened channel and transition the state to unopened (for example, closing a channel other than a basic logical channel). In addition, in the channel initialization sequence, prior to the initialization of RAM 42, a process may be performed to notify the application of the IC module 4 or the opposing application that is using the channel that the channel has been closed. In addition, the OS may execute an initialization sequence for other channels opened in the profile opened for the above specified channel.

2. Operation of Communication Device D
Next, the operation of the communication device D will be described with reference to Figures 4 to 6. Figure 4 is a flowchart showing an example of a main process executed by the OS of the IC module 4 when an interface reset event occurs. Figure 5 is a flowchart showing details of the "reset target interface determination process" shown in step S6 of Figure 4. Figure 6 is a flowchart showing details of the "reset target channel determination process" shown in step S8 of Figure 4.

The process shown in FIG. 4 is started when the occurrence of a reset event of the interface is detected. When the process shown in FIG. 4 is started, the OS determines whether or not multiple profiles are installed in the IC module 4 (i.e., stored in the NVM 44) (step S1). If the OS determines that multiple profiles are not installed in the IC module 4 (step S1: NO), it executes an initialization sequence in the interface where the reset event occurred using initial response information unique to the IC module 4 (step S2), and ends the process shown in FIG. 4.

On the other hand, if the OS determines that multiple profiles are installed on the IC module 4 (step S1: YES), it determines whether the multiple profiles are valid or not (step S3). If the OS determines that multiple profiles are not valid (step S3: NO), that is, if it determines that only one profile is valid, it proceeds to step S4. On the other hand, if the OS determines that multiple profiles are valid (step S3: YES), it proceeds to step S6.

In step S4, the OS determines whether or not a valid profile is associated with the interface in which the reset event occurred. If the OS determines that a valid profile is associated with the interface in which the reset event occurred (step S4: YES), the OS executes an initialization sequence in the interface in which the reset event occurred using the initial response information associated with the valid profile (step S5), and ends the process shown in FIG. 4.

On the other hand, if the OS determines that a valid profile is not associated with the interface in which the reset event occurred (step S4: NO), it ends the process shown in FIG. 4. If the OS determines that a valid profile is not associated with the interface in which the reset event occurred, it may determine whether the valid profile has been switched in response to the reset event of the interface. In this case, if the OS determines that the valid profile has been switched (for example, from profile PF1 to profile PF2), it identifies a valid profile associated with another interface different from the interface in which the reset event occurred. Then, the OS executes an initialization sequence in the other interface using the initial response information associated with the identified valid profile.

In step S6, the OS executes the process of determining interfaces to be reset shown in FIG. 5. This results in a list of IFs to be reset, which lists the identifiers of the interfaces determined to be reset. Details of the process of determining interfaces to be reset shown in FIG. 5 will be described later. Next, the OS determines whether each valid profile is associated with multiple interfaces (step S7).

If the OS determines that each valid profile is linked to multiple interfaces (step S7: YES), the OS executes the reset target channel determination process shown in FIG. 6 (step S8) and proceeds to step S9. This results in a reset target channel list that describes the identifiers of the channels determined to be reset. The reset target channel determination process shown in FIG. 6 will be described in detail later. On the other hand, if the OS determines that each valid profile is not linked to multiple interfaces (step S7: NO), the OS proceeds to step S9.

In step S9, the OS executes an initialization sequence in the interface using the initial response information of a valid profile associated with the interface in the list of IFs to be reset obtained in step S6. Note that if the list of IFs to be reset describes multiple interface identifiers, the initialization sequence is executed in each interface using the initial response information of a valid profile associated with each interface.

In step S10, the OS executes the initialization sequence of the channels in the list of channels to be reset obtained in step S8 (only if the channels to be reset were determined in step S8). Note that if the list of channels to be reset obtained in step S8 contains identifiers of multiple channels, the initialization sequence of each channel is executed.

Next, the details of the reset target interface determination process shown in FIG. 5 will be described. In FIG. 5, the OS determines the interface IFa (a is a variable) in which a reset event occurred as the interface to be reset (step S61), and adds (writes) the identifier of the interface IFa to the reset target IF list. Next, the OS identifies a valid profile PFa (a is a variable) linked to the interface IFa (step S62).

Next, the OS selects one interface IFb (b is a variable) other than interface IFa from the interface list in the interface management information (step S63). Next, it identifies a valid profile PFb (b is a variable) linked to the interface IFb selected in step S63 (step S64).

Then, the OS determines whether the profile PFa identified in step S62 is the same as the profile PFb identified in step S64 (step S65). If the OS determines that the profile PFa and the profile PFb are the same (step S65: YES), it determines the interface IFb selected in step S63 as the interface to be reset (step S66) and adds the identifier of the interface IFb to the list of IFs to be reset. Then, the process proceeds to step S67. On the other hand, if the OS determines that the profile PFa and the profile PFb are not the same (step S65: NO), it proceeds to step S67.

In step S67, the OS determines whether there is an interface IFb that has not yet been selected in the interface list (step S67). If the OS determines that there is an interface IFb that has not yet been selected in the interface list (step S67: YES), the OS returns to step S63, selects an interface IFb that has not yet been selected, and performs the same process as described above. On the other hand, if the OS determines that there is no interface IFb that has not yet been selected in the interface list (step S67: NO), the process shown in FIG. 5 is terminated, and the process returns to the process shown in FIG. 4.

Next, the details of the process of determining channels to be reset shown in FIG. 6 will be described. In FIG. 6, the OS selects one interface IFx (x is a variable) from the list of IFs to be reset (step S81). Next, the OS acquires a channel list of channels that can be opened for the interface IFx selected in step S81 (step S82). Next, the OS selects one channel Chx (x is a variable) from the channel list acquired in step S82 (step S83).

Then, the OS determines whether or not a valid profile PFx (x is a variable) has been opened for the channel Chx selected in step S83 (step S84). If the OS determines that a valid profile PFx has not been opened for the channel Chx (step S84: NO), it proceeds to step S86. On the other hand, if the OS determines that a valid profile PFx has been opened for the channel Chx (step S84: YES), it determines the channel Chx as a channel to be reset (step S85), adds (writes) the identifier of the channel Chx to the list of channels to be reset, and proceeds to step S86.

In step S86, the OS determines whether another channel Chy (y is a variable) is opened in the valid profile PFx. If the OS determines that another channel Chy is not opened in the valid profile PFx (step S86: NO), it proceeds to step S88. On the other hand, if the OS determines that another channel Chy is opened in the valid profile PFx (step S86: YES), it determines that the other channel Chy is to be reset (step S87), adds the identifier of the other channel Chy to the list of channels to be reset, and proceeds to step S88.

In step S88, the OS determines whether there is a channel Chx in the channel list that has not yet been selected. If the OS determines that there is a channel Chx in the channel list that has not yet been selected (step S88: YES), the OS returns to step S83, selects a channel Chx that has not yet been selected, and performs the same process as described above. On the other hand, if the OS determines that there is no channel Chx in the channel list that has not yet been selected (step S88: NO), the OS proceeds to step S89.

In step S89, the OS determines whether there is an interface IFx that has not yet been selected in the list of IFs to be reset. If the OS determines that there is an interface IFx that has not yet been selected in the list of IFs to be reset (step S89: YES), the OS returns to step S81, selects an interface IFx that has not yet been selected, and performs the same process as described above. On the other hand, if the OS determines that there is no interface IFx that has not yet been selected in the list of IFs to be reset (step S89: NO), the process shown in FIG. 6 is terminated, and the process returns to the process shown in FIG. 4.

As described above, according to the above embodiment, when a reset event occurs for an interface, the IC module 4 is configured to identify a profile linked to the interface in which the reset event occurred, determine whether the identified profile is valid, and if the identified profile is valid, execute an initialization sequence in the interface using the initial response information linked to the profile. This allows an appropriate initialization sequence to be executed for each of the multiple profiles mounted on the IC module 4, improving user convenience. In addition, it is possible to prevent other interfaces unrelated to the valid profile linked to the interface in which the reset event occurred from being inadvertently initialized. Therefore, it is possible to prevent each profile from being affected by the initialization sequence related to the other profiles. Furthermore, according to the above embodiment, it is possible to prevent a channel opened for an interface used by a valid profile from being initialized by a reset event for an interface not used by the valid profile.

1, 2 Communication module 3 Control module 4 IC module 41 CPU
42 RAM
43 ROM
44 NVM
45 I/O circuit D communication device

Claims (8)

An electronic information storage medium comprising at least one interface and a function for setting each of a plurality of profiles to be valid or invalid, and storing initial response information associated with each of the profiles,
a first identification means for identifying a valid profile from among the plurality of profiles when a reset event of the interface occurs;
an execution means for executing an initialization sequence in the interface by using the initial response information associated with the profile identified by the first identification means;
An electronic information storage medium comprising: The electronic information storage medium manages the profile associated with the interface;
The electronic information storage medium according to claim 1, characterized in that the first identification means identifies a profile associated with the interface in which the reset event occurred, and, if the identified profile is valid, identifies the valid profile. a first determination means for determining whether or not the valid profile has been switched in response to a reset event of the interface;
a second identification means for identifying the valid profile associated with another interface different from the interface in which the reset event has occurred when the first determination means determines that the valid profile has been switched;
Further comprising:
The electronic information storage medium according to claim 1 or 2, characterized in that the execution means executes an initialization sequence in the other interface using the initial response information linked to the profile identified by the second identification means. a second determination unit that determines whether or not the profile identified by the first determination unit is associated with an interface other than the interface in which the reset event occurs,
An electronic information storage medium as described in any one of claims 1 to 3, characterized in that when the second determination means determines that the profile is linked to the other interface, an initialization sequence is executed in the other interface using the initial response information linked to the profile. the electronic information storage medium manages channels that can be opened with respect to the interface;
a third identification means for identifying a channel that can be opened for the interface in which the reset event has occurred;
An electronic information storage medium according to any one of claims 1 to 4, characterized in that the execution means executes an initialization sequence of a channel that is opened for any of the profiles among the channels identified by the third identification means. The electronic information storage medium according to claim 5, characterized in that the execution means executes an initialization sequence of another channel opened in the profile that is opened for the channel identified by the third identification means. 1. An initialization sequence execution method executed by a computer in an electronic information storage medium that includes at least one interface and a function for setting each of a plurality of profiles to be valid or invalid, and stores initial response information associated with each of the profiles, comprising:
identifying a valid profile from among the plurality of profiles when a reset event of the interface occurs;
performing an initialization sequence at the interface using the initial response information associated with the identified profile;
13. A method for executing an initialization sequence comprising: A computer in an electronic information storage medium that includes at least one interface and a function for setting each of a plurality of profiles to be valid or invalid, and stores initial response information associated with each of the profiles,
a first identification means for identifying a valid profile from among the plurality of profiles when a reset event of the interface occurs;
A program that functions as an execution unit that executes an initialization sequence in the interface by using the initial response information linked to the profile identified by the first identification unit.

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