JP7535909B2 - Power semiconductor device, its manufacturing method, and power conversion device - Google Patents

Description

This disclosure relates to a power semiconductor device, a manufacturing method thereof, and a power conversion device.

Power semiconductor devices are mounted on inverters installed in railroad cars, automobiles, FA (Factory Automation) equipment, etc. Power semiconductor devices occupy a relatively large proportion of the total mounting area of electronic components mounted on the inverter. For this reason, miniaturizing power semiconductor devices leads to miniaturization of the equipment used as the inverter.

DIP (Dual In-line Package) type power semiconductor devices (modules) are highly reliable and are considered the mainstream power semiconductor devices to be mounted on inverters. This type of power semiconductor device is sealed with resin by transfer molding. Terminals are arranged on the side of the resin package. In the transfer molding manufacturing process, a mold die is used to fill the resin, and the electronic components are sealed with the resin to form the package.

To improve the productivity of power semiconductor devices, it is desirable to form multiple packages in a single molding process. For this reason, it is necessary to reduce the package size and form as many packages as possible within the limited mold space. Note that package size here means the area of the surface of the power semiconductor device that faces the plane of the substrate when the power semiconductor device is mounted on the substrate.

In addition, for industrial equipment equipped with inverters, there is a strong demand to increase the functionality of the inverter without changing its size. For this reason, in order to accommodate power semiconductor devices within a limited housing, there is a demand to reduce not only the package size but also the package thickness.

To meet such demands, for example, Patent Documents 1 and 2 propose power semiconductor devices in which multiple lead frames are stacked.

JP 2010-199152 A JP 2011-60927 A

In conventional power semiconductor devices, if the lead terminals of multiple lead frames in a DIP-type power semiconductor device are arranged at the same height on the side of the package, the package size becomes large, which hinders miniaturization of the power semiconductor device.

In addition, if each lead terminal of multiple lead frames is to be positioned at the height of the corresponding lead frame on the side of the package, the thickness of the package will increase in order to ensure the insulation distance of the lead terminals in the vertical direction, which will hinder miniaturization of the power semiconductor device.

This disclosure has been made to solve these technical problems, and one objective is to provide a power semiconductor device that can be miniaturized, another objective is to provide a method for manufacturing such a power semiconductor device, and yet another objective is to provide a power conversion device that uses a power semiconductor device.

The power semiconductor device according to the present disclosure includes a first lead frame, a second lead frame, and a sealing body. The first lead frame carries a first semiconductor element and includes a plurality of first lead terminals. The second lead frame is arranged to face the first lead frame at a distance in a first direction and is electrically connected to the first lead frame, carries a second semiconductor element, and includes a plurality of second lead terminals. The sealing body seals the first lead frame and the second lead frame in a manner that causes the plurality of first lead terminals and the plurality of second lead terminals to protrude. The sealing body has a first side portion and a second side portion and a first main surface portion and a second main surface portion. The first side portion and the second side portion are arranged to face each other at a distance in a second direction intersecting the first direction, and each extends in a third direction intersecting the first direction and the second direction. The first main surface portion and the second main surface portion are arranged to face each other at a distance in the first direction, and are formed from the first side portion to the second side portion. The first side surface portion of the sealing body includes a first side surface portion first part and a first side surface portion second part. The first side surface portion first part is located on the side where the first main surface portion is located. The first side surface portion second part is located on the side where the second main surface portion is located. The first side surface portion first part is located on the opposite side of the first side surface portion second part from the side where the second side surface portion is located, with a distance therebetween. The first lead terminals include a first lead terminal protruding from the first side surface portion first part. The second lead terminals include a second lead terminal protruding from the first side surface portion second part. The first lead terminal protruding from the first side surface portion first part and the second lead terminal protruding from the first side surface portion second part are located with a distance therebetween in the second direction.

The method for manufacturing a power semiconductor device according to the present disclosure includes the following steps: Prepare a first lead frame including a plurality of first lead terminals and a second lead frame including a plurality of second lead terminals. Mount a first semiconductor element on the first lead frame, and mount a second semiconductor element on the second lead frame. Arrange the second lead frame so as to face the first lead frame at a distance in a first direction. Prepare a molding die. Arrange the first lead frame and the second lead frame facing each other at a distance in the first direction in the molding die. Fill the molding die with molding resin to form a sealing body that seals the first lead frame and the second lead frame in a manner that causes the plurality of first lead terminals and the plurality of second lead terminals to protrude, respectively. Remove the sealing body from the molding die. Bend the plurality of first lead terminals and the plurality of second lead terminals protruding from the sealing body in the first direction, respectively. In the step of forming the sealing body, a first side portion and a second side portion are formed, the first side portion and the second side portion are arranged to face each other at a distance in a second direction intersecting the first direction, and extend in a third direction intersecting the first and second directions, and a first main surface portion and a second main surface portion are arranged to face each other at a distance in the first direction, and are located from the first side portion to the second side portion. The first side portion is formed with a first side portion first portion located on the side where the first main surface portion is located, and a first side portion second portion located on the side where the second main surface portion is located. The first side portion first portion is formed to be located at a distance on the side opposite to the side where the second side portion is located with respect to the first side portion second portion. A plurality of first lead terminals protruding from the sealing body are formed to include a first lead terminal protruding from the first side portion first portion. A plurality of second lead terminals protruding from the sealing body are formed to include a second lead terminal protruding from the first side portion second portion. In the process of bending the multiple first lead terminals and multiple second lead terminals protruding from the sealing body in the first direction, the first lead terminal protruding from the first part of the first side surface and the second lead terminal protruding from the second part of the first side surface are bent so as to be spaced apart in the second direction.

The power conversion device according to the present disclosure has the above-mentioned power semiconductor device, and is equipped with a main conversion circuit that converts and outputs the input power, and a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit.

According to the power semiconductor device of the present disclosure, the sealing body that seals the first lead frame and the second lead frame arranged to face each other at a distance in the first direction has a first side portion and a second side portion that face each other, the first side portion includes a first side portion first part and a first side portion second part, and the first side portion first part is located at a distance from the side opposite to the side where the second side portion is located with respect to the first side portion second part. Of the multiple first lead terminals and multiple second lead terminals that protrude from the sealing body, the first lead terminal that protrudes from the first side portion first part and the second lead terminal that protrudes from the first side portion second part are located at a distance in the second direction. This contributes to miniaturization of the power semiconductor device in which the first lead frame and the second lead frame are stacked while ensuring insulation resistance.

According to the manufacturing method of the power semiconductor device of the present disclosure, in the step of forming a sealing body that seals the first lead frame and the second lead frame arranged to face each other at a distance in the first direction, the sealing body has a first side portion and a second side portion that face each other, the first side portion includes a first side portion first part and a first side portion second part, and the first side portion first part is formed to be located at a distance from the side opposite to the side where the second side portion is located with respect to the first side portion second part. In addition, the multiple first lead terminals include a first lead terminal that protrudes from the first side portion first part, and the multiple second lead terminals include a second lead terminal that protrudes from the first side portion second part, and the first lead terminal that protrudes from the first side portion first part and the second lead terminal that protrudes from the first side portion second part are formed to be located at a distance in the second direction. This makes it possible to manufacture a power semiconductor device that contributes to miniaturization by stacking the first lead frame and the second lead frame while ensuring insulation resistance.

The power conversion device according to the present disclosure includes the above-mentioned power semiconductor device, a main conversion circuit that converts and outputs the input power, and a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit. This can contribute to the miniaturization of the power conversion device.

1 is a perspective view of a power semiconductor device according to a first embodiment; FIG. 2 is a top view of the power semiconductor device in the embodiment. FIG. 2 is a front view of the power semiconductor device in the embodiment. 2 is a cross-sectional view showing an internal structure of the power semiconductor device in the embodiment. FIG. FIG. 2 is a partially enlarged plan view showing the structure of a first lead frame in the embodiment. FIG. 2 is a partially enlarged plan view showing the structure of a second lead frame in the embodiment. 1 is a partial side view showing one step of a method for manufacturing a power semiconductor device in the embodiment. 8 is a partial side view showing a step performed after the step shown in FIG. 7 in the embodiment. FIG. FIG. 9 is a partial cross-sectional view for illustrating the step shown in FIG. 8 in the embodiment. FIG. 9 is a partial cross-sectional view for illustrating the step shown in FIG. 8 in the embodiment. 5A to 5C are partial cross-sectional views showing an example of a variation of the connection lead in the embodiment. 11 is a partial cross-sectional view showing another example of a variation of the connection lead in the embodiment. FIG. 9 is a perspective view showing a step performed after the step shown in FIG. 8 in the embodiment. FIG. 14 is a partial side view showing a step performed after the step shown in FIG. 13 in the embodiment. FIG. 15 is a cross-sectional view taken along line XV-XV in FIG. 14 in the embodiment. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 14 in the embodiment. 11 is a cross-sectional view showing an internal structure of a power semiconductor device according to a second embodiment. 2 is a front view showing a step of a manufacturing method of a power semiconductor device in the embodiment. FIG. 19 is a front view showing a step performed after the step shown in FIG. 18 in the embodiment. FIG. 20 is a front view showing a step performed after the step shown in FIG. 19 in the embodiment. FIG. 2 is a front view showing a state in which the power semiconductor device is mounted on an external substrate in the embodiment. FIG. FIG. 13 is a front view of a power semiconductor device according to a third embodiment. FIG. 2 is a top view of the power semiconductor device in the embodiment. FIG. 13 is a perspective view of a power semiconductor device according to a modified example in each embodiment. FIG. 11 is a block diagram of a power conversion device according to a fourth embodiment.

Embodiment 1.
Here, an example of a power semiconductor device having an inverter circuit and a converter circuit will be described.

Figures 1, 2, and 3 show the external appearance of the power semiconductor device 1. Figure 4 shows an example of the internal structure of the power semiconductor device. For ease of explanation, mutually orthogonal X-axis, Y-axis, and Z-axis are used. The Z-axis corresponds to the first direction, the X-axis corresponds to the second direction, and the Y-axis corresponds to the third direction.

As shown in Figures 1, 2, 3 and 4, in the power semiconductor device 1, the first lead frame 3 and the second lead frame 25 are sealed with a sealing body 51 (sealing resin). The first lead frame 3 and the second lead frame 25 are arranged to face each other at a distance in the Z-axis direction as the first direction. The first lead frame 3 and the second lead frame 25 are electrically connected by a connection lead 39a as a connection member 39.

The sealing body 51 has a first side surface portion 51a and a second side surface portion 51b that are positioned to face each other in the X-axis direction as the second direction and extend in the Y-axis direction as the third direction. The sealing body 51 also has a first main surface portion 51c and a second main surface portion 51d that are positioned to face each other at a distance in the Z-axis direction and are formed to extend from the first side surface portion 51a to the second side surface portion 51b.

The first side surface portion 51a includes a first side surface portion first part 52a and a first side surface portion second part 52b. The first side surface portion first part 52a is located on the side where the first main surface portion 51c is located. The first side surface portion second part 52b is located on the side where the second side surface portion 51d is located. The first side surface portion second part 52b is located on the side where the second side surface portion 51b is located with respect to the first side surface portion first part 52a. The sealing body 51 has a first sealing body part 53 that seals the first lead frame 3 and a second sealing body part 55 that seals the second lead frame 25. The first sealing body part 53 has the first side surface portion first part 52a. The second sealing body part 55 has the first side surface portion second part 52b.

The first lead frame 3 has a plurality of first lead terminals 5. The plurality of first lead terminals 5 are arranged at a distance from each other in the Y-axis direction. The plurality of first lead terminals 5 includes a plurality of first lead terminals 5 protruding from the first side surface portion first part 52a in the first sealing body part 53. The first lead terminals 5 have a first root part 7 and a first tip part 9. The first root part 7 of the first lead terminal 5 protruding from the first side surface portion first part 52a protrudes from the first side surface portion first part 52a in the positive direction of the X-axis. The first tip part 9 is bent from the first root part 7 in the positive direction of the Z-axis.

The second lead frame 25 has a plurality of second lead terminals 27. The plurality of second lead terminals 27 are arranged at a distance from each other in the Y-axis direction. The plurality of second lead terminals 27 include a plurality of second lead terminals 27 protruding from the first side surface portion second part 52b in the second sealing body part 55. The second lead terminals 27 have a second root part 29 and a second tip part 31. The second root part 29 of the second lead terminal 27 protruding from the first side surface portion second part 52b protrudes from the first side surface portion second part 52b in the positive direction of the X-axis. The second tip part 31 is bent from the second root part 29 in the positive direction of the Z-axis.

The first side surface portion first part 52a from which the first lead terminal 5 protrudes is located away from the first side surface portion second part 52b from which the second lead terminal 27 protrudes, on the opposite side from the side on which the second side surface portion 51b is located. In addition, the multiple first lead terminals 5 protruding from the first side surface portion first part 52a and the multiple second lead terminals 27 protruding from the first side surface portion second part 52b are arranged at a distance in the Z-axis direction.

Furthermore, as shown in FIG. 2, in a plan view of the sealing body 51 (power semiconductor device 1) seen from the Z-axis direction (from the positive side to the negative side), the multiple first lead terminals 5 and the multiple second lead terminals 27 are arranged so as not to overlap with each other.

In addition, a first cutout portion 59 is formed in the first side surface portion 51a of the sealing body 51, where the first side surface portion first portion 52a is recessed to the position of the first side surface portion second portion 52b. In a plan view of the sealing body 51 seen from the Z-axis direction (from the positive side to the negative side), the first cutout portion 59 is formed at a position overlapping the second lead terminal 27.

The internal structure of the encapsulant 51 will be described. As shown in FIG. 4 and FIG. 5, the first lead frame 3 is equipped with an insulated gate bipolar transistor (IGBT) 15, a free wheel diode (FWR) 17, and a rectifier diode 19 as first semiconductor elements for the inverter circuit and the converter circuit. The insulated gate bipolar transistor 15, the free wheel diode 17, and the rectifier diode 19 are electrically connected to the first lead terminal 5, etc., by, for example, an aluminum wire 23.

A copper plate 11 is attached to the side of the first lead frame 3 opposite the side on which the insulated gate bipolar transistor 15 and other components are mounted, using a first adhesive resin 13. The copper plate 11 is exposed on the surface of the first main surface portion 51c of the sealing body 51. The portion of the first lead frame 3 on which the insulated gate bipolar transistor 15 and other components are mounted is bent from the first lead terminal 5 toward the side on which the copper plate 11 is located.

The first adhesive resin 13 is composed of an inorganic material with high thermal conductivity and a resin with adhesive and insulating properties. Examples of inorganic materials with high thermal conductivity include silicon dioxide (SiO ₂ ), boron nitride (BN), aluminum nitride (AlN), alumina (Al ₂ O ₃ ), etc. Examples of resins with adhesive and insulating properties include thermosetting resins or thermoplastic resins such as epoxy resin, polyimide resin, and acrylic resin. Note that the first adhesive resin 13 is not limited to these materials as long as it is a material with high thermal conductivity, adhesiveness, and insulating properties.

As shown in Figures 4 and 6, the second lead frame 25 is equipped with a control IC (Integrated Circuit) 33 that controls the operation of the insulated gate bipolar transistor 15 and the like as a second semiconductor element. The control IC 33 is mounted on the second lead frame 25 by silver paste 35. The control IC 33 is electrically connected to the second lead terminal 27 by a gold wire 37.

The connection lead 39a that electrically connects the first lead frame 3 and the second lead frame 25 is arranged by bending a part of the second lead frame 25 toward the first lead frame. The connection lead 39a is joined to the first lead frame 3 by solder 41. The power semiconductor device 1 according to the first embodiment is configured as described above.

Next, an example of a method for manufacturing the power semiconductor device 1 described above will be described. First, a first lead frame 3 having a plurality of first lead terminals 5 and a second lead frame 25 having a plurality of second lead terminals 27 are prepared (see Figures 7 and 8). Next, an insulated gate bipolar transistor 15, a free wheel diode 17, and a rectifier diode 19 are joined to the first lead frame 3 with lead-free solder 21. In addition, a control IC 33 is joined to the second lead frame 25 with a bent connection lead 39a with silver paste 35. Note that the connection lead 39a may be bent after joining the control IC 33.

Next, the insulated gate bipolar transistors 15 and the first lead terminals 5 are electrically connected by aluminum wires 23. The control IC 33 is electrically connected to the first lead terminals 5 by gold wires 37 (see Figures 5 and 6). The copper plate 11 is bonded by a first adhesive resin 13 to the side of the first lead frame 3 opposite to the side on which the insulated gate bipolar transistors 15 and the like are mounted. Next, the bent connection lead 39a is bonded to the first lead frame 3 by solder 41. This results in the second lead frame 25 being held at a distance above the first lead frame 3 (in the Z-axis direction).

Next, the first lead frame 3 and the second lead frame 25 are sealed with resin by transfer molding. As shown in FIG. 7, an upper die 71 and a lower die 73 are prepared as molding dies. The first lead frame 3 and the second lead frame 25 are placed on the lower die 73. The lower die 73 has a protrusion 75 for molding the first cutout portion 59 (see FIGS. 1 and 2). The second lead frame 25 is placed on the protrusion 75.

At this time, as shown in FIG. 9, the second lead frame 25 is slightly above the protrusion 75. The height (distance) L2 from the lower mold 73 to the second lead frame 25 is designed to be higher than the height L1 of the protrusion 75. In other words, it is designed so that height L1 < height L2. When the height relationship is L1 ≥ height L2, the filling of the resin generates stress at the point (solder 41) where the connection lead 39a is joined to the first lead frame 3, which tends to pull the connection lead 39a off. For this reason, it is desirable to have the height relationship of height L1 < height L2.

Next, the upper die 71 is positioned so as to face the lower die 73. The upper die 71 has a comb-like shape so that the protrusions 75 of the lower die 73 fit into it. Next, as shown in FIG. 8, the upper die 71 is lowered (see arrow) to sandwich the first lead frame 3 and the second lead frame 25 between the lower die 73 and the upper die 71.

At this time, as shown in FIG. 10, the second lead frame 25 is pressed from above by the upper die 71, causing the connection lead 39a to bend. The bending of the connection lead 39a can relieve stress acting on the control IC 33 or the gold wire 37 mounted on the second lead frame. It is desirable to set the angle (gradient angle) at which the connection lead 39a is arranged relative to the first lead frame 3 to a gradient angle smaller than 90°. This makes it easier to deform the connection lead 39a.

The connecting member 39 that electrically connects the first lead frame 3 and the second lead frame 25 may be any member having elasticity, and may be a leaf spring 39b as shown in FIG. 11. Alternatively, it may be a wire 39c as shown in FIG. 12.

Next, the cavity (not shown) formed by the lower mold 73 and the upper mold 71 is filled with resin (not shown) by transfer molding, thereby sealing the first lead frame 3 and the second lead frame 25 with resin.

Next, as shown in FIG. 13, the sealing body 51 in which the first lead frame 3 and the second lead frame 25 are sealed with resin is removed from the lower mold 73 and the upper mold 71 (see FIG. 8). The first lead terminal 5 and the second lead terminal 27 protrude in the positive direction of the X-axis from the first side surface portion 51a of the sealing body 51. The first lead terminal 5 and the second lead terminal 27 protrude in the negative direction of the X-axis from the second side surface portion 51b of the sealing body. In the first side surface portion 51a of the sealing body 51, the convex portion 75 of the lower mold 73 forms a first cutout portion 59 (recessed portion) in which the first side surface portion first portion 52a is recessed to the position of the first side surface portion second portion 52b.

Next, lead forming is performed to bend the first lead terminal 5 and the second lead terminal 27 protruding from the sealing body 51. As shown in Figures 14, 15, and 16, an upper die 81 and a lower die 83 for lead forming are prepared, and the first lead terminal 5 is sandwiched between the upper die 81 and the lower die 83, and the second lead terminal 27 is also sandwiched between them.

Next, the processing blade 85 is raised to bend the first lead terminal 5 and the second lead terminal 27. The processing blade 85 used is an integrated processing blade 85a for bending the first lead terminal 5 and a processing blade 85b for bending the second lead terminal 27. The length of the processing blade 85b is longer than the length of the processing blade 85a.

The processing blade 85a and processing blade 85b are raised from below. At this time, the processing blade 85b, which bends the second lead terminal 27, is placed in the first cutout portion 59 (see FIG. 13) of the sealing body 51 and raised. As a result, the processing blade 85a abuts against the first lead terminal 5, and the processing blade 85b abuts against the second lead terminal 27, and the first lead terminal 5 and the second lead terminal 27 are simultaneously bent upward. After that, the sealing body 51 is removed from the upper die 81 and the lower die 83. In this way, the power semiconductor device 1 shown in FIG. 1 etc. is completed.

In the power semiconductor device 1 described above, a first lead frame 3 including a plurality of first lead terminals 5 and a second lead frame 25 including a plurality of second lead terminals 27 are arranged to face each other at a distance in the Z-axis direction. An insulated gate bipolar transistor 15 and the like are mounted on the first lead frame 3. A control IC 33 is mounted on the second lead frame 25. The first lead frame 3 and the second lead frame 25 are sealed by a sealing body 51 in such a manner that the plurality of first lead terminals 5 and the plurality of second lead terminals 27 protrude.

The sealing body 51 has a first sealing body portion 53 that seals the first lead frame 3, and a second sealing body portion 55 that seals the second lead frame 25. The first sealing body portion 53 and the second sealing body portion are formed so as to be stacked in the Z-axis direction. The sealing body 51 has a first side portion 51a and a second side portion 51b that face each other at a distance in the X-axis direction.

The first side surface portion 51a includes a first side surface portion first part 52a and a first side surface portion second part 52b. The first side surface portion first part 52a is located on the side where the first main surface portion 51c is located. The first side surface portion second part 52b is located on the side where the second main surface portion 51d is located. The first sealing body portion 53 has the first side surface portion first part 52a. The second sealing body portion 55 has the first side surface portion second part 52b.

The multiple first lead terminals 5 include multiple first lead terminals 5 protruding from the first side surface portion first part 52a. The multiple second lead terminals 27 include multiple second lead terminals 27 protruding from the first side surface portion second part 52b. The multiple first lead terminals 5 protruding from the first side surface portion first part 52a and the multiple second lead terminals 27 protruding from the first side surface portion second part 52b are arranged at a distance in the Z-axis direction.

First, this eliminates the need to make the side surface thicker than in the case of a power semiconductor device in which the lead terminals of each of the stacked lead frames are positioned at the same height on the side surface of the package.

Furthermore, the first side surface portion first part 52a from which the first lead terminal 5 protrudes is located away from the first side surface portion second part 52b from which the second lead terminal 27 protrudes, on the opposite side from the side on which the second side surface portion 51b is located. In other words, the first sealing body portion 53 is located on the negative Z-axis direction side of the second lead terminal 27 (second root portion 29).

As a result, the first lead terminals 5 protruding from the first side portion 1 part 52a and the second lead terminals 27 protruding from the first side portion 2 part 52b, which are arranged at a distance in the Z-axis direction, are also spaced apart in the X-axis direction. Therefore, the creepage distance (insulation distance) between the first lead terminals 5 protruding from the first side portion 1 part 52a and the second lead terminals 27 protruding from the first side portion 2 part 52b is ensured without increasing the thickness (Z-axis direction) of the sealing body. As a result, even if the number of components mounted on the lead frame is increased, the insulation resistance can be ensured. Moreover, even when the first lead frame 3 and the second lead frame 25 are stacked to increase the density of the components, the package size can be reduced, which contributes to the miniaturization of the power semiconductor device 1.

In addition, in general, when trying to increase the width of the lead terminals in a power semiconductor device to accommodate larger currents, it is necessary to increase the package size by the amount of the increased width of the lead terminals. However, in the power semiconductor device 1 described above, the stacked first lead frame 3 and second lead frame 25 are sealed in a sealing body 51. This allows the current to be divided between the first lead terminal 5 of the first lead frame 3 and the second lead terminal 27 of the second lead frame 25, and allows for larger currents to be accommodated without increasing the area of the first side portion 51a, etc. in the sealing body 51.

Furthermore, in a plan view of the sealing body 51 from the Z-axis direction (from the positive side to the negative side), the multiple first lead terminals 5 and the multiple second lead terminals 27 are arranged so as not to overlap one another. Furthermore, a first cutout portion 59 is formed in the first side surface portion 51a of the sealing body 51, where the first side surface portion first portion 52a is recessed to the position of the first side surface portion second portion 52b. The first cutout portion 59 is formed at a position overlapping the second lead terminal 27 in a plan view of the sealing body 51 from the Z-axis direction.

By forming the first cutout portion 59, the processing blade 85b for bending the second lead terminal 27 can be placed in the first cutout portion 59 during the lead forming process. This allows the processing blade 85a to abut against the first lead terminal 5 and the processing blade 85b to abut against the second lead terminal 27, thereby simultaneously bending the first lead terminal 5 and the second lead terminal 27 upward. As a result, the processing time required for lead forming can be shortened compared to when the first lead terminal 5 and the second lead terminal 27 are processed separately, which contributes to improved productivity.

In the above-mentioned power semiconductor device 1, the first semiconductor element mounted on the first lead frame 3 includes the insulated gate bipolar transistor 15, the free wheel diode 17, and the rectifier diode 19. In addition to silicon, wide band gap semiconductor materials having a wider band gap than that of silicon may be used as the semiconductor material for the insulated gate bipolar transistor 15 and the like. Examples of wide band gap semiconductor materials include silicon carbide (SiC), gallium nitride (GaN), and diamond (C).

Both the insulated gate bipolar transistor 15 and the freewheel diode 17 may be formed from a wide bandgap semiconductor material. Alternatively, either the insulated gate bipolar transistor 15 or the freewheel diode 17 may be formed from a wide bandgap semiconductor material.

Embodiment 2.
Here, a power semiconductor device having a brake circuit in addition to an inverter circuit and a converter circuit will be described. The brake circuit is a circuit for reducing the deceleration time by consuming the power generated during deceleration.

As shown in FIG. 17, the first lead frame 3 is equipped with an insulated gate bipolar transistor 15 for the inverter circuit and the converter circuit. The second lead frame 25 is joined with lead-free solder 22 to a brake circuit component 34 for the brake circuit. The brake circuit component 34 may be, for example, an IGBT. The brake circuit component 34 and the second lead terminal are electrically connected with an aluminum wire 24.

The first lead frame 3 and the second lead frame 25 are arranged such that the side of the first lead frame 3 on which the insulated gate bipolar transistor 15 and the like are mounted and the side of the second lead frame 25 on which the brake circuit components 34 are mounted face each other.

An aluminum block 77 is bonded to the side of the second lead frame 25 opposite to the side on which the brake circuit components 34 are mounted, by a second adhesive resin 79. The aluminum block 77 is exposed to the second main surface portion 51d. The second adhesive resin 79 has high heat dissipation and insulating properties. Note that the rest of the configuration is similar to that of the power semiconductor device 1 shown in Figure 4 etc., so the same members are given the same reference numerals and their descriptions will not be repeated unless necessary.

Next, a method for manufacturing the above-mentioned power semiconductor device will be described. First, the insulated gate bipolar transistors 15 and the like are joined to the first lead frame 3 having a plurality of first lead terminals 5 with lead-free solder 21. The insulated gate bipolar transistors 15 and the like are electrically connected to the first lead terminals 5 and the like with aluminum wires 23 (see FIG. 18).

The brake circuit components 34 are joined to a second lead frame 25 having a plurality of second lead terminals 27 by lead-free solder 22. An aluminum block 77 is joined to the side of the second lead frame 25 opposite to the side on which the brake circuit components 34 are mounted by a second adhesive resin 79. The brake circuit components 34 are electrically connected to the second lead terminals 27, etc. by aluminum wires 24 (see FIG. 18).

Next, as shown in FIG. 18, the side of the first lead frame 3 on which the insulated gate bipolar transistor 15 and the like are mounted is faced to the side of the second lead frame 25 on which the brake circuit components 34 are mounted. The bent connection lead 39a is joined to the first lead frame 3 with solder 41. As a result, the second lead frame 25 is held at a distance above the first lead frame 3 (in the Z-axis direction).

Next, the first lead frame 3 and the second lead frame 25 are sealed with resin by transfer molding. As shown in FIG. 19, the first lead frame 3 and the second lead frame 25 are placed on the lower mold 73. In this state, the distance between the second lead frame 25 (second lead terminal 27) and the upper mold 71 is set to distance L3. The distance between the aluminum block 77 and the upper mold 71 is set to distance L4. At this time, the positional relationship is set so that distance L3 is longer than distance L4.

Next, as shown in FIG. 20, the upper die 71 is lowered. When the upper die 71 is lowered, it first comes into contact with the aluminum block 77. Then, while in contact with the aluminum block 77, the upper die 71 is lowered while pressing down the aluminum block 77 until it comes into contact with the lower die 73.

When the aluminum block 77 is pressed down, it receives a repulsive force (elastic force) from the second lead frame 25 (connection lead 39a) and is urged toward the upper die 71 (see arrow).

Next, in this state, the cavity (not shown) formed by the lower mold 73 and the upper mold 71 is filled with resin (not shown), thereby sealing the first lead frame 3 and the second lead frame 25 with resin. At this time, the aluminum block 77 is biased toward the upper mold 71, which prevents the resin from flowing between the aluminum block 77 and the upper mold 71.

Next, the sealing body 51 in which the first lead frame 3 and the second lead frame 25 are sealed with resin is removed from the lower mold 73 and the upper mold 71. Thereafter, lead forming is performed in the same manner as in the steps shown in Figures 14 to 16, thereby completing the power semiconductor device 1 shown in Figure 17.

In the above-described power semiconductor device 1, as described for the power semiconductor device according to the first embodiment, the insulation resistance can be ensured while contributing to miniaturization of the power semiconductor device 1 in which the first lead frame 3 and the second lead frame 25 are stacked.

Furthermore, in the power semiconductor device 1 described above, when the first lead frame 3 and the second lead frame 25 are sealed with resin by transfer molding, it is possible to prevent the resin from flowing between the aluminum block 77 and the upper mold 71. This makes it possible to prevent the resin from adhering to the surface of the aluminum block 77 exposed to the second main surface portion 51d of the sealing body 51. As a result, the heat generated within the sealing body 51 can be stably dissipated from the aluminum block 77.

To prevent resin from adhering to the surface of the aluminum block 77, it is desirable that the thickness of the aluminum block 77 is thicker than the thickness of the second lead frame 25. Generally, unevenness may be formed on the lead frame due to the influence of the process of mounting electronic components or the process of connecting wires, etc. If unevenness is formed on the lead frame and the aluminum block is thin, it is expected that unevenness reflecting the shape (unevenness) of the lead frame will be formed on the aluminum block.

When an aluminum block has irregularities formed therein, resin may flow into the gap between the aluminum block and the upper die, resulting in the resin adhering to the surface of the aluminum block. Therefore, even if irregularities are formed in the second lead frame 25, it is desirable that the thickness of the aluminum block 77 be thicker than the thickness of the second lead frame 25 so that the shape of the irregularities is not reflected in the aluminum block 77.

Next, an example of the power semiconductor device 1 with the aluminum block 77 exposed mounted on an external substrate 65 will be described. As shown in FIG. 21, the external substrate 65 is made of, for example, glass epoxy. A plurality of through holes 65a are formed in the external substrate 65. A metal plate 67 made of gold-plated copper is embedded in the external substrate 65.

The first lead terminals 5 and the second lead terminals 27 each protruding from the sealing body 51 are inserted into the corresponding through holes 65a and joined by solder. The aluminum block 77 exposed on the second main surface 51d of the sealing body 51 is in contact with the metal plate 67 with grease 69 interposed therebetween. The heat sink 61 is fixed to the copper plate 11 exposed on the first main surface 51c of the sealing body 51 with grease 63 interposed therebetween.

In the power semiconductor device 1 mounted on the external substrate 65 described above, the aluminum block 77 exposed on the second main surface 51d of the sealing body 51 is in contact with the metal plate 67 via grease 69. This allows the heat generated in the brake circuit components 34 mounted on the second lead frame 25 to be dissipated to the metal plate 67. As a result, the temperature rise of the brake circuit components 34 can be suppressed.

The heat sink 61 is fixed to the copper plate 11 exposed on the first main surface 51c of the sealing body 51 with grease 63 interposed therebetween. This allows the heat generated in the insulated gate bipolar transistors 15 and the like mounted on the first lead frame 3 to be dissipated to the heat sink 61. As a result, the temperature rise of the insulated gate bipolar transistors 15 and the like can be suppressed.

In addition, wide band gap semiconductor materials may be used as the semiconductor materials of the insulated gate bipolar transistors 15 mounted on the first lead frame 3 and the brake circuit components 34 mounted on the second lead frame 25. For example, silicon carbide (SiC) is a suitable wide band gap semiconductor material.

Electronic components such as insulated gate bipolar transistors 15 made of wide band gap semiconductor materials have a higher current capacity than those made of silicon. They also have high heat resistance and can operate at high temperatures. Furthermore, power loss is reduced. Furthermore, the withstand voltage is improved.

As a result, electronic components made of wide band gap semiconductor materials can function more efficiently as electronic components. Furthermore, electronic components made of wide band gap semiconductor materials can be made smaller than electronic components made of silicon if they have the same functionality as electronic components made of silicon, which can contribute to the miniaturization of power semiconductor devices.

Furthermore, electronic components made of wide band gap semiconductor materials can handle even larger currents if they are about the same size as electronic components made of silicon. In addition, their high heat resistance allows for high temperature operation, which contributes to the miniaturization of the heat sink 61 (heat dissipation fins). In addition to air cooling, water cooling is also possible, allowing for the miniaturization and high current of equipment including the power semiconductor device 1 mounted on the external substrate 65.

Embodiment 3.
Here, an example of a power semiconductor device including a third lead frame in addition to a first lead frame and a second lead frame will be described.

As shown in Figures 22 and 23, the third lead frame 43 is disposed between the first lead frame 3 and the second lead frame 25, which are disposed to face each other at a distance in the Z-axis direction. The sealing body 51 includes a third sealing body portion 57 that seals the third lead frame 43. The third sealing body portion 57 is located between the first sealing body portion 53 and the second sealing body portion 55.

The first side surface portion 51a of the sealing body 51 includes the first side surface portion first portion 52a and the first side surface portion second portion 52b, as well as the first side surface portion third portion 52c. The first side surface portion third portion 52c is located on the side where the second side surface portion 51b is located relative to the first side surface portion first portion 52a. The first side surface portion third portion 52c is located on the opposite side to the side where the second side surface portion 51b is located relative to the first side surface portion second portion 52b. The third sealing body portion 57 has the first side surface portion third portion 52c.

The third lead frame 43 has a plurality of third lead terminals 45. The plurality of third lead terminals 45 are arranged at a distance from each other in the Y-axis direction. The plurality of third lead terminals 45 include a plurality of third lead terminals 45 protruding from the first side portion third portion 52c of the third sealing body portion 57.

The third lead terminal 45 has a third root portion 47 and a third tip portion 49. The third root portions 47 of the multiple third lead terminals 45 protruding from the first side portion third portion 52c protrude from the first side portion third portion 52c in the positive direction of the X-axis. The third tip portion 49 is bent from the third root portion 47 in the positive direction of the Z-axis.

The multiple third lead terminals 45 protruding from the first side surface portion third portion 52c are located at positions spaced apart in the X-axis direction from the multiple second lead terminals 27 protruding from the first side surface portion second portion 52b, and are also located at positions spaced apart in the Z-axis direction from the multiple second lead terminals 27 protruding from the first side surface portion second portion 52b.

In a plan view of the sealing body 51 (power semiconductor device 1) seen from the Z-axis direction (from the positive side to the negative side), the multiple first lead terminals 5, the multiple second lead terminals 27, and the multiple third lead terminals 45 are arranged so as not to overlap one another.

A second cutout 60 is formed in the first side surface portion 51a of the sealing body 51, where the first side surface portion first portion 52a is recessed to the position of the first side surface portion third portion 52c. In a plan view of the sealing body 51 seen from the Z-axis direction (from the positive side to the negative side), the second cutout 60 is formed at a position overlapping the third lead terminal 45.

The first lead frame 3 is equipped with, for example, an insulated gate bipolar transistor (not shown). The second lead frame 25 is equipped with, for example, a brake circuit component (not shown). The third lead frame 43 is equipped with, for example, a control IC (not shown).

Other than this, the configuration is the same as that of the power semiconductor device shown in Figures 1 to 3, etc., so the same components are given the same reference numerals and their descriptions will not be repeated unless necessary.

The power semiconductor device 1 described above has a third lead frame 43 in addition to the first lead frame 3 and the second lead frame 25. This allows the number of electronic components etc. sealed in the sealing body 51 to be increased, contributing to the high functionality of the power semiconductor device 1.

The first side surface portion 51a includes the first side surface portion first portion 52a and the first side surface portion second portion 52b, as well as the first side surface portion third portion 52c. The first side surface portion third portion 52c is located on the side where the second side surface portion 51b is located relative to the first side surface portion first portion 52a. The first side surface portion third portion 52c is located on the opposite side to the side where the second side surface portion 51b is located relative to the first side surface portion second portion 52b. The third sealing body portion 57 has the first side surface portion third portion 52c.

The multiple third lead terminals 45 protruding from the first side surface portion third portion 52c are located at positions spaced apart in the X-axis direction from the multiple second lead terminals 27 protruding from the first side surface portion second portion 52b, and are also located at positions spaced apart in the Z-axis direction from the multiple second lead terminals 27 protruding from the first side surface portion second portion 52b.

This eliminates the need to make the side surface thicker than in the case of a power semiconductor device in which the lead terminals of multiple stacked lead frames are positioned at the same height on the side surface of the package.

The first side surface portion first portion 52a from which the first lead terminal 5 protrudes is located away from the first side surface portion third portion 52c from which the third lead terminal 45 protrudes, on the opposite side from the side on which the second side surface portion 51b is located. In other words, the first sealing body portion 53 is located on the negative Z-axis direction side of the third lead terminal 45 (third root portion 47).

This ensures a creepage distance (insulation distance) between the multiple first lead terminals 5 protruding from the first side portion first part 52a and the multiple third lead terminals 45 protruding from the first side portion third part 52c without increasing the thickness (Z-axis direction) of the sealing body. As a result, it is possible to contribute to miniaturization of the power semiconductor device 1 including the third lead frame 43 while ensuring insulation resistance.

Furthermore, by forming the second notch 60 in addition to the first notch 59, the first lead terminal 5, the second lead terminal 27, and the third lead terminal 45 can be bent simultaneously by a processing blade in the lead forming process, as described in the first embodiment.

In addition, in the above-mentioned power semiconductor device 1, a fourth lead frame or the like may be further stacked as necessary. In such a power semiconductor device, it is possible to contribute to miniaturization of the power semiconductor device while achieving further high functionality.

In addition, in the power semiconductor device 1 according to each embodiment, a structure in which the first cutout portion 59 and the like are formed in the sealing body 51 has been described as an example. From the viewpoint of improving the functionality of the power semiconductor device while ensuring insulation resistance, the power semiconductor device 1 may not have the first cutout portion formed, as shown in FIG. 24. In this case, the sealing body is formed, for example, by injection molding in which the mold is also driven laterally.

Embodiment 4.
Here, a power conversion device will be described that applies the power semiconductor device described in the above-mentioned embodiments 1 to 3. Although the present disclosure is not limited to a specific power conversion device, the following will describe a case where the present disclosure is applied to a three-phase inverter as embodiment 4.

Figure 25 is a block diagram showing the configuration of a power conversion system to which the power conversion device according to this embodiment is applied. The power conversion system shown in Figure 25 is composed of a power source 100, a power conversion device 200, and a load 300. The power source 100 is a DC power source and supplies DC power to the power conversion device 200. The power source 100 can be composed of various things, for example, a DC system, a solar cell, or a storage battery. It may also be composed of a rectifier circuit or an AC/DC converter connected to an AC system. The power source 100 may also be composed of a DC/DC converter that converts the DC power output from the DC system into a predetermined power.

The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300, converts DC power supplied from the power source 100 into AC power, and supplies the AC power to the load 300. As shown in FIG. 25, the power conversion device 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal to the main conversion circuit 201 to control the main conversion circuit 201.

The load 300 is a three-phase motor driven by AC power supplied from the power conversion device 200. Note that the load 300 is not limited to a specific use, but is a motor mounted on various electrical devices, and is used, for example, as a motor for a hybrid vehicle, an electric vehicle, a railroad car, an elevator, or an air conditioning device.

The power conversion device 200 will be described in detail below. The main conversion circuit 201 includes a switching element and a freewheeling diode (not shown). When the switching element switches, the DC power supplied from the power source 100 is converted into AC power and supplied to the load 300. There are various specific circuit configurations for the main conversion circuit 201, but the main conversion circuit 201 in this embodiment is a two-level three-phase full bridge circuit, and can be configured from six switching elements and six freewheeling diodes connected in inverse parallel to each switching element.

At least one of the switching elements and free wheel diodes of the main conversion circuit 201 is a switching element or free wheel diode of the semiconductor device 202 corresponding to the power semiconductor device 1 according to at least one of the above-mentioned embodiments 1 to 3. The six switching elements form upper and lower arms in which two switching elements are connected in series, and each upper and lower arm forms each phase (U phase, V phase, W phase) of the full bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.

The main conversion circuit 201 also includes a drive circuit (not shown) for driving each switching element, but the drive circuit may be built into the semiconductor device 202, or may be configured to include a drive circuit separate from the semiconductor device 202. The drive circuit generates a drive signal for driving the switching element of the main conversion circuit 201 and supplies it to the control electrode of the switching element of the main conversion circuit 201. Specifically, in accordance with a control signal from the control circuit 203 described later, a drive signal for turning the switching element on and a drive signal for turning the switching element off are output to the control electrode of each switching element. When the switching element is maintained in the on state, the drive signal is a voltage signal (on signal) equal to or higher than the threshold voltage of the switching element, and when the switching element is maintained in the off state, the drive signal is a voltage signal (off signal) equal to or lower than the threshold voltage of the switching element.

The control circuit 203 controls the switching elements of the main conversion circuit 201 so that the desired power is supplied to the load 300. Specifically, the time (on time) that each switching element of the main conversion circuit 201 should be in the on state is calculated based on the power to be supplied to the load 300. For example, the main conversion circuit 201 can be controlled by PWM control that modulates the on time of the switching elements according to the voltage to be output. Then, a control command (control signal) is output to the drive circuit provided in the main conversion circuit 201 so that an on signal is output to the switching element that should be in the on state at each point in time, and an off signal is output to the switching element that should be in the off state. The drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switching element according to this control signal.

In the power conversion device according to this embodiment, the power semiconductor device according to embodiments 1 to 3 is applied as the semiconductor device 202 constituting the main conversion circuit 201, so it is possible to improve the functionality and reduce the size of the power semiconductor device while ensuring insulation resistance. As a result, it is possible to contribute to improving the functionality and reducing the size of the power conversion device.

In the present embodiment, an example of applying the present disclosure to a two-level three-phase inverter has been described, but the present disclosure is not limited to this and can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device is used, but a three-level or multi-level power conversion device may also be used, and when supplying power to a single-phase load, the present disclosure may be applied to a single-phase inverter. In addition, when supplying power to a DC load, etc., the present disclosure can also be applied to a DC/DC converter or an AC/DC converter.

In addition, the power conversion device to which the present disclosure is applied is not limited to the case where the load described above is an electric motor, but can also be used, for example, as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system, and can also be used as a power conditioner for a solar power generation system or a power storage system, etc.

The power semiconductor devices described in each embodiment can be combined in various ways as needed.

The embodiments disclosed herein are illustrative and are not intended to be limiting. The scope of the present disclosure is defined by the claims, not by the scope described above, and is intended to include all modifications within the meaning and scope of the claims.

This disclosure can be effectively used in power semiconductor devices in which multiple stacked lead frames are sealed with a sealant.

1 Power semiconductor device, 3 First lead frame, 5 First lead terminal, 7 First root portion, 9 First tip portion, 11 Copper plate, 13 First adhesive resin, 15 Insulated gate bipolar transistor, 17 Free wheel diode, 19 Rectifier diode, 21, 22 Lead-free solder, 23, 24 Aluminum wire, 25 Second lead frame, 27 Second lead terminal, 29 Second root portion, 31 Second tip portion, 33 Control IC, 34 Brake circuit component, 35 Silver paste, 37 Gold wire, 39 Connection member, 39a Lead, 39b Leaf spring, 39c Wire, 41 Solder, 43 Third lead frame, 45 Third lead terminal, 47 Third root portion, 49 Third tip portion, 51 Sealing body, 51a First side portion, 51b Second side portion, 51c First main surface portion, 51d Second main surface portion, 52a, first side portion first portion, 52b, first side portion second portion, 52c, second side portion third portion, 53, first sealing body portion, 55, second sealing body portion, 57, third sealing body portion, 59, first notch portion, 60, second notch portion, 61, heat sink, 63, grease, 65, external board, 65a, through hole, 67, metal plate, 69, grease, 71, upper die, 73, lower die, 75, convex portion, 77, aluminum block, 79, second adhesive resin, 81, upper die, 83, lower die, 85, 85a, 85b, processing blade, 100, power source, 200, power conversion device, 201, main conversion circuit, 202, semiconductor module, 203, control circuit, 300, load.

Claims (17)

a first lead frame carrying a first semiconductor element and including a plurality of first lead terminals;
a second lead frame that is disposed to face the first lead frame at a distance in a first direction and is electrically connected to the first lead frame, the second lead frame having a second semiconductor element mounted thereon and including a plurality of second lead terminals;
a sealing body that seals the first lead frame and the second lead frame in a manner that causes the first lead terminals and the second lead terminals to protrude,
The sealing body is
a first side portion and a second side portion that are disposed to face each other at a distance in a second direction intersecting the first direction and that extend in a third direction intersecting the first direction and the second direction;
a first main surface portion and a second main surface portion that are disposed to face each other at a distance in the first direction and are formed from the first side surface portion to the second side surface portion,
the first side surface portion of the sealing body includes a first side surface portion first part and a first side surface portion second part,
the first side surface portion first portion is located on the side where the first main surface portion is located,
the first side surface portion second portion is located on the side where the second main surface portion is located,
the first side surface portion first portion is located at a distance from the first side surface portion second portion on a side opposite to a side on which the second side surface portion is located,
the first lead terminals include the first lead terminals protruding from the first portion of the first side surface portion,
the second lead terminals include the second lead terminals protruding from the first side surface portion second portion,
A power semiconductor device, wherein the first lead terminal protruding from the first portion of the first side surface and the second lead terminal protruding from the second portion of the first side surface are positioned at a distance in the second direction. a first cutout portion is formed in the first side surface portion of the sealing body, the first portion being recessed to a position of the second portion of the first side surface portion;
In a plan view of the sealing body seen from the first direction,
the first lead terminal protruding from the first portion of the first side surface portion and the second lead terminal protruding from the second portion of the first side surface portion are arranged so as not to overlap with each other;
2. The power semiconductor device according to claim 1, wherein said first cutout portion is formed at a position overlapping said second lead terminal. The power semiconductor device according to claim 1 or 2, comprising a connection member that electrically connects the first lead frame and the second lead frame. The power semiconductor device according to claim 3, wherein the connection member includes a connection lead arranged in a bent manner between the first lead frame and the second lead frame. The power semiconductor device according to claim 3, wherein the connecting member includes a leaf spring. The power semiconductor device according to claim 3, wherein the connection member includes a metal wire. The power semiconductor device according to any one of claims 1 to 6, wherein a first metal plate is disposed on the side of the first lead frame opposite the side on which the first semiconductor element is mounted, via a first bonding material. a side of the first lead frame on which the first semiconductor element is mounted and a side of the second lead frame on which the second semiconductor element is mounted face each other;
A power semiconductor device according to any one of claims 1 to 6, wherein a second metal plate is arranged on the second lead frame on the side opposite to the side on which the second semiconductor element is mounted, via a second bonding material. a third lead frame disposed between the first lead frame and the second lead frame spaced apart in the first direction, the third lead frame including a plurality of third lead terminals;
the first side surface portion of the sealing body includes a first side surface portion third portion located on a side where the second side surface portion is located with respect to the first side surface portion first portion and located on an opposite side to the side where the second side surface portion is located with respect to the first side surface portion second portion,
the third lead terminals include the third lead terminals protruding from a third portion of the first side surface portion,
the third lead terminal protruding from the first side surface portion third portion, the first lead terminal protruding from the first side surface portion first portion, and the second lead terminal protruding from the first side surface portion second portion are arranged so as not to overlap with one another in a plan view of the sealing body seen from the first direction,
A power semiconductor device as described in any one of claims 1 to 8, wherein the third lead terminal protruding from the first side portion third portion, the first lead terminal protruding from the first side portion first portion, and the second lead terminal protruding from the first side portion second portion are each positioned at a distance in the second direction. a second cutout portion is formed in the first side surface portion of the sealing body, the second cutout portion being formed by receding the first portion of the first side surface portion to a position of the third portion of the first side surface portion;
10. The power semiconductor device according to claim 9, wherein the second cutout portion is formed at a position overlapping with the third lead terminal in a plan view of the sealing body seen from the first direction. the first semiconductor device includes a power semiconductor device,
11. The power semiconductor device according to claim 1, wherein the power semiconductor element is made of a wide band gap semiconductor material. The power semiconductor device according to claim 11, wherein the wide band gap semiconductor material is any material selected from silicon carbide, gallium nitride, and diamond. preparing a first lead frame including a plurality of first lead terminals and a second lead frame including a plurality of second lead terminals;
mounting a first semiconductor element on the first lead frame and a second semiconductor element on the second lead frame;
disposing the second lead frame opposite to and spaced apart from the first lead frame in a first direction;
Providing a mold;
placing the first lead frame and the second lead frame, opposed to each other and spaced apart in the first direction, in the molding die;
forming a sealing body that seals the first lead frame and the second lead frame in such a manner that the first lead terminals and the second lead terminals are each protruded by filling the molding die with a molding resin;
removing the encapsulated body from the molding die;
bending the first lead terminals and the second lead terminals protruding from the sealing body in the first direction,
In the step of forming the sealing body,
a first side portion and a second side portion arranged to face each other at a distance in a second direction intersecting the first direction and extending in a third direction intersecting the first direction and the second direction;
a first main surface portion and a second main surface portion are disposed to face each other at a distance in the first direction and positioned from the first side surface portion to the second side surface portion,
The first side surface portion is
a first side surface portion first part located on the side where the first main surface portion is located;
a first side surface portion second portion located on the side where the second main surface portion is located;
the first side surface portion first portion is formed to be located at a distance from the first side surface portion second portion on a side opposite to a side on which the second side surface portion is located,
the first lead terminals protruding from the sealing body are formed to include the first lead terminal protruding from the first portion of the first side surface portion,
the second lead terminals protruding from the sealing body are formed to include the second lead terminal protruding from the first side surface portion second portion,
A method for manufacturing a power semiconductor device, wherein in the process of bending the multiple first lead terminals and the multiple second lead terminals protruding from the sealing body toward the first direction, the first lead terminals protruding from the first part of the first side surface portion and the second lead terminals protruding from the second part of the first side surface portion are bent so as to be positioned at a distance from each other in the second direction. In the step of arranging the second lead frame so as to face the first lead frame at a distance in the first direction, the first lead terminals and the second lead terminals are arranged so as not to overlap each other in a plan view seen from the third direction,
The step of preparing the mold includes:
a lower die including a convex portion protruding from a portion of the sealing body that will form the first side surface portion first portion from which the first lead terminal protrudes toward a portion of the sealing body that will form the first side surface portion second portion from which the second lead terminal protrudes;
preparing an upper die facing the lower die,
In the step of forming the sealing body, a first cutout portion is formed in the first side surface portion of the sealing body by the protrusion, the first cutout portion being recessed from a position of the first side surface portion first part to a position of the first side surface portion second part,
In the step of bending the first lead terminals and the second lead terminals protruding from the sealing body in the first direction,
a first processing blade for bending the first lead terminal;
a second processing blade for processing the second lead terminal is provided;
the first processing blade includes a first processing blade configured to bend the first lead terminal protruding from the first portion of the first side surface portion,
the second processing blade includes a second processing blade that bends the second lead terminal protruding from the first side surface portion second part,
the second processing blade that bends the second lead terminal protruding from the first side surface portion second part is disposed in the first cutout portion,
14. The method for manufacturing a power semiconductor device according to claim 13, wherein the first lead terminal and the second lead terminal are bent by moving the first processing blade arranged in the first cutout portion together with the second processing blade in the third direction. In the step of disposing the second lead frame so as to face the first lead frame at a distance in the first direction, a connection lead is attached to electrically connect the first lead frame and the second lead frame,
15. A method for manufacturing a power semiconductor device as described in claim 14, wherein in the process of placing the first lead frame and the second lead frame, which face each other at a distance in the first direction, in the molding die, the upper die presses the second lead frame from above, thereby deforming the connection leads. The step of disposing the second lead frame so as to face the first lead frame at a distance in the first direction includes:
a step of arranging the first lead frame and the second lead frame such that a side of the first lead frame on which the first semiconductor element is mounted faces a side of the second lead frame on which the second semiconductor element is mounted;
and arranging a metal plate on the second lead frame on a side opposite to a side on which the second semiconductor element is mounted,
16. The method for manufacturing a power semiconductor device as described in claim 15, wherein in the process of placing the first lead frame and the second lead frame, which face each other at a distance in the first direction, in the molding die, the upper die is brought into contact with the metal plate before the second lead frame. A main conversion circuit having the power semiconductor device according to any one of claims 1 to 12, which converts input power and outputs the converted power;
a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

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