JP7536686B2 - Wiring Board - Google Patents

Description

The present invention relates to a wiring board.

For example, in a conventional wiring board as described in Patent Document 1, the signal wiring (signal conductor) that transmits electrical signals between the electronic component and the wiring board is connected to a signal pad, which is one of the pads that electrically connects the electronic component and the wiring board, via a signal via hole conductor located directly below the signal pad.

As the semiconductor elements mounted on wiring boards become larger and more multifunctional, there are wiring boards in which the signal connection pads are located from the periphery (outside) of a group of connection pads arranged in a grid pattern in the mounting area to an area close to the center.

Japanese Patent Application Publication No. 10-335532

In such wiring boards, some of the signal connection pads located near the center of the mounting area overlap with the power supply conductor layer located below the mounting area in the inner layer of the wiring board in a planar perspective view. In this case, a via land connected to the signal connection pad through a via hole conductor on the same axis as the signal connection pad, and a pull-out wiring with one end connected to the via land and the other end connected to a via land outside the mounting area, may cross the power supply conductor layer. This may obstruct the charge supply path and reduce the performance of the semiconductor element.

The objective of this disclosure is to provide a wiring board that does not degrade the performance of the semiconductor elements mounted on it.

The wiring board according to the present disclosure includes a core insulating layer having a plurality of through-hole conductors, and a laminate located on the core insulating layer and having a mounting area on its upper surface. The laminate has a conductor layer and a build-up insulating layer having a plurality of via hole conductors alternately located. The conductor layer has a connection pad located in the mounting area, a via land connected to the connection pad via a via hole conductor, a lead-out wiring having two ends, one end connected to the via land in the mounting area and the other end connected to a via land outside the mounting area, a plane conductor located above and below the lead-out wiring via the build-up insulating layer, and a power supply conductor layer located in the mounting area in planar perspective on the bottom build-up insulating layer in contact with the core insulating layer. The connection pad has a first signal connection pad located in an area that does not overlap the power supply conductor layer in planar perspective, and a second signal connection pad located in an area that overlaps the power supply conductor layer. The via land has a first via land connected coaxially to the first signal connection pad and a second via land connected coaxially to the second signal connection pad in planar perspective. The laminate has a relay wiring-containing layer that connects the second via land and a relay via land that is located outside the area that overlaps with the power supply conductor layer in a planar perspective with a relay wiring.

The wiring board disclosed herein does not degrade the performance of the semiconductor element mounted on it.

1 is a cross-sectional view showing a portion of a wiring board according to a first embodiment of the present disclosure. 2 is an explanatory diagram showing a plan view of a conductor layer located at the top layer in a part of the wiring board shown in FIG. 1 ; 2 is an explanatory diagram showing a plan view of a conductor layer located one layer inward from a conductor layer located in a top layer in a part of the wiring board shown in FIG. 1 . FIG. 2 is an explanatory diagram showing a plan view of a conductor layer located two layers inside a conductor layer located in a top layer in a part of the wiring board shown in FIG. 1 ; FIG. 2 is an explanatory diagram showing a plan view of a conductor layer located three layers inside the uppermost conductor layer in a part of the wiring board shown in FIG. 1 ; FIG. 2 is an explanatory diagram showing a plan view of a conductor layer located four layers inside a conductor layer located in a top layer in a part of the wiring board shown in FIG. 1 ; FIG. 2 is an explanatory diagram showing a plan view of a conductor layer located five layers inside the uppermost conductor layer in a part of the wiring board shown in FIG. 1 ; 2 is an explanatory diagram showing a plan view of a conductor layer (a conductor layer located on the upper surface of a core insulating layer) located six layers inside the uppermost conductor layer in a portion of the wiring board shown in FIG. 1 . FIG. 13 is an explanatory diagram showing a plan view of a conductor layer located one layer inward from a conductor layer located in the uppermost layer in a part of a wiring board according to a second embodiment of the present disclosure. FIG. 13 is an explanatory diagram showing a plan view of a conductor layer located two layers inward from a topmost conductor layer in a portion of a wiring board according to a second embodiment of the present disclosure. FIG. 13 is an explanatory diagram showing a plan view of a conductor layer located three layers inward from the uppermost conductor layer in a portion of a wiring board according to a second embodiment of the present disclosure. FIG. 13 is an explanatory diagram showing a plan view of a conductor layer located four layers inward from the uppermost conductor layer in a portion of a wiring board according to a second embodiment of the present disclosure. FIG. 13 is an explanatory diagram showing a plan view of a conductor layer located at the top layer in a part of a wiring board according to a third embodiment of the present disclosure. FIG. 13 is an explanatory diagram showing a plan view of a conductor layer located one layer inward from a conductor layer located in the uppermost layer in a part of a wiring board according to a third embodiment of the present disclosure. FIG. 13 is an explanatory diagram showing a plan view of a conductor layer located two layers inward from the uppermost conductor layer in a portion of a wiring board according to a third embodiment of the present disclosure. FIG. 13 is an explanatory diagram showing a plan view of a conductor layer located three layers inward from the uppermost conductor layer in a portion of a wiring board according to a third embodiment of the present disclosure. FIG.

A wiring board according to a first embodiment of the present disclosure will be described with reference to Figures 1 to 8. Figure 1 is an explanatory diagram showing the right half of a cross section of a wiring board 1 according to a first embodiment of the present disclosure. The wiring board 1 according to the first embodiment includes a core insulating layer 2, a laminate 3, and a solder resist 6.

The core insulating layer 2 is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. Two or more of these resins may be mixed for use. There is no particular limit to the thickness of the core insulating layer 2, and it is, for example, 200 μm or more and 800 μm or less.

The core insulating layer 2 may contain a reinforcing material. Examples of reinforcing materials include insulating cloth materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Two or more types of reinforcing materials may be used in combination. Furthermore, the core insulating layer 2 may contain inorganic insulating fillers dispersed therein, such as silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide.

The core insulating layer 2 has a through-hole conductor 21 to electrically connect the upper and lower surfaces of the core insulating layer 2. The through-hole conductor 21 is located in a through-hole that penetrates the upper and lower surfaces of the core insulating layer 2. The through-hole conductor 21 is formed of a conductor made of metal plating such as copper plating. The through-hole conductor 21 is connected to the conductor layer 4 located on the upper and lower surfaces of the core insulating layer 2. The through-hole conductor 21 may be located only on the inner wall surface of the through-hole as shown in FIG. 1, or may be filled in the through-hole.

The through-hole conductors 21 include ground through-hole conductors 21a, power through-hole conductors 21b, and signal through-hole conductors 21c, depending on the conductor layer 4 to which they are connected. That is, the ground through-hole conductors 21a are connected to the ground conductor layer 4a, which will be described later, the power through-hole conductors 21b are connected to the power conductor layer 4b, which will be described later, and the signal through-hole conductors 21c are connected to the signal conductor layer 4c, which will be described later. Because the through-hole conductors 21 are located in the thick core insulating layer 2, they often have a higher electrical resistance than the via-hole conductors 41, which will be described later. For this reason, the number of power through-hole conductors 21b, which function as a charge supply path in particular, may be increased.

The laminate 3 is located on the upper and lower surfaces of the core insulating layer 2. The laminate 3 has a structure in which conductor layers 4 and build-up insulating layers 5 are alternately laminated. The laminate 3 includes a mounting area X for mounting electronic components on its upper surface. The upper surface of the laminate 3 on which the mounting area X is located refers to the surface farther from the core insulating layer 2. The conductor layer 4 included in the laminate 3 is formed of a conductor made of, for example, copper foil or copper plating. The thickness of the conductor layer 4 is not particularly limited and is, for example, 5 μm or more and 25 μm or less. The conductor layer 4 includes a ground conductor layer 4a, a power conductor layer 4b, and a signal conductor layer 4c.

The ground conductor layer 4a functions to match the impedance of the signal conductor layer 4c and to reduce noise interference with the signal conductor layer 4c.

The power supply conductor layer 4b functions as a charge supply path. For this reason, it is advantageous to place the power supply conductor layer 4b directly under and around the mounting area X close to the electronic components, as this reduces electrical resistance. Therefore, it is also advantageous from the standpoint of charge supply to place the power supply through-hole conductor 21b connected to the power supply conductor layer 4b directly under and around the mounting area X.

The signal conductor layer 4c has the function of transmitting signals. The signal conductor layer 4c is adjusted to match the impedance value as much as possible across the entire wiring board 1. This makes it possible to reduce loss when a signal is transmitted through the signal conductor layer 4c.

The build-up insulating layer 5 included in the laminate 3 is not particularly limited as long as it is made of an insulating material, like the core insulating layer 2. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. Two or more of these resins may be mixed together. When two or more build-up insulating layers 5 are present in the laminate 3, the respective build-up insulating layers 5 may be formed of the same resin or different resins. The build-up insulating layer 5 and the core insulating layer 2 included in the laminate 3 may be formed of the same resin or different resins.

Furthermore, the build-up insulating layer 5 contained in the laminate 3 may have inorganic insulating fillers dispersed therein, such as silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. The thickness of the build-up insulating layer 5 contained in the laminate 3 is not particularly limited, and is, for example, 20 μm or more and 40 μm or less. When the laminate 3 has two or more build-up insulating layers 5, the build-up insulating layers 5 may have the same thickness or different thicknesses.

The build-up insulating layer 5 included in the laminate 3 has a via hole conductor 41 for electrically connecting between layers. The via hole conductor 41 is located in a via hole that penetrates the upper and lower surfaces of the build-up insulating layer 5 included in the laminate 3. The via hole conductor 41 is formed of a conductor made of metal plating such as copper plating. The via hole conductor 41 is connected to the conductor layer 4 located on the upper and lower surfaces of the build-up insulating layer 5 included in the laminate 3. The via hole conductor 41 may be filled in the via hole as shown in FIG. 1, or may be located only on the inner wall surface of the via hole.

The via-hole conductors 41 include ground via-hole conductors 41a, power via-hole conductors 41b, and signal via-hole conductors 41c, depending on the conductor layer 4 to which they are connected. That is, the ground via-hole conductors 41a are connected to the ground conductor layer 4a, the power via-hole conductors 41b are connected to the power conductor layer 4b, and the signal via-hole conductors 41c are connected to the signal conductor layer 4c.

Solder resist 6 is located on a portion of both surfaces of wiring board 1 according to the first embodiment. Solder resist 6 is formed, for example, from acrylic modified epoxy resin. Solder resist 6 has the function of protecting conductor layer 4 from heat, for example, when mounting electronic components in mounting area X.

In the wiring board 1 according to the first embodiment, the signal conductor layer 4c, which transmits electrical signals between electronic components (not shown) and the wiring board 1, includes a first outgoing wiring 44 and a second outgoing wiring 45, which are positioned on the upper and lower surfaces thereof so as to face the ground conductor layer 4a or the power conductor layer 4b via the build-up insulating layer 5. In other words, the first outgoing wiring 44 and the second outgoing wiring 45 and the ground conductor layer 4a or the power conductor layer 4b have a strip line structure.

The stripline structure is a structure in which a ground conductor layer 4a or a power conductor layer 4b is positioned to face both the top and bottom surfaces of a signal conductor layer 4c via a build-up insulating layer 5. This structure is adopted to match the impedance of the signal conductor layer 4c. It is also advisable to adopt a stripline structure to prevent noise from being introduced.

In the wiring board 1 according to the first embodiment, in the mounting area X where the electronic components are mounted, connection pads 42, which are part of the conductor layer 4 located on the outermost layer of the laminate 3, are located. The connection pads 42 are used to electrically connect the electronic components to the wiring board 1. The connection pads 42 include a ground connection pad 42a, a power supply connection pad 42b, and a signal connection pad (a first signal connection pad 42c1 and a second signal connection pad 42c2) according to the conductor layer 4 to be connected. That is, the ground connection pad 42a is connected to the ground conductor layer 4a, the power supply connection pad 42b is connected to the power supply conductor layer 4b, and the first signal connection pad 42c1 and the second signal connection pad 42c2 are connected to the signal conductor layer 4c.

In this specification, the first signal connection pad 42c1 refers to the signal connection pad 42c located in an area that does not overlap the power supply conductor layer 4b in a planar perspective. The second signal connection pad 42c2 refers to the signal connection pad 42c located in an area that overlaps the power supply conductor layer 4b in a planar perspective.

The conductor layer 4 will now be described in detail with reference to Figures 2 to 8. Figure 2 is an explanatory diagram showing a plan view of the conductor layer 4 located on the top layer of a portion of the wiring board 1 according to the first embodiment. Figure 2 is a plan view showing one of the four cross-shaped divisions of the mounting area X and its vicinity. The same applies to Figures 3 to 8 described below.

As shown in FIG. 2, in the mounting area X, the connection pads 42, namely the ground connection pad 42a, the power connection pad 42b, the first signal connection pad 42c1, and the second signal connection pad 42c2, are arranged in a grid pattern. The ground conductor layer 4a, which is part of the plane conductor layer 4p, is positioned so as to surround the connection pads 42. The grid pattern refers to a state in which multiple connection pads 42 are arranged vertically and horizontally at intervals from each other.

Of the connection pads 42 arranged in a grid pattern, the first signal connection pads 42c1 are located in at least two rows from the outermost side. On the inner side of the first signal connection pads 42c1, the power supply connection pads 42b and the ground connection pads 42a are located in at least one row from the first signal connection pads 42c1 side. On the inner side of the power supply connection pads 42b and the ground connection pads 42a, the second signal connection pads 42c2 are located in at least two rows from the power supply connection pads 42b and the ground connection pads 42a side.

FIG. 3 is an explanatory diagram showing a plan view of a conductor layer 4 located one layer inside the conductor layer 4 located in the topmost layer in a part of the wiring board 1 according to the first embodiment. A part of the conductor layer 4 located one layer inside the conductor layer 4 located in the topmost layer includes a via land 43. This via land 43 is connected to a connection pad 42 through a via hole conductor 41. Of these via lands 43, the first via land 431 is connected to a first signal connection pad 42c1 through a signal via hole conductor 41c. The second via land 432 is connected to a second signal connection pad 42c2 through a signal via hole conductor 41c.

The conductor layer 4 located one layer inward from the conductor layer 4 located in the top layer is a lead-out conductor layer that is part of the conductor layer 4 and includes multiple lead-out wirings with two ends. These multiple lead-out wirings are the first lead-out wirings 44 and function as the signal conductor layer 4c.

As shown in FIG. 3, one end of each of the first draw-out wirings 44 is connected to the first via land 431. The other end of each of the first draw-out wirings 44 is connected to a via hole conductor 41 (signal via hole conductor 41c) located outside the mounting area X.

The length of the portion of the first outgoing wiring 44 where the strip line structure cannot be adopted is not limited, and may be, for example, less than one-fourth the wavelength of the signal transmitted by the signal conductor layer 4c. By making the portion of the first outgoing wiring 44 where the strip line structure cannot be adopted have such a length, the effect on impedance matching in the signal conductor layer can be reduced. That is, although impedance adjustment is not performed by the ground conductor layer 4a in this portion of the first outgoing wiring 44, by making it less than the above length, the impedance mismatch between the first signal connection pad 42c1, the first outgoing wiring 44, the first via land 431, and the lower signal conductor layer 4c can be ignored. As a result, the signal can be transmitted without being affected by the first outgoing wiring 44.

Considering the wavelength of a typical signal transmitted through the signal conductor layer 4c, the length of the portion of the first outgoing wiring 44 where the strip line structure cannot be used is often, for example, about 1000 μm. Considering the spacing of the connection pads 42, the length of the portion of the first outgoing wiring 44 where the strip line structure cannot be used is often, for example, 250 μm or more. The length of the portion of the first outgoing wiring 44 where the strip line structure cannot be used can be measured, for example, by observation with a metallurgical microscope.

As described above, one end of each of the first outgoing wirings 44 is formed to be connected to the first via land 431. Therefore, as shown in FIG. 4, the second via land 432 and the via land 43 connected to the ground connection pad 42a or the power supply connection pad 42b (in FIG. 4, the via land 43 connected to the power supply connection pad 42b) remain in the conductor layer 4 located two layers inside from the conductor layer 4 located in the top layer.

Figure 5 is an explanatory diagram showing a plan view of a conductor layer 4 located three layers inside the conductor layer 4 located in the topmost layer in a part of the wiring board 1 according to the first embodiment. The conductor layer 4 located three layers inside the conductor layer 4 located in the topmost layer is a lead-out conductor layer that is part of the conductor layer 4 and includes multiple lead-out wirings with two ends. This lead-out wiring is the second lead-out wiring 45 and functions as the signal conductor layer 4c.

5, one end of each of the second draw-out wirings 45 is connected to the second via land 432. The via land 43 connected to the second draw-out wiring 45 may be the via land 43 located on the outermost side as shown in FIG. 5 among the via lands 43 included in the second via land 432, or may be a via land 43 located other than the outermost side, or may be a mixture of both the outermost and the other via lands 43. In order to ensure insulation by reducing the number of places where the second draw-out wiring 45 passes between closely spaced via lands 43, it is preferable that the via land 43 located on the outermost side among the via lands 43 included in the second via land 432 is connected to the second draw-out wiring 45 as shown in FIG. The other end of each of the second draw-out wirings 45 is connected to a via hole conductor 41 (signal via hole conductor 41c) located outside the mounting area X.

FIG. 6 is an explanatory diagram showing a plan view of the conductor layer 4 located four layers inside the conductor layer 4 located in the top layer in a part of the wiring board 1 according to the first embodiment. A relay via land 47 is located in the conductor layer 4 located four layers inside the conductor layer 4 located in the top layer. The relay via land 47 is located outside the area overlapping with the power supply conductor layer 4b, which is a part of the plane conductor layer 4p, in a planar perspective view. This relay via land 47 is connected to the via land 43 not connected to the second draw-out wiring 45 among the via lands 43 included in the second via land 432 through the relay wiring 46. The layer including this relay wiring 46 corresponds to the relay wiring holding layer. For example, as shown in FIG. 6, the relay wiring holding layer may connect the second via land 432 connected coaxially (below) to the connection pad 42 located in the innermost row of the second signal connection pads 42c2 and the relay via land 47 through the relay wiring 46. Connecting them in this way improves insulation reliability.

In this way, by including the intermediate via land 47 and the intermediate wiring 46, it is possible to prevent the signal conductor layer 4c (drawing wiring) from being present in the power conductor layer 4b, which is a part of the plane conductor layer 4p located in the area overlapping with the second signal connection pad 42c2 in a planar perspective view. Specifically, as shown in FIG. 7, in the conductor layer 4 (the conductor layer 4 located on the upper surface of the build-up insulation layer 5 of the lowest layer) located five layers inside from the conductor layer 4 located in the uppermost layer, the intermediate via land 47 located outside the area overlapping with the power conductor layer 4b, which is a part of the plane conductor layer 4p, is connected to the via hole conductor 41 (signal via hole conductor 41c) located outside the mounting area X through the signal conductor layer 4c. The intermediate via land 47 shown in FIG. 6 and the intermediate via land 47 shown in FIG. 7 are electrically connected through the via hole conductor.

As a result, the power supply conductor layer 4b, which is part of the plane conductor layer 4p, does not include a narrow area sandwiched between the signal conductor layer 4c (drawing wiring), and a charge supply path can be secured. This allows the semiconductor element to operate without degrading its performance. Figure 8 is an explanatory diagram showing a plan view of the conductor layer 4 (the conductor layer 4 located on the top surface of the core insulating layer 2) located six layers inside the conductor layer 4 located in the topmost layer.

Next, the wiring board according to the second embodiment will be described in detail with reference to Figures 9 to 12. In the wiring board according to the second embodiment, the same components as those in the wiring board 1 according to the first embodiment are given the same reference numerals, and detailed descriptions thereof will be omitted.

The wiring board according to the second embodiment includes relay wiring 46 and relay via land 47, like the wiring board 1 according to the first embodiment, but the layer in which the relay wiring 46 and relay via land 47 are located (relay wiring-containing layer) is different.

First, the conductor layer 4 located in the uppermost layer is the same as that in the wiring board 1 according to the first embodiment, as shown in FIG. 2. The build-up insulating layer 5 on which the conductor layer 4 located in the uppermost layer is located is referred to as the first build-up insulating layer for convenience. FIG. 9 is an explanatory diagram showing a plan view of the conductor layer 4 located one layer inward from the conductor layer 4 located in the uppermost layer in a part of the wiring board according to the second embodiment.

As shown in FIG. 9, one end of each of the multiple first draw-out wirings 44 is connected to a via land 43 included in the first via land 431. The other end of each of the first draw-out wirings 44 is connected to a via hole conductor 41 (signal via hole conductor 41c) located outside the mounting area X. In the conductor layer 4 located one layer inside from the conductor layer 4 located in the uppermost layer, the first via land 431 arranged in the same manner as the first signal connection pads 42c1 and the second via land 432 arranged in the same manner as the second signal connection pads 42c2 are located. The conductor layer 4 shown in FIG. 9 is a draw-out conductor layer including the first draw-out wirings 44.

Furthermore, in this layer, a relay via land 47 is located. In a plan view, the relay via land 47 is located outside the area that overlaps with the power supply conductor layer 4b, which is part of the plain conductor layer 4p. This relay via land 47 is connected to a part of the via land 43 included in the second via land 432 via a relay wiring 46. The layer that includes this relay wiring 46 corresponds to the relay wiring-containing layer. For convenience, the build-up insulating layer 5 in which this relay wiring-containing layer is located is referred to as the second build-up insulating layer.

The via land 43 connected to the relay wiring 46 may be the via land 43 located on the outermost side among the via lands 43 included in the second via land 432 as shown in FIG. 9, may be a via land 43 located other than the outermost side, or may be a mixture of both the outermost and the other than the outermost via lands 43. In order to prevent impedance mismatch by shortening the length of the relay wiring 46 that cannot have a strip structure, and to ensure insulation by reducing the number of places where the relay wiring 46 passes between closely spaced via lands 43, it is preferable that the via land 43 located on the outermost side among the via lands 43 included in the second via land 432 be connected to the relay wiring 46 as shown in FIG. 9.

As shown in FIG. 9, the relay wiring layer may be configured to connect the second via land 432, which is connected coaxially (below) to the connection pad 42 located in the outermost row of the second signal connection pads 42c2, and the relay via land 47 with the relay wiring 46. By connecting in this manner, the loss during signal transmission is further reduced.

As described above, one end of each of the first extraction wirings 44 is formed to be connected to the first via land 431. Therefore, as shown in FIG. 10, in the conductor layer 4 located two layers inside the conductor layer 4 located in the top layer, the via land 43 included in the second via land 432 that is not connected to the relay wiring 46 and the via land 43 connected to the power supply via hole conductor 41b remain.

In a plan view, the intermediate via land 47, which is located outside the area overlapping with the power supply conductor layer 4b, which is part of the plane conductor layer 4p, is electrically connected to the first auxiliary via land 471 shown in FIG. 10 via a via hole conductor. This first auxiliary via land 471 is connected to the second auxiliary via land 472, which is located further outboard than the first auxiliary via land 471, via the first auxiliary wiring 461. For convenience, the build-up insulating layer 5 on which this first auxiliary via land 471, second auxiliary via land 472, and first auxiliary wiring 461 are located is referred to as the third build-up insulating layer.

Figure 11 is an explanatory diagram showing a plan view of a conductor layer 4 located three layers inward from the conductor layer 4 located in the topmost layer in a part of a wiring board according to the second embodiment. As shown in Figure 11, the conductor layer 4 located three layers inward from the conductor layer 4 located in the topmost layer includes a second lead-out wiring 45 and functions as a signal conductor layer 4c.

One end of each of the second outgoing wirings 45 is connected to a via land 43 of the second via land 432 that is not connected to the relay wiring 46. The other end of each of the second outgoing wirings 45 is connected to a via hole conductor 41 (signal via hole conductor 41c) located outside the mounting area X.

One end of each of the signal conductor layers 4c is connected to the second auxiliary via land 472. The other end of each of the signal conductor layers 4c is connected to a via hole conductor 41 (signal via hole conductor 41c) located outside the mounting area X. The second auxiliary via land 472 shown in FIG. 10 and the second auxiliary via land 472 shown in FIG. 11 are electrically connected via the via hole conductor 41.

As a result, the conductor layer 4 shown in FIG. 12 does not have any lead wiring. Therefore, the power supply conductor layer 4b, which is a part of the plane conductor layer 4p, does not include a narrow area sandwiched by the signal conductor layer 4c (lead wiring), and a charge supply path can be secured. This allows the semiconductor element to operate without degrading its performance. FIG. 12 is an explanatory diagram showing a plan view of the conductor layer 4 located four layers inside the conductor layer 4 located in the uppermost layer in a part of the wiring board according to the second embodiment. This conductor layer 4 is located on the surface of the build-up insulating layer 5 located in the lowermost layer in the laminate 3. The conductor layer 4 located in the layer one inside the conductor layer 4 shown in FIG. 12 is similar to the conductor layer 4 located on the upper surface of the core insulating layer 2 shown in FIG. 8, and detailed description will be omitted. The second embodiment is advantageous in that the number of build-up insulating layers 5 can be reduced by one compared to the first embodiment.

Next, the wiring board according to the third embodiment will be described in detail with reference to Figures 13 to 16. In the wiring board according to the third embodiment, the same components as those in the wiring board 1 according to the first embodiment are given the same reference numerals, and detailed descriptions thereof will be omitted.

The wiring board according to the third embodiment includes relay wiring 46 and relay via land 47, similar to the wiring board 1 according to the first embodiment, but the layer in which the relay wiring 46 and relay via land 47 are located (the layer containing the relay wiring) is different.

As shown in FIG. 13, in the mounting area X, the connection pads 42, namely the ground connection pad 42a, the power connection pad 42b, the first signal connection pad 42c1, and the second signal connection pad 42c2, are arranged in a grid pattern. The ground conductor layer 4a, which is part of the plane conductor layer 4p, is positioned so as to surround the connection pads 42. The grid pattern refers to a state in which multiple connection pads 42 are arranged vertically and horizontally with a gap between each other.

Among the connection pads 42 arranged in a grid pattern, the signal connection pads 42c are arranged in multiple rows from the outermost side. The first signal connection pads 42c1 are arranged in at least two rows from the outermost side of the signal connection pads 42c. The remaining signal connection pads 42c are the second signal connection pads 42c2. As described above, in a planar perspective, the first signal connection pads 42c1 are arranged in an area that does not overlap the power supply conductor layer 4b. On the other hand, the second signal connection pads 42c2 are arranged in an area that overlaps the power supply conductor layer 4b in a planar perspective. On the inner side of the signal connection pads 42c, the ground connection pads 42a and the power supply connection pads 42b are arranged. For convenience, the build-up insulation layer 5 on which the conductor layer 4 located at the top layer is arranged is referred to as the first build-up insulation layer.

14 is an explanatory diagram showing a plan view of the conductor layer 4 located one layer inside the conductor layer 4 located in the top layer in a part of the wiring board according to the third embodiment. As shown in FIG. 14, one end of each of the multiple first outgoing wirings 44 is connected to the first via land 431. The other end of each of the first outgoing wirings 44 is connected to the via hole conductor 41 (signal via hole conductor 41c) located outside the mounting area X. In the conductor layer 4 located one layer inside the conductor layer 4 located in the top layer, the first via land 431 arranged in the same manner as the first signal connection pad 42c1 and the second via land 432 arranged in the same manner as the second signal connection pad 42c2 are located. The conductor layer 4 shown in FIG. 14 is an outgoing conductor layer including the first outgoing wiring 44.

As shown in FIG. 14, a portion of the second via land 432 is connected to a third auxiliary via land 473 located between the arrangement of the first via lands 431 and the arrangement of the second via lands 432 via a second auxiliary wiring 462. For convenience, the build-up insulating layer 5 in which the third auxiliary via land 473 and the second auxiliary wiring 462 are located is referred to as the second build-up insulating layer.

Figure 15 is an explanatory diagram showing a plan view of a conductor layer 4 located two layers inside the conductor layer 4 located in the top layer in a part of a wiring board according to the third embodiment. As shown in Figure 15, in the conductor layer 4 one layer above, the second via land 432 that is not connected to the third auxiliary via land 473 is connected to the relay via land 47 through the relay wiring 46. In a planar perspective view, the relay via land 47 is located outside the area that overlaps with the power supply conductor layer 4b, which is part of the plain conductor layer 4p. The layer that includes this relay wiring 46 corresponds to the relay wiring-containing layer. For convenience, the build-up insulating layer 5 in which this relay wiring-containing layer is located is referred to as the third build-up insulating layer.

Furthermore, in this relay wiring-containing layer, the fourth auxiliary via land 474 is connected to the fifth auxiliary via land 475 via the third auxiliary wiring 463. The fourth auxiliary via land 474 shown in FIG. 15 and the third auxiliary via land 473 shown in FIG. 14 are electrically connected via the via hole conductor 41. The fifth auxiliary via land 475 is located outside the relay via land 47.

As shown in FIG. 15, the relay wiring layer may be configured to connect the second via land 432, which is connected coaxially (below) to the connection pad 42 located in the outermost row of the second signal connection pads 42c2, and the relay via land 47 with the relay wiring 46. By connecting in this manner, the loss during signal transmission is further reduced.

Next, FIG. 16 is an explanatory diagram showing a plan view of a conductor layer 4 located three layers inward from the conductor layer 4 located in the topmost layer in a part of a wiring board according to the third embodiment. As shown in FIG. 16, the conductor layer 4 located three layers inward from the conductor layer 4 located in the topmost layer functions as a signal conductor layer 4c.

One end of each of the signal conductor layers 4c is connected to a relay via land 47. The other end of each of the signal conductor layers 4c is connected to a via hole conductor 41 (signal via hole conductor 41c) located outside the mounting area X. The relay via land 47 shown in FIG. 16 is electrically connected to either the relay via land 47 on the first layer shown in FIG. 15 or the fifth auxiliary via land 475 via the via hole conductor 41.

As a result, as shown in FIG. 16, the signal conductor layer 4c (drawing wiring) can be prevented from being present in the power conductor layer 4b, which is a part of the plane conductor layer 4p located in the area overlapping with the second signal connection pad 42c2 in a planar perspective view. Therefore, the power conductor layer 4b, which is a part of the plane conductor layer 4p, does not include a narrow area sandwiched by the signal conductor layer 4c (drawing wiring), and a charge supply path can be secured. This allows the semiconductor element to operate without degrading its performance. FIG. 16 is an explanatory diagram showing a plan view of the conductor layer 4 located three layers inside the conductor layer 4 located in the uppermost layer in a part of the wiring board according to the third embodiment. This conductor layer 4 is located on the surface of the build-up insulating layer 5 located in the lowermost layer in the laminate 3. The conductor layer 4 located in the layer one inside the conductor layer 4 shown in FIG. 16 is the same as the conductor layer 4 located on the upper surface of the core insulating layer 2 shown in FIG. 8, and detailed description will be omitted.

Furthermore, the wiring board according to the third embodiment has the advantage that the number of build-up insulating layers 5 can be reduced by one compared to the second embodiment. In other words, when the number (number of rows) of first signal connection pads 42c1 and the number (number of rows) of second signal connection pads 42c2 are the same, it is possible to provide a thinner wiring board by reducing the number of layers of the lead-out wiring layers.

In a conventional wiring board such as that shown in Patent Document 1, in the conductor layers corresponding to Figures 7, 12, and 16, a signal conductor (drawing wiring) that blocks the current path is present in the power conductor, which is part of the plane conductor layer. As a result, the supply of charge to the power conductor is blocked by the narrow area sandwiched between the drawing wiring, degrading the performance of the semiconductor element mounted thereon.

In the wiring board 1 according to the first embodiment, as shown in FIG. 7, the conductor layer 4 located on the top surface of the lowermost build-up insulating layer 5 has a power supply conductor layer 4b located in an area inside the first signal connection pad 42c1, which is part of the plane conductor layer 4p connected to the power supply connection pad 42b via the via hole conductor 41 (power supply via hole conductor 41b). As shown in FIG. 12 and FIG. 16, the same is true for the wiring board according to the second embodiment and the wiring board according to the third embodiment.

However, in the wiring board of the present disclosure, the plane conductor layer 4p is not limited to a power conductor. By providing a wide-area plane conductor layer 4p directly below the mounting area, the inductance of the power/ground supply path to the semiconductor element can be reduced. In particular, as shown in Figures 7, 12, and 16, if the plane conductor layer 4p is a power conductor layer 4b, charge can be supplied to the semiconductor element mounted in the mounting area X over a short distance with low inductance. This allows the semiconductor element to operate more stably.

In the wiring board 1 according to the first embodiment, as shown in FIG. 7, the conductor layer 4 located on the top surface of the lowermost build-up insulating layer 5 has a power supply conductor layer 4b located alone as a plane conductor layer 4p in an area inside the first signal connection pad 42c1. As shown in FIGS. 12 and 16, the same is true for the wiring board according to the second embodiment and the wiring board according to the third embodiment.

However, in the wiring board of the present disclosure, the plane conductor layer 4p may include multiple plane conductor layers 4p that are electrically independent from each other. If multiple plane conductor layers 4p are included, it is possible to provide multiple channels of power/ground. Furthermore, it is also possible to accommodate semiconductor elements for both analog and digital signals.

The wiring board of the present disclosure is not limited to the wiring board 1 according to the first embodiment, the wiring board according to the second embodiment, and the wiring board according to the third embodiment described above. For example, in the mounting area X of the wiring board 1 according to the first embodiment, the wiring board according to the second embodiment, and the wiring board according to the third embodiment, the first signal connection pads 42c1 and the second signal connection pads 42c2 are each located in two rows. However, in the wiring board of the present disclosure, the first signal connection pads 42c1 may be located in three or more rows. Similarly, the second signal connection pads 42c2 may be located in three or more rows.

In the mounting area X of the wiring board 1 according to the first embodiment and the wiring board according to the second embodiment, one row of power supply connection pads 42b and one row of ground connection pads 42a are located. However, in the wiring board of the present disclosure, there may be multiple rows of power supply connection pads 42b and ground connection pads 42a, or the power supply connection pads 42b and ground connection pads 42a may be located together in one row.

In the wiring board 1 according to the first embodiment, the laminate 3 forming the build-up layer has a structure in which six build-up insulating layers 5 and six conductor layers 4 are alternately stacked. In the wiring board according to the second embodiment, the laminate 3 forming the build-up layer has a structure in which five build-up insulating layers 5 and five conductor layers 4 are alternately stacked. In the wiring board according to the third embodiment, the laminate 3 forming the build-up layer has a structure in which four build-up insulating layers 5 and four conductor layers 4 are alternately stacked. However, in the wiring board of the present disclosure, the number of layers of the build-up insulating layers and conductor layers is not limited as long as it has a build-up structure. The number of layers may be set appropriately depending on, for example, the number of rows of the first signal connection pads 42c1 and the number of rows of the second signal connection pads 42c2.

In the wiring board 1 according to the first embodiment, the wiring board according to the second embodiment, and the wiring board according to the third embodiment, each lead-out wiring (signal conductor layer 4c) is a single line. However, each lead-out wiring may be a differential line (pair line). A differential line is a form of high-frequency transmission with little electrical loss, and is useful as a transmission line for transmitting high-frequency signals.

Furthermore, in the wiring board of the present disclosure, the semiconductor element mounted in the mounting area X is not limited as long as it is a semiconductor element that is generally mounted on a wiring board. Examples of such semiconductor elements include semiconductor integrated circuit elements and optoelectronic elements.

REFERENCE SIGNS LIST 1 wiring board 2 core insulating layer 21 through-hole conductor 21a ground through-hole conductor 21b power supply through-hole conductor 21c signal through-hole conductor 3 laminate 4 conductor layer 4a ground conductor layer 4b power supply conductor layer 4c signal conductor layer 4p plane conductor layer 41 via-hole conductor 41a ground via-hole conductor 41b power supply via-hole conductor 41c signal via-hole conductor 42 connection pad 42a ground connection pad 42b power supply connection pad 42c1 first signal connection pad 42c2 second signal connection pad 43 via land 431 first via land 432 second via land 44 first lead-out wiring 45 second lead-out wiring 46 intermediate wiring 46' second intermediate wiring 461 first auxiliary wiring 462 second auxiliary wiring 463 third auxiliary wiring 47 Intermediate via land 471 First auxiliary via land 472 Second auxiliary via land 473 Third auxiliary via land 474 Fourth auxiliary via land 475 Fifth auxiliary via land 5 Build-up insulating layer 6 Solder resist

Claims (7)

a core insulating layer having a plurality of through-hole conductors;
a laminate located on the core insulating layer and having a mounting area on an upper surface thereof;
Equipped with
The laminate has conductor layers and build-up insulating layers having a plurality of via-hole conductors arranged alternately,
the conductor layer includes a connection pad located in the mounting area, a via land located within the mounting area in a planar perspective and connected to the connection pad via the via hole conductor, a lead-out wiring having two ends, one end connected to the via land and the other end connected to the via hole conductor located outside the mounting area, a plane conductor located above and below the lead-out wiring via the build-up insulating layer, and a power supply conductor layer located within the mounting area in a planar perspective on a lowermost build-up insulating layer in contact with the core insulating layer,
the connection pads include a first signal connection pad located in an area not overlapping the power supply conductor layer in a planar perspective view, and a second signal connection pad located in an area overlapping the power supply conductor layer;
the via land includes, in a planar perspective view, a first via land coaxially connected to the first signal connection pad, a second via land coaxially connected to the second signal connection pad, and a relay via land located in an area not overlapping the power supply conductor layer,
The laminate includes a relay-wire-retaining layer that connects the second via land and the relay via land with a relay wire. The connection pads are positioned in a grid array in the mounting area;
the first signal connection pads are located in at least two rows from the outermost periphery of the lattice array;
power supply connection pads and ground connection pads are located in at least one row on the inner side of the first signal connection pads;
the second signal connection pads are located in at least two rows on the inside from a region overlapping with the power supply conductor layer in a planar perspective view,
the relay-wire-retaining layer is located on the upper build-up insulating layer in contact with the lowermost build-up insulating layer;
The wiring board according to claim 1 . The wiring board according to claim 2, wherein the second via land, which is coaxially connected to the second signal connection pad located in the innermost row in the intermediate wiring-containing layer, is connected to the intermediate via land by the intermediate wiring. The connection pads are positioned in a grid array in the mounting area;
the first signal connection pads are located in at least two rows from the outermost periphery of the lattice array;
power supply connection pads and ground connection pads are located in at least one row on the inner side of the first signal connection pads;
the second signal connection pads are located in at least two rows on the inside from a region overlapping with the power supply conductor layer in a planar perspective view,
the laminate includes, in order from above, a first build-up insulating layer having the mounting region, a second build-up insulating layer, and a third build-up insulating layer;
the first via lands are arranged in the same manner as the first signal connection pads and the second via lands are arranged in the same manner as the second signal connection pads on the second build-up insulating layer,
the conductor layer on the second build-up insulating layer is the relay-wire-retaining layer,
the first via land on the second build-up insulating layer is connected to the lead-out wiring,
a portion of the second via land on the second build-up insulating layer is connected to the relay via land by the relay wiring,
2. The wiring board according to claim 1, further comprising: a first auxiliary via land on the third build-up insulating layer, the first auxiliary via land being connected to the intermediate via land by the via hole conductor; a second auxiliary via land located closer to the outer periphery of the third build-up insulating layer than the first auxiliary via land and connecting to the conductor layer below the third build-up insulating layer by the via hole conductor; and a first auxiliary wiring connecting the first auxiliary via land and the second auxiliary via land. The wiring board according to claim 4, wherein the second via land, which is coaxially connected to the second signal connection pad located in the outermost row in the intermediate wiring-containing layer, is connected to the intermediate via land by the intermediate wiring. The connection pads are positioned in a grid array in the mounting area;
the first signal connection pads are located in at least two rows from the outermost periphery of the lattice array;
the second signal connection pads are located in at least two rows adjacent to the inside of the first signal connection pads,
power supply connection pads and ground connection pads are located in at least one row on the inner side of the second signal connection pads,
the laminate includes, in order from above, a first build-up insulating layer having the mounting region, a second build-up insulating layer, and a third build-up insulating layer;
the first via lands are arranged in the same manner as the first signal connection pads and the second via lands are arranged in the same manner as the second signal connection pads on the second build-up insulating layer;
the first via land on the second build-up insulating layer is connected to the lead-out wiring,
a part of the second via land on the second build-up insulating layer is connected to a third auxiliary via land located between the arrangement of the first via lands and the arrangement of the second via lands by a second auxiliary wiring;
the conductor layer on the third build-up insulating layer is the relay-wire-retaining layer,
the second via land on the third build-up insulating layer is connected to the relay via land by the relay wiring,
2. The wiring board according to claim 1, wherein a fourth auxiliary via land connected to the third auxiliary via land by the via hole conductor and a fifth auxiliary via land located outside the area overlapping the power supply conductor layer in a planar perspective are connected by a third auxiliary wiring. The wiring board according to claim 6, wherein the intermediate wiring holding layer connects the second via land and the intermediate via land, which are coaxially connected to the second signal connection pads located in the outermost row, with the intermediate wiring.