JP7552014B2 - Semiconductor module and manufacturing method - Google Patents

Description

The present invention relates to a semiconductor module and a manufacturing method.

A structure in which a metal wiring plate is connected to an upper electrode of a semiconductor chip is known (see, for example, Patent Document 1). The metal wiring plate has a plate-shaped joint portion that is solder-joined to the upper electrode, and a rising portion that extends upward from an end of the joint portion.
Patent Document 1: JP 2003-115512 A

The semiconductor chip and metal wiring board are sealed with resin. When the temperature of the metal wiring board fluctuates, the rising portion of the metal wiring board tends to expand and contract in the vertical direction. The upper side of the rising portion is held down by the sealing resin, so the rising portion presses against the top electrode of the semiconductor chip. As a result, the area of the top electrode near the rising portion is more distorted than the other areas of the top electrode. Furthermore, the thermal expansion of the metal wiring board may cause cracks to form in the sealing resin.

In one aspect of the present invention, a semiconductor module is provided that includes a semiconductor chip having an upper electrode and a lower electrode opposite the upper electrode, a metal wiring board electrically connected to the upper electrode of the semiconductor chip, and a sheet-like low-elasticity sheet provided on the metal wiring board and having a lower elastic modulus than the metal wiring board.

The metal wiring board may have a joint portion for joining to the upper electrode of the semiconductor chip, and a rising portion connected to the joint portion and extending in a direction away from the semiconductor chip.

The low elasticity sheet may be provided on both the joint and the raised portion.

The low elasticity sheet is provided on the joints, but does not have to be provided on the raised portions.

The low-elasticity sheet may be provided at the end of the joint, extending beyond the joint surface with the metal wiring board.

The low-elasticity sheet has a bonding surface with the metal wiring board at the end of the joint, and the joint may be soldered to the upper electrode of the semiconductor chip.

The semiconductor module may further include a solder portion for joining the upper electrode of the semiconductor chip to the metal wiring board, and a sealing resin for sealing the semiconductor chip and the metal wiring board. The sealing resin may be in contact with the solder portion.

The sealing resin may be in contact with the side of the joint of the metal wiring board.

The elastic modulus of the low elasticity sheet may be lower than the elastic modulus of the sealing resin.

The elastic modulus of the low elasticity sheet may be 1/10,000 or more and 1/10 or less of the elastic modulus of the sealing resin.

The low elasticity sheet may have an elastic modulus of 1 MPa or more and 1000 MPa or less.

The low-elasticity sheet may have a thickness of 0.05 mm or more and 1.5 mm or less.

The low elasticity sheet may include any of foam, resin and silicone rubber.

In one aspect of the present invention, a method for manufacturing a semiconductor module is provided, the method comprising the steps of providing a semiconductor chip, soldering a metal wiring board above the semiconductor chip, and attaching a low-elasticity sheet having a lower elasticity than the metal wiring board to the metal wiring board.

After attaching the low-elasticity sheet to the metal wiring board, the metal wiring board may be soldered above the semiconductor chip.

After the step of soldering the metal wiring board above the semiconductor chip, a low-elasticity sheet may be attached to the metal wiring board.

The above summary of the invention does not list all of the features of the present invention. Subcombinations of these features may also constitute inventions.

FIG. 2 is a top view of the semiconductor module 300 according to the first embodiment. 1B is a cross-sectional view taken along line AA of FIG. 1A. FIG. 11 is a top view of a semiconductor module 300 according to a second embodiment. This is a cross-sectional view taken along line BB of FIG. 2A. FIG. 11 is a top view of a semiconductor module 300 according to a third embodiment. This is a cross-sectional view taken along the line CC of FIG. 3A. 1 is an example of a cross-sectional view of a semiconductor module 500 according to a comparative example. 11 is an example of a cross-sectional view of the semiconductor module 300 according to the first embodiment after a stress is generated therein; 13 is an example of a cross-sectional view of the semiconductor module 500 according to the comparative example after stress is generated therein. 13 is a graph showing the relationship between resin stress and Young's modulus of a low-elasticity sheet 70. 13 is a graph showing the relationship between the plastic strain amplitude and the Young's modulus of the low-elasticity sheet 70. 13 is a graph showing the relationship between resin stress and film thickness of a low-elasticity sheet 70. 13 is a graph showing the relationship between the plastic strain amplitude and the film thickness of the low-elasticity sheet 70. 1 shows an example of a flowchart for manufacturing the semiconductor module 300. An example of a method for manufacturing the semiconductor module 300 will be described. An example of a method for manufacturing the semiconductor module 300 will be described. 4 is a partially enlarged view for explaining an end portion of a low-elasticity sheet 70 according to an embodiment of the present invention. FIG. 4 is a partially enlarged view for explaining an end portion of a low-elasticity sheet 70 according to an embodiment of the present invention. FIG. 13 is a partial enlarged view for explaining an end portion of a low elasticity portion 570 according to a comparative example. FIG. 13 is a partial enlarged view for explaining an end portion of a low elasticity portion 570 according to a comparative example. FIG. 1 is a diagram showing an overview of a vehicle 200 according to an embodiment. 2 is a main circuit diagram of a power conversion device 220 according to an embodiment.

The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

FIG. 1A is a top view of a semiconductor module 300 according to a first embodiment. FIG. 1B is a cross-sectional view taken along line A-A in FIG. 1A. The semiconductor module 300 of this example includes a semiconductor assembly 100, a cooling unit 110, a case 120, and a sealing resin 130.

In this specification, one side in the thickness direction of the semiconductor assembly 100 is referred to as "top" and the other side as "bottom". Of the two main surfaces of an element, substrate, layer, film or other member, one surface is referred to as the top surface and the other surface is referred to as the bottom surface. The directions of "top" and "bottom" are not limited to the direction of gravity. In this example, the up-down direction is referred to as the Z-axis direction, and the two directions perpendicular to the plane perpendicular to the Z-axis direction are referred to as the X-axis direction and the Y-axis direction. The XYZ axes form a right-handed system.

The semiconductor assembly 100 is an assembly having a semiconductor chip 10, a laminated substrate 20, a metal wiring board 60, and a low-elasticity sheet 70. The semiconductor assembly 100 is solder-joined onto the cooling section 110 using the solder section 112. The semiconductor assembly 100 may be placed on a metal base plate.

The cooling section 110 dissipates heat generated by the semiconductor chip 10 and the like to the outside. The cooling section 110 is formed of a material with high thermal conductivity, such as aluminum. The cooling section 110 may have a top plate and a bottom plate facing the top plate. The cooling section 110 may have multiple fins formed between the top plate and the bottom plate to increase the heat dissipation area. The semiconductor assembly 100 of this example is thermally and mechanically fixed to the cooling section 110 by the solder section 112. For example, the solder section 112 is a Sn-Sb based or Sn-Sb-Ag based solder.

The case 120 is provided on the upper surface of the cooling section 110, surrounding the semiconductor assembly 100. The shape of the case 120 in this example is rectangular, but is not limited to this. For example, the material of the case 120 is an insulating material such as resin. The resin may be selected from polyphenylene sulfide (PPS), polybutylene terephthalate (PBT), polybutyl acrylate (PBA), polyamide (PA), acrylonitrile butadiene styrene (ABS), liquid crystal polymer (LCP), polyether ether ketone (PEEK), polybutylene succinate (PBS), urethane, silicone, etc.

The sealing resin 130 seals the inside of the case 120. The sealing resin 130 covers the entire semiconductor assembly 100. In other words, the sealing resin 130 seals the semiconductor chip 10, the laminated substrate 20, the metal wiring board 60, the solder parts 33, 34, 43, and the low-elasticity sheet 70. For example, the material of the sealing resin 130 is epoxy resin.

The semiconductor chip 10 is a semiconductor chip formed of a semiconductor substrate such as a silicon substrate. In one example, the semiconductor chip 10 includes switching elements such as an insulated gate bipolar transistor (IGBT) and a power MOSFET. The semiconductor chip 10 may include a reverse-conducting IGBT (RC-IGBT) including a freewheel diode (FWD). The semiconductor chip 10 may include a vertical switching element. An upper electrode and a lower electrode may be formed on the semiconductor chip 10. The upper electrode and the lower electrode may be electrically connected to a negative potential and a positive potential of a power supply, respectively.

The laminated substrate 20 is provided on the upper surface of the cooling section 110. The laminated substrate 20 includes a metal plate 21, an insulating plate 22, a circuit section 23, and a circuit section 24. For example, the laminated substrate 20 may be a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazing) substrate.

The insulating plate 22 is formed of an insulating material such as ceramics, such as alumina ( _{Al2O3 )} , aluminum nitride ( _AlN ), silicon nitride ( _Si3N4 ), etc. The metal plate 21 is provided on the lower surface of the insulating plate 22. The circuit units 23 and 24 are provided on the upper surface of the insulating plate 22. The metal plate 21, the circuit units 23 and 24 may be formed of plates containing a metal material, such as copper or a copper alloy. The metal plate 21, the circuit units 23 and 24 may be fixed to the surface of the insulating plate 22 by solder, brazing, etc.

The circuit section 23 is soldered to the semiconductor chip 10 using the solder section 33. This electrically connects the circuit section 23 to the semiconductor chip 10.

The circuit section 24 is soldered to the metal wiring plate 60. The circuit section 24 is not soldered to the semiconductor chip 10. However, the circuit section 24 may be soldered to a semiconductor chip 10 other than the semiconductor chip 10 soldered to the circuit section 23. The circuit section 23 and the circuit section 24 may include metal wiring, pads, etc. formed on the upper surface of the insulating plate 22, and may include a signal processing circuit, etc.

The solder portion 33 fixes the semiconductor chip 10 to the circuit portion 23. The solder portion 33 electrically and mechanically connects the semiconductor chip 10 and the circuit portion 23. For example, the solder portion 33 connects a pad included in the circuit portion 23 to an electrode on the lower surface of the semiconductor chip 10. For example, the material of the solder portion 33 is a Sn-Cu or Sn-Sb solder. The solder portion 33 has two surfaces that contact the semiconductor chip 10 to the circuit portion 23 and a side surface that connects the two surfaces, and the side surface contacts the sealing resin 130.

The metal wiring board 60 is electrical wiring for the semiconductor chip 10 that is electrically connected to the semiconductor chip 10. In this example, the metal wiring board 60 electrically connects the semiconductor chip 10 to the circuit section 24. One end of the metal wiring board 60 is connected to the upper surface electrode of the semiconductor chip 10, and the other end of the metal wiring board 60 is connected to the upper surface of the circuit section 24.

For example, the material of the metal wiring board 60 is copper, a copper alloy, aluminum, an aluminum alloy, or the like. In one example, the thickness of the metal wiring board 60 is 0.5 mm or more and 1.0 mm or less. The metal wiring board 60 in this example has a joint portion 62, a rising portion 63, a connection portion 64, a rising portion 65, and a joint portion 66.

The joint 62 is soldered to the upper electrode of the semiconductor chip 10 using the solder portion 43. As a result, the joint 62 is fixed onto the semiconductor chip 10 and electrically connected to the semiconductor chip 10. For example, the solder portion 43 is a Sn-Cu based or Sn-Sb based solder.

The rising portion 63 is connected to the joint portion 62. The rising portion 63 extends from the joint portion 62 in a direction away from the top surface of the semiconductor chip 10. In other words, the rising portion 63 is a portion that is bent at an arbitrary angle from the joint portion 62. In this example, the rising portion 63 extends in a direction perpendicular to the top surface of the semiconductor chip 10 (i.e., the Z-axis direction).

The joint 66 is soldered to the upper surface of the circuit section 24 by the solder section 34. As a result, the joint 66 is fixed onto the circuit section 24 and electrically connected to the circuit section 24. For example, the solder section 34 is a Sn-Cu based or Sn-Sb based solder. The joint 66 is connected to the rising section 63 by the connection section 64.

The rising portion 65 is connected to the joint portion 66. The rising portion 65 extends from the joint portion 66 in a direction away from the upper surface of the circuit portion 24. In other words, the rising portion 65 is a portion that is bent at an arbitrary angle from the joint portion 66. In this example, the rising portion 65 extends in a direction perpendicular to the upper surface of the circuit portion 24 (i.e., in the Z-axis direction). The joint portions 62 and 66 may be provided apart in the Z-axis direction. In the Z-axis direction, the length of the rising portion 63 may be smaller than the length of the rising portion 65, for example, by the thickness of the semiconductor chip 10 and the solder portion 43.

The low-elasticity sheet 70 is provided on the metal wiring board 60. The low-elasticity sheet 70 is a sheet-like member having a lower elastic modulus than the metal wiring board 60. In this example, "sheet-like" refers to the low-elasticity sheet 70 having a substantially uniform thickness even at its ends. On the other hand, when a low-elasticity layer is formed by liquid application, the film thickness is not uniform between the center and the ends of the layer.

The low elasticity sheet 70 includes a joint portion 72, a rising portion 73, a connection portion 74, a rising portion 75, and a joint portion 76. The joint portion 72 is provided on the upper surface of the joint portion 62. The rising portion 73 is provided opposite the rising portion 63. The connection portion 74 is provided on the connection portion 64. The rising portion 75 is provided opposite the rising portion 65. The joint portion 76 is provided on the joint portion 66. In this example, a sheet that becomes the low elasticity sheet 70 is attached to the metal wiring board 60. The low elasticity sheet 70 may be attached to the metal wiring board 60 by an adhesive. The joint portion 72 and the joint portion 76 have a substantially uniform film thickness. For example, the film thickness variation of the joint portion 72 and the joint portion 76 is within ±10%. The joint portion 72, the rising portion 73, the connection portion 74, the rising portion 75, and the joint portion 76 may be attached to the metal wiring board 60 at a distance from one another.

The elastic modulus of the low elastic sheet 70 is lower than that of the sealing resin 130. In one example, the elastic modulus of the low elastic sheet 70 may be 1/10 or less than that of the sealing resin 130, and may be 1/100 or less. In this example, the elastic modulus of the low elastic sheet 70 is 1/10,000 or more and 1/10 or less than that of the sealing resin 130. However, the elastic modulus of the low elastic sheet 70 may be 1/1000 or more than that of the sealing resin 130. The low elastic sheet 70 is provided between the metal wiring board 60 and the sealing resin 130. As a result, the low elastic sheet 70 can suppress cracks such as electrode cracks and resin cracks caused by thermal stress.

The low-elasticity sheet 70 is provided over the entire upper surface of the metal wiring board 60. However, the low-elasticity sheet 70 may be provided only on a portion of the metal wiring board 60. In this example, the low-elasticity sheet 70 is provided on both the joints and the rising portions. In this example, "on the rising portions" refers to the case where the low-elasticity sheet 70 is provided in contact with the rising portions, and is not necessarily limited to the case where it is provided on the upper surface in the direction of gravity. The low-elasticity sheet 70 is provided away from the semiconductor chip 10 and the solder portion. In other words, the solder portion is firmly fixed by contacting the sealing resin 130, and the occurrence of solder cracks can be suppressed.

The thickness of the low elasticity sheet 70 may be appropriately designed according to the structure of the semiconductor module 300. In one example, the thickness of the low elasticity sheet 70 is 0.05 mm or more and 1.5 mm or less. The thickness of the low elasticity sheet 70 may be 0.1 mm or more, or 0.3 mm or more. The thickness of the low elasticity sheet 70 may be 1.0 mm or less. For example, the material of the low elasticity sheet 70 includes any of foam, resin, and silicone rubber. More specifically, the material of the low elasticity sheet 70 may be polyimide foam or epoxy resin. The thermal conductivity and electrical conductivity of the low elasticity sheet 70 are not particularly limited.

The low-elasticity sheet 70 has a joint surface with the metal wiring board 60 at the end of the joint 62. The position of the end of the joint 62 is not particularly limited. The end of the joint 62 may be the end of the joint 62 on the opposite side to the rising portion 63. The joint 62 is soldered to the semiconductor chip 10, and thermal expansion occurs at the joint 62 and the rising portion 63. Stress due to thermal expansion of the joint 62 and the rising portion 63 is likely to concentrate at the end of the joint 62 on the opposite side to the rising portion 63. By providing the low-elasticity sheet 70 in an area where stress is likely to concentrate, the occurrence of resin cracks can be suppressed.

Figure 2A is a top view of a semiconductor module 300 according to a second embodiment. Figure 2B is a cross-sectional view taken along line B-B of Figure 2A. The semiconductor module 300 of this example includes a low-elasticity sheet 70 on the joint 62. In this example, differences from the first embodiment will be particularly described.

The low-elasticity sheet 70 is provided on the joint 62. On the other hand, in this example, the low-elasticity sheet 70 is not provided on the rising portion 63, the connection portion 64, the rising portion 65, or the joint 66. By providing the low-elasticity sheet 70 near the area where the semiconductor chip 10 is provided, the occurrence of resin cracks caused by thermal stress due to heat generation from the semiconductor chip 10 can be suppressed.

In the semiconductor module 300 of this example, the low-elasticity sheet 70 is provided only on the joint 62, so there is no need to attach the low-elasticity sheet 70 along the shape of the metal wiring board 60. Therefore, even if the structure of the metal wiring board 60 is complex, it is easy to attach the low-elasticity sheet 70.

Figure 3A is a top view of a semiconductor module 300 according to a third embodiment. Figure 3B is a cross-sectional view taken along the line C-C of Figure 3A. The semiconductor module 300 of this example includes a metal wiring board 60 having a different shape from that of the second embodiment. In this example, the differences from the second embodiment will be particularly described.

The metal wiring board 60 has a joint portion 62, a connection portion 64, a rising portion 65, and a joint portion 66. That is, the metal wiring board 60 of this example differs from the metal wiring board 60 of Example 2 in that it does not have a rising portion 63. In this way, the shape of the metal wiring board 60 may be changed as appropriate depending on the structure of the semiconductor module 300, etc.

The low-elasticity sheet 70 is provided on the joint 62. The low-elasticity sheet 70 is not provided on the connection 64, the rising portion 65, and the joint 66. However, the low-elasticity sheet 70 may be provided on the upper surfaces of the connection 64, the rising portion 65, and the joint 66. In this way, even if the shape of the metal wiring board 60 is changed, it is preferable that the low-elasticity sheet 70 is provided on the joint 62 solder-joined to the semiconductor chip 10. This reduces the effects of thermal expansion of the metal wiring board 60.

Figure 4 is an example of a cross-sectional view of a semiconductor module 500 according to a comparative example. The semiconductor module 500 differs from the semiconductor module 300 according to the embodiment in that it does not include a low-elasticity sheet 70. The semiconductor module 500 includes a case 520, a sealing resin 530, a semiconductor assembly 540, and a cooling section 550. The semiconductor assembly 540 includes a semiconductor chip 510 and a metal wiring board 560 mounted on a laminated substrate 525.

The metal wiring board 560 is provided above the semiconductor chip 510 via the solder portion 543. However, the low-elasticity sheet 70 is not provided on the metal wiring board 560. Therefore, the metal wiring board 560 is directly covered with the sealing resin 530. The metal wiring board 560 has a rising portion 563 above the semiconductor chip 510.

Here, the reliability of the semiconductor module 300 is tested by a power cycle test such as a ΔTj power cycle. For example, in the ΔTj power cycle test, two failure modes, electrode cracks and resin cracks, are evaluated.

The electrode crack is a failure mode in which a crack occurs in the semiconductor chip 10 starting from a crack in the upper electrode of the semiconductor chip 10. The fracture life can be estimated from the plastic strain amplitude in a thermal stress simulation. The smaller the plastic strain amplitude of the semiconductor chip 10, the longer the life of the semiconductor chip 10. The plastic strain amplitude is the difference between the plastic strain generated in the upper electrode during heating and cooling. The strain is large directly below the rising portion of the metal wiring board 560. The rising portion of the metal wiring board 560 tries to expand due to thermal expansion, but since it is pressed down by the sealing resin 530, the stress due to thermal expansion is directed toward the semiconductor chip 10.

Resin cracking is a failure mode in which cracks occur in the sealing resin 530. The location of destruction due to resin cracking can be estimated from the distribution of stress generated in a thermal stress simulation. The location of high stress is the tip of the metal wiring board 560 (i.e., the tip of the part that joins with the semiconductor chip 510), which is thought to be the starting point of the crack. Heat generated by the semiconductor chip 510 causes the metal wiring board 560 to thermally expand horizontally, but because the surrounding area is solidified with the sealing resin 530, the expansion of the metal wiring board 560 is concentrated on the side surface 567 of the tip.

In the semiconductor assembly 100, the provision of the low-elasticity sheet 70 can reduce stress toward the semiconductor chip 10 and stress concentration in the sealing resin 130. For example, by increasing the thickness of the low-elasticity sheet 70, the stress toward the semiconductor chip 10 can be further reduced. By lowering the elastic modulus of the low-elasticity sheet 70 and increasing its thickness, the cushioning effect for reducing stress on the semiconductor chip 10 is enhanced. This makes it easier to suppress electrode cracks.

In addition, regarding stress concentration in the sealing resin 130, the cushioning effect of the low-elasticity sheet 70 allows deformation in the vertical direction, reducing stress concentration due to horizontal thermal expansion of the metal wiring board 60. This makes it easier to suppress resin cracks. In this way, by providing the low-elasticity sheet 70, the semiconductor assembly 100 can suppress electrode cracks and resin cracks during the ΔTj power cycle.

Figure 5A is an example of a cross-sectional view of the semiconductor module 300 according to Example 1 after stress has been generated. The shape of the low-elasticity sheet 70 is significantly deformed due to the stress generated in the semiconductor module 300. For example, the upper surface 79 of the low-elasticity sheet 70 is significantly crushed and moved laterally. The upper surface of the sealing resin 130 is also significantly deformed. In this way, the semiconductor module 300 can reduce the concentration of stress near the metal wiring board 60 due to the deformation of the low-elasticity sheet 70. Figure 5A is an exaggerated view for the purpose of explanation, and the specific deformation is not limited to this example.

Figure 5B is an example of a cross-sectional view of a semiconductor module 500 according to a comparative example after stress has been generated. The semiconductor module 500 of this example does not have a low-elasticity sheet 70 on the upper surface of the metal wiring board 560. Therefore, the sealing resin 530 does not deform, and large stress is generated at the interface between the sealing resin 530 and the metal wiring board 560. In particular, large stress is generated around the semiconductor chip 510 that generates heat.

Figure 6A is a graph showing the relationship between resin stress and Young's modulus of the low-elasticity sheet 70. The vertical axis shows the resin stress (Mpa) generated in the sealing resin 130 scaled to arbitrary units (a.u.), and the horizontal axis shows Young's modulus (Mpa). The solid line shows the simulation results of the semiconductor module 300 according to the embodiment. The dashed line shows the simulation results of the semiconductor module 500 according to the comparative example. In this example, the comparative example is shown as 100 (a.u.).

In the examples, three types of simulation results are shown, where the Young's modulus of the low-elasticity sheet 70 is 10 MPa , 100 MPa , and 1000 MPa . The resin stress in the examples is smaller than the resin stress in the comparative example in all cases. That is, by applying the low-elasticity sheet 70, the semiconductor module 300 can reduce the stress generated in the sealing resin 130. Furthermore, the stress generated in the sealing resin 130 is smaller as the Young's modulus of the low-elasticity sheet 70 is smaller.

6B is a graph showing the relationship between the amplitude of plastic strain generated in the upper electrode and the Young's modulus of the low-elasticity sheet 70. The vertical axis shows the value of the plastic strain amplitude (%) of the electrode scaled to an arbitrary unit (a.u.), and the horizontal axis shows the Young's modulus (M Pa ). The upper electrode in this example is an electrode such as Al-Si provided on the upper surface of the semiconductor chip 10. The solid line shows the simulation result of the semiconductor module 300 according to the embodiment. The dashed line shows the simulation result of the semiconductor module 500 according to the comparative example. In this example, the comparative example is shown as 100 (a.u.).

In the examples, three types of simulation results are shown, in which the Young's modulus of the low-elasticity sheet 70 is 10 MPa , 100 MPa , and 1000 MPa . In all cases, the plastic strain amplitude of the electrodes in the examples is smaller than the plastic strain amplitude of the electrodes in the comparative examples. That is, the semiconductor module 300 can reduce the plastic strain amplitude of the electrodes by applying the low-elasticity sheet 70. Furthermore, the smaller the Young's modulus of the low-elasticity sheet 70, the smaller the plastic strain amplitude of the electrodes.

7A is a graph showing the relationship between resin stress and film thickness of the low-elasticity sheet 70. The vertical axis shows the resin stress (M Pa ) generated in the sealing resin 130 scaled into arbitrary units (a.u.), and the horizontal axis shows the film thickness (mm) of the low-elasticity sheet 70. The solid line shows the simulation results of the semiconductor module 300 according to the example. The dashed line shows the simulation results of the semiconductor module 500 according to the comparative example. In this example, the comparative example is shown as 100 (a.u.).

In the examples, six types of simulation results are shown, with the film thickness of the low-elasticity sheet 70 being 0.05 mm, 0.1 mm, 0.3 mm, 0.5 mm, 1.0 mm, and 1.5 mm. In all cases, the resin stress in the examples was smaller than the resin stress in the comparative example. In other words, by applying the low-elasticity sheet 70, the semiconductor module 300 can reduce the stress generated in the sealing resin 130.

Figure 7B is a graph showing the relationship between the plastic strain amplitude and the film thickness of the low-elasticity sheet 70. The vertical axis shows the plastic strain amplitude (%) of the electrode scaled into arbitrary units (a.u.), and the horizontal axis shows the film thickness (mm) of the low-elasticity sheet 70. The solid line shows the simulation results of the semiconductor module 300 according to the embodiment. The dashed line shows the simulation results of the semiconductor module 500 according to the comparative example. In this example, the comparative example is shown as 100 (a.u.).

In the examples, six types of simulation results are shown, with the film thickness of the low-elasticity sheet 70 being 0.05 mm, 0.1 mm, 0.3 mm, 0.5 mm, 1.0 mm, and 1.5 mm. In all cases, the plastic strain amplitude of the electrodes in the examples was smaller than the plastic strain amplitude of the electrodes in the comparative examples. That is, by applying the low-elasticity sheet 70, the semiconductor module 300 can reduce the plastic strain amplitude of the electrodes. Furthermore, the plastic strain amplitude of the electrodes becomes smaller as the film thickness of the low-elasticity sheet 70 becomes thicker.

Figure 8 shows an example of a flowchart for manufacturing the semiconductor module 300. In step S100, a semiconductor assembly 100 including a semiconductor chip 10 is assembled. A specific method for assembling the semiconductor assembly 100 will be described later. In step S102, the semiconductor assembly 100 is bonded to the cooling unit 110. Alternatively, the assembly of the semiconductor assembly 100 may be completed after the semiconductor assembly 100 is bonded to the cooling unit 110. In step S104, the case 120 is adhered to the cooling unit 110, and the semiconductor assembly 100 is sealed with sealing resin 130. In this way, the semiconductor module 300 is manufactured.

Figure 9A shows an example of a method for manufacturing a semiconductor module 300. In this example, after the step of attaching a low-elasticity sheet 70 to a metal wiring board 60, the metal wiring board 60 is solder-joined above the semiconductor chip 10.

In step S200, the low-elasticity sheet 70 is attached to the metal wiring board 60 with an adhesive. The low-elasticity sheet 70 may be attached after the metal wiring board 60 is punched out, or the low-elasticity sheet 70 may be attached to the metal plate before the metal wiring board 60 is punched out, and then the metal wiring board 60 may be punched out.

In step S202, the metal wiring board 60 with the low-elasticity sheet 70 is solder-joined to the semiconductor chip 10 at the solder portion 43 to assemble the semiconductor assembly 100. The low-elasticity sheet 70 is formed of a material that is heat-resistant to solder reflow. The temperature of the solder reflow is higher than the temperature for hardening the sealing resin 130. In this case, if the low-elasticity sheet 70 has heat resistance to solder reflow, it also has heat resistance for hardening the sealing resin 130.

In step S204, the semiconductor assembly 100 is placed on the cooling section 110. In step S206, the case 120 is attached, and the semiconductor assembly 100 is sealed with sealing resin 130. The processes in steps S204 and S206 are not particularly limited.

Figure 9B shows an example of a method for manufacturing a semiconductor module 300. In this example, a metal wiring board 60 is soldered above the semiconductor chip 10, and then a low-elasticity sheet 70 is attached.

In step S300, the metal wiring board 60 is soldered to the semiconductor chip 10 at the solder section 43 to assemble the semiconductor assembly 100. In step S302, the semiconductor assembly 100 is placed on the cooling section 110.

In step S304, the low-elasticity sheet 70 is attached to the metal wiring board 60. The low-elasticity sheet 70 may be attached to the entire surface of the metal wiring board 60 as in Example 1, or may be attached to a part of the metal wiring board 60. The low-elasticity sheet 70 may be attached to the metal wiring board 60 with an adhesive. The material of the low-elasticity sheet 70 only needs to be heat resistant to the temperature for hardening the sealing resin 130, and does not need to be heat resistant to solder reflow. Then, as in step S206 of FIG. 9A, the case 120 is attached and the semiconductor assembly 100 is sealed with the sealing resin 130.

Figure 10A is a partially enlarged view illustrating the end of the low-elasticity sheet 70 according to the embodiment. The low-elasticity sheet 70 of this embodiment is provided up to the end of the metal wiring board 60. The end of the low-elasticity sheet 70 is approximately aligned with the end of the metal wiring board 60. In other words, the side 77 of the low-elasticity sheet 70 and the side 67 of the metal wiring board 60 form approximately the same plane. The side 77 is part of the joint 72 according to the embodiment. The side 67 is part of the joint 62 according to the embodiment.

The sealing resin 130 is in contact with the side 67 and the side 77. That is, the low-elasticity sheet 70 is not in contact with the side 67 of the joint 62. Therefore, the sealing resin 130 is in contact with the side 67. Because the low-elasticity sheet 70 is in sheet form, it can be positioned so as not to come into contact with the side 67 even if it is provided up to the end of the metal wiring board 60.

The sealing resin 130 is in contact with the side surface 47 of the solder portion 43. That is, the low-elasticity sheet 70 is not in contact with the side surface 47 of the solder portion 43. The sealing resin 130 is also in contact with the semiconductor chip 10, the metal wiring board 60, and the low-elasticity sheet 70. The sealing resin 130 in this example seals and fixes the semiconductor chip 10, the solder portion 43, and the metal wiring board 60, thereby suppressing cracks in the solder portion 43.

Figure 10B is a partial enlarged view illustrating the end of the low-elasticity sheet 70 according to the embodiment. The low-elasticity sheet 70 in this example is provided so as to extend beyond the end of the metal wiring board 60.

The low-elasticity sheet 70 is provided so as to protrude outward from the joint surface 78 with the metal wiring board 60. In this example, the outside is the -X-axis direction side of the joint surface 78. By the low-elasticity sheet 70 protruding outward from the joint surface 78 with the metal wiring board 60, it becomes easier to further alleviate the stress concentration of the sealing resin 130. The low-elasticity sheet 70 may be provided so as to protrude outward from the joint surface 78 with the metal wiring board 60 at the end of the joint 62. The low-elasticity sheet 70 may protrude in a direction parallel to the XY plane from the end of the metal wiring board 60. The position of the end of the joint 62 is not particularly limited. The end of the joint 62 may be the end of the joint 62 on the opposite side to the rising portion 63. The low-elasticity sheet 70 is provided at a distance from the solder portion 43. That is, by fixing the solder portion 43 with the sealing resin 130, the fixing force of the solder portion 43 is increased, and the occurrence of solder cracks can be suppressed. Therefore, the semiconductor module 300 of this example can prevent electrode and resin cracks while suppressing solder cracks, achieving a longer lifespan.

For example, the low-elasticity sheet 70 has an elastic modulus of 1 MPa or more and 1000 MPa or less. By having an elastic modulus of 1000 MPa or less, the plastic strain amplitude (%) of the electrodes of the semiconductor chip 10 can be reduced, and electrode cracks can be suppressed. Furthermore, the low-elasticity sheet 70 may have an elastic modulus of 100 MPa or less. By having an elastic modulus of 100 MPa or less, the low-elasticity sheet 70 can reduce the stress generated in the sealing resin 530, and suppress resin cracks.

Figure 11A is a partial enlarged view for explaining the end of the low elasticity portion 570 according to the comparative example. In the semiconductor module 500 of this example, the metal wiring board 560 is provided on the semiconductor chip 510 via the solder part 543. In addition, the low elasticity portion 570 is provided on the metal wiring board 560.

The low elasticity portion 570 is provided on the metal wiring board 560 by liquid application. Therefore, the film thickness of the low elasticity portion 570 is not uniform, and the ends of the low elasticity portion 570 are thin. Therefore, the stress at the ends of the metal wiring board 560 cannot be sufficiently reduced. Therefore, at the ends of the metal wiring board 560, particularly near the semiconductor chip 510, large stress may occur due to the difference in elasticity between the metal wiring board 560 and the sealing resin 530.

In addition, when applying the low elasticity portion 570, if the low elasticity portion 570 is applied to the end portion of the metal wiring board 560, there is a risk that the low elasticity portion 570 will adhere to the solder portion 543. If the low elasticity portion 570 adheres to the solder portion 543, the fixing strength of the solder will decrease, which may cause solder cracks.

Figure 11B is a partial enlarged view illustrating the end of the low elasticity portion 570 according to the comparative example. The low elasticity portion 570 in this example is provided to cover the side surface 567 of the metal wiring board 560 and the side surface 547 of the solder portion 543. In this case, the metal wiring board 560 and the solder portion 543 cannot be fixed by a hard resin such as the sealing resin 530, and solder cracks may occur.

Figure 12 is a diagram showing an overview of a vehicle 200 according to an embodiment. The vehicle 200 is a vehicle that generates at least a portion of its propulsive force using electric power. As an example, the vehicle 200 is an electric vehicle in which all of the propulsive force is generated by an electric power-driven device such as a motor, or a hybrid vehicle that uses both an electric power-driven device such as a motor and an internal combustion engine driven by a fuel such as gasoline.

The vehicle 200 is equipped with a control device 210 (external device) that controls power-driven equipment such as a motor. The control device 210 is provided with a power conversion device 220 that includes a semiconductor module 300. The power conversion device 220 may control the power supplied to the power-driven equipment. The semiconductor module 300 may be fixed to the control device 210 by an inserted fastening member. The cooling section 110 of the semiconductor module 300 may be supplied with refrigerant from a cooling system of the control device 210 that is connected via a pipe.

Figure 13 is a main circuit diagram of a power conversion device 220 according to an embodiment. The power conversion device 220 may be part of an in-vehicle unit that drives a motor of the vehicle 200. The power conversion device 220 may function as a three-phase AC inverter circuit having power supply terminals P, N, and load terminals U, V, and W.

The semiconductor chips 10-1, 10-2, and 10-3 may form a lower arm in the power conversion device 220, and the semiconductor chips 10-4, 10-5, and 10-6 may form an upper arm in the power conversion device 220. A pair of the semiconductor chips 10-1 and 10-4 may form a leg. A pair of the semiconductor chips 10-2 and 10-5 and a pair of the semiconductor chips 10-3 and 10-6 may similarly form a leg. In the semiconductor chip 10-1, the upper electrode may be electrically connected to the power supply terminal N1, and the lower electrode may be electrically connected to the load terminal U. In the semiconductor chip 10-4, the upper electrode may be electrically connected to the load terminal U, and the lower electrode may be electrically connected to the power supply terminal P1. Similarly, in the semiconductor chips 10-2 and 10-3, the upper electrodes may be electrically connected to the power supply terminals N2 and N3, respectively, and the lower electrodes may be electrically connected to the load terminals V and W, respectively. Furthermore, in the semiconductor chips 10-5 and 10-6, the upper electrodes may be electrically connected to the load terminals V and W, respectively, and the lower electrodes may be electrically connected to the power supply terminals P2 and P3, respectively.

Each of the semiconductor chips 10-1 to 10-6 may be alternately switched by a signal input to the control electrode pad of the semiconductor chip 10. In this example, each of the semiconductor chips 10 may generate heat during switching. The power supply terminals P1, P2, and P3 may be connected to the positive pole of an external power supply, the power supply terminals N1, N2, and N3 to the negative pole, and the load terminals U, V, and W to the load. The power supply terminals P1, P2, and P3 may be electrically connected to each other, and the other power supply terminals N1, N2, and N3 may also be electrically connected to each other.

The present invention has been described above using an embodiment, but the technical scope of the present invention is not limited to the scope described in the above embodiment. It is clear to those skilled in the art that various modifications and improvements can be made to the above embodiment. It is clear from the claims that forms incorporating such modifications or improvements can also be included in the technical scope of the present invention.

The order of execution of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before" or "prior to," and it should be noted that the processes may be performed in any order, unless the output of a previous process is used in a later process. Even if the operational flow in the claims, specifications, and drawings is explained using "first," "next," etc. for convenience, it does not mean that it is necessary to perform the processes in this order.

10: semiconductor chip, 20: laminated substrate, 21: metal plate, 22: insulating plate, 23: circuit portion, 24: circuit portion, 33: solder portion, 34: solder portion, 43: solder portion, 47: side, 60: metal wiring board, 62: joint portion, 63: rising portion, 64: connection portion, 65: rising portion, 66: joint portion, 67: side, 70: low elasticity sheet, 72: joint portion, 73: rising portion, 74: connection portion, 75: rising portion, 76: joint portion, 77: side, 78: joint surface, 79: upper surface, 1 00: semiconductor assembly, 110: cooling section, 112: solder section, 120: case, 130: sealing resin, 200: vehicle, 210: control device, 220: power conversion device, 300: semiconductor module, 500: semiconductor module, 510: semiconductor chip, 520: case, 525: laminated substrate, 530: sealing resin, 540: semiconductor assembly, 543: solder section, 547: side, 550: cooling section, 560: metal wiring board, 563: rising section, 567: side, 570: low elasticity section

Claims (21)

a semiconductor chip having an upper surface electrode and a lower surface electrode opposite to the upper surface electrode;
a metal wiring board having a joining portion for joining to the upper surface electrode of the semiconductor chip and electrically connected to the upper surface electrode of the semiconductor chip;
a sheet-shaped low-elasticity sheet provided on the metal wiring board and having a lower elastic modulus than the metal wiring board;
the low-elasticity sheet is provided at an end of the joint portion, protruding outward from a joint surface with the metal wiring board and spaced apart from the semiconductor chip ;
a portion of the low-elasticity sheet extending outward from a joint surface with the metal wiring board has an area smaller than a portion of the low-elasticity sheet provided on the metal wiring board . a semiconductor chip having an upper surface electrode and a lower surface electrode opposite to the upper surface electrode;
a metal wiring board having a joining portion for joining to the upper surface electrode of the semiconductor chip and electrically connected to the upper surface electrode of the semiconductor chip;
a sheet-shaped low-elasticity sheet provided only on the metal wiring board and having a lower elastic modulus than the metal wiring board. The semiconductor module according to claim 2 , wherein an end of the low-elasticity sheet coincides with an end of the metal wiring board. The semiconductor module according to claim 1 , wherein the metal wiring board has a rising portion connected to the joint portion and extending in a direction away from the semiconductor chip. The semiconductor module according to claim 4 , wherein the low-elasticity sheet is provided on both the joint portion and the rising portion. The semiconductor module according to claim 4 , wherein the low-elasticity sheet is provided on the joint portion and not on the rising portion. the low-elasticity sheet has a joining surface with the metal wiring board at an end of the joint,
The semiconductor module according to claim 1 , wherein the joint portion is soldered to the upper surface electrode of the semiconductor chip. a solder portion for joining the upper surface electrode of the semiconductor chip and the metal wiring board;
and a sealing resin that seals the semiconductor chip and the metal wiring board,
The semiconductor module according to claim 1 , wherein the sealing resin is in contact with the solder portion. The semiconductor module according to claim 8 , wherein the sealing resin is in contact with a side surface of the joint portion of the metal wiring board. The semiconductor module according to claim 8 , wherein the low-elasticity sheet has a modulus of elasticity lower than a modulus of elasticity of the sealing resin. The semiconductor module according to claim 10 , wherein the elastic modulus of the low elasticity sheet is not less than 1/10,000 and not more than 1/10 of the elastic modulus of the sealing resin. a solder portion for joining the upper electrode of the semiconductor chip and the metal wiring board;
The semiconductor module according to claim 1 , wherein the low-elasticity sheet is provided spaced apart from the solder parts. The semiconductor module according to claim 1 , wherein the low-elasticity sheet has an elastic modulus of 1 MPa or more and 1000 MPa or less. The semiconductor module according to claim 1 , wherein the low-elasticity sheet has a thickness of 0.05 mm or more and 1.5 mm or less. The semiconductor module according to claim 1 , wherein the low-elasticity sheet includes any one of a foam, a resin, and a silicone rubber. A method for manufacturing a semiconductor module, comprising the steps of:
Providing a semiconductor chip;
a step of joining a joint portion of a metal wiring board to an upper portion of the semiconductor chip by a solder portion;
and attaching a sheet-shaped low-elasticity sheet having an elastic modulus lower than that of the metal wiring board to the metal wiring board,
the low-elasticity sheet is provided at an end of the joint portion, protruding outward from a joint surface with the metal wiring board and spaced apart from the semiconductor chip ;
the area of a portion of the low-elasticity sheet protruding outward from a joint surface with the metal wiring board is smaller than the area of a portion of the low-elasticity sheet provided on the metal wiring board . A method for manufacturing a semiconductor module, comprising the steps of:
Providing a semiconductor chip;
bonding a metal wiring board to the upper side of the semiconductor chip by a solder part;
and attaching a sheet-shaped low-elasticity sheet having an elastic modulus lower than that of the metal wiring board to the metal wiring board,
The manufacturing method, wherein the low elasticity sheet is provided only on the metal wiring board. The method according to claim 17 , wherein an end of the low-elasticity sheet coincides with an end of the metal wiring board. The manufacturing method according to claim 16 , wherein the low-elasticity sheet is provided spaced apart from the solder parts. The manufacturing method according to claim 16 , further comprising the step of bonding the metal wiring board to the semiconductor chip by the solder portion after the step of attaching the low elasticity sheet to the metal wiring board. The manufacturing method according to claim 16 , further comprising attaching the low elasticity sheet to the metal wiring board after the step of joining the metal wiring board to the upper side of the semiconductor chip by the solder portion.

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