JP7560773B2 - Method for controlling the operating state of a computer system and corresponding computer system - Google Patents

Description

The present invention relates to a method for controlling the operating state of a computer system. Furthermore, the present invention relates to a corresponding computer system.

Driven by the computer industry trend to improve power consumption of computer systems such as notebooks and desktops, more advanced standby states are being implemented to replace or extend traditional computer system states such as the S0 (working) and S3 (standby) states according to the so-called Advanced Configuration and Power Interface (ACPI). In particular, processor and operating system manufacturers have started to push the implementation of a new system state called "Modern Standby", which aims to migrate the standby state known from mobile computing (smartphones, tablets, etc.) to traditional x86 systems.

The main differences of the "Modern Standby" system state from the traditional S3 standby state are persistent network connectivity, the ability to run background tasks (if needed), fast system "wake-up", and improved security implementations. In order to reduce power consumption to a level similar to or lower than that achieved in the traditional S3 standby state, the main board and all connected components and devices (including the CPU) in the computer system are switched to a power saving mode. Furthermore, the power supply unit (PSU) of a desktop PC is switched to a light-load mode. However, the drawback here is that not all power lines can operate with the improved light-load efficiency.

For the "Modern Standby" system state to be reliably adopted and executed, all connected components and devices in the computer system (including the CPU) must support this system state. For example, PCIe devices (PCIe = Peripheral Component Interconnect express) must support a low power mode that can result in a main power disconnection. In addition, operating system driver support is required. If an individual device or component does not meet all the requirements of the "Modern Standby" system state or otherwise prevents a transition to a power saving mode, the computer system will remain energetically in the S0 state (operating) and will not be able to transition to a power standby state or light load operation.

Another problem is that if a device or component in a computer system requires constant updates from the network or background tasks, the power supply unit may experience frequent transitions and changes between main operation and standby modes. Depending on the power supply implementation, this may result in a shortened power supply life or an audible switching noise.

Previous implementations of computer systems using the "Modern Standby" system state have been mainly limited to battery-powered devices such as notebooks that do not use internal power supply units (e.g., ATX power supply units) that need to be switched between main power mode and standby mode. In the context of desktop PCs, only reference designs have been proposed so far that use ATX power supply units with multiple power lines and switch them between main power mode and standby mode constantly, e.g., every second. In the case of power supplies with only one power line, a shut-off time window of, e.g., 2 seconds is implemented in the power supply unit, so that the power supply unit does not turn on for 2 seconds even if an activation signal specifies that it will prevent switching between main power mode and standby mode.

The objective of the present invention is therefore to improve existing solutions for power saving states for x86 systems.

The above problem is solved according to a first aspect by the method according to claim 1. Complementary or improved implementations are given in the dependent claims.

The method is implemented for controlling the operating state of a computer system, the method comprising:
triggering a command to command a transition of the computer system from a main operating state to a standby state, the standby state defining the operation of the computer system with the lowest power consumption compared to the main operating state;
measuring power consumption of a computer system;
maintaining a main power mode of a power supply unit of the computer system as long as the measured power consumption of the computer system exceeds a threshold;
and initiating a transition of the computer system from a main operating state to a power saving state as soon as the measured power consumption of the computer system falls below a threshold, the power saving state corresponding to a system state having lower power consumption compared to the main operating state, and wherein in the power saving state a power supply unit of the computer system is switched to an auxiliary power mode having a lower power output compared to the main power mode.

Such a method improves on existing solutions for standby states for x86 systems by implementing a power-dependent (load-dependent) power-saving state, in which individual components of the computer system are either reduced in their power consumption or completely shut down depending on their power consumption. The power-saving state is a power-dependent state that falls energetically between the main operating state and the standby state requested by the triggering of a command, according to the power consumption of the computer system. Thus, the power-saving state is energetically efficient even before the lowest power consumption defined by the standby state. In the power-saving state, the power supply unit is switched to an auxiliary power mode to save electrical energy. The auxiliary power mode of the power supply unit is, for example, a standby mode or a light-load mode.

Thereby, the reduction of power consumption of a computer system, in particular a desktop PC, can be improved. The method controls the transition from the main operating state to the power saving state as soon as the measured power consumption of the computer system falls below a threshold and a command to enter the standby state is triggered.

Thus, the method has the effect and advantage over conventional solutions of being able to enter a power saving state even when individual components and devices (including the CPU) within the computer system do not support or in some other way prevent the required standby state. In this way, power consumption can still be reduced and the computer system does not energetically remain in the main operating state.

The standby state is an operating state of a computer system in which the computer system is still operating, i.e. not turned off. The standby state corresponds, for example, to a sleep state (sleep) with the lowest power consumption. The standby state is, for example, set in the operating system of the computer system. For example, the standby state is the "modern standby" system state. In this system state, the computer system is in the lowest power consumption state. This system state is, for example, defined in such a way that individual or several components and devices of the computer system behave under operating standby conditions in the same way as in S0 operation according to the ACPI standard, but in the lowest energy consumption state. This allows the power consumption to be reduced to a very low level, while the computer system can still be very quickly reactivated and returned to the main operating state.

The effect and advantage of measuring the power consumption of a computer system is that the main power mode of the computer system's power supply is maintained as long as the measured power consumption of the computer system exceeds a threshold value. This ensures that the computer system operates stably and that the power supply does not switch to the auxiliary power mode in any case, which cannot meet the power requirements of the computer system.

Another effect and advantage of measuring the power consumption of a computer system is that the power saving state can be set depending on the load. This means that the power saving state can be set more or less moderately depending on the remaining power required. For example, if the computer system still requires significant remaining power because background tasks or updates from the network need to be completed, the power saving state can be set more conservatively than if only a few processes or components need to run.

In various implementations of the method, the power-saving state corresponds to a standby state when the computer system is capable of operating in the power-saving state with the lowest power consumption. For example, in such cases, the power-saving state corresponds to a "modern standby" system state.

In various implementations of the method, the power consumption of the computer system is repeatedly measured in multiple measurement processes as long as the measured power consumption of the computer system exceeds the threshold value. After each measurement process a timer is started. A new measurement operation is performed as soon as the timer has finished. This has the effect and advantage that an executing task or process that affects the power consumption can be finished first before the power consumption of the computer system is measured again. In a complementary implementation of the method, the timer is incremented after each measurement process. This has the advantage that different executing tasks or processes with different completion periods can be accommodated.

In various implementations of the method, if a certain number of measurement operations are reached and the measured power consumption of the computer system still exceeds the threshold, an error signal is generated. This has the advantage that an internal controller or a user of the computer system can be informed that a power saving state cannot be entered (regardless of the command requested). This improves the system safety of the computer system.

In various implementations, the procedure includes:
measuring power consumption of the computer system in a power saving state;
and attempting to further reduce the power consumption of the computer system whenever the measured power consumption of the computer system in the power saving state exceeds a threshold value.

These steps have the effect and advantage of allowing a controller within the computer system to respond to changes in power consumption. Further reductions in power consumption of the computer system are targeted to keep the computer system in a power saving state despite an increase in power consumption above a threshold. For example, the CPU may be (further) throttled or other components or devices that are not required may be turned off.

In various implementations, the process includes:
The method further includes the step of initiating a transition of the computer system from the power saving state back to a main operating state and returning a power supply unit of the computer system to a main power mode if the measured power consumption of the computer system in the power saving state continues to exceed the threshold after a (pre-) determined period of time.

This method has the effect and advantage of preventing unintentional shutdown of the computer system due to overload in a power saving state.

According to a second aspect, the above problem is solved by a computer system according to claim 7. Complementary or improved implementations are given in the dependent claims.

The computer system includes a power supply unit and a component that is powered by the power supply unit.
triggering a command to transition the computer system from a main operating state to a standby state, the standby state defining the operation of the computer system with the lowest power consumption as compared to the main operating state;
measuring a power consumption of the computer system and maintaining a main power mode of a power supply unit of the computer system so long as the measured power consumption of the computer system exceeds a threshold;
As soon as the measured power consumption of the computer system falls below a threshold, the computer system initiates a transition from a main operating state to a power saving state, the power saving state being load-adjustable and corresponding to a system state having lower power consumption compared to the main operating state, and in the power saving state, a power supply unit of the computer system is switched to an auxiliary power mode having a lower power output compared to the main power mode.

Such a computer system also achieves the effects and advantages described above in relation to the method of the first aspect.

In various embodiments of the computer system, a measurement circuit is configured to measure the power consumption of the computer system and generate a control signal. The control signal indicates whether the measured power consumption of the computer system exceeds a threshold value. This has the effect and advantage that the power consumption of the computer system can be easily determined. The measurement circuit is configured, for example, as an analog circuit with a shunt and a measurement amplifier, whereby a detection of the time variation of the current consumption in the computer system is performed. This can be, for example, the first derivative of the current, di/dt. For example, the current signal is averaged over a certain period of time and a control signal is generated if the averaged current signal exceeds a threshold value.

In various implementations, the computer system is further configured to provide the control signal generated by the measurement circuit to a controller, which controls the transition of the computer system between a main operating state and a power saving state. This has the effect and advantage that the various states can be controlled automatically and reliably. The controller is, for example, an embedded controller on the main board of the computer system.

In various embodiments, the computer system is configured to execute procedures of the types described above.

The invention is explained in more detail below by means of an exemplary embodiment using several drawings.

1 shows a schematic flow diagram of an implementation of a method for controlling the operational state of a computer system. 1 illustrates a schematic diagram of components of a computer system according to an exemplary embodiment. 3 illustrates a circuit layout of a measurement circuit according to an exemplary embodiment; 1 shows a schematic diagram of a comparison of standby state implementation with and without power saving states;

Figure 1 shows a schematic flow chart of an implementation of a method for controlling the operating state of a computer system, where to the left of the dashed separator (under the heading "System States"), various method steps S1 to S7 related to the system states of the computer system are shown. To the right of the dashed separator (under the heading "PSU States"), representative states of the power supply unit of the computer system are shown.

The procedure begins with step S1, where the computer system is in a main operating state. In this state, the computer system is powered on and all devices and components of the computer system are active. The power supply unit of the computer system is on in this system state and is in a main power mode to supply power to the computer system. For example, the main operating state of the computer system corresponds to the S0 state according to the ACPI standard. In step S1, a command is triggered to command the transition of the computer system from the main operating state to a standby state. This command is triggered, for example, by the operating system of the computer system. This is done, for example, by the user of the computer system pressing the power button of the computer system or a software button of the operating system of the computer system.

Then, in step S2, the power consumption of the computer system is measured. For this purpose, for example, the current consumption of the components of the computer system from the power supply unit of the computer system is measured at a specified supply voltage and compared with a predefined threshold value. The measurement method and measurement circuit for this are explained in more detail below. In step S2, the power supply unit of the computer system is still in mains mode (ON state).

A timer is started in step S3. After the timer has expired, the power consumption is measured again according to step S2. If the measured power consumption is still above the upper limit, the system switches again to step S3 and a new timer is started. With each such repetition between steps S2 and S3, the time of the timer is extended as long as the power consumption is above the threshold. For example, in an embodiment according to FIG. 1, a successive increase of the timer delay from 500 ms to 10 s is performed. For example, different timers are set with values 500 ms, 1 s, 5 s, and 10 s. Such an approach allows running tasks or processes that affect the power consumption of the computer system to be first terminated before the power consumption of the computer system is measured again. The more frequent the switching between steps S2 and S3, the corresponding timer is set to allow longer running or background tasks and their termination.

Steps S2 and S3 are repeated, for example, until a predetermined number of iterations (e.g., five iterations) are completed or the power consumption of the computer system falls below a threshold. If, after the predetermined number of iterations is completed, the power consumption of the computer system is still above the threshold, an error signal is generated, indicating a failure to enter the power saving state. This is notified, for example, by an alarm signal or message to a user of the computer system, for example by an operating system.

However, if the power consumption falls below the threshold before the maximum number of iterations is reached, the procedure moves from step S2 to step S4. In step S4, any preconfiguration of or entry into the power saving state is performed. The preconfiguration specifies, for example, the configuration of the devices, components, or software (e.g., the operating system) of the computer system. It includes, for example, specific commands or sets of commands for controlled transition of devices and components into the power saving state. For example, the preconfiguration is performed once when the power saving state is first entered. The preconfiguration is performed in step S4, and when this is completed, the computer system enters the power saving state. Alternatively, the preconfiguration may be performed separately from step S4, for example prior to the procedure described herein.

The power saving state is a system state with lower power consumption compared to the main operating state. In particular, the power saving state is an intermediate energy state of the computer system between the main operating state and the standby state commanded by the command in step S1. For example, the standby state defines the operation of the computer system with the lowest power consumption compared to the main operating state. For example, the standby state is a "modern standby" system state.

In the power saving state according to step S4, depending on the power consumption, the individual power consumptions of the computer system are reduced or they are turned off completely. For example, the fan of the computer system is slowed down or turned off completely and the processor (CPU) has its clock speed throttled. The power supply of the computer system may then be switched to an auxiliary power mode. The auxiliary power mode of the power supply unit is, for example, a standby mode or a light load mode. The computer system is then in a power saving state, which is described in more detail below in comparison with the standby state.

In the power saving state, the power consumption of the computer system continues to be measured in step S5. If the power consumption exceeds the above threshold in the power saving state, a power warning or system interrupt is generated and the procedure moves to step S6, where a further power reduction of the computer system is initiated. For this purpose, an attempt is made to further reduce the system power, for example by further throttling the CPU. For example, the CPU is throttled to its minimum clock speed in this case. Power reduction of other devices and components in the computer system may also be performed at this stage.

If, as a result of the operation in step S6, the power consumption falls below the threshold again within a specified period of time, the procedure returns to step S5, and the computer system remains in the power saving state. In an exemplary implementation, the specified period is 5 ms. On the other hand, if the operation in step S6 does not result in a reduction of the power consumption below the threshold within a period of 5 ms, the procedure moves to step S7, whereby the power saving state is released and, if necessary, an overload event is logged and power is increased. The operation in step S7 thus returns the computer system from the power saving state to the main operating state. In this case, the power supply of the computer system is returned to the main operating state (ON state). According to the embodiment of FIG. 1, the procedure thus returns to step S1 again.

2 shows a schematic diagram of components of a computer system 1 according to an embodiment. The method previously described with respect to FIG. 1 is used, for example, in a computer system 1 according to FIG. 2. The computer system 1 according to FIG. 2 comprises a power supply unit 2 which supplies the components 4a, 4b (or other components not shown) of the computer system 1. The power supply unit 2 is, for example, a so-called single-wire power supply unit. This means that the power supply unit outputs only one supply voltage. The power supply unit is, for example, configured to output a supply voltage in the auxiliary power mode which is the same as in the main power mode, but with a lower output power than in the main power mode. This has the advantage that a supply voltage is also available in the auxiliary power mode and is used to power the critical components 4a, 4b. In the exemplary embodiment shown in FIG. 2, the power supply unit 2 comprises an output to which a 12V supply voltage is applied. This supply voltage is, for example, used to power a PCI Express (PCIe) component 4a on the main board of the computer system 1. Various other board voltages can be generated by several voltage regulators 3a-3d. For example, voltage regulator 3a is provided to provide a supply voltage for the CPU core of computer system 1, which can be used to power the CPU (component 4b). In addition, voltage regulators 3b-3d generate further board voltages of 5V, 3.3V, and 1.8V, as shown by way of example in FIG. 2.

Furthermore, the computer system 1 comprises a measurement circuit 5 connected between the output of the power supply unit 2 and the voltage regulators 3a-d. In the exemplary embodiment according to FIG. 2, the measurement circuit 5 comprises a shunt connected to a circuit for detection of the change in current over time (di/dt). The circuit for detection detects the time change in the current drawn from the power supply unit. The shunt comprises, for example, a measurement resistor, which measures the current. In the exemplary embodiment according to FIG. 2, the measurement of the power consumption by the measurement circuit 5 includes only the supply path to the component 4b of the computer system 1, without taking into account the component 4a. However, in an alternative embodiment, the component 4a may also be included in the measurement of the power consumption.

The measurement circuit 5 thus takes over the task of measuring the power consumption of the computer system 1, as described in steps S2 and S5 in the procedure of FIG. 1. If the power consumption of the computer system 1 exceeds a threshold, the measurement circuit 5 generates a control signal 8 and transfers it to the controller 6 of the computer system 1 as a power warning or a system interrupt. In the exemplary embodiment according to FIG. 2, the controller 6 is an embedded controller. The controller 6 controls the operating state of the computer system 1 depending on the control signal 8. For example, if the control signal 8 indicates a continuous exceedance of the power consumption threshold of the computer system 1 (by a defined first signal level of the control signal 8) and if the repetition of the measurement operation exceeds a defined number of times, the controller 6 generates an error signal 13, as previously described in FIG. 1 for steps S2 and S3. This indicates that the computer system 1 has failed to enter a power saving state. The error signal 13 is sent to the chipset 7, which processes it accordingly, takes appropriate actions and, if necessary, issues a signal to the user of the computer system 1. The chipset 7 is, for example, a so-called system on chip (SoC).

On the other hand, if the control signal 8 indicates (by a defined second signal level of the control signal 8) that the power consumption falls below the threshold during the repetitive measurement process, the controller 6 generates a trigger signal 14, which causes the power supply unit 2 to switch to the auxiliary power mode. As a result, the computer system 1 enters a power saving state, whereby the components 4a and 4b, respectively, reduce or limit their power consumption. See also the above description of step S5 according to FIG. 1. The controller 6 shown in FIG. 2 also uses the measurement circuit 5 to continue to monitor the power consumption of the computer system 1 after entering the power saving state, and, if necessary, initiates the operations described above in steps S6 and S7 in relation to FIG. 1.

Signaling between the controller 6 and the power supply unit 2 or the chipset 7 is performed, for example, by pin signaling according to the so-called General Purpose Input/Output standard (GPIO).

The detection of the change in current over time di/dt in the measurement circuit 5 comprises, for example, a current measurement amplifier in which the current is averaged over a short predetermined period, for example 8 ms, and detects after this period whether the power consumption exceeds a predefined threshold. The measurement circuit 5 is, for example, configured to transmit a control signal 8 as a digital output signal to the controller 6.

An alternative or complementary embodiment of the measuring circuit 5 is shown in FIG. 3. The measuring circuit 5 has a measuring resistor R20, which acts as a shunt to detect the current of the computer system. On the left side, the measuring resistor R20 is connected to the signal input 1 (IN(+)) of the current measuring amplifier 9. On the right side, the measuring resistor R20 is connected to the signal input 10 (IN(-)) of the current measuring amplifier 9. Thus, the supply signal on the power supply side is present at input 1 of the current measuring amplifier 9, while the supply signal on the load side (towards the computer system 1) is present at input 10 of the current measuring amplifier 9. Furthermore, a capacitor C4 is connected in parallel with the measuring resistor R20 and acts as a filter capacitor.

The current measurement amplifier 9 determines a difference signal from the input signals 1 and 10 and compares it with a reference voltage at the input 7 (CMPREF) of the current measurement amplifier 9. The reference signal is formed by a voltage divider R26, R28 from the standby power supply (P3V3P_STBY) of the power supply unit. The reference signal also serves as a voltage supply (VS+) at the input 2 of the current measurement amplifier 9. The output signal (ALERT#) at the output 3 of the current measurement amplifier 9 is used to inform the behavior of the difference signal at the inputs 1 and 10 of the current measurement amplifier 9 relative to the reference signal at the input 7 of the current measurement amplifier 9. In normal operation (the difference signal is below the reference signal), the output signal (ALERT#) has a signal level of HIGH. As a result, the transistor Q5, which is also supplied with current by the standby power supply (P3V3P_STBY), is conductive. The capacitor C6 is discharged. At this stage, the further transistor Q1 cuts off and is also powered by the standby power supply (P3V3P_STBY) and produces a signal level HIGH at its collector terminal 3, which becomes the control signal 8.

When the difference signal at inputs 1 and 10 of the current measurement amplifier 9 exceeds the reference signal at input 7 of the current measurement amplifier 9, the current measurement amplifier 9 generates a LOW signal level of an output signal (ALERT#) at its output 3. This turns off transistor Q5. This causes capacitor C6 to be charged from the standby power supply (P3V3P_STBY) via resistors R23 and R25.

Capacitor C6 acts as a delay element. As soon as capacitor C6 reaches a certain charge state (and the voltage drop across C6 exceeds a certain value), the further transistor Q1 is switched into a conductive state via diode D3 and pulls down the signal level at its collector terminal 3 to a signal level LOW, which becomes the control signal 8. Capacitor C6 is adjusted so that a charge constant with a time delay of, for example, 8 ms is set.

In this way, the measuring circuit 5 determines the current consumption of the computer system according to FIG. 3, which is recognized as the change in current over time di/dt and is averaged over a period of 8 ms. If the current consumption after 8 ms is still above the reference level (input 7 of the current measuring amplifier 9), the signal level of the control signal 8 is set to LOW by the measuring circuit 5. The control signal 8 thus indicates that the power consumption of the computer system is above the specified upper limit. On the other hand, if the power consumption of the computer system falls again within 8 ms, the transistor Q1 remains in the OFF state (non-conducting state of the diode D3), which keeps the control signal 8 at the signal level HIGH. In this case, the control signal 8 indicates that the current consumption does not exceed the critical limit.

In an exemplary embodiment, when the measurement circuit 5 according to FIG. 3 is used in an implementation according to FIG. 2, the control signal 8 according to FIG. 3 becomes the output signal of the measurement circuit 5 according to FIG. 2 for corresponding signaling to the controller 6, e.g. as described above. The computer system may be configured such that the signal output 8 is ignored if no transition to or operation in a power saving state is required.

Figure 4 shows a schematic diagram of a comparison of the implementation of the standby state of a computer system of the above type with and without the above power saving states. In the upper part of Figure 4, the standby state of a computer system of the above type is shown for the absence of power saving states. Here, the computer system can switch between a main operating state 10 and a standby state 11. The standby state 11 here corresponds, for example, to the "modern standby" system state. In the upper case according to Figure 4, the computer system is in the main operating state 10 at least as long as there is some system activity. The main operating state 10 is assumed when the system is fully switched on and all devices are active (see system state 10a). However, the main operating state 10 is also active when the system is in standby and there is little or limited system activity (see system state 10b). In this case, the computer system enters the standby state 11 only if the system is in standby and no system activity is recorded. Only in such a case of low power consumption is the power supply switched to standby (auxiliary power mode). In all other cases, the power supply unit is active in the main power mode and supplies electrical energy to the computer system.

The above case according to FIG. 4 thus shows that the power consumption of the power supply unit 2 of the computer system can be reduced only if the standby state 11 is envisaged, regardless of the power saving state described. However, if some or all of the components or devices of the computer system prevent the transition to the standby state 11 or are in a state of low system activity, the computer system remains in the main operating state 10.

In contrast, the lower case of FIG. 4 represents a standby state in the presence of the described power saving states. In this case, the computer system is in the main operating state 10 only if the system is fully switched on and all devices are active. In the case of such a higher power consumption, the power supply is active and in the main operating state (see step S1 in FIG. 1). In the lower case according to FIG. 4, however, the computer system is in the power saving state 12. The power saving state 12 can be assumed depending on the power consumption. This means that the power saving state 12 is already assumed when the system is switched on but some devices are in standby (system state 12a). Already in that case, the power supply unit is switched to standby (auxiliary power mode), which results in lower power consumption. The less system activity is recorded, the deeper the computer system goes into standby (system state 12b). In this way, the power saving state 12 can further limit the power consumption. As soon as the computer system is fully in standby and no system activity is recorded, the power saving state 12 in the lower case of FIG. 4 corresponds to the standby state 11. In the power saving state 12, which corresponds to the lower case of FIG. 4, all components and devices of the computer system can be addressed in the same way as in, for example, state S0 according to the ACPI standard. This has the advantage that no additional software implementation or device or driver support is required.

The overview according to FIG. 4 shows that in the described power saving states (see in particular the description of FIG. 1) a reduced consumption can already be set by the control of the computer system, when the computer system is still active but some devices have already switched to a standby state (from system state 12a onwards). Thus, according to the scenario below in FIG. 4, even if individual components or devices of the computer system do not allow the standby state 11, the power consumption of the computer system can still be reduced according to the invention.

All designs and implementations are selected as examples only.

1 Computer system 2 Power supply unit 3a to 3d Voltage regulators 4a, 4b Component 5 Measuring circuit 6 Controller 7 Chipset 8 Control signal 9 Current measuring amplifier 10 Main operating state 10a, 10b System state in main operating state 11 Standby state 12 Power saving state 12a, 12b System state in power saving mode 13 Error signal 14 Trigger signal R20 Measuring resistor (shunt)
Method steps S1 to S7

Claims (10)

1. A method for controlling an operating state of a computer system having a power supply unit, the power supply unit providing a first output power in a first power mode of the power supply unit and providing a second output power lower than the first output power in a second power mode of the power supply unit, comprising:
triggering a command commanding a transition of the computer system from a main operating state to a standby state, the standby state defining operation of the computer system with the lowest power consumption compared to the main operating state;
measuring power consumption of said computer system in said main operating state in response to said command ;
maintaining the first power mode of the power supply unit of the computer system as long as the measured power consumption of the computer system exceeds a threshold;
initiating a transition of the computer system from the main operating state to a power saving state when the measured power consumption of the computer system falls below the threshold, the power saving state corresponding to a system state having lower power consumption compared to the main operating state ;
The step of initiating a transition of the computer system from the main operating state to a power saving state comprises:
preconfiguring the power saving state with a specific command or set of commands for controlled transition of devices and components of the computer system into the power saving state;
and upon completion of the pre-configuration, entering the power saving state of the computer system , and switching the power supply unit of the computer system in the power saving state to the second power mode when individual components of the computer system have reduced power consumption or are turned off completely. if the computer system is capable of operating in the power saving state with the lowest power consumption, the power saving state corresponds to the standby state;
The method of claim 1. the power consumption of the computer system is repeatedly measured in a plurality of measurement operations so long as the measured power consumption of the computer system exceeds the threshold;
a timer is started after each measurement operation and a new measurement operation is performed as soon as said timer expires;
The method of claim 1. if a particular number of measurement operations are reached and the measured power consumption of the computer system still exceeds the threshold, an error signal is generated.
The method according to claim 3. measuring power consumption of the computer system in the power saving state;
and attempting to further reduce power consumption of the computer system once the measured power consumption of the computer system in the power saving state exceeds the threshold. 6. The method of claim 5, further comprising: if the measured power consumption of the computer system in the power saving state continues to exceed the threshold after a determined period of time, initiating a transition of the computer system from the power saving state back to the main operating state, wherein the power supply unit of the computer system is returned to the first power mode. 1. A computer system having a power supply unit and a component powered by the power supply unit,
the power supply unit provides a first output power in a first power supply mode of the power supply unit and a second output power lower than the first output power in a second power supply mode of the power supply unit ;
The computer system comprises:
triggering a command to transition the computer system from a main operating state to a standby state, the standby state defining operation of the computer system with the lowest power consumption compared to the main operating state;
in response to the command, measuring a power consumption of the computer system in the main operating state , and maintaining the first power mode of the power supply unit of the computer system so long as the measured power consumption of the computer system exceeds a threshold;
Initiating a transition of the computer system from the main operating state to a power saving state when the measured power consumption of the computer system falls below the threshold, the power saving state corresponding to a system state having lower power consumption compared to the main operating state.
It is configured as follows:
Initiating the transition of the computer system from the main operating state to the power saving state comprises:
preconfiguring the power saving state with a specific command or set of commands for controlled transition of the components into the power saving state;
entering the power saving state of the computer system upon completion of the preconfiguration, and switching the power supply unit of the computer system in the power saving state to the second power mode when at least some of the components of the computer system have reduced power consumption or are completely turned off;
A computer system comprising : a measurement circuit configured to measure a power consumption of the computer system and generate a control signal indicative of whether the measured power consumption of the computer system exceeds the threshold;
8. The computer system of claim 7. The computer system of claim 8, further configured to forward the control signal generated by the measurement circuit to a controller and to control, by the controller, transitions of the computer system between the main operating state and the power saving state. The computer system is configured to execute a method according to any one of claims 1 to 6.
8. The computer system of claim 7.

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