JP7563149B2 - Method for manufacturing silicon carbide semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a silicon carbide (hereinafter referred to as SiC) semiconductor device including a semiconductor element made of SiC.

It is known that crystal defects such as micropipes exist in SiC substrates used in SiC semiconductor devices (see, for example, Patent Document 1).

JP 2004-172556 A

A SiC semiconductor device with a vertical semiconductor element is manufactured by the following procedure. First, a SiC substrate having a front and back surface is prepared. A front surface element structure is formed on the front surface side of the prepared SiC substrate. The front surface element structure is a part that constitutes a semiconductor element. After that, the back surface side of the SiC substrate is removed to thin the SiC substrate. Then, a back surface electrode is formed on the back surface of the SiC substrate.

Here, if micropipes are present on the back surface of the SiC substrate when the back surface electrode is formed, a portion of the back surface electrode will enter the micropipes, causing a depression in the back surface electrode and deteriorating the flatness of the back surface electrode. If the flatness of the back surface electrode deteriorates, the flexural strength of the semiconductor device will decrease. It is known that the flexural strength is correlated with the reliability of semiconductor elements. For this reason, it is not desirable for the flexural strength to decrease due to the deterioration of the flatness of the back surface electrode. The problem of the flatness of the back surface electrode deteriorating also occurs when holes due to crystal defects other than micropipes are present on the back surface of the SiC substrate.

In view of the above, an object of the present invention is to provide a method for manufacturing a SiC semiconductor device capable of improving the flatness of a back surface electrode.

In order to achieve the above object, according to a first aspect of the present invention, a method for manufacturing a SiC semiconductor device including a vertical semiconductor element includes the steps of:
Preparing a SiC semiconductor substrate (20) having a front surface (20a) and a back surface (20b) and having a hole (15) due to a crystal defect on the back surface;
Forming a front surface side element structure (11-13, 32-41) constituting a part of a semiconductor element on a front surface side of a SiC semiconductor substrate;
After forming the front side element structure, removing the back side of the SiC semiconductor substrate to thin the SiC semiconductor substrate;
After thinning the SiC semiconductor substrate, a blocking material (22) is formed on the back surface;
forming a blocking portion (16) that has one surface (16a) constituting a part of the back surface and blocks the hole on the back surface by removing the blocking material so that the blocking material is present in at least a portion of the hole on the back surface side and the area of the back surface excluding the hole is exposed from the blocking material;
and forming a back surface electrode (23) on a back surface including one surface of the blocking portion.

As a result, when the back electrode is formed, one surface of the blocking portion can prevent the back electrode from entering the hole portion. This can prevent the occurrence of depressions in the back electrode. Therefore, this can improve the flatness of the back electrode compared to when no blocking portion is formed.

The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and the specific components described in the embodiments described below.

1 is a cross-sectional view of a semiconductor device according to a first embodiment. 2A to 2C are diagrams illustrating a manufacturing process of the semiconductor device shown in FIG. 3A to 3C are diagrams showing the manufacturing process of the semiconductor device subsequent to FIG. 2; 4 is a diagram showing a manufacturing process of the semiconductor device subsequent to FIG. 3; 5A to 5C are diagrams showing the manufacturing process of the semiconductor device subsequent to FIG. 4; 6 is a diagram showing a manufacturing process of the semiconductor device subsequent to FIG. 5; 7A to 7C are diagrams showing the manufacturing process of the semiconductor device subsequent to FIG. 6; 1 is an enlarged view of a back surface electrode formed near a micropipe present on the back surface of a SiC substrate in a semiconductor device of Comparative Example 1. FIG. 4 is an enlarged view of a back surface electrode formed near a micropipe present on the back surface of the SiC substrate in the semiconductor device of the first embodiment. FIG. FIG. 11 is a cross-sectional view of a semiconductor device according to a second embodiment.

The following describes embodiments of the present invention with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other are denoted by the same reference numerals.

First Embodiment
1, the SiC semiconductor device 1 of the present embodiment includes a Schottky diode as a vertical semiconductor element. Specifically, the SiC semiconductor device 1 includes an n ⁺ type SiC substrate 10, an n-type layer 11, a Schottky electrode 12, a protective film 13, and an ohmic electrode 14.

The SiC substrate 10 is a semiconductor substrate made of single crystal SiC with a predetermined n-type impurity concentration. The SiC substrate 10 has a front surface 10a and a back surface 10b on the opposite side. The n-type layer 11 is formed on the front surface 10a of the SiC substrate 10. The n-type layer 11 is made of SiC with a lower n-type impurity concentration than the SiC substrate 10. The Schottky electrode 12 is formed on the surface of the n-type layer 11. The protective film 13 covers the surface of the n-type layer 11 around the Schottky electrode 12 and the surface of the Schottky electrode 12.

The n-type layer 11, Schottky electrode 12, and protective film 13 form a front-side element structure that constitutes part of a semiconductor element formed on the front surface 10a side of the SiC substrate 10. The ohmic electrode 14 is a back surface electrode formed on the back surface 10b of the SiC substrate 10.

The Schottky electrode 12 is made of a metal material such as aluminum, and is in Schottky contact with the n-type layer 11. The protective film 13 is made of a synthetic resin material such as polyimide. The ohmic electrode 14 is made of a metal material such as Ti/Ni/Au.

The SiC substrate 10 has micropipes 15. The micropipes 15 are large screw dislocations, and are hollow crystal defects that penetrate the SiC substrate 10 in the c-axis direction of the SiC single crystal. The diameter of the micropipes 15 is, for example, 100 nm or more and 10 μm or less. The micropipes 15 reach the back surface 10b from the front surface 10a of the SiC substrate 10. Therefore, the micropipes 15 are present on the back surface 10b of the SiC substrate 10. The micropipes 15 present on the back surface 10b of the SiC substrate 10 are holes due to crystal defects present on the back surface 10b of the SiC substrate 10.

The SiC semiconductor device 1 includes a blocking portion 16 that blocks the micropipes 15 on the rear surface 10b of the SiC substrate 10. The blocking portion 16 is not formed in the area of the rear surface 10b of the SiC substrate 10 except for the micropipes 15. That is, the blocking portion 16 is present only in the micropipes 15 on the rear surface 10b of the SiC substrate 10. The blocking portion 16 has a surface 16a that constitutes a part of the rear surface 10b of the SiC substrate 10. The surface 16a of the blocking portion 16 is continuous with the area of the rear surface 10b of the SiC substrate 10 except for the blocking portion 16, and is flush with the rear surface 10b of the SiC substrate 10. An ohmic electrode 14 is formed on the rear surface 10b of the SiC substrate 10, including the surface 16a of the blocking portion 16.

The blocking portion 16 is not embedded in the entire area of the micropipe 15, but is present only in a portion of the micropipe 15 on the back surface 10b side in the extension direction of the micropipe 15. The blocking portion 16 may be embedded in the entire area of the micropipe 15. In other words, the blocking portion 16 may be present in the entire area of the micropipe 15 in its extension direction.

Next, the manufacturing method of the SiC semiconductor device 1 of this embodiment will be described with reference to Figures 2 to 7.

First, as shown in FIG. 2, a SiC wafer 20, which is a disk-shaped SiC semiconductor substrate, is prepared. The SiC wafer 20 corresponds to the SiC substrate 10. The SiC wafer 20 has a front surface 20a and a back surface 20b on the opposite side. The front surface 20a of the SiC wafer 20 corresponds to the front surface 10a of the SiC substrate 10. The back surface 20b of the SiC wafer 20 corresponds to the back surface 10b of the SiC substrate 10. The SiC wafer 20 contains micropipes 15. The micropipes 15 reach the back surface 20b from the front surface 20a of the SiC wafer 20. Therefore, the micropipes 15 are present on the front surface 20a of the SiC wafer 20 and on the back surface 20b of the SiC wafer 20.

Next, as shown in FIG. 3, a front-side element structure is formed on the front surface 20a of the SiC wafer 20. Specifically, an n-type impurity layer 21 made of SiC is formed on the front surface 20a of the SiC wafer 20 by epitaxial growth. The impurity layer 21 corresponds to the n-type layer 11 in FIG. 1. The formation of the impurity layer 21 closes the micropipes 15 present on the front surface 20a of the SiC wafer 20. Thereafter, although not shown, a Schottky electrode is formed on the front surface of the impurity layer 21. Furthermore, a protective film is formed on the front surface of the impurity layer 21 around the Schottky electrode and on the front surface of the Schottky electrode. This forms the Schottky electrode 12 and protective film 13 shown in FIG. 1.

After the front-side element structure is formed, as shown in FIG. 4, the back surface 20b side of the SiC wafer 20 is removed to thin the SiC wafer 20 to the desired thickness. Examples of methods that can be used for thinning include back surface grinding and polishing.

After thinning, as shown in FIG. 5, a blocking material 22 is formed on the rear surface 20b of the SiC wafer 20 so as to block the micropipes 15 present on the rear surface 20b of the SiC wafer 20. The blocking material 22 is a material for forming the blocking portion 16 in FIG. 1.

When the plugging material 22 is deposited, the plugging material 22 is embedded in at least the portion of the micropipe 15 on the back surface 20b side of the SiC wafer 20. That is, the plugging material 22 is embedded in a portion of the micropipe 15 on the back surface 20b side of the SiC wafer 20 in the extension direction of the micropipe 15, or is embedded in the entire area of the micropipe 15.

When forming the blocking material 22, the thickness of the blocking material 22 on the back surface 20b of the SiC wafer 20 is adjusted so that the amount of blocking material 22 that penetrates into the micropipes 15 is an amount that remains as a blocking portion 16 even after the blocking material 22 is removed and planarized.

Either a conductive material or an insulating material may be used as the blocking material 22, but if a conductive material is used, the front and back will be conductive when the blocking material 22 is embedded until it reaches the surface 20a, so it is preferable to use an insulating material. Examples of the blocking material 22 include carbon and _SiO2 . When the blocking material 22 is carbon, a sputtering method or the like is used as a film formation method. When the blocking material 22 is _SiO2 , a plasma CVD method, a spin coating method, or the like is used as a film formation method.

The film-forming temperature for forming the blocking material 22 is lower than the temperature at which the members constituting the front-side element structure melt, soften, or deform. Hereinafter, the temperature at which melt, soften, or deform occurs is also simply referred to as the temperature at which melting or the like occurs. Specifically, when a polyimide film with a melting point of 350°C is used as the protective film 13, the film-forming temperature for the blocking material 22 is lower than 350°C. When an aluminum film is used as the Schottky electrode 12, the aluminum film is baked at 470°C after it is formed. This bake temperature corresponds to the temperature at which melting or the like occurs in the members constituting the front-side element structure. The film-forming temperature for the blocking material 22 is lower than the lowest temperature at which melting or the like occurs in the members constituting the front-side element structure.

Next, as shown in FIG. 6, the blocking material 22 is removed. This allows the blocking material 22 to be present at least in the micropipes 15 on the back surface 20b side of the SiC wafer 20, and the area of the back surface 20b of the SiC wafer 20 excluding the micropipes 15 to be exposed from the blocking material 22. The blocking material 22 can be removed by mechanical removal methods such as grinding and polishing, or chemical removal methods such as dry etching. At this time, the thickness of the layer to be removed is set to be greater than the thickness of the blocking material 22 deposited so that the blocking material 22 does not remain in the area of the back surface 20b of the SiC wafer 20 excluding the micropipes 15. In addition, if the thickness of the layer to be removed is too large, all of the blocking material 22 embedded in the micropipes 15 will disappear, so the thickness of the layer to be removed, i.e., the amount of removal, is set within a range in which the blocking material 22 does not disappear in its entirety.

As a result, the blocking material 22 remains only on the micropipes 15 of the back surface 20b of the SiC wafer 20, forming a blocking portion 16 having a surface 16a that constitutes part of the back surface 20b of the SiC wafer 20. Then, the back surface 20b of the SiC wafer 20, including the surface 16a of the blocking portion 16, is flattened.

Next, as shown in FIG. 7, a back electrode 23 is formed on the back surface 20b of the SiC wafer 20, which includes the surface 16a of the blocking portion 16. The back electrode 23 corresponds to the ohmic electrode 14 in FIG. 1. At this time, a conductive film for forming the back electrode 23 is formed by, for example, a sputtering method.

Then, although not shown, the SiC wafer 20 is diced. This produces the SiC semiconductor device 1 shown in FIG. 1.

Next, the effects of this embodiment will be described in comparison with Comparative Example 1 shown in FIG. 8. Comparative Example 1 shown in FIG. 8 differs from the method for manufacturing a SiC semiconductor device of the first embodiment in that a back electrode 23 is formed on the back surface 20b of the SiC wafer 20 without forming a film of blocking material 22. The other steps of the method for manufacturing a SiC semiconductor device are the same as those of the first embodiment.

In Comparative Example 1, when the back electrode 23 is formed, a part of the back electrode 23 penetrates into the micropipes 15 present on the back surface 20b of the SiC wafer 20, causing a depression in the back electrode 23 as shown in FIG. 8, and deteriorating the flatness of the back electrode 23. When the flatness of the back electrode 23 deteriorates, local stress increases and the flexural strength of the SiC semiconductor device decreases. When the flexural strength decreases, the reliability of the semiconductor element decreases. In other words, cracks, chipping, deformation, etc. due to mechanical stress and thermal stress are more likely to occur.

In contrast, in the manufacturing method of the SiC semiconductor device 1 of this embodiment, after the SiC wafer 20 is thinned and before the back electrode 23 is formed, as shown in FIG. 6, a blocking portion 16 having a surface 16a that constitutes a part of the back surface 20b of the SiC wafer 20 is formed. Then, as shown in FIGS. 7 and 9, a back surface electrode 23 is formed on the back surface 20b of the SiC wafer 20, including the surface 16a of the blocking portion 16. In this way, as shown in FIG. 1, in the SiC semiconductor device 1 of this embodiment, the ohmic electrode 14, which is the back surface electrode, is formed on the back surface 10b of the SiC substrate 10, including the surface 16a of the blocking portion 16.

As a result, when the back electrode 23 is formed, the surface 16a of the blocking portion 16 can prevent the back electrode 23 from entering the micropipe 15. Therefore, as shown in FIG. 9, the occurrence of depressions in the back electrode 23 can be prevented, and the flatness of the back electrode 23 can be improved compared to Comparative Example 1. Therefore, the decrease in the flexural strength of the SiC semiconductor device 1 can be prevented.

The back surface 20b of the SiC wafer 20, including the surface 16a of the blocking portion 16, is preferably a flat surface. In other words, it is preferable that there is no step between the surface 16a of the blocking portion 16 and the area of the back surface 10b of the SiC substrate 10 excluding the blocking portion 16. In this case, the surface of the back surface electrode 23 can be made flat. Note that, as long as the flatness of the back surface electrode 23 is improved compared to Comparative Example 1, the back surface 20b of the SiC wafer 20, including the surface 16a of the blocking portion 16, does not need to be completely flat, and only needs to be close to flat.

Incidentally, there is a conventional technique for blocking micropipes by forming a SiC film on the surface of a SiC substrate by epitaxial growth (see, for example, Patent Document 1 and JP 2007-137689 A). Therefore, as a manufacturing method of a SiC semiconductor device in Comparative Example 2, it is considered to form a SiC film on the back surface of the SiC wafer by epitaxial growth before forming a front surface side element structure on the front surface side of the SiC wafer. In this case, after forming the front surface side element structure, the back surface side of the SiC wafer is removed to thin the SiC wafer. Then, a back surface electrode is formed on the back surface of the SiC wafer.

However, in Comparative Example 2, before the SiC wafer is thinned, a SiC film is formed on the back surface of the SiC wafer by epitaxial growth to close the micropipes, but the micropipes inside the SiC wafer remain hollow. Therefore, when the SiC wafer is thinned after a SiC film is formed on the back surface of the SiC wafer by epitaxial growth, the micropipes become exposed on the back surface of the SiC wafer.

In contrast, in this embodiment, after the SiC wafer 20 is thinned, a blocking portion 16 is formed on the rear surface 20b of the SiC wafer 20, so that the micropipes 15 present on the rear surface 20b of the SiC wafer 20 can be blocked.

As a method for manufacturing the SiC semiconductor device of Comparative Example 3, it is possible to form a front-side element structure on the front side of a SiC wafer, remove the back side of the SiC wafer to thin the SiC wafer, and then form a SiC film on the back side of the SiC wafer by epitaxial growth. However, epitaxial growth is performed at high temperatures of 1600°C or higher, which melts the members that make up the front-side element structure, such as the Schottky electrode 12 and protective film 13. For this reason, the method for manufacturing the SiC semiconductor device of Comparative Example 3 cannot be implemented.

In addition, as a conventional technique, there is a technique in which spin-on glass (i.e., SOG) as a highly heat-resistant material is applied to the back surface of a SiC substrate, poured into the micropipes, and sintered at 500°C to completely fill the entire micropipe with SOG (see, for example, JP 2006-278609 A). Therefore, as a method for manufacturing a SiC semiconductor device in Comparative Example 4, it is possible to apply SOG to the back surface of the SiC wafer before forming a front-side element structure on the front surface side of the SiC wafer, and completely fill the entire micropipe with SOG. In this case, after forming the front-side element structure, the back surface side of the SiC wafer is removed to thin the SiC wafer. Then, a back electrode is formed on the back surface of the SiC wafer.

However, when forming a layer made of SiC as part of the front-side element structure, an activation heat treatment of 1600°C or higher, which is specific to SiC, is performed. For this reason, in Comparative Example 4, this activation heat treatment melts the SOG embedded in the micropipes, exposing the micropipes on the back surface of the SiC wafer. Therefore, the manufacturing method of the SiC semiconductor device in Comparative Example 4 cannot be implemented.

In addition, as a manufacturing method of the SiC semiconductor device of Comparative Example 5, it is possible to form the SOG shown in Comparative Example 4 after forming the front-side element structure. That is, after forming the front-side element structure on the front side of the SiC wafer and removing the back side of the SiC wafer to thin the SiC wafer, SOG is applied to the back side of the SiC wafer and poured into the micropipe and sintered at 500 ° C. However, if the members constituting the front-side element structure melt, soften or deform when heated at 500 ° C., the front-side element structure melts, softens or deforms during the sintering process of the SOG at 500 ° C. For example, when a polyimide film is used as the protective film, the polyimide film melts during the sintering process of the SOG at 500 ° C. Also, when an aluminum electrode is used as the Schottky electrode, the aluminum electrode softens and deforms during the sintering process of the SOG at 500 ° C. For this reason, the front-side element structure cannot be maintained. Therefore, the manufacturing method of the SiC semiconductor device of Comparative Example 5 cannot be implemented.

In contrast, in the manufacturing method of the SiC semiconductor device of this embodiment, the deposition temperature when depositing the blocking material 22 is set to a temperature lower than the temperature at which the members constituting the front-side element structure melt. This makes it possible to prevent the members constituting the front-side element structure from melting, softening, or deforming when depositing the blocking material 22, and to maintain the front-side element structure.

Second Embodiment
10, the SiC semiconductor device 1A of this embodiment includes a vertical MOSFET as a vertical semiconductor element. Specifically, the SiC semiconductor device 1A includes an n ⁺ type SiC substrate 31, an n ⁻ type drift layer 32, a p type base region 33, an n ⁺ type source region 34, a deep layer 35, and the like.

The SiC substrate 31 is a semiconductor substrate made of single crystal SiC with a predetermined n-type impurity concentration. The SiC substrate 31 has a surface 31a and a back surface 31b on the opposite side. The drift layer 32 is formed on the surface 31a of the SiC substrate 31. The drift layer 32 is made of SiC with a lower n-type impurity concentration than the SiC substrate 31. The base region 33 is formed on the drift layer 32. The base region 33 is made of p-type SiC. The surface portion of the base region 33 is a contact region 33a with a higher p-type impurity concentration. The source region 34 is formed on the base region 33. The source region 34 is made of SiC with a higher n-type impurity concentration than the drift layer 32. A p-type deep layer 35 is formed on the surface portion of the drift layer 32. The deep layer 35 has a higher p-type impurity concentration than the base region 33.

The SiC semiconductor device 1A also includes a gate insulating film 37, a gate electrode 38, an interlayer insulating film 39, a source electrode 40, a protective film 41, and a drain electrode 42.

A gate trench 36 is formed on the surface 31a side of the SiC substrate 31, penetrating the base region 33 and the source region 34 to reach the drift layer 32. The portion of the base region 33 located on the side of the gate trench 36 is used as a channel region that connects the source region 34 and the drift layer 32 when the vertical MOSFET is in operation. A gate insulating film 37 is formed on the inner wall surface of the gate trench 36, including this channel region. In this way, the gate insulating film 37 is formed on the surface of the base region 33 between the drift layer 32 and the source region 34.

The gate electrode 38 is formed on the gate insulating film 37 so as to fill the gate trench 36. The gate trench 36 is filled with the gate electrode 38 and the gate insulating film 37. The interlayer insulating film 39 covers the gate electrode 38 and the gate insulating film 37. A contact hole 39a is formed in the interlayer insulating film 39. The source electrode 40 is formed on the interlayer insulating film 39. The source electrode 40 is electrically connected to the source region 34 through the contact hole 39a. The source electrode 40 is made of a metal material such as aluminum. The protective film 41 covers the source electrode 40. The protective film 41 is made of a synthetic resin material such as polyimide.

The drift layer 32, base region 33, source region 34, deep layer 35, gate trench 36, gate insulating film 37, gate electrode 38, interlayer insulating film 39, source electrode 40, and protective film 41 form a front-side element structure that constitutes part of a semiconductor element formed on the front surface 31a side of the SiC substrate 31. The drain electrode 42 is a back surface electrode formed on the back surface 31b of the SiC substrate 31.

As in the first embodiment, the SiC substrate 31 has micropipes 15. The micropipes 15 are present on the rear surface 31b of the SiC substrate 31. As in the first embodiment, the SiC semiconductor device 1A has a blocking portion 16 that blocks the micropipes 15 on the rear surface 31b of the SiC substrate 31. The description of the blocking portion 16 is the same as in the first embodiment. A drain electrode 42 is formed on the rear surface 31b of the SiC substrate 31, including one surface 16a of the blocking portion 16.

The manufacturing method of the SiC semiconductor device 1A of this embodiment is the same as that of the first embodiment, except for the formation of the front-side element structure. In this embodiment, the SiC wafer 20 described in the first embodiment corresponds to the SiC substrate 31. The front surface 20a of the SiC wafer 20 corresponds to the front surface 31a of the SiC substrate 31. The back surface 20b of the SiC wafer 20 corresponds to the back surface 31b of the SiC substrate 31. The back surface electrode 23 corresponds to the drain electrode 42.

When forming the front side element structure, as shown in FIG. 3, an n-type impurity layer 21 made of SiC is formed on the front side 20a of the SiC wafer 20 by epitaxial growth. The impurity layer 21 corresponds to the drift layer 32 in FIG. 10. Then, as shown in FIG. 10, a p-type deep layer 35 is formed by ion-implanting p-type impurities into the drift layer 32. A base region 33 and a source region 34 are formed on the drift layer 32 on which the deep layer 35 is formed. For example, after epitaxially growing the base region 33 and the source region 34, a contact region 33a of the base region 33 is formed by ion-implanting p-type impurities. Note that the source region 34 may be formed by ion-implanting n-type impurities after epitaxially growing the base region 33. Then, a gate trench 36, a gate insulating film 37, a gate electrode 38, an interlayer insulating film 39, a source electrode 40, and a protective film 41 are formed. This forms the front side element structure.

As explained above, the manufacturing method of the SiC semiconductor device 1A of this embodiment is the same as that of the first embodiment, except for the formation of the front-side element structure. Therefore, the same effects as those of the first embodiment can be obtained in this embodiment as well.

In this embodiment, an n-channel type vertical MOSFET in which the first conductivity type is n-type and the second conductivity type is p-type has been described as an example, but a p-channel type vertical MOSFET in which the conductivity types of each component are inverted may also be used. In the above description, a vertical MOSFET has been described as an example of a semiconductor element having a MOS structure, but the present invention can also be applied to an IGBT having a similar MOS structure. In the case of an n-channel type IGBT, the only difference is that the conductivity type of the SiC substrate 31 is changed from n-type to p-type in this embodiment, and the other structures and manufacturing methods are the same as in this embodiment. Furthermore, the semiconductor element may have a planar type MOS structure, not limited to a trench gate type MOS structure. In other words, as long as a gate insulating film is formed on the surface of the base region between the drift layer and the source region, and a gate electrode is arranged on this gate insulating film, it may be a trench gate type or a planar type.

Other Embodiments
(1) In each of the above-described embodiments, in the manufacturing method of the SiC semiconductor device 1, 1A, after removing the blocking material 22 to form the blocking portion 16, the back surface electrode 23 is formed on the back surface 20b of the SiC wafer 20. In the manufacturing method of these SiC semiconductor devices 1, 1A, after forming the blocking portion 16 and before forming the back surface electrode 23, it may be added that the back surface 20b of the SiC wafer 20 including the one surface 16a of the blocking portion 16 is planarized by CMP (i.e., chemical mechanical polishing) or the like. This can further improve the planarity of the back surface 20b of the SiC wafer 20 including the one surface 16a of the blocking portion 16, and can further improve the planarity of the back surface electrode 23.

(2) In each of the above-described embodiments, micropipes 15 are present on the back surface of the SiC substrate 10, 31 and the SiC wafer 20, but the present invention can also be applied when holes due to crystal defects other than micropipes are present. A hole due to a crystal defect is a hole caused by a crystal defect. This hole may or may not penetrate the SiC substrate 10, 31 and the SiC wafer 20.

(3) The SiC semiconductor device of the first embodiment includes a semiconductor element having a diode structure. The SiC semiconductor device of the second embodiment includes a semiconductor element having a MOS structure. However, the SiC semiconductor device may include a vertical semiconductor element having another structure.

(4) The present invention is not limited to the above-described embodiment, and can be modified as appropriate within the scope of the claims, and includes various modified examples and modifications within the equivalent scope. In addition, the above-described embodiments are not unrelated to each other, and can be combined as appropriate, except when the combination is clearly impossible. In addition, in each of the above-described embodiments, it goes without saying that the elements constituting the embodiment are not necessarily essential, except when it is specifically stated that they are essential or when it is clearly considered to be essential in principle. In addition, in each of the above-described embodiments, when the numbers, values, amounts, ranges, etc. of the components of the embodiment are mentioned, they are not limited to the specific numbers, except when it is specifically stated that they are essential or when it is clearly limited to a specific number in principle. In addition, in each of the above-described embodiments, when the material, shape, positional relationship, etc. of the components are mentioned, they are not limited to the material, shape, positional relationship, etc., except when it is specifically stated that they are essential or when it is clearly limited to a specific material, shape, positional relationship, etc. in principle.

REFERENCE SIGNS LIST 10 SiC substrate 10b back surface 14 Schottky electrode 15 Micropipe 16 Closing portion 16a One surface 20 SiC wafer 20b back surface 23 Back surface electrode

Claims (3)

A method for manufacturing a silicon carbide semiconductor device including a vertical semiconductor element, comprising:
A silicon carbide semiconductor substrate (20) is provided having a front surface (20a) and a back surface (20b), and a hole (15) caused by a crystal defect is present on the back surface;
forming a front surface side element structure (11-13, 32-41) constituting a part of the semiconductor element on the front surface side of the silicon carbide semiconductor substrate;
After forming the front surface side element structure, removing the back surface side of the silicon carbide semiconductor substrate to thin the silicon carbide semiconductor substrate;
After thinning the silicon carbide semiconductor substrate, a blocking material (22) is formed on the back surface;
removing the blocking material so that the blocking material is present in at least a portion of the hole on the back surface side and the area of the back surface excluding the hole is exposed from the blocking material to form a blocking portion (16) having one surface (16a) constituting a part of the back surface and blocking the hole on the back surface;
forming a back surface electrode (23) on the back surface including the one surface of the blocking portion. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the temperature at which the blocking material is deposited is lower than the temperature at which the members constituting the front-side element structure melt, soften, or deform. The method for manufacturing a silicon carbide semiconductor device according to claim 1 or 2, further comprising planarizing the back surface of the silicon carbide semiconductor substrate, including the one surface of the blocking portion, after forming the blocking portion and before forming the back surface electrode.

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