JP7567566B2 - Information processing device and program - Google Patents

Description

The present disclosure relates to an information processing device and a program, and in particular to an information processing device and a program for setting a control device.

Factory automation (FA) technology using control devices such as programmable controllers (PLCs) has become widespread in various production sites. With the recent development of information and communication technology (ICT), control devices in the FA field are now able to run not only conventional sequence programs, but also various application programs.

For example, JP 2020-61055 A (Patent Document 1) discloses that a processor in a control device executes a high-priority program and a low-priority program within a certain control period, and executes a low-priority program during free time in the processor so as not to interfere with the execution of the high-priority program.

JP 2020-61055 A

In the above-mentioned control device, the first program, which has a high priority, is repeatedly executed by the processor at a fixed cycle. Furthermore, in order not to impede the execution of the first program, the processor is made to execute the second program and the third program during the processor's free time during the control cycle. From the viewpoint of improving calculation speed and performance, the processor performs calculations within the set control cycle up to the very last moment without exceeding the cycle. However, because the processor and peripheral circuits are in a high load state, the power consumption of the control device is large. The greater the power consumption of the control device, the greater the amount of heat generated by the control device.

The control device is designed so that it can be used at a certain ambient operating temperature. The device that is actually manufactured is then evaluated to see if it can be used up to that ambient operating temperature. The design and evaluation are performed under harsh conditions for the control device, i.e., under conditions where the processor performs calculations until just before the end of the control period (maximum load condition).

Due to the need for small size and low manufacturing costs, the control device may not have sufficient heat dissipation capacity. For example, if the control device is operated under maximum load at an ambient temperature higher than the upper limit of the operating ambient temperature determined during the design and evaluation stages, there is a possibility that the control device may malfunction, stop, or break down.

Some processors have a function that automatically reduces the clock frequency when the temperature is high. By reducing the clock frequency, the power consumption of the processor is reduced, and the amount of heat generated by the processor can be reduced. However, in control devices used in production sites such as PLCs, there is a problem that the control performance decreases when the clock frequency is reduced. This can cause changes in the operation of the object (manufacturing equipment) controlled by the control device.

The environments in which control devices can be used are becoming more diverse. As a result, there is a possibility that the control device will be used at temperatures higher than the ambient temperature for which it was intended. For example, if one were to increase the size of the casing to improve the heat dissipation performance of the control device, a new design for the control device would be required. Due to requirements regarding size and manufacturing costs, it is not easy to change the hardware.

One object of the present invention is to provide an information processing device and a program executed by the information processing device for configuring a control device so that the control device can be used at higher ambient temperatures.

An example of an information processing device of the present disclosure is an information processing device having a processor and for making settings related to a task executed by a control device that controls a control target, and includes an input unit that accepts user input related to an operation mode of the control device, a setting unit that sets the operation conditions of the control device according to the user input, and a transfer unit that transfers the operation conditions of the control device set by the setting unit to the control device. The operation modes include a first mode and a second mode for operating the control device at a higher temperature than the operating temperature in the first mode. When the second mode is selected by user input, the setting unit allocates free time of the processor within the control period of the task.

According to this disclosure, when the second mode is selected by the user, the information processing device allocates free time for the processor within the control period. During the free time, the processor does not perform calculations, so the amount of heat generated by the processor is reduced. Therefore, it becomes possible to operate the control device at a temperature higher than the ambient temperature in the first mode. The information processing device can set the control device so that the control device can operate at a temperature higher than the ambient temperature in the first mode.

In the above disclosure, when the second mode is selected by user input, the setting unit allocates execution time for a high-priority task having a high priority for execution by the processor among the multiple tasks within a first remaining time that is obtained by subtracting free time from the control period.

According to the above disclosure, it is possible to secure free processor time within a control period without affecting the execution of high priority tasks. Therefore, for example, it is possible to operate the control device at high ambient temperatures without affecting the execution of tasks of high importance.

In the above disclosure, when the second mode is selected by user input, the setting unit determines whether a low-priority task, which has a low execution priority, among the multiple tasks can be assigned within a second remaining time that is the control period minus the free time and the execution time of the high-priority task. If the low-priority task can be assigned within the second remaining time, the setting unit assigns the execution time of the low-priority task within the second remaining time. If the low-priority task cannot be assigned within the second remaining time, the setting unit assigns the second remaining time to the free time.

According to the above disclosure, by executing a high priority task and a low priority task within a control period, the control performance of the control object can be improved. If a low priority task cannot be executed, the free time within the control period can be made longer. Therefore, the effect of suppressing the amount of heat generated by the processor can be improved.

In the above disclosure, when the second mode is selected by user input, the setting unit allocates the maximum execution time of the high priority task based on the fluctuation of the execution time of the high priority task within the first remaining time.

According to the above disclosure, it is possible to ensure that high priority tasks are executed while securing free time within the control cycle.

In the above disclosure, the setting unit allocates at least a portion of the free time immediately after the high priority task ends.

According to the above disclosure, by shortening the time during which the processor operates continuously, it is possible to prevent the processor temperature from rising significantly without changing the control period.

In the above disclosure, when the first mode is selected by user input, the setting unit assigns multiple tasks so that no free time is reserved within the control period and the multiple tasks are executed within the control period in descending order of priority.

According to the above disclosure, by executing high priority tasks and low priority tasks within a control period, it is possible to improve the control performance of a control object.

According to one example of the present disclosure, a program for causing a computer to execute settings related to a task executed by a control device having a processor and controlling a control target causes the computer to execute the steps of accepting user input related to an operation mode of the control device, setting operation conditions of the control device according to the user input, and transferring the operation conditions of the control device to the control device. The operation modes include a first mode and a second mode for operating the control device at a higher temperature than the operating temperature in the first mode. The setting step includes a step of allocating free time of the processor within the control period of the task when the second mode is selected by user input.

According to this disclosure, the control device can be configured to allow the control device to be used at higher ambient temperatures.

According to the present disclosure, the control device can be configured so that it can be used at higher ambient temperatures.

FIG. 4 is a schematic diagram showing an example of a program execution schedule in a default mode in the control device according to the present embodiment. 5 is a schematic diagram showing an example of a program execution schedule in an extended mode in the control device according to the present embodiment. FIG. FIG. 1 is a schematic diagram of a control system including a control device according to an embodiment. FIG. 2 is a schematic diagram showing an example of a hardware configuration of a computing unit that constitutes the control device according to the present embodiment. 2 is a block diagram showing an example of a hardware configuration of a support device constituting the system according to the present embodiment. FIG. FIG. 2 is a schematic diagram showing an example of a software configuration of a computing unit that constitutes the control device according to the present embodiment. FIG. 13 is a diagram showing an example of a screen for setting an operation mode, which is provided by a display unit of the support device. 4 is a flowchart showing an outline of an operation mode setting process of the control device according to the first embodiment. 11 is a diagram illustrating the priority of time allocation within a control period in the default mode and the extended mode. FIG. FIG. 10 is a diagram illustrating an example of a task process executed by a computing unit of the control device in a default mode. 10A and 10B are diagrams illustrating an example of task processing executed by a computing unit of a control device in an extended mode. 11 is a diagram illustrating another example of task processing executed by the arithmetic unit of the control device in the extended mode. FIG. FIG. 11 is a diagram illustrating yet another example of task processing executed by the arithmetic unit of the control device in the extended mode. 10 is a flowchart showing an outline of an operation mode setting process of a control device according to a second embodiment. 10 is a flowchart illustrating a process related to control of a processor free time during execution of a task by a control device. 13 is a diagram illustrating an example of a task process executed in an extended mode by a computing unit of a control device according to a second embodiment; FIG.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the following description, the same parts and components are given the same reference numerals. Their names and functions are also the same. Therefore, detailed descriptions thereof will not be repeated.

<A. Application Examples>
First, an example of a situation in which the present invention is applied will be described with reference to FIGS.

The control device according to this embodiment is a computer for controlling any control target, and has one or more processors. The control device has two operating modes. The first operating mode is the default (standard) mode. The second operating mode is the extended mode.

Figure 1 is a schematic diagram showing an example of a program execution schedule in the default mode in a control device according to this embodiment. Figure 2 is a schematic diagram showing an example of a program execution schedule in the extended mode in a control device according to this embodiment.

As shown in FIG. 1, when the control device is operated in the default mode, the control device executes a high priority task 20 and a low priority task 30 within a control period.

In this specification, a "task" is a basic unit that is the subject of control for allocating computing resources, and one or more programs to be executed are set for each task. In other words, when computing resources are allocated to a task and the task becomes ready to be executed, execution of one or more programs set for the task is started or resumed.

The high priority task 20 is a task that should be executed within a control period. The program with the highest execution priority (hereinafter simply referred to as "priority") that is repeatedly executed by the processor of the control device is set as the high priority task 20. The high priority task 20 may include, for example, an update process of input/output data and a sequence calculation process that should be executed with the highest priority. A processing time for the high priority task 20 is allocated within the control period so that the high priority task 20 is always executed within the control period.

On the other hand, the low priority task 30 is a task that has a lower execution priority than the high priority task 20, and is executed, for example, when requested. A program that has a lower priority than the program set in the high priority task 20 is set in the low priority task 30.

The control device manages the execution timing of each program set for these tasks according to a scheduler program. The scheduler program manages program execution by allocating computing resources to each program at the appropriate timing and for the appropriate period.

In the default mode, the scheduler program causes the processor to execute the program set as the low priority task 30 during the time during the control period when the high priority task 20 is not being executed, so as not to interfere with the execution of the program set as the high priority task 20. The scheduler program allocates the execution time of the low priority task 30 within the control period so as not to exceed a preset control period. Therefore, in one control period, even when the high priority task 20 and the low priority task 30 are assigned, there may still be free time on the processor. In another control period, only the high priority task 20 may be assigned, and the remaining time may become free time on the processor.

Referring to FIG. 2, the extended mode is selected when the control device is operated at a higher ambient temperature (e.g., 60° C.) than the ambient temperature at which a standard control device is used (e.g., a temperature of 55° C. or less). When the control device is operated in the extended mode, the scheduler program reserves a predetermined percentage of the control period for the processor's free time 40. The percentage of the free time 40 relative to the control period may be a value determined, for example, by the developer of the control device by performing temperature measurement tests using an actual device while changing the free time.

Next, the scheduler program allocates the processing time of the high priority task 20 to the remaining time (first remaining time) obtained by subtracting the free time 40 from the control cycle. The scheduler program then determines whether the low priority task 30 can be allocated to the second remaining time obtained by subtracting the free time 40 and the processing time of the high priority task 20 from the control cycle.

If the low priority task 30 can be assigned to the second remaining time, the high priority task 20 and the low priority task 30 are assigned and executed in that control period. Furthermore, a predetermined length of free time 40 is secured in that control period. On the other hand, if the low priority task 30 cannot be assigned to the second remaining time, only the high priority task 20 is executed in that control period. In other words, the time other than the execution time of the high priority task 20 becomes the processor free time 40. Therefore, the actual processor free time is longer than the time secured in advance.

For example, when the control device is operating in default mode, the maximum processing time of a high priority task may become long, making it impossible to secure free time within the control period. In this state, if the ambient temperature of the control device becomes high, the control period must be set to a long period. However, if the control period is made long, the processing performance of the high priority task decreases. In other words, the control performance of the control device decreases.

According to an embodiment of the present disclosure, in the extended mode, the control device can always secure a certain amount of free time 40 or more within the control cycle. The processor stops calculations during the free time. Therefore, the power consumption of the processor can be reduced compared to operation in the default mode. By reducing the power consumption of the processor, the amount of heat generated by the processor can be reduced. As a result, in the extended mode, the control device can be operated even at a higher ambient temperature than in the default mode. In particular, according to an embodiment of the present disclosure, the control device can be operated even at a high ambient temperature without the need to modify the hardware (e.g., by making the case larger) to improve the heat dissipation of the control device.

<B. Configuration Example>
(B-1. System Configuration)
3 is a schematic diagram of a control system including a control device according to an embodiment. The control device according to this embodiment is provided in, for example, an FA production line 10, and controls a control target. The production line 10 includes control devices 1A, 1B, 1C, 1D, 1E, 1F, 1G, and 1H. The control devices 1A to 1H are realized, for example, by PLCs.

The control devices 1A to 1H are connected to a communication device 4. The control devices 1A to 1H can exchange data with one another via the communication device 4. The communication device 4 is a device for achieving the real-time performance required for communication in the industrial field, and is, for example, a switch that complies with IEEE 802.1.TSN. In addition, the control devices 1A, 1B, 1C, 1D, 1E, 1F, 1G, and 1H are time-synchronized with one another. For this reason, the control devices 1A, 1B, 1C, 1D, 1E, 1F, 1G, and 1H are equipped with a timer function.

In the production line 10 shown in FIG. 3, at least one of the control devices 1A to 1H is a control device according to an embodiment. Hereinafter, control device 1A will be described as a control device according to an embodiment. Note that all of the control devices 1A to 1H may correspond to the control device according to this embodiment. Furthermore, FIG. 3 is not intended to limit the number of control devices included in the production line 10.

The control device 1A executes control processing for the field device 5 to be controlled. The control device 1A has multiple functional units in which functions for executing the control processing are implemented. As shown in FIG. 1, the control device 1A includes an arithmetic unit 100A, functional units 201A, 201B, 201C, 201D, and an I/O unit 300A. The type of the field device 5 is not particularly limited, and may include, for example, a servo motor.

The functions implemented by each of the functional units 201A, 201B, 201C, and 201D are not particularly limited. For example, the functional units 201A, 201B, 201C, and 201D may include a communication unit. In the example shown in FIG. 1, the functional unit 201D is a communication unit and is connected to the communication device 4 via a network.

The AC-DC power supply 400A converts AC voltage into DC voltage and supplies the DC voltage to the control device 1A as the power supply voltage. The power supply voltage of the control device 1A is, for example, DC 24V.

The control device 1B includes an arithmetic unit 100B, a functional unit 202A, and an I/O unit 300B. The functional unit 202A is, for example, a communication unit, and is connected to the communication device 4 via a network. As with the control device 1A, the AC-DC power supply 400B supplies a power supply voltage (for example, DC 24V) to each functional unit of the control device 1B.

The support device 8 is a device that assists the control devices 1A to 1H in making the necessary preparations to control the target. Specifically, the support device 8 provides a setting environment for the tasks executed by each of the control devices 1A to 1H, a monitor screen showing the execution status of the tasks in the control devices 1A to 1H, etc.

(B-2. Hardware configuration of the arithmetic unit)
Fig. 4 is a schematic diagram showing an example of a hardware configuration of a computing unit 100A constituting the control device 1A according to the present embodiment. Referring to Fig. 4, the computing unit 100A includes a processor 101, a chipset 102, a main memory 104, a non-volatile memory 106, a system timer 108, a PLC system bus controller 120, a field network controller 140, and a USB connector 110. The chipset 102 and other components are respectively coupled to each other via various buses.

The processor 101 and chipset 102 are typically configured according to a general-purpose computer architecture. That is, the processor 101 interprets and executes instruction codes sequentially supplied from the chipset 102 in accordance with an internal clock. The chipset 102 exchanges internal data with various components connected thereto, and generates instruction codes required by the processor 101. Furthermore, the chipset 102 has a function of caching data obtained as a result of the execution of arithmetic processing by the processor 101.

For ease of explanation, FIG. 4 illustrates one processor 101, but multiple processors 101 may be arranged, and multiple cores may be implemented in one processor 101. The performance and configuration of the processor 101 may be determined according to the computing resources required.

The arithmetic unit 100A has a main memory 104 and a non-volatile memory 106 as storage means. The main memory 104 is a volatile storage area (RAM) and holds various programs to be executed by the processor 101 after the arithmetic unit 100A is powered on. The main memory 104 is also used as a working memory when the processor 101 executes various programs. Devices such as DRAM (Dynamic Random Access Memory) or SRAM (Static Random Access Memory) are used as this main memory 104.

The non-volatile memory 106 holds data such as a real-time OS (Operating System), the system program of the control device 1A, user programs, and system setting parameters in a non-volatile manner. These programs and data are copied to the main memory 104 as necessary so that the processor 101 can access them. Such non-volatile memory 106 may be a semiconductor memory such as a flash memory. Alternatively, a magnetic recording medium such as a hard disk drive may be used as the non-volatile memory 106.

The system timer 108 generates an interrupt signal and provides it to the processor 101. Typically, the system timer 108 is configured to generate interrupt signals at multiple different cycles depending on the hardware specifications, but it can also be set to generate interrupt signals at any cycle using the OS (Operating System) or BIOS (Basic Input Output System). The interrupt signals generated by the system timer 108 are used to realize control operations for each control cycle.

The computing unit 100A has a PLC system bus controller 120 and a field network controller 140 as communication circuits. These communication circuits transmit output data such as any command value, and receive input data such as detection values obtained from any sensor.

The PLC system bus controller 120 controls data exchange via a PLC system bus (not shown). More specifically, the PLC system bus controller 120 includes a DMA (Dynamic Memory Access) control circuit 122, a PLC system bus control circuit 124, and a buffer memory 126. The PLC system bus controller 120 is internally connected to the PLC system bus via a PLC system bus connector 130.

The buffer memory 126 functions as a transmission buffer for data (output data) output to other units via the PLC system bus, and as a reception buffer for data (input data) input from other units via the PLC system bus. The DMA control circuit 122 transfers output data from the main memory 104 to the buffer memory 126, and transfers input data from the buffer memory 126 to the main memory 104. The PLC system bus control circuit 124 performs the process of transmitting output data from the buffer memory 126 to other units connected to the PLC system bus, and the process of receiving input data and storing it in the buffer memory 126.

The field network controller 140 controls the exchange of data via a field network (not shown). That is, the field network controller 140 controls the transmission of output data and the reception of input data in accordance with the standard of the field network used. More specifically, the field network controller 140 includes a DMA control circuit 142, a field network control circuit 144, and a buffer memory 146.

The buffer memory 146 functions as a transmission buffer for data (output data) output to other devices via the field network, and as a reception buffer for data (input data) input from other devices via the field network. The DMA control circuit 142 transfers output data from the main memory 104 to the buffer memory 146, and transfers input data from the buffer memory 146 to the main memory 104. The field network control circuit 144 transmits output data from the buffer memory 146 to other devices connected to the field network, and receives input data and stores it in the buffer memory 146.

The USB connector 110 is an interface for connecting an external device to the computing unit 100A. For example, the computing unit 100A is connected to the support device 8 via the USB connector 110 and a USB cable. Programs executable by the processor 101 of the computing unit 100A are transferred from the support device 8 and imported into the control device 1A via the USB connector 110.

The temperature sensor 161 detects the internal temperature of the computing unit 100A and outputs a temperature value. The temperature value is sent to the processor 101 via the chipset 102.

(B-3. Hardware configuration of the support device)
The support device 8 according to the present embodiment is realized, for example, by hardware (for example, a general-purpose personal computer) that complies with a general-purpose architecture executing a program.

Fig. 5 is a block diagram showing an example of the hardware configuration of the support device 8 constituting the system according to this embodiment. Referring to Fig. 5, the support device 8 includes a processor 802 such as a CPU or MPU, an optical drive 804, a main memory device 806, a secondary memory device 808, a USB controller 812, an input unit 816, and a display unit 818. These components are connected via a bus 820.

The processor 802 reads out various programs stored in the secondary storage device 808, deploys them in the main storage device 806, and executes them to realize various processes as described below. The processor 802 corresponds to a setting unit that sets the operating conditions of the control device 1A according to user input.

The secondary storage device 808 is configured, for example, by a HDD or SSD. The secondary storage device 808 typically stores a development program 822, which is a tool for creating user programs and configuring tasks. The secondary storage device 808 may also store an OS and other necessary programs.

The support device 8 may have an optical drive 804. The optical drive 804 reads a computer-readable program stored in a recording medium 805 (e.g., an optical recording medium such as a DVD (Digital Versatile Disc)) that non-transiently stores the program. The program read from the recording medium 805 may be installed in a secondary storage device 808 or the like.

The various programs executed by the support device 8 may be downloaded from a server device on the network and installed on the support device 8. In addition, the functions provided by the support device 8 may be realized by using some of the modules provided by the OS.

The USB controller 812 controls data exchange with the control device 1A via the USB connection. In this embodiment, the USB controller 812 realizes a transfer unit for transferring the operating conditions of the control device 1A to the control device 1A.

The input unit 816 is configured with a keyboard, mouse, etc., and accepts user operations, user inputs, etc. In this embodiment, the input unit 816 is configured to accept user inputs related to the operation mode of the control device 1A.

The display unit 818 is composed of a display, various indicators, a printer, etc., and outputs processing results from the processor 802.

Figure 5 shows an example of a configuration in which the necessary functions are provided by the processor 802 executing a program, but some or all of these provided functions may be implemented using dedicated hardware circuits (e.g., ASICs or FPGAs, etc.).

(B-4. Software configuration of the arithmetic unit)
Fig. 6 is a schematic diagram showing an example of the software configuration of the arithmetic unit 100A constituting the control device 1A according to the present embodiment. Fig. 6 shows an example of a software group for providing various functions according to the present embodiment. Instruction codes included in this software group are read at appropriate timing and executed by the processor 101 of the arithmetic unit 100A.

Referring to FIG. 6, the software executed by the computing unit 100A includes a real-time OS 200, a system program 210, and a user program 234.

The real-time OS 200 is designed according to the computer architecture of the computing unit 100A, and provides a basic execution environment for the processor 101 to execute the system program 210 and the user program 234. This real-time OS is typically provided by the manufacturer of the control device or a specialized software company.

The system programs 210 are a group of software for providing the functions of the control device 1A. Specifically, the system programs 210 include a scheduler program 212, an IO processing program 214 (including an input processing program 216 and an output processing program 218), a sequence command execution unit 232, and a system service program 220.

The user program 234 is created according to the control objectives of the user. In other words, it is a program that is created arbitrarily according to the control target to be controlled using the control device 1A. The user program 234 is generated, for example, in the support device 8. The user program 234 is transferred from the support device 8 to the arithmetic unit 100A and stored in the non-volatile memory 106 or the like.

The user program 234 includes an IEC (International Electrotechnical Commission) program 236 consisting of instruction codes such as sequence instructions and motion instructions, and an application program 238 that expresses the procedures of a control application that controls a drive device such as a servo motor.

The IEC program 236 includes a program consisting of one or more instructions written in accordance with the international standard IEC 61131-3 defined by the IEC.

The application program 238 includes one or more commands that define a target trajectory. The application program 238 may be a program written in an interpreted language such as a robotic language or a G language.

The sequence command execution unit 232 executes the IEC program 236 to output a command value. The sequence command execution unit 232 interprets the sequence command included in the IEC program 236 and executes a specified sequence operation (logical operation). Furthermore, the sequence command execution unit 232 calculates a command value according to a motion command included in the IEC program 236. A motion command defines the calculation of a command value over multiple control cycles by a single command, and the sequence command execution unit 232 interprets such a motion command and updates the motion command value for each control cycle.

The system service program 220 is a group of programs for implementing various functions of the control device 1A other than the programs shown individually in FIG. 6. The system service program 220 may be, for example, a program that implements the process of sending and receiving files and data with an external device (i.e., a program related to communication processing), a program that implements abnormality monitoring processing and various analysis processing, etc.

In the computing unit 100A according to this embodiment, the programs included in the system service program 220 are differentiated into at least two priority levels. As an example, the system service program 220 includes a high priority service program 222 that is set as the high priority task 20, and a low priority service program 226 that is set as the low priority task. The high priority service program 222 is set to have a higher priority for execution than the low priority service program 226.

The high priority service program 222 includes an application program execution unit (not shown). The application program execution unit, for example, executes the application program 238 in an interpretive manner and outputs a command value for a control target (e.g., a servo motor).

The scheduler program 212 causes the processor 101 to execute the programs set for each task according to the priority set for each task. In other words, the scheduler program 212 controls the start of processing in each execution cycle and the resumption of processing after processing is interrupted for the IO processing program 214, the system service program 220, etc.

Specifically, the scheduler program 212 includes a control function 2120 and a monitoring function 2122. The control function 2120 is responsible for control for allocating computing resources to each process. The monitoring function 2122 monitors the execution status of each program included in the system service program 220. The monitoring function 2122 grasps the execution status of each service based on notifications by the notification function program of the high priority service program 222 included in the system service program 220, etc.

The IO processing program 214 is responsible for updating the data (input data and output data) available in the computing unit 100A. The input processing program 216 of the IO processing program 214 rearranges the input data received by the PLC system bus controller 120 and/or the field network controller 140 into a format suitable for use by the processor 101 of the computing unit 100A.

The output processing program 218 rearranges the output data generated by the execution of the user program 234 into a format suitable for transfer to the PLC system bus controller 120 and/or the field network controller 140. If the PLC system bus controller 120 or the field network controller 140 requires a command from the processor 101 to perform a transmission, the output processing program 218 issues such a command.

In addition, instead of an implementation in which the processor 101 executes the program shown in FIG. 6 to realize the functions and processing described below, some or all of the functions and processing may be implemented using hardwired circuits such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field-Programmable Gate Array).

Figure 7 is a diagram showing an example of a screen for setting the operation mode provided by the display unit 818 of the support device 8. In the example of the setting screen shown in Figure 7, a default mode and an extended mode are displayed on the screen.

The default mode is the operating mode of the control device 1A when the operating ambient temperature is the standard temperature (55°C in this example). The extended mode is the operating mode of the control device 1A when the operating ambient temperature is a temperature (e.g. 60°C) higher than the operating ambient temperature in the default mode.

When the user operates the input unit 816 of the support device, a cursor represented in the shape of an arrow on the screen moves up and down, and the display of the operation mode pointed to by the arrow is highlighted. When the user operates the input unit 816 to confirm the selection, the input unit 816 accepts the input of the operation mode by the user.
C. Setting the Operation Mode of the Control Device
(C-1. Setting by tool)
In the first embodiment, the support device 8 sets the free time within the control period.

Figure 8 is a flow chart showing an overview of the operation mode setting process of the control device according to the first embodiment. The process shown in Figure 8 is executed by the support device 8 executing a program. Referring to Figure 8, the setting process first includes a mode setting process (step S11) executed in the support device 8. Specifically, the operation mode is determined by the user operating the setting screen (see Figure 7) of the support device 8. The input unit 816 accepts the input of the operation mode by the user.

In step S12, the processor 802 of the support device 8 determines whether the operation mode accepted by the input unit 816 is the default mode or the extended mode. If it is the default mode, then in step S13, settings for control processing in the default mode are executed. On the other hand, if it is the extended mode, then settings for control processing in the extended mode are executed in step S14.

In the process of setting the default mode and the extended mode (steps S13 and S14), the user sets the length of the control period, the allocation of high priority tasks, the allocation of low priority tasks, and the like, using a user interface provided by the support device 8. The allocation of tasks within the control period differs between the default mode and the extended mode.

Figure 9 is a diagram explaining the priority of time allocation within a control period in default mode and extended mode. In default mode, high priority tasks (high priority) are preferentially allocated within a control period, and low priority tasks (medium to low priority) are allocated to the remaining time within the control period. On the other hand, in extended mode, free time of the processor is allocated with top priority within a control period. Next, processing time for high priority tasks (high priority) is allocated. If a low priority task can be allocated to the remaining time within the control period, the low priority task is assigned.

Returning to FIG. 8, when the default mode is set, the user sets the allocation of high priority tasks, the allocation of low priority tasks, and the length of the control period. At this time, the processor 802 of the support device 8 does not reserve processor free time within the control period. Furthermore, the processor 802 enables multiple tasks to be assigned so that the tasks are executed within the control period in descending order of priority. Therefore, in the default mode, basically, processor free time does not occur within the control period. Or, even if processor free time occurs in the default mode, the free time is extremely short.

On the other hand, when the extended mode is set, the processor 802 of the support device 8 reserves a certain percentage (e.g., 10%) of the control period as processor free time. Then, the processor 802 accepts the user's setting so that high priority tasks are assigned within the remaining time (first remaining time) in the control period.

When the extended mode is set, the processor 802 calculates the exclusive processing (task) time taking into account the maximum fluctuation in the processing time of the high priority task. That is, the processor 802 calculates the maximum processing time of the high priority task and displays the calculation result on the display unit 818. The user determines the allocation and control period of the high priority task based on this calculation result. Since the ratio of the processor free time to the control period is constant, the processor free time is determined according to the length of the control period set by the user. Therefore, even if the execution time of the high priority task becomes longer, the processor free time can be secured within the control period.

Furthermore, in the extended mode setting, the processor 802 determines whether a low priority task can be assigned within a second remaining time, which is the control period minus the free time and the execution time of the high priority task. If a low priority task can be assigned within the second remaining time, the processor 802 assigns the execution time of the low priority task within the second remaining time. On the other hand, if a low priority task cannot be assigned within the second remaining time, the processor 802 assigns the second remaining time to the processor free time. Therefore, if a low priority task cannot be assigned within the control period, the processor free time becomes longer than the time initially secured.

When the user finishes setting up in step S13 or step S14, the program and setting contents are transferred from the support device 8 to the control device 1A (PLC) in step S15. In the extended mode, in addition to the contents transferred from the support device 8 to the control device 1A (PLC) in the default mode, information indicating that there is processor free time within the control period and information about the length of that free time are sent to the control device 1A.

When the arithmetic unit 100A receives information regarding the setting of the extended mode, the arithmetic unit 100A sets an interrupt request to the processor 101 based on the free time information contained in the information. This causes a circuit inside the arithmetic unit 100A (for example, the system timer 108) to generate an interrupt signal at the set timing and provide the interrupt signal to the processor 101. In the following explanation, the interrupt request sent to the processor 101 by the interrupt signal is referred to as an "IRQ (Interrupt ReQuest)."

Figure 10 is a diagram illustrating an example of task processing executed by the arithmetic unit of the control device 1A in default mode. In default mode, an IRQ occurs at each set control period. The processor 101 of the arithmetic unit 100A starts processing in response to the IRQ and executes the high priority task 20 and the low priority task 30. In default mode, tasks are executed until just before the end of the control period. Therefore, the calculation speed and control performance are improved.

Figure 11 is a diagram illustrating an example of task processing executed by the arithmetic unit of the control device 1A in extended mode. In extended mode, an IRQ occurs at the start of a control cycle as well as at the start of free time. The processor 101 of the arithmetic unit 100A stops arithmetic processing in response to the IRQ within the control cycle. The time from when the processor 101 stops arithmetic processing to the start of the next control cycle corresponds to free time 40. After arithmetic processing is stopped, the next IRQ occurs at the start of the control cycle. In response to the IRQ, the processor 101 starts arithmetic processing in the next control cycle (execution of high priority task 20).

Figure 12 is a diagram illustrating another example of task processing executed by the arithmetic unit of the control device 1A in the extended mode. As shown in Figure 12, in addition to the start of the free time 40, the end of the free time 40 may be notified to the processor 101 by IRQ. This allows the free time 40 to be placed at any time within the control period, as shown in Figure 12. For example, as shown in Figure 12, the free time 40 may be placed between the high priority task 20 and the low priority task 30 (in other words, immediately after the end of the high priority task 20). By shortening the time during which the processor 101 operates continuously, it is possible to prevent the temperature of the processor 101 from rising significantly without changing the control period.

Figure 13 is a diagram illustrating yet another example of task processing executed by the arithmetic unit of the control device 1A in the extended mode. As shown in Figure 13, multiple free times 40 may be arranged within a control period. The start and end of each free time 40 is notified to the processor 101 by an IRQ. According to this example, not only can the calculation of the processor 101 be stopped immediately after the end of the high priority task 20, but also the calculation of the processor 101 can be stopped immediately after the end of the low priority task 30. This shortens the time that the processor 101 operates continuously, making it possible to prevent the temperature of the processor 101 from rising significantly without changing the control period.

If a high priority task can be divided into multiple tasks, free time can be allocated for each completed task.

(C-2. Setting by control device)
In the second embodiment, when the extended mode is set, the arithmetic unit 100A of the control device 1A determines the free time within the control period based on the measurement value of the temperature sensor 161 (see FIG. 4).

Figure 14 is a flow chart showing an outline of the operation mode setting process of the control device according to the second embodiment. For example, the process shown in Figure 14 is executed by the processor 101 executing the scheduler program 212 of the control device 1A. First, in step S21, the arithmetic unit 100A accepts input of the program and the setting contents. By operating the support device 8, the user determines the operation mode and sets the length of the control period, the allocation of high priority tasks, the allocation of low priority tasks, etc. The program and the setting contents are transferred from the support device 8 to the control device 1A. The setting contents include information related to the operation mode.

In step S22, the processor 101 of the computing unit 100A determines whether the operation mode set by the user is the default mode or the extended mode, based on the information transferred from the support device 8. If the operation mode is the default mode, in step S23, the processor 101 executes settings for control processing in the default mode. On the other hand, if the operation mode is the extended mode, in step S24, the processor 101 executes settings for control processing in the extended mode.

When operating in the default mode, the processor 101 does not reserve processor free time within a control period. Furthermore, the processor 101 assigns multiple tasks within a control period so that multiple tasks are executed within the control period in descending order of priority.

When operating in extended mode, the processor 101 reserves a certain percentage (e.g., 10%) of the control period as processor free time. The processor 101 then allocates a high priority task to the remaining time (first remaining time) in the control period. In this case, the processor 101 allocates the high priority task to the control period taking into account the maximum fluctuation in the processing time of the high priority task.

Furthermore, the processor 101 determines whether a low priority task can be assigned within a second remaining time, which is the control period minus the free time and the execution time of the high priority task. If a low priority task can be assigned within the second remaining time, the processor 101 assigns the execution time of the low priority task within the second remaining time. On the other hand, if a low priority task cannot be assigned within the second remaining time, the processor 101 assigns the second remaining time to the processor free time.

The task processing performed in the default mode and the task processing performed in the extended mode are basically the same as the processing described in the first embodiment, so detailed description will not be repeated. In the second embodiment, when the extended mode is selected, the ratio of the processor free time to the control period changes according to the temperature measured by the temperature sensor 161 (i.e., the operating ambient temperature of the control device 1A). In this respect, the second embodiment differs from the first embodiment.

Figure 15 is a flowchart that explains the process related to the control of processor free time during execution of a task by the control device 1A. In step S31, the processor 101 acquires a temperature value (temperature sensor value) from the temperature sensor 161. The processor 101 may acquire measured values from the temperature sensor 161 at predetermined intervals and calculate the average of the measured values as the temperature value.

In step S32, the processor 101 calculates the ratio of the free time to the control period. There is no particular limitation on the method of calculating the free time from the temperature value. For example, the processor 101 may use an arithmetic formula for calculating the ratio of the free time to the control period from the temperature value.

The processor 101 can determine the ratio of free time to the control cycle from the arithmetic equation and the detection value of the temperature sensor 161, and determine the free time based on this ratio and the control cycle. Alternatively, the non-volatile memory 106 of the arithmetic unit 100A may store a table that associates temperatures with the ratio of free time to the control cycle. The processor 101 can determine the ratio of free time to the control cycle from the table and the detection value of the temperature sensor 161, and determine the free time based on this ratio and the control cycle. In both the arithmetic equation and the table, the ratio of free time to the control cycle is set to be larger as the temperature is higher.

In step S33, the processor 101 determines the free time within the control period. In step S34, the processor 101 sets the free time information in the IRQ.

Processor 101 executes processing according to the above settings. In extended mode, the occurrence of an IRQ causes processor 101 to stop calculations. Furthermore, the IRQ notifies processor 101 of the start time of the next control cycle. In response to the IRQ, processor 101 starts calculations and processing for that control cycle. The time during which processor 101 stops calculations is free time.

Figure 16 is a diagram illustrating an example of task processing executed in extended mode by the arithmetic unit of the control device 1A according to the second embodiment. As shown in Figure 16, in extended mode, the processor 101 lengthens the free time 40 within the control period as the measurement value of the temperature sensor 161 increases. The measurement value of the temperature sensor 161 represents the operating ambient temperature of the control device 1A. On the other hand, if the operating ambient temperature of the control device 1A decreases, the control device 1A shortens the free time 40. In this case, for example, the ratio of free time to the control period is maintained greater than the ratio set in the support device 8.

In the second embodiment, the length of the control period does not change, although the length of the free time changes depending on the temperature. If the length of the control period changes while the system is running, the processing performance of the high priority task may change (become higher or lower). If the processing performance of the high priority task changes, it may affect the operation of the controlled object (e.g., manufacturing equipment). By not changing the length of the control period, it is possible to prevent changes in the processing performance of the high priority task.

Figure 16 shows an example in which a high priority task and a low priority task are executed within one control period. However, if the temperature becomes high, only the high priority task may be executed within one control period, and the remaining time within the control period may be free time. As in the first embodiment, in the second embodiment, the allocation of free time within a control period is given the highest priority, followed by the allocation of high priority tasks. Therefore, free time for the processor can be secured within the control period. This makes it possible to prevent an increase in the amount of heat generated by the processor, and therefore a large increase in the processor temperature.

In the second embodiment, the same arrangement of free time as that shown in Figures 12 and 13 can be adopted by IRQ. The arrangement of free time 40 within the control period is not particularly limited.

<D. Notes>
The present embodiment as described above includes the following technical idea.

[Configuration 1]
An information processing device (8) having a processor (101) and for making settings related to a task executed by a control device (1A) that controls a control target,
An input unit (816) that accepts user input regarding an operation mode of the control device (1A);
A setting unit (802) that sets operating conditions of the control device (1A) in accordance with the user input;
a transfer unit (812) that transfers the operating conditions of the control device (1A) set by the setting unit (802) to the control device (1A),
The operation modes include a first mode and a second mode for operating the control device (1A) at a temperature higher than an operating temperature in the first mode,
When the second mode is selected by the user input, the setting unit (802) allocates free time (40) of the processor (101) within a control period of the task.

[Configuration 2]
When the second mode is selected by the user input, the setting unit (802) allocates execution time of a high-priority task (20) having a high priority for execution by the processor (101) among a plurality of tasks, within a first remaining time obtained by subtracting the free time (40) from the control period.

[Configuration 3]
When the second mode is selected by the user input, the setting unit (802) determines whether or not a low-priority task (30) having a low execution priority among the plurality of tasks can be assigned within a second remaining time obtained by subtracting the free time (40) and the execution time of the high-priority task (20) from the control period,
When the low priority task (30) can be allocated within the second remaining time, the setting unit (802) allocates the execution time of the low priority task (30) within the second remaining time,
3. The information processing device (8) according to configuration 2, wherein, when the low priority task (30) cannot be allocated within the second remaining time, the setting unit (802) allocates the second remaining time to the free time (40).

[Configuration 4]
When the second mode is selected by the user input, the setting unit (802) allocates a maximum execution time of the high priority task (20) based on a fluctuation in the execution time of the high priority task (20) within the first remaining time.

[Configuration 5]
The information processing device (8) according to any one of configurations 2 to 4, wherein the setting unit (802) allocates at least a part of the free time (40) immediately after the high priority task (20) is finished.

[Configuration 6]
The information processing device (8) according to any one of configurations 1 to 5, wherein, when the first mode is selected by the user input, the setting unit (802) allocates the plurality of tasks such that the free time (40) is not reserved within the control period and the plurality of tasks are executed within the control period in descending order of priority.

[Configuration 7]
A program for causing a computer (8) to execute settings related to a task executed by a control device (1A) that has a processor (101) and controls a control target,
The computer (8),
A step (S11) of accepting a user input regarding an operation mode of the control device (1A);
Setting operating conditions of the control device (1A) according to the user input (S13, S14);
and a step (S15) of transferring the operating conditions of the control device (1A) to the control device (1A);
The operation modes include a first mode and a second mode for operating the control device (1A) at a temperature higher than an operating temperature in the first mode,
The setting steps (S13, S14) are
the step (S14) of allocating free time (40) of the processor (101) within a control period of the task when the second mode is selected by the user input.

The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present invention is indicated by the claims, not by the description of the embodiments above, and is intended to include all modifications within the meaning and scope of the claims.

1A to 1H Control device, 4 Communication device, 5 Field device, 8 Support device, 10 Production line, 20 High priority task, 30 Low priority task, 40 Free time, 100A, 100B Arithmetic unit, 101, 802 Processor, 102 Chip set, 104 Main memory, 106 Non-volatile memory, 108 System timer, 110 USB connector, 120 System bus controller, 122, 142 DMA control circuit, 124 System bus control circuit, 126, 146 Buffer memory, 130 System bus connector, 140 Field network controller, 144 Field network control circuit, 161 Temperature sensor, 200 Real-time OS, 201A to 201D, 202A Functional unit, 210 System program, 212 Scheduler program, 214 IO processing program, 216 Input processing program, 218 Output processing program, 220 System service program, 222 high priority service program, 226 low priority service program, 232 sequence command execution unit, 234 user program, 236 IEC program, 238 application program, 300A, 300B I/O unit, 400A, 400B AC-DC power supply, 804 optical drive, 805 recording medium, 806 main memory device, 808 secondary memory device, 812 USB controller, 816 input unit, 818 display unit, 820 bus, 822 development program, 2120 control function, 2122 monitoring function, S11 to S34 steps.

Claims (7)

An information processing device having a processor and configured to perform settings related to a task executed by a control device that controls a control target,
an input unit that accepts user input regarding an operation mode of the control device;
A setting unit that sets operating conditions of the control device in accordance with the user input;
a transfer unit that transfers the operating conditions of the control device set by the setting unit to the control device,
the operating modes include a first mode and a second mode for operating the controller at a temperature higher than an operating temperature in the first mode;
When the second mode is selected by the user input, the setting unit allocates free time of the processor within a control period of the task. The information processing device according to claim 1, wherein when the second mode is selected by the user input, the setting unit allocates execution time of a high-priority task having a high priority for execution by the processor among the multiple tasks within a first remaining time obtained by subtracting the free time from the control period. When the second mode is selected by the user input, the setting unit determines whether or not a low-priority task having a low execution priority among the plurality of tasks can be assigned within a second remaining time obtained by subtracting the free time and the execution time of the high-priority task from the control period,
When the low priority task can be allocated within the second remaining time, the setting unit allocates an execution time of the low priority task within the second remaining time;
The information processing apparatus according to claim 2 , wherein, when the low priority task cannot be assigned within the second remaining time, the setting unit assigns the second remaining time to the free time. The information processing device according to claim 2, wherein when the second mode is selected by the user input, the setting unit allocates a maximum execution time of the high priority task based on a fluctuation in the execution time of the high priority task within the first remaining time. The information processing device according to any one of claims 2 to 4, wherein the setting unit allocates at least a portion of the free time immediately after the high priority task ends. The information processing device according to any one of claims 1 to 5, wherein when the first mode is selected by the user input, the setting unit allocates the multiple tasks so that the free time is not reserved within the control period and the multiple tasks are executed within the control period in descending order of priority. A program for causing a computer to execute settings related to a task executed by a control device that has a processor and controls a control target,
The computer includes:
accepting user input regarding an operational mode of the controller;
setting operating conditions of the controller in accordance with the user input;
and transferring the operating conditions of the control device to the control device;
the operating modes include a first mode and a second mode for operating the controller at a temperature higher than an operating temperature in the first mode;
The setting step includes:
a step of allocating free time of the processor within a control period of the task when the second mode is selected by the user input.

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