JP7569232B2 - Semiconductor Optical Device - Google Patents

Description

The present invention relates to a semiconductor optical element.

In recent years, with the spread of communication devices such as mobile terminals and the Internet, optical transmission and reception modules are required to have higher speeds and larger capacities. Semiconductor optical elements are widely used as light sources for optical transmission and reception modules. Buried hetero-structures (BH structures) are known as one of the most representative semiconductor optical elements. The BH structure is a structure in which both sides of a mesa structure including a multiple quantum well layer are buried with semiconductor layers, and is a semiconductor element with excellent high-speed response due to high reliability and low parasitic capacitance. It is known that the semiconductor layers that bury both sides of the mesa structure are composed of multiple semiconductor layers including semi-insulating semiconductor layers and PN junctions. In addition, direct modulation type semiconductor lasers and electro-absorption modulators (EA (Electro-Absorption) modulators) that modulate continuous light emitted from semiconductor lasers are known as light sources.

Patent Document 1 discloses an EA modulator with a BH structure. The EA modulator has a mesa stripe with Ru-doped InP layers (buried layers) buried on both sides. The mesa stripe is composed of an n-type InGaAsP lower guide layer, an MQW layer (Multiple-Quantum Well), a p-type InGaAsP upper guide layer, a p-type InP cladding layer, and a p-type contact layer. A p-type electrode composed of Ti/Pt/Au is connected to the p-type contact layer. An n-type electrode composed of AuGe/Ni/Ti/Pt/Au is formed on the back side of the substrate (wafer). By applying a voltage between the p-type electrode and the n-type electrode, the EA modulator absorbs light and operates as a modulator. A p-type electrode is also formed on the buried layer with a passivation film sandwiched between them. The oscillator (DFB laser) has a similar structure. Patent Document 2 discloses a manufacturing method for suppressing abnormal growth of the buried layer.

Patent document 3 discloses a structure in which a cladding layer and a contact layer are further formed on top of the BH structure. This structure is called a planar BH (PBH) structure. In the PBH structure, buried layers are placed on both sides of the mesa, and a p-InP cladding layer is placed over the entire buried layer, including the top of the mesa. Furthermore, a p-type InGaAs contact layer is placed on top of that to cover the p-InP cladding layer.

JP 2012-2929 A JP 2010-267674 A International Publication No. 2019/220514

In semiconductor optical devices, Au is used as an electrode material. It is known that Au has a very fast diffusion rate into InP. When Au diffusion progresses and reaches the active layer (multiple quantum well layer), the characteristics and reliability of the semiconductor optical device deteriorate. In a semiconductor optical device with a BH structure created on an InP substrate, for example, semi-insulating InP (SI-InP) in which InP is doped with Fe is used as the embedding material. As disclosed in Patent Document 2, immediately after embedding growth, the embedding layer is exposed on the surface of the semiconductor optical device except directly above the mesa structure, so that the top surface becomes an Fe-InP layer. As disclosed in Patent Document 1, the p-type electrode has a structure in which Ti/Pt/Au are laminated from the semiconductor layer side. Pt suppresses the diffusion of Au into the semiconductor layer, but it is difficult to completely prevent the diffusion of Au due to the influence of the shape of the semiconductor layer surface, etc. Therefore, there is a risk that Au contained in the p-type electrode will diffuse through the embedding layer made of InP to the multiple quantum well layer. Furthermore, in Patent Document 3, a p-type InGaAs contact layer is disposed between the top electrode and the p-type InP cladding layer. The InGaAs layer has a smaller diffusion coefficient of Au than InP, so there is little risk of Au diffusing into the p-type InP cladding layer. However, there is a possibility that Au will diffuse if the InGaAs contact layer is formed thin due to manufacturing variations, etc. If Au diffuses, there is a risk that Au will diffuse into the active layer from the side of the active layer through the p-type InP cladding layer and InP buried layer.

The present invention was made in consideration of these problems, and aims to provide a semiconductor optical element with excellent long-term reliability.

The semiconductor optical device according to the present invention comprises a substrate, a mesa structure provided on the substrate, a semiconductor burying layer provided in contact with both sides of the mesa structure, and an electrode containing Au provided on the upper part of the semiconductor burying layer, the mesa structure being stacked from the substrate side with a first conductive type semiconductor layer, a multiple quantum well layer, and a second conductive type semiconductor layer, the semiconductor burying layer including a first semi-insulating InP semiconductor layer provided in contact with the side of the mesa structure, a first diffusion prevention layer provided in contact with the first semi-insulating InP layer, and a second semi-insulating InP layer provided on the first diffusion prevention layer, the diffusion constant of Au in the first diffusion prevention layer being smaller than that of the first semi-insulating InP layer.

The present invention provides a semiconductor optical element with excellent long-term reliability.

1 is a top view of a semiconductor optical device according to a first embodiment of the present invention. 2 is a cross-sectional view taken along line AA of the semiconductor optical device shown in FIG. 1. 2 is a cross-sectional view taken along line BB of the semiconductor optical device shown in FIG. 1. FIG. 3b is an enlarged view of a portion of FIG. 2 is a cross-sectional view taken along line CC of the semiconductor optical device shown in FIG. 1. FIG. 4b is an enlarged view of a portion of FIG. 2 is an enlarged view of a cross section taken along line BB of the semiconductor optical device shown in FIG. 1 according to a first modified example of the first embodiment of the present invention. 2 is an enlarged view of a cross section taken along line BB of the semiconductor optical device shown in FIG. 1 according to a second modified example of the first embodiment of the present invention. 2 is an enlarged view of a cross section taken along line BB of the semiconductor optical device shown in FIG. 1 according to a third modified example of the first embodiment of the present invention. FIG. 4 is a top view of a semiconductor optical device according to a second embodiment of the present invention. 10 is a cross-sectional view taken along the line DD of the semiconductor optical device shown in FIG. 9. 10 is a cross-sectional view taken along the line E-E of the semiconductor optical device shown in FIG. 9. FIG. 10b is an enlarged view of a portion of FIG. 9 is an enlarged view of a cross section taken along line EE of the semiconductor optical device shown in FIG. 8 according to Modification 1 of the second embodiment of the present invention.

The following describes an embodiment of the present invention in detail with reference to the drawings. In all drawings used to explain the embodiment, components having the same function are given the same reference numerals, and repeated explanations will be omitted. Note that the drawings shown below are merely for explaining examples of the embodiment, and the size of the drawings does not necessarily match the scale described in this example.

[First embodiment]
1 is a top view of a semiconductor optical device 1 according to a first embodiment of the present invention. The semiconductor optical device 1 is a modulator-integrated semiconductor laser in which a semiconductor laser 10 and an electroabsorption modulator (EA modulator) 11 are integrated together. Although an integrated type example is shown in this embodiment, the effects of the present invention can be obtained even if the semiconductor laser or the EA modulator is used alone. The semiconductor optical device 1 is an integrated device in which the semiconductor laser 10, the waveguide 12, and the EA modulator 11 are optically connected to each other in this order. The semiconductor laser 10 emits continuous light, and the waveguide 12 transmits the emitted light of the semiconductor laser 10 to the EA modulator 11. The EA modulator 11 has a multiple quantum well layer that absorbs light corresponding to the oscillation wavelength of the semiconductor laser 10. The continuous light that passes through the waveguide 12 and enters the EA modulator 11 is intensity-modulated by the EA modulator 11 and converted into a modulated optical signal such as a binary or quaternary value signal. The modulated optical signal output from the EA modulator 11 is output from a front end face 13. Note that another structure, for example a window structure in which insulating InP is arranged, may be provided near the front end face. A dielectric non-reflective film (not shown) is formed on the front end face 13. A dielectric highly reflective film (not shown) is formed on a rear end face 14, which is the end face on the opposite side of the semiconductor laser 10. As will be described in detail later, a mesa structure is provided from the semiconductor laser 10 to the EA modulator 11, and both sides of the mesa structure are buried with semiconductor burying layers to form buried semiconductor elements.

Figure 2 is a schematic diagram of the A-A cross section parallel to the optical axis of the semiconductor optical device 1. The semiconductor laser 10, the waveguide 12, and the EA modulator 11 are integrated on the n-InP substrate 30 (substrate) that serves as the base. Here, the n-InP substrate 30 also serves as the first conductive type semiconductor layer. The semiconductor laser 10 is, for example, a DFB (Distributed Feedback) laser that oscillates in the 1.3 μm band. The semiconductor laser 10 may also be a DBF that oscillates in the 1.55 μm band. Furthermore, the semiconductor laser 10 is not limited to a DFB laser, and may also be an FP (Fabry-Perot) laser, a DBR (Distributed Bragg Reflector) laser, or a DR (Distributed Reflector) laser. The semiconductor laser 10 has a laser portion multiple quantum well layer 31 and a diffraction grating layer 32 provided on the upper part of the laser portion multiple quantum well layer 31. A p-InP cladding layer 33 (a second conductive type semiconductor layer) is provided between and above the gratings of the diffraction grating layer 32. Although not shown, optical confinement layers are provided above and below the laser part multiple quantum well layer 31. A contact layer 42 (see FIG. 4b) is provided on the top of the p-InP cladding layer 33. The contact layer 42 is electrically and physically connected to the laser part electrode 34 (second conductive side electrode). A back electrode 35 (first conductive side electrode) is provided on the back side of the n-InP substrate 30 so as to cover almost the entire surface. The semiconductor laser 10 oscillates continuous light by applying an electric field (injecting a current) between the laser part electrode 34 and the back electrode 35. Here, the composition wavelength of the laser part multiple quantum well layer 31 and the grating interval of the diffraction grating layer 32 are set so as to oscillate in the 1.3 μm band.

The EA modulator 11 includes a modulator multi-quantum well layer 39. Although not shown, optical confinement layers are provided above and below the modulator multi-quantum well layer 39. The modulator multi-quantum well layer 39 has a structure that absorbs the emitted light of the semiconductor laser 10 when an electric field is applied. A p-InP cladding layer 33 is disposed on the upper part of the modulator multi-quantum well layer 39. Here, the same p-InP cladding layer 33 as the p-InP cladding layer 33 provided in the semiconductor laser 10 is formed, but it may be different. A modulator electrode 40 (second conductive side electrode) is disposed on the upper part of the p-InP cladding layer 33. The modulator electrode 40 is electrically and physically connected to a contact layer 42 disposed on the upper part of the p-InP cladding layer 33. The contact layer 42 is the same as the layer provided in the semiconductor laser 10, but it may be different. Light absorption is performed by applying a reverse bias between the modulator electrode 40 and the back electrode 35. The modulator electrode 40 is composed of a roughly rectangular modulator mesa electrode 40a provided on the top of the mesa structure and an elliptical modulator pad electrode 40b. The modulator mesa electrode 40a and the modulator pad electrode 40b are connected by a thin extraction electrode. For convenience of explanation, the modulator electrode 40 is divided into multiple parts, but the structure itself is the same integral one. The modulator pad electrode 40b is not limited to an elliptical shape, and may be a square shape, a square shape with rounded corners, or a circle. A signal wire (not shown) for transmitting an electrical signal to the EA modulator 11 is connected to the modulator pad electrode 40b.

The waveguide 12 includes a waveguide semiconductor layer 38. The waveguide semiconductor layer 38 is a semiconductor layer that does not absorb the emitted light of the semiconductor laser 10. For example, it is a bulk layer. In addition, light confinement layers may be arranged above and below the waveguide semiconductor layer 38. A p-InP clad layer 33 is arranged on the upper part of the waveguide semiconductor layer 38. Note that, here, the same p-InP clad layer 33 as that provided in the semiconductor laser 10 is formed, but it may be different. The configuration of the p-InP clad layer 33 of the waveguide 12 is the same as that provided in the semiconductor laser 10, but the thickness is different. The p-InP clad layer 33 of the waveguide 12 is thinner than the p-InP clad layer 33 of the semiconductor laser 10. This is to increase the electrical isolation between the EA modulator 11 and the semiconductor laser 10.

Figure 3a is a schematic diagram of the B-B cross section perpendicular to the optical axis of the EA modulator 11. The mesa structure is composed of a part of the n-InP substrate 30, the modulator multiquantum well layer 39, the p-InP cladding layer 33, and the contact layer 42 (see Figure 3b). Both sides of the mesa structure are buried with a buried layer (BH layer) 36. A modulator electrode 40 is disposed from the top of the mesa structure to the top of the BH layer on one side. The modulator electrode 40 has a three-layer structure of Ti/Pt/Au from the BH layer 36 side. Ti is provided to increase the adhesive strength between the other metal and the semiconductor, and other metals may be used as long as they have a similar effect. Pt functions as a barrier layer that prevents Au from diffusing into the semiconductor layer side. Other metals may be used as long as they have a similar effect. For example, Pd may be disposed instead of Pt. Even if a Pt layer is present, Au may diffuse into the semiconductor layer side through gaps in the Pt layer. In addition, an insulating film (passivation film) 37 is disposed between the modulator electrode 40 and the BH layer 36 on top of the BH layer 36. Here, the insulating film 37 is a SiO2 film, but is not limited to this. Note that another oxide film may be present between the insulating film 37 and the modulator pad electrode 40b. A back electrode 35 is formed on the back surface of the n-InP substrate 30. The BH layer 36 is formed only on parts of both sides of the mesa structure and under the modulator electrode 40, and the area where the BH layer 36 is not formed has a structure in which the insulating film 37 is formed on the n-InP substrate 30.

Figure 3b is an enlarged view of the area enclosed by the dotted square in Figure 3a. Although not shown in Figure 3a, the BH layer 36 of the semiconductor element 1 has a three-layer structure consisting of a first semi-insulating InP layer 36a, a first diffusion prevention layer 36b, and a second semi-insulating InP layer 36c. The second semi-insulating InP layer 36c is a layer thicker than the first semi-insulating InP layer 36a. The BH layer 36 includes a slope portion from the apex of the mesa structure to the left and right in the figure. That is, the BH layer 36 has a slope portion whose height from the surface of the n-InP substrate 30 increases as it moves away from the mesa structure. On one side of the mesa structure (left side in Figure 3b), the BH layer 36 is formed up to the middle of the slope portion. On the opposite side (right side in Figure 3b), there is a horizontal region to the right of the slope portion. The first semi-insulating InP layer 36a and the second semi-insulating InP layer 36c are semi-insulating InP layers doped with Fe. However, they may be doped with Ru. The first semi-insulating InP layer 36a and the second semi-insulating InP layer 36c may be doped with different dopants. The first semi-insulating InP layer 36a and the second semi-insulating InP layer 36c are integrated in the contact area, but are formed as different layers in the manufacturing stage. A second diffusion prevention layer 43 is disposed on the upper surface of the second semi-insulating InP layer 36c. The second diffusion prevention layer 43 is disposed mainly in the horizontal area of the second semi-insulating InP layer 36c, but is formed thinner than the horizontal area so as to cover the slope portion. The second diffusion prevention layer 43 may not be formed on the slope portion. The first diffusion prevention layer 36b and the second diffusion prevention layer 43 are undoped InGaAs. InGaAs has a sufficiently small diffusion constant of Au compared to InP. However, without being limited to this, the first diffusion prevention layer 36b and the second diffusion prevention layer 43 may be any of p-type, n-type, and semi-insulating semiconductors. Also, other materials may be used as long as they have a smaller diffusion constant of Au than InP, such as InGaAsP, InGaAlAs, and InAlAs.

The first diffusion prevention layer 36b is composed of a region that is approximately parallel to the n-InP substrate 30 and a region that is approximately parallel to the stacking direction of the mesa structure. Here, the curved region is shown at a right angle for the sake of simplicity, but in reality, it may be curved gently, including a curve. In addition, in the region that is approximately parallel to the stacking direction of the mesa structure, the first diffusion prevention layer 36b is parallel to the side of the mesa structure in the drawing, but the first diffusion prevention layer 36b may be formed at a certain angle to the side of the mesa structure. In other words, the first diffusion prevention layer 36b in the region that is approximately parallel to the stacking direction of the mesa structure may be formed so that the distance from the side of the mesa structure increases as it approaches the substrate. In addition, the thickness of the region that is approximately parallel to the stacking direction of the mesa structure is thinner than the thickness of the region that is approximately parallel to the n-InP substrate 30. The tip of the region that is approximately parallel to the stacking direction of the mesa structure does not reach the apex of the mesa structure, but reaches halfway through the p-InP cladding layer 33.

Here, the effect of the present invention will be explained. As shown in the problem, Au contained in the electrode has a property of diffusing into InP. In the case of the structure disclosed in Patent Document 1, there is a region where the insulating film 37 is not sandwiched between the electrode and the buried layer made of InP. Specifically, the region is a part of the slope part and the horizontal region of the buried layer. If Au passes through the region where the electrode and InP contact each other, passes through the InP buried layer, and diffuses to the modulator multiquantum well layer 39, crystal cracks etc. occur, and the characteristics and reliability are reduced. However, in this embodiment, the BH layer 36 includes the first diffusion prevention layer 36b. The first diffusion prevention layer 36b is made of InGaAs, and has a property that Au is less likely to diffuse compared to InP. The Au diffused into the second semi-insulating InP layer 36c is trapped by the first diffusion prevention layer 36b and does not reach the modulator multiquantum well layer 39, so it is possible to ensure characteristic deterioration and long-term reliability. Because the first diffusion prevention layer 36b does not completely separate the first semi-insulating InP layer 36a and the second semi-insulating InP layer 36c, there is still a possibility that Au may diffuse through the gap to the modulator multi-quantum well layer 39. However, the first diffusion prevention layer 36b makes it possible to significantly reduce the amount of Au diffusion, and sufficient reliability for practical use is obtained. It is desirable that the tip of the first diffusion prevention film 36b is formed to a height at least exceeding the modulator multi-quantum well layer 39.

When viewed in the horizontal direction of FIG. 3b, it is preferable that the first diffusion prevention layer 36b is 10 nm or more away from the modulator section multiple quantum well layer 39. If the first diffusion prevention layer 36b and the mesa portion are electrically connected, the capacitance increases and the high frequency characteristics deteriorate. On the other hand, from the viewpoint of preventing Au diffusion, it is preferable that the distance between the mesa and the first diffusion prevention layer 36b is 200 nm or less.

If the thickness of the first diffusion prevention layer 36b is 1 nm or more, the Au diffusion prevention effect is sufficient. And to suppress electrical and optical effects, a thickness of 5 nm or less is preferable.

Furthermore, in this embodiment, the second diffusion prevention layer 43 is provided. The second diffusion prevention layer 43 is disposed between the modulator electrode 40 and the second semi-insulating InP layer 36c, and prevents Au from diffusing into the second semi-insulating InP layer 36c. Here, the second diffusion prevention layer 43 is undoped InGaAs, but is not limited thereto. The second diffusion prevention layer 43 may have a different composition from the first diffusion prevention layer 36b. As described above, the second diffusion prevention layer 43 on the slope of the BH layer 36 may be thin or may not be completely formed. However, since the first diffusion prevention layer 36b is provided in this embodiment, it is possible to prevent Au that has not been trapped by the second diffusion prevention layer 43 from diffusing into the modulator multiple quantum well layer 39. Note that, here, an example is described in which two diffusion prevention layers that have the greatest Au diffusion prevention effect are provided, but the first diffusion prevention layer 36b alone is sufficient to obtain a sufficient effect, so the second diffusion prevention layer 43 may not be provided.

Figure 4a is a schematic diagram of a C-C cross section perpendicular to the optical axis of the semiconductor laser 10 shown in Figure 1. The mesa structure is composed of a part of the n-InP substrate 30, the laser part multiple quantum well layer 31, the p-InP cladding layer 33, and the contact layer 42. The p-InP cladding layer 33 includes a diffraction grating layer 32 (see Figure 4b). Both sides of the mesa structure are buried with a BH layer 36. The laser part electrodes 34 are widely arranged on the BH layer 36 on both sides of the mesa structure and across the upper surface of the mesa structure. The laser part electrode 34 has a three-layer structure of Ti/Pt/Au from the BH layer 36 side. In addition, an insulating film 37 is arranged between the laser part electrode 34 and the BH layer 36 on the upper part of the BH layer 36.

Figure 4b is an enlarged view of the area enclosed by the dotted square in Figure 4a. The BH layer 36 has the same structure as the EA modulator 11. In other words, the BH layer 36 has a three-layer structure consisting of a first semi-insulating InP layer 36a, a first diffusion prevention layer 36b, and a second semi-insulating InP layer 36c. The positions and compositions of the layers are the same as those described in Figure 3b. Therefore, in the semiconductor laser 10, as in the EA modulator 11, it is possible to prevent Au from diffusing into the laser portion multiple quantum well layer 31, and a highly reliable semiconductor element can be provided.

Here, the manufacturing method of the semiconductor element 1 is explained. Using known multilayer growth technology, BJ technology, and photolithography technology, the process is performed until just before the BH layer 36 is formed. In this state, the semiconductor laser 10, the waveguide 12, and the EA modulator 11 are each connected to form a mesa structure (high mesa), and nothing is formed on the side of the mesa structure. An oxide film mask is formed on the apex of the mesa structure. Next, the first semi-insulating InP layer 36a to which Fe is added is crystal-grown by the MOCVD method. At this time, the first semi-insulating InP layer 36a is crystal-grown so as to cover the side of the mesa structure and the entire horizontal region (the surface of the n-InP substrate 30) beside the mesa structure. Here, it grows until it covers the contact layer 42 at the apex of the mesa structure. After stacking a thickness of 10 nm on the side of the mesa structure in the horizontal direction on the drawing, the first diffusion prevention layer 36b is grown. At this time, when switching from the first semi-insulating InP layer 36a to the first diffusion prevention layer 36b, the wafer is not taken out of the furnace of the crystallization device, and the first semi-insulating InP layer 36a and the first diffusion prevention layer 36b are continuously grown as multilayers. This is the same for the crystal growth of the second semi-insulating InP layer 36c and the second diffusion prevention layer 43 described later. The first diffusion prevention layer 36b is grown so as to cover the surface of the first semi-insulating InP layer 36a, but the first diffusion prevention layer 36b formed approximately parallel to the side surface of the mesa structure is grown to the middle of the p-InP cladding layer 33 in the height direction without reaching the top of the mesa structure. After stacking the first diffusion prevention layer 36b by 2 nm in the direction away from the side surface of the mesa structure, the second semi-insulating InP layer 36c is grown. After the second semi-insulating InP layer 36c exceeds the height of the mesa structure, it is grown in a shape including a slope portion that becomes higher as it moves away from the mesa structure, as shown in FIG. 3b, etc. After the second semi-insulating InP layer 36c is deposited to a thickness of 6 μm, the second diffusion prevention layer 43 is grown to a thickness of 100 nm in the horizontal region. At this time, the second diffusion prevention layer 43 has regions on the slope that are thinner than 100 nm and regions where it is not grown. Finally, the mask on the mesa structure is removed, and the formation of the BH layer 36 and the second diffusion prevention layer 43 is completed.

Next, the BH layer 36 is removed to reduce the parasitic capacitance of the EA modulator 11. The area to be ultimately left is masked, and the second diffusion prevention layer 43 and the BH layer 36 are removed by dry etching or wet etching. At this time, the second diffusion prevention layer 43 also has the effect of preventing the side etch from becoming large. In addition, it is common to perform time control to obtain the desired etching amount, but since the BH layer 36 is a thick layer of about 6 μm, there is a risk that the etching amount will vary within the semiconductor optical device or within the wafer surface. However, since the first diffusion prevention layer 36b and the second semi-insulating InP layer 36c are made of different materials, it is possible to remove the second semi-insulating InP layer 36c reliably until it reaches the first diffusion prevention layer 36b by selective etching technology, and the variation can be suppressed. Since the thickness from the first diffusion prevention layer 36b to the n-InP substrate 30 is not very large, the etching amount can be sufficiently controlled by normal etching.

Next, an insulating film 37 is formed on the entire surface. Furthermore, the insulating film 37 is removed from the mesa apex of the semiconductor laser 10 and EA modulator 11 and the slope of the BH layer 36 to form through-holes. Then, a Ti/Pt/Au laser electrode 34 and modulator electrode 40 are formed. Next, the n-InP substrate 30 is polished to the desired thickness, and then a back electrode 35 is formed on the back surface to complete the wafer. The wafer is cut into bars, and a dielectric non-reflective film is formed on the front end face 13, and a dielectric highly reflective film is formed on the rear end face 14. Finally, each element is cut out from the bar to complete the semiconductor element 1 shown in Figure 1.

[Modification 1]
FIG. 5 is a cross-sectional view of the line B-B of the first modified example of the EA modulator 11 shown in FIG. 1. The difference from FIG. 3b is that the tip of the first diffusion prevention layer 36b extends higher. Since the main purpose of the present invention is to prevent the diffusion of Au into the multiple quantum well layer, the first diffusion prevention layer 36b must overlap the side of the multiple quantum well layer in the lateral direction as viewed in FIG. 5. In order to further prevent the diffusion of Au into the multiple quantum well layer, it is preferable that the tip of the first diffusion prevention layer 36b extends to an area exceeding 80% or more of the height of the mesa structure. Here, the height of the mesa structure is the distance from the surface of the n-InP substrate 30 (the bottom of the BH layer 36) to the top of the contact layer 42. More preferably, the tip of the first diffusion prevention layer 36b extends to a height equal to or higher than the height of the mesa structure.

[Modification 2]
6 is a cross-sectional view of the BB line of the first modified example of the EA modulator 11 shown in FIG. 1. The difference from FIG. 3b is that the first diffusion prevention layer 36b has a two-layer structure. Here, the first diffusion prevention layer 36b is composed of undoped InGaAs and undoped InGaAsP. By combining different semiconductor layers, it is possible to further reduce Au diffusion. Not limited to this, the first diffusion prevention layer 36b may be composed of a combination of multiple semiconductor layers having a smaller diffusion constant of Au than InP. This idea is also similar to the second diffusion prevention layer 43. A similar structure may also be adopted in the semiconductor laser 10.

[Modification 3]
FIG. 7 is a cross-sectional view of the BB line of the second modification of the EA modulator 11 shown in FIG. 1. The difference from FIG. 3b is the configuration of the BH layer 36. In this modification, the BH layer 36 has a five-layer configuration of the first semi-insulating InP layer 36a1, the first diffusion prevention layer 36b1, the second semi-insulating InP layer 36a2, the third diffusion prevention layer 36b2, and the third semi-insulating InP layer 36a3 from the n-InP substrate 30 side. In other words, the BH layer 36 includes two diffusion prevention layers against Au. The semi-insulating InP layer may be selected from any of the layers described in the first embodiment, and the same is true for the two diffusion prevention layers. In addition, the third diffusion prevention layer 36b2 does not need to cover the mesa structure to a height of 80% or more. In order to obtain the effect of the present invention, it is sufficient that the diffusion prevention layer closest to the mesa structure (here, the first diffusion prevention layer 36b1) covers the side of the modulator multiple quantum well layer 39. Although two or more diffusion prevention layers may be sandwiched in the BH layer, the fewer the number the better from the viewpoint of the overall crystal quality of the BH layer, etc. A similar structure may also be adopted in the semiconductor laser 10.

Second Embodiment
8 is a top view of a semiconductor optical device 101 according to a second embodiment of the present invention. The semiconductor optical device 101 is a modulator-integrated semiconductor laser in which a semiconductor laser 110 and an electroabsorption modulator (EA modulator) 111 are integrated together. Although an integrated type example is shown in this embodiment, the effects of the present invention can be obtained even if the semiconductor laser or the EA modulator is used alone. The semiconductor optical device 101 is an integrated device in which the semiconductor laser 110, the waveguide 12, and the EA modulator 111 are optically connected to each other in this order. The semiconductor laser 110 emits continuous light, and the waveguide 112 transmits the emitted light of the semiconductor laser 110 to the EA modulator 111. The EA modulator 111 has a multiple quantum well layer that absorbs light corresponding to the oscillation wavelength of the semiconductor laser 110. The continuous light that passes through the waveguide 112 and enters the EA modulator 111 is intensity-modulated by the EA modulator 111 and converted into a modulated optical signal such as a binary or quaternary value signal. The modulated optical signal output from the EA modulator 111 is output from the front end face 113. It is to be noted that another structure, for example a window structure in which insulating InP is arranged, may be provided near the front end face. A dielectric non-reflective film (not shown) is formed on the front end face 113. A dielectric highly reflective film (not shown) is formed on the rear end face 114, which is the end face on the opposite side of the semiconductor optical device 101. As will be described in detail later, a mesa structure is provided from the semiconductor laser 110 to the EA modulator 111, and both sides of the mesa structure are buried type semiconductor devices buried with a semiconductor burying layer. Furthermore, a PBH structure is provided in which a cladding layer is formed on the upper surface of the burying layer.

Figure 9 is a schematic diagram of a D-D cross section parallel to the optical axis of the semiconductor optical device 101. The semiconductor laser 110, the waveguide 112, and the EA modulator 111 are integrated on the n-InP substrate 130 (substrate) that serves as the base. Here, the n-InP substrate 130 is also a first conductive type semiconductor layer. The semiconductor laser 110 is, for example, a DFB laser that oscillates in the 1.3 μm band. The semiconductor laser 110 may be a DFB laser that oscillates in the 1.55 μm band. Furthermore, the semiconductor laser 110 is not limited to a DFB laser, and may be an FP laser, a DBR laser, or a DR laser. The semiconductor laser 110 includes a laser portion multiple quantum well layer 131 and a diffraction grating layer 132 provided on the upper part of the laser portion multiple quantum well layer 131. A first p-InP cladding layer 133 (second conductive type semiconductor layer) is provided between and above the lattices of the diffraction grating layer 132. Although not shown, optical confinement layers are provided above and below the laser part multiple quantum well layer 131. A second p-InP cladding layer 151 (third semiconductor layer) is provided on the first p-InP cladding layer 133. In FIG. 9, for convenience of explanation, a dotted line is shown at the interface between the first p-InP cladding layer 133 and the second p-InP cladding layer 151, but after manufacturing, the p-InP cladding layer becomes an integrated one, and the interface may not be clear. A contact layer 152 (see FIG. 10b) is provided on the upper surface of the second p-InP cladding layer 151. The contact layer 152 is electrically and physically connected to the laser part electrode 134 (second conductive side electrode). A back electrode 135 (first conductive side electrode) is provided on the back side of the n-InP substrate 130 so as to cover almost the entire surface. The semiconductor laser 110 oscillates continuous light by applying an electric field (injecting a current) between the laser part electrode 134 and the back electrode 135. Here, the composition wavelength of the laser portion multiple quantum well layer 131 and the lattice spacing of the diffraction grating layer 132 are set so that the laser oscillates in the 1.3 μm band.

The EA modulator 111 includes a modulator multi-quantum well layer 139. Although not shown, optical confinement layers are provided above and below the modulator multi-quantum well layer 139. The modulator multi-quantum well layer 139 has a structure that absorbs the emitted light of the semiconductor laser 110 when an electric field is applied. A first p-InP cladding layer 133 is disposed on the upper part of the modulator multi-quantum well layer 139. Note that the same first p-InP cladding layer 133 as the first p-InP cladding layer 133 provided in the semiconductor laser 110 is formed here, but it may be different. A second p-InP cladding layer 151 is provided on the upper part of the first p-InP cladding layer 133, and a contact layer 152 (not shown) is provided on the upper surface of the second p-InP cladding layer 151. The second p-InP cladding layer 151 and the contact layer 152 are the same as those provided in the half-tower laser 110, but they may be different. A modulator electrode 140 (second conductive side electrode) is disposed on the contact layer 152. The modulator electrode 140 includes an area electrically and physically connected to the contact layer 152. Light absorption is performed by applying a reverse bias between the modulator electrode 140 and the back electrode 135. The modulator electrode 140 is composed of a substantially rectangular modulator mesa electrode 140a provided on the top of the mesa structure and an elliptical modulator pad electrode 140b. The modulator mesa electrode 140a and the modulator pad electrode 140b are connected by a thin extraction electrode. For convenience of explanation, the modulator electrode 140 is divided into multiple parts, but the structure itself is the same and integrated. The modulator pad electrode 140b is not limited to an elliptical shape, and may be a square shape, a square shape with rounded corners, or a circle. A signal wire (not shown) for transmitting an electrical signal to the EA modulator 11 is connected to the modulator pad electrode 140b.

The waveguide 112 includes a waveguide semiconductor layer 138. The waveguide semiconductor layer 138 is a semiconductor layer that does not absorb the emitted light of the semiconductor laser 110. For example, the waveguide semiconductor layer 138 is a bulk layer. Optical confinement layers may be disposed above and below the waveguide semiconductor layer 138. A first p-InP clad layer 133 is disposed above the waveguide semiconductor layer 138. A second p-InP clad layer 151 is disposed thereon. Note that the first p-InP clad layer 133 and the second p-InP clad layer 151 are the same as those in the semiconductor laser 110, but may be different. The configuration of the second p-InP clad layer 151 of the waveguide 112 is the same as that in the semiconductor laser 110, but the thickness is different. The second p-InP cladding layer 151 of the waveguide 112 is thinner than the second p-InP cladding layer 151 of the semiconductor laser 110. This is to increase the electrical isolation between the EA modulator 111 and the semiconductor laser 110.

Figure 10a is a schematic diagram of an E-E cross section perpendicular to the optical axis of the EA modulator 111. The EA modulator 111 is largely composed of two parts: a mesa structure and the layers on top of it, the second p-InP cladding layer 151 and subsequent layers. The mesa structure is composed of a part of the n-InP substrate 130, the modulator part multiple quantum well layer 139, and the first p-InP cladding layer 133. Both sides of the mesa structure are buried with a buried layer (BH layer) 136. On the BH layer 136, the second p-InP cladding layer 151 is widely formed over the entire upper surface of the mesa structure and the BH layers on both sides of the mesa structure. On the upper surface of the second p-InP cladding layer 151, a contact layer 152 composed of p-type InGaAs is provided. On the contact layer 152, a SiO2 insulating film 137 is provided except for the upper part of the mesa structure. A modulator electrode 140 is provided on the upper surface of the insulating film 137 and the upper surface of the contact layer 152.

Figure 10b is an enlarged view of the area enclosed by the dotted square in Figure 10a. Although not shown in Figure 10a, the BH layer 136 of the semiconductor element 1 has a three-layer structure consisting of a first semi-insulating InP layer 136a, a first diffusion prevention layer 136b, and a second semi-insulating InP layer 136c. The second semi-insulating InP layer 136c is a layer that is thicker than the first semi-insulating InP layer 136a. The details of the BH layer 136 are the same as those of the BH layer 36 shown in the first embodiment. However, while the BH layer 36 in the first embodiment had a sloped portion, the BH layer 136 in the second embodiment may or may not have a sloped portion.

According to this embodiment, the same effect as that shown in the first embodiment can be obtained. That is, the first diffusion prevention layer 136b is disposed on the side of the modulator multiple quantum well layer 131, so that it is possible to reduce the effect of Au diffusion. In this embodiment, the contact layer 152 functions as a second diffusion prevention layer. Furthermore, this structure is similar to that of the semiconductor laser 110, so that it is possible to reduce the effect of Au diffusion in the semiconductor laser 110 as well.

[Modification 1]
Fig. 11 is a cross-sectional view of the E-E line according to the first modification of the EA modulator 111 shown in Fig. 8. The difference from Fig. 10b is that the tip of the first diffusion prevention layer 36b extends to the region in contact with the second p-InP cladding layer 151. This configuration makes it possible to significantly reduce the Au diffused into the second semi-insulating InP layer 136c from reaching the modulator multiple quantum well layer 139. Note that, similar to the structure shown in the first modification of the first embodiment, it is preferable that the tip of the first diffusion prevention layer 136b extends to a region exceeding 80% or more of the mesa height.

It goes without saying that the various modifications shown in the first embodiment can also be applied to the first embodiment.

In the above embodiment, the substrate is described as an n-InP substrate, but this is not limited to this, and a p-InP substrate may be used, and the structure may be the opposite in polarity to that described above. Furthermore, a semi-insulating substrate may also be used. In the case of a semi-insulating substrate, an n-type semiconductor layer (first conductivity type semiconductor layer) may be disposed on the semi-insulating substrate.

1 semiconductor optical element, 10 semiconductor laser, 11 electroabsorption modulator, 12 waveguide, 13 front end face, 14 rear end face, 30 n-InP substrate, 31 laser portion multiple quantum well layer, 32 diffraction grating layer, 33 p-InP cladding layer, 34 laser portion electrode, 35 back electrode, 36 buried layer, 36a, 36a1 first semi-insulating InP layer, 36b, 36b1 first diffusion prevention layer, 36c, 36a2 second semi-insulating InP layer, 36b2 third diffusion prevention layer, 36a3 third semi-insulating InP layer, 37 insulating film, 38 waveguide portion semiconductor layer, 39 modulator portion multiple quantum well layer, 40 modulator electrode, 40a modulator mesa electrode, 40b modulator pad electrode, 42 contact layer, 43 second diffusion prevention layer, 101 Semiconductor optical element, 110 semiconductor laser, 111 electroabsorption modulator, 112 waveguide, 113 front end face, 114 rear end face, 130 n-InP substrate, 131 laser part multiple quantum well layer, 132 diffraction grating layer, 133 first p-InP cladding layer, 134 laser part electrode, 135 back electrode, 136 buried layer, 136a first semi-insulating InP layer, 136b first diffusion prevention layer, 136c second semi-insulating InP layer, 137 insulating film, 138 waveguide part semiconductor layer, 139 modulator part multiple quantum well layer, 140 modulator electrode, 140a modulator mesa electrode, 140b modulator pad electrode, 151 second p-InP cladding layer, 152 contact layer.

Claims (10)

a substrate; and a mesa structure provided on the substrate;
a semiconductor burying layer provided adjacent to both sides of the mesa structure;
an electrode including Au provided on the semiconductor buried layer;
The mesa structure is formed by stacking a first conductive type semiconductor layer, a multiple quantum well layer, and a second conductive type semiconductor layer from the substrate side,
the semiconductor burying layer includes a first semi-insulating InP layer provided in contact with a side portion of the mesa structure, a first diffusion prevention layer provided in contact with the first semi-insulating InP layer, and a second semi-insulating InP layer provided on the first diffusion prevention layer;
a diffusion constant of Au in the first diffusion prevention layer is smaller than that in the first semi-insulating InP layer. 2. The semiconductor optical device according to claim 1,
The mesa structure further includes a contact layer on the second conductive type semiconductor layer,
the second semi-insulating InP layer includes a slope portion whose height from the surface of the substrate increases with increasing distance from the mesa structure;
the electrode is disposed so as to cover the contact layer and at least a portion of the slope portion;
The electrode is in contact with the contact layer. 3. The semiconductor optical device according to claim 2,
a second diffusion barrier layer on the second semi-insulating InP layer;
the second diffusion barrier layer is disposed between a portion of the electrode and the second semi-insulating InP layer;
a diffusion constant of Au in the second diffusion prevention layer is smaller than that in the second semi-insulating InP layer. 2. The semiconductor optical device according to claim 1,
the semiconductor optical device further comprising a third semiconductor layer of the same conductivity type as the second conductivity type semiconductor layer, straddling the mesa structure and the second semi-insulating InP layer, and a contact layer between the third semiconductor layer and the electrode. 5. The semiconductor optical device according to claim 1,
a tip of the first diffusion prevention layer when viewed in a direction parallel to a side surface of the mesa structure is higher than the multiple quantum well layer when viewed from the substrate side. 6. The semiconductor optical device according to claim 1,
a tip of the first anti-diffusion layer when viewed in a direction parallel to a side surface of the mesa structure extends to 80% or more of a height of the mesa structure. 7. The semiconductor optical device according to claim 1,
a distance between the side surface of the mesa structure and the first anti-diffusion layer is 10 nm or more when viewed in a direction perpendicular to the side surface of the mesa structure. 8. The semiconductor optical device according to claim 1,
The first diffusion prevention layer is made of any one of InGaAs, InGaAsP, InGaAlAs, and InAlAs. 9. The semiconductor optical device according to claim 1,
The first diffusion prevention layer is any one of undoped, n-type, and p-type. 10. The semiconductor optical device according to claim 1 ,
a first anti-diffusion layer having a portion the distance from the side surface of the mesa structure increases the closer the first anti-diffusion layer is to the substrate;

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