JP7573407B2 - Circuit board manufacturing method and circuit board - Google Patents

Description

The present invention relates to a method for manufacturing a circuit board having a pixel circuit chip that drives a micro LED, and to the circuit board, and in particular to a method for manufacturing a circuit board and a circuit board that can shorten the manufacturing time without using costly large-scale equipment.

Compared to LCDs and OLEDs, microLED (Light Emitting Diode) displays have superior device characteristics such as high brightness, high contrast, and high reliability. In addition, they are expected to be applied to next-generation displays, including flexible displays.

Examples of circuit boards (backplanes) for driving micro LEDs include circuit boards equipped with low temperature polycrystalline silicon thin film transistors (LTPS-TFTs) and circuit boards equipped with oxide TFTs (see, for example, Patent Document 1).

On the other hand, a method of mounting a bare integrated circuit chip on a printed circuit board (circuit board) and a flip chip bonder used for this purpose have been known as a method of mounting the chip on a circuit board while still in its chip shape (see, for example, Patent Document 2).

JP 2018-185515 A Japanese Unexamined Patent Publication No. 7-153784

However, when manufacturing a circuit board equipped with low-temperature polycrystalline silicon TFTs or oxide TFTs as a circuit board for driving micro LEDs, problems arise in that large-scale equipment is generally required, which is costly.

On the other hand, when considering manufacturing a circuit board for driving micro LEDs that has a different configuration from a circuit board equipped with low-temperature polycrystalline silicon TFTs or oxide TFTs in order to avoid using large-scale equipment, if a process using a flip-chip bonder as described in Patent Document 2 is incorporated, the chips are taken out one by one while still in their chip shape and mounted on the circuit board, which creates the problem of increased manufacturing time.

The present invention aims to address these problems and provide a circuit board manufacturing method and a circuit board that can shorten the manufacturing time without using costly large-scale equipment when manufacturing a circuit board for driving micro LEDs.

In order to achieve the above object, the method for manufacturing a circuit board of the present invention is a method for manufacturing a circuit board having a pixel circuit chip including a pixel circuit for driving a micro LED, and includes the steps of forming pixel circuits on a surface of a silicon wafer according to a predetermined arrangement, forming electrode pads for connection on the pixel circuits, attaching the surface of the wafer to a first transfer substrate via the pixel circuits, thinning the wafer, etching the thinned wafer so as to leave a wafer portion in a region connected to the pixel circuits, thereby transferring a pixel circuit chip consisting of a separated wafer portion and a pixel circuit having the electrode pads to the first transfer substrate, attaching the first transfer substrate to a second transfer substrate via the pixel circuit chip, peeling off the first transfer substrate, inverting the pixel circuit chip and transferring it to the second transfer substrate, attaching the second transfer substrate to a substrate for mounting via the pixel circuit chip, and then bonding and mounting the pixel circuit chip to the substrate, and peeling off the second transfer substrate from the substrate.

In order to achieve the above object, the circuit board of the present invention includes a pixel circuit chip having a pixel circuit for driving a micro LED, a connection electrode pad provided on one side of the pixel circuit, and a wafer portion provided on the other side of the pixel circuit in a state in which the silicon wafer is separated by etching, and a substrate on which the pixel circuit chip is mounted in a predetermined arrangement so as to be connected to the electrode pad.

According to the circuit board manufacturing method of the present invention, a circuit board for driving a micro LED, which has a configuration different from that of a circuit board having low-temperature polycrystalline silicon TFTs or oxide TFTs, is manufactured by the above manufacturing method, so there is no need to use costly large-scale equipment, and since a predetermined number of the pixel circuit chips are mounted at once, the manufacturing time can be shortened.

The circuit board of the present invention can provide a circuit board that can be manufactured in a shorter manufacturing time without using costly large-scale equipment using the manufacturing method of the present invention.

3 is a flow chart showing steps of a method for manufacturing a circuit board according to the present invention. FIG. 2 is a plan view of a wafer on which pixel circuits are formed. 3A and 3B are enlarged views of the area surrounded by the dashed line shown in FIG. 2, in which (a) is a plan view and (b) is a cross-sectional view taken along line AA of (a). FIG. 2 is a block diagram showing a schematic configuration of a pixel circuit. 1A and 1B are explanatory diagrams showing the configuration of a wafer including a pixel circuit on which a pair of electrode pads are formed, where (a) is a plan view and (b) is a cross-sectional view taken along line AA of (a). 11 is an explanatory diagram showing a process of attaching the surface of the wafer to a first transfer substrate 3 via pixel circuits. FIG. FIG. 2 is a schematic cross-sectional view showing the configuration of a UV tape. FIG. 2 is an explanatory diagram showing a process of thinning a wafer. 11A to 11C are explanatory diagrams showing a transfer process accompanying separation of pixel circuit chips by wet etching. 11A to 11C are explanatory diagrams showing a process of attaching a first transfer substrate to a second transfer substrate via a pixel circuit chip. 11A to 11C are explanatory diagrams showing a step of inverting the pixel circuit chip and transferring it to a second transfer substrate. 1A to 1C are explanatory diagrams showing a process of bonding and mounting a pixel circuit chip on a substrate. 11A to 11C are explanatory views showing a step of peeling off the second transfer substrate from the substrate. 1A and 1B are explanatory diagrams showing the configuration of a circuit board according to the present invention, in which FIG. FIG. 2 is an explanatory diagram showing the configuration of a first micro LED display having a circuit board according to the present invention. FIG. 1 is an explanatory diagram showing a configuration of a micro LED. FIG. 10 is an explanatory diagram showing the configuration of a second micro LED display having a circuit board according to the present invention. FIG. 2 is an explanatory diagram showing a configuration of a phosphor cell.

Embodiments of the present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 is a flow chart showing the steps of a method for manufacturing a circuit board according to the present invention. FIG. 2 is a plan view of a wafer having pixel circuits formed on its surface. FIG. 3 is an enlarged view of the area surrounded by dashed line R1 shown in FIG. 2, where (a) is a plan view and (b) is a cross-sectional view taken along line A-A in (a). Note that the figures described in the following embodiments may differ from the actual dimensional proportions in order to facilitate understanding of the components.

First, in the formation of the pixel circuit shown in FIG. 1 (step S1), a process is performed to form the pixel circuit 2a shown in FIG. 3 on the surface of the wafer 1 shown in FIG. 2 according to a predetermined arrangement by applying semiconductor technology.

As shown in FIG. 3(a), pixel circuits 2a for driving micro LEDs are formed on the wafer 1 at pitch intervals of P1 and P2. The pixel circuits 2a have electronic circuits made up of minute semiconductor elements formed on the silicon wafer 1, which is a substrate for manufacturing semiconductor devices. For ease of explanation, FIG. 3(a) shows an example in which the pixel circuits 2a are arranged in 4 rows and 4 columns. The wafer 1 is made up of, for example, a silicon substrate 1b having a silicon oxide film 1a (see FIG. 3(b)). T1 indicates the thickness of the wafer 1. In general, the thickness of T1 may be about 700 μm.

The above P1 and P2 pitch interval values are ultimately set taking into consideration the display specifications (pixel pitch). For example, the values specified by P1 and P2 correspond to the minimum pixel pitch size of the target display. In practice, for example, hundreds of thousands of pixel circuits 2a are formed on the wafer 1 according to the chip specifications.

In addition, when configuring pixels for a larger display, for example, if the pixel pitch is an integer multiple of the array pitch, the integration density of the pixel circuits 2a formed on the wafer 1 will increase accordingly, and the pixel circuit chips 2 described below can be selectively mounted on the mounting substrate 8 (see FIG. 13(b)) to make effective use of the pixel circuits 2a formed on the surface of the wafer 1. Details will be described later with reference to FIG. 13.

In FIG. 3, the silicon oxide film 1a of the wafer 1 is divided into a circuit formation region (silicon (Si) chip region) R2 where the pixel circuits 2a are actually formed, and a non-circuit formation region (scribe (SCB) region) R3 where the pixel circuits 2a are not formed. However, the circuit formation region R2 shown in FIG. 3(a) indicates the pixel circuits 2a and the region of the silicon oxide film 1a below the pixel circuits 2a.

Moreover, the non-circuit-forming region R3 is formed only of a silicon oxide film (SiO ₂ ) 1a. Although it depends on the design rules of the wafer 1 and the configuration of the circuit board to be actually manufactured, the thickness T2 of the pixel circuit 2a is, for example, about 4 to 5 μm. By creating the region below the pixel circuit 2a in the circuit-forming region R2 as having the same film configuration as the non-circuit-forming region R3 in this way, it becomes possible to more easily perform the etching process described below.

Figure 4 is a block diagram showing a schematic configuration of the pixel circuit 2a. As shown in Figure 4, the pixel circuit 2a drives the micro LEDs and includes a pixel drive circuit 2b and a scan circuit 2c. In this embodiment, the pixel circuit 2a combines three types of micro LEDs, for example, R (red), G (green), and B (blue), into one pixel unit, and drives the micro LED for each pixel unit. However, the pixel circuit 2a may be configured to drive not only one pixel micro LED, but also multiple pixels of micro LEDs. In addition, the pixel circuit 2a may be configured to be used in both the first method adopted in the first micro LED display 100 described later and the second method adopted in the second micro LED display 101.

The pixel driving circuit 2b is a circuit for converting each RGB data voltage into a current for driving the micro LEDs 10R, 10G, and 10B (see FIG. 15) described later. The scan circuit 2c is a circuit for outputting a control signal for driving the pixel driving circuit 2b.

Here, the pixel circuit 2a includes, for example, three lines for transferring RGB data voltage values, one line for a selection (SEL) signal for switching on and off the light for each pixel portion, and one line for a control signal for determining the timing of light emission. The arrows pointing in the direction of input to the scan circuit 2c and the arrows pointing in the direction of output from the scan circuit 2c indicate the flow of the control signal.

In the pixel circuit 2a, pixel control signals are output according to the timing of the control signals output from the scan circuit 2c, and are input to the pixel drive circuit 2b as indicated by the white arrows (see FIG. 4). Then, in the pixel circuit 2a, each of the RGB voltage data is converted into current data for driving the LEDs, and the micro LEDs 10R, 10G, and 10B shown in FIG. 15 are current-driven at a predetermined timing. As a result, the micro LEDs 10R, 10G, and 10B emit light according to the magnitude of the current passing therethrough, enabling full-color display.

Next, in the electrode pad formation step (step S2), a process is carried out to form electrode pads 2d and 2e for electrical connection on the pixel circuit 2a.

Figure 5 is an explanatory diagram showing the configuration of a wafer 1 including a pixel circuit 2a on which a pair of electrode pads 2d, 2e are formed, where (a) is a plan view and (b) is a cross-sectional view along line A-A in (a). In particular, (a) is an enlarged plan view of the region R1 after a pair of electrode pads 2d, 2e are formed on the pixel circuit 2a. For example, the pair of electrode pads 2d, 2e (hereinafter, electrode pads 2d, 2e may be collectively referred to as "electrode portion 2f") is such that electrode pad 2d is an n-side electrode pad (cathode electrode) and electrode pad 2e is a p-side electrode pad (anode electrode).

In step S2, after forming the pixel circuits 2a on the wafer 1, in order to collectively transfer and mount a plurality of pixel circuits 2a, it is necessary to form electrode pads 2d, 2e such as UBM (Under Bump Metal) electrodes in advance using electrolytic plating or electroless plating. Since the pixel circuits 2a themselves are very small (each side of the chip's external size is 100 to 200 μm), it is preferable that each side of the external size of the electrode pads formed on the pixel circuits 2a is, for example, 10 to 20 μm.

When dealing with extremely small chip sizes and pad sizes like this, electrolytic plating is not efficient because it requires the formation of a separate electrode for applying the electrolytic current. In addition, since the processing process for forming the electrode becomes more complicated with electrolytic plating, it is preferable to use electroless plating to form the electrode portion 2f in terms of wiring space, processing, and cost.

In this way, by performing step S2 after forming the pixel circuits 2a on the wafer 1 in step S1 described above, when mounting each pixel circuit chip 2 on a mounting substrate 8 (see FIG. 12(a)) in step S8 described below, it becomes possible to mount each pixel circuit chip 2 by transferring it to the substrate 8 all at once. In this case, the substrate 8 has an electrode configuration having bump electrodes 8a, 8b to enable this mounting by transferring it all at once.

Next, in step S3, a process is performed to attach the surface of the wafer 1 to a first transfer substrate. Note that the surface of the silicon oxide film 1a laminated on the silicon substrate 1b corresponds to the surface of the wafer 1.

Figure 6 is an explanatory diagram showing the process of attaching the surface of the wafer 1 to the first transfer substrate 3 via the pixel circuits 2a. The first transfer substrate 3 is used to transfer the pixel circuits 2a formed on the surface of the wafer 1. The first transfer substrate 3 includes a glass substrate 31 and a UV tape 32, with the UV tape 32 separately attached to one surface of the glass substrate 31.

Figure 7 is a schematic cross-sectional view showing the structure of UV tape 32. UV tape 32 is a tape whose adhesive strength decreases when exposed to ultraviolet light, and includes a base film 32a and an adhesive layer 32b. Base film 32a is made of polyethylene terephthalate (PET).

The adhesive layer 32b contains components such as acrylic polymers and oligomers (polymers in which a relatively small number of monomers are bonded). The thickness of this adhesive layer 32b is approximately 50 μm. The adhesive layer 32b also contains a photopolymerization initiator that initiates photopolymerization when irradiated with ultraviolet light. When irradiated with ultraviolet light, the components of the adhesive layer 32b undergo photopolymerization, causing the adhesive layer 32b to lose its flexibility and its adhesive strength to decrease.

Therefore, in step S3, a process is performed in which the surface of the wafer 1 is attached to the UV tape 32 of the first transfer substrate 3 in order to make it easier to peel the pixel circuit chip 2 from the first transfer substrate 3 having the adhesive layer 32b by ultraviolet light irradiation in step S7 described below.

Next, in wafer thinning (step S4), a backgrinding process is performed to thin the thickness of wafer 1. Note that backgrinding is a processing method in which the back surface of a silicon wafer is polished to reduce its thickness.

Figure 8 is an explanatory diagram showing the process of thinning the wafer. In step 4, the wafer 1 is thinned using mechanical polishing means. In this embodiment, the wafer 1 is attached to the UV tape 32 of the first transfer substrate 3, thereby fixing the wafer 1 during polishing and preventing defects such as chipping, cracks, etc.

By carrying out step 4, as shown in FIG. 8, the wafer 1 is thinned from its normal thickness T1 (for example, about 700 μm (see FIG. 6)) to a thickness T3 of 10 to 30 μm depending on the application. Since the thickness of a micro LED is usually about 10 to 30 μm, the thickness of the pixel circuit 2a is adjusted accordingly.

In step S4, UV tape 32 was used to attach onto glass substrate 31. This is because, in addition to fixing wafer 1, it is also intended to have the effect of weakening the adhesiveness of the tape surface (adhesive layer 32b) by UV irradiation, making it easier to replace when peeling off first transfer substrate 3 and inverting pixel circuit chip 2 to transfer to second transfer substrate 7 in step S7 described below. Note that other adhesive tapes and adhesives may be used, not limited to UV tape 32, as long as they can be replaced.

Next, in step S5, a transfer process is carried out to separate the pixel circuit chips by etching. In step S5, for example, wet etching is used as the etching. Wet etching is a processing technique used, for example, when producing fine circuits such as semiconductor integrated circuits, in which a circuit board is immersed in a chemical solution (chemical liquid) and unnecessary parts are removed in the chemical liquid to process the shape.

Figure 9 is an explanatory diagram showing the transfer process associated with the separation of pixel circuit chips 2 by wet etching. Specifically, Figures 9(a) to (e) are process diagrams showing the wet etching process for separating each pixel circuit chip 2 from the wafer 1 and transferring it to the first transfer substrate 3.

Figure 9(a) shows the state in which the wafer 1 has been thinned to a thickness of 10 to 30 μm in the above-mentioned step S4. In this state, the wafer 1 on which the pixel circuits 2a are formed and the first transfer substrate 3 are bonded together.

Next, the wet etching method will be explained. In FIG. 9(b), in step S5, first, a coating layer 4 of, for example, chromium is laminated on the back surface of the wafer 1, and then, for example, a positive resist layer 5 is coated on top of the coating layer 4. The coating layer 4 is laminated in order to improve adhesion with the resist layer 5.

In step S5 in FIG. 9(c), an exposure device (not shown) is used to mask the portions to be shielded with a light-shielding mask 6, and then the light L1 is irradiated and exposed. Note that the light L1 is diagrammatically represented by an arrow in the figure.

In FIG. 9(d), in the wet etching in step S5, the resist layer 5 and the coating layer 4 that are not shielded by the mask 6 are exposed to light, and then the silicon substrate 1b in the wafer 1 is etched using, for example, nitric hydrofluoric acid. Then, the silicon oxide film 1a is etched using, for example, BHF (buffered hydrofluoric acid). For the coating layer 4 and resist layer 5, for example, a negative resist layer may be used, or a material other than chromium may be used after appropriate consideration of the adhesion between the silicon substrate 1b and the resist layer 5.

The chemicals used in the wet etching are not particularly limited as long as they are capable of etching the silicon substrate 1b and the silicon oxide film 1a. However, it is necessary to adjust the etching time and the area and width of the initial etching, taking into consideration conditions such as the outer shape of the pixel circuit 2a and the thickness of the silicon substrate 1b.

In FIG. 9(d), the wet etching process is shown diagrammatically by the arrow WE. However, for the sake of simplicity, FIG. 9(d) shows the state in which the wafer is cut into a columnar shape, but in reality, as shown in FIG. 9(e), the wafer portion 1c will ultimately have a trapezoidal shape.

Figure 9(e) shows the shapes of the first transfer substrate 3 and pixel circuit chip 2 after wet etching and peeling off the resist layer 5 and coating layer 4 on the wafer portion 1c.

In step S5, wet etching is performed on the thinned wafer 1 so as to leave a wafer portion 1c (see FIG. 9(e)) in the area connected to the pixel circuit 2a. As a result, in step S5, a pixel circuit chip 2 consisting of the separated wafer portion 1c and a pixel circuit 2a having electrode pads 2d, 2e can be transferred to the first transfer substrate 3. The wafer portion 1c is composed of a silicon oxide film 1a and a silicon substrate 1b.

In step S5, a wet etching method is used, which allows a large number of chips to be separated in a shorter time than, for example, a laser dicing method.

In addition, in the wet etching method, the process other than the formation of the chromium coating layer 4 is mainly performed using chemical solutions, so there is no need to use large-scale equipment, making it possible to process at lower cost and in a smaller space.

Note that the wet etching method is an isotropic etching method, so as described above, in FIG. 9(e), the shape of the wafer portion 1c of the pixel circuit chip 2 after wet etching is a trapezoid (tapered) shape. In other words, step S5 is characterized in that the wafer portion 1c is made trapezoidal by performing wet etching. However, the trapezoidal shape shown in FIG. 9(e) is just one example, and the shape is not limited to this.

As shown in FIG. 9(e), the area where one surface of the wafer portion 1c is in contact with the pixel circuit 2a is larger than the area of the Si surface where the silicon substrate 1b is exposed. When the trapezoidal shape is formed in this way, the area of the Si surface can be processed to be small, which has the advantage that the adhesion area with the adhesive layer 72 can be reduced during bonding to the substrate 8 in step S8 described below, making it easier to separate from the adhesive by laser irradiation.

Next, in step S6, a process is performed in which the first transfer substrate 3 is attached to the second transfer substrate 7 via the pixel circuit chip 2.

Figure 10 is an explanatory diagram showing the process of attaching the first transfer substrate 3 to the second transfer substrate 7 via the pixel circuit chips 2. Figure 10 shows the state after attaching multiple pixel circuit chips 2 to the second transfer substrate 7. The second transfer substrate 7 has an adhesive layer 72 on one surface of a glass substrate 71.

In the state shown in FIG. 10, the electrode pad surface of the pixel circuit chip 2 is adhered to the glass substrate 31 via the UV tape 32 on the first transfer substrate 3. In this state, mounting on the substrate 8 cannot be performed in the subsequent step S8, so the electrode pad surface of the pixel circuit chip 2 needs to be inverted.

Therefore, in step S6, the pixel circuit chip 2 is attached to the second transfer substrate 7, which has a glass substrate 71 and an adhesive layer 72 on the upper layer. For example, a thermosetting adhesive is used for the adhesive layer 72.

Next, in step S7, the first transfer substrate 3 is peeled off, and the pixel circuit chip 2 including the wafer portion 1c is inverted and transferred to the second transfer substrate 7.

Figure 11 is an explanatory diagram showing the process of inverting the pixel circuit chip 2 and transferring it to the second transfer substrate 7. In step S7, for example, an ultraviolet irradiation device (not shown) is used to irradiate the first transfer substrate 3 with ultraviolet light having a central wavelength of 365 nm. Figure 11(a) shows the state in which the first transfer substrate 3 is being irradiated with ultraviolet light UV. In the figure, the process of irradiating ultraviolet light UV is diagrammatically represented by arrows.

In detail, in step S7, ultraviolet light UV is applied from the glass substrate 31 side to reduce the adhesive strength of the UV tape 32, and the first transfer substrate 3 is peeled off. In other words, the pixel circuit chip 2 is peeled off from the first transfer substrate 3. This is because the adhesive strength of the adhesive layer 72 of the second transfer substrate 7 to the pixel circuit chip 2 is stronger than the adhesive strength of the adhesive layer 32b (see FIG. 7) of the first transfer substrate 3 to the pixel circuit chip 2. FIG. 11(b) shows the pixel circuit chip 2 after being inverted and transferred to the second transfer substrate 7.

Next, in the process of adhering and mounting the pixel circuit chip to the mounting substrate (step S8), the second transfer substrate 7 is attached to the mounting substrate 8 via the pixel circuit chip 2, and then the pixel circuit chip 2 is adhered to the substrate 8 for mounting. This substrate 8 controls the pixel circuit chip 2, and is, for example, a flexible printed circuit board (FPC (Flexible Printed Circuits) board). A flexible printed circuit board is a film-like circuit board made of an insulating base film (for example, polyimide) and a wiring layer that forms an electric circuit. Note that controlling the pixel circuit chip 2 means controlling the pixel circuit 2a in the pixel circuit chip 2.

Figure 12 is an explanatory diagram showing the process of bonding and mounting the pixel circuit chip 2 to the substrate 8. Figures 12(a) and (b) are process diagrams showing the mounting of the pixel circuit chip 2 to the substrate 8. In step S8, the substrate 8 designed to be bonded to the electrode pad pattern of the pixel circuit 2a of the pixel circuit chip 2 is prepared in advance (see Figure 12(a)). Then, in step S8, after alignment with the pixel circuit chip 2, mounting is performed by bonding connection (see Figure 12(b)). The pattern surface of the FPC electrode can be subjected to a surface treatment such as Au, Sn, etc., and the electrodes between the electrode portion 2f on the pixel circuit 2a side can be bonded by a method such as thermocompression bonding. In addition, bump electrodes 8a, 8b of Au, etc. may be formed on the electrode pattern on the FPC side.

Next, in step S9, a process is performed to peel the second transfer substrate 7 from the substrate 8 by laser lift-off. In other words, the pixel circuit chip 2 is peeled off from the second transfer substrate 7. The second transfer substrate 7 can be easily peeled off from the substrate 8 by laser lift-off.

Figure 13 is an explanatory diagram showing the process of peeling off the second transfer substrate 7 from the substrate 8. Specifically, Figure 13(a) illustrates the state when laser lift-off is being performed, and (b) illustrates the state after laser lift-off has been performed.

As shown in FIG. 13(a), the LLO (laser lift-off) method is used to irradiate the adhesive layer 72 with a laser from the rear surface of the second transfer substrate 7, and the pixel circuit chip 2 can be separated by irradiating the adhesive layer 72 with a laser. In this case, in the LLO (laser lift-off) method, laser light L2 is irradiated toward the adhesive layer 72 area attached to the exposed Si surface of the silicon substrate 1b of the wafer portion 1c. For ease of explanation, in order to distinguish between the individual pixel circuit chips 2, in FIG. 13, the individual pixel circuit chips 2 are referred to as pixel circuit chips 21, 22, 23, and 24.

In detail, when the interface between the adhesive layer 72 and the glass substrate 71 is irradiated with laser light L2 of a specific frequency by the above-mentioned LLO method, the temperature of the interface between the adhesive layer 72 and the glass substrate 71 rises, and the layer portion bonding the adhesive layer 72 to the glass substrate 71 is baked (destroyed), which makes it possible to easily peel off the second transfer substrate 7.

More specifically, in the LLO method, pulsed laser light L2 is irradiated from the rear surface of the second transfer substrate 7 to peel off the pixel circuit chips 21, 22, 23, and 24 from the second transfer substrate 7. In step S9, specifically, a laser lift-off device (not shown) is used to adjust parameters such as laser power, the irradiation area of the laser light L2, and the number of irradiations based on pulse irradiation, to peel off the pixel circuit chips 21, 22, 23, and 24 from the second transfer substrate 7. Here, the parameters are, for example, a pulse laser of 1 Hz to 100 kHz (pulse width: 1 psec to 10 nsec) and an energy density of about 100 to 1000 mJ/ ^cm2 , and optimal conditions are selected here.

When performing laser lift-off in step S9, it is preferable to use, for example, a picosecond pulse laser with a wavelength of 266 nm, which is the fourth harmonic (FHG: Fourth-Harmonic Generation), generated by a solid-state UV region YAG (Yttrium Aluminum Garnet) laser oscillator.

Next, in step S9, the second transfer substrate 7 is peeled off from the substrate 8 to form a circuit substrate 9 manufactured by the circuit substrate manufacturing method of the present invention, as shown in FIG. 13(b).

Figure 14 is an explanatory diagram showing the configuration of a circuit board according to the present invention, where (a) is a plan view and (b) is a front view. In Figure 14, a pixel circuit chip 2 mounted on a substrate 8 is a circuit board 9 manufactured by the circuit board manufacturing method of the present invention. In other words, the circuit board 9 includes a pixel circuit 2a that drives a micro LED, electrode pads 2d and 2e for connection provided on one side of the pixel circuit 2a, a pixel circuit chip 2 having a wafer portion 1c in a state in which a silicon wafer 1 is separated by etching provided on the other side of the pixel circuit 2a, and a substrate 8 on which the pixel circuit chip 2 is mounted according to a predetermined arrangement such that the electrode pad 2d is connected to the bump electrode 8a and the electrode pad 2e is connected to the bump electrode 8b.

Specifically, the circuit board 9 has a configuration including, for example, an FPC backplane (substrate 8) and a silicon chip (pixel circuit chip 2). This configuration eliminates the need for large-scale capital investment, as is the case with backplanes that use conventional low-temperature polycrystalline silicon TFTs or oxide TFTs.

As described above, it is preferable that the wafer portion 1c of the circuit board 9 is trapezoidal in shape so that it can be more easily separated from the adhesive by laser irradiation in step S9.

In step S9, laser lift-off is used as a means for peeling off the second transfer substrate 7 from the substrate 8, but a means for selectively performing laser lift-off on each of the pixel circuit chips 21, 22, 23, and 24 may also be used.

In this embodiment, when a carrier material such as the second transfer substrate 7 is used, for example, the arrangement pitch P1 (see FIG. 3) of the pixel circuits 2a of the pixel circuit chip 2 to be transferred does not need to be the same as the pixel pitch of the substrate 8. That is, in this embodiment, for example, the pixel pitch on the substrate 8 may be an integer multiple of the arrangement pitch P1 of the pixel circuits 2a. For example, in FIG. 13(a), if the pixel pitch is twice the arrangement pitch P1, this means that the arrangement pitch P1 is a half pitch with respect to the pixel pitch. In this case, in step S9, only the pixel circuit chips 21 and 23 may be peeled off from the second transfer substrate 7 by selective laser lift-off, and only the pixel circuit chips 21 and 23 may be mounted on the substrate 8. Note that the pixel circuit chips 22 and 24 will remain on the second transfer substrate 7.

Then, using this second transfer substrate 7, the pixel circuit chips 22 and 24 remaining on the other substrate 8 may be peeled off from the second transfer substrate 7 by selective laser lift-off, and only the pixel circuit chips 21 and 23 may be mounted on the substrate 8.

As a result, in the above step S9, only the pixel circuit chip 2 to be used for mounting can be lifted off, and the remaining pixel circuit chip 2 can be used for the next mounting substrate, leading to cost reduction. In other words, in step S9, the pixel circuit chip 2 transferred to the second transfer substrate 7 can be effectively utilized according to the degree of integration. This means that the pixel circuits 2a formed on the surface of the wafer 1 can be effectively utilized.

In addition, in step S9, ultraviolet light irradiation may be used as a means for peeling off the second transfer substrate 7 from the substrate 8. As described above, if the UV tape 32 shown in FIG. 7 is used instead of the adhesive layer 72, ultraviolet light irradiation weakens the adhesive strength of the adhesive layer 32b of the UV tape 32, making it possible to easily peel off the second transfer substrate 7. In this case, the laser light L2 shown in FIG. 13(a) is replaced with ultraviolet light UV (not shown).

In addition, in step S9, as a means for peeling off the second transfer substrate 7 from the substrate 8, selective ultraviolet irradiation may be used in the same manner as selective laser lift-off, in which only the pixel circuit chip 2 to be mounted is mounted on the substrate 8, and the second transfer substrate 7 is peeled off. This allows the pixel circuit chip 2 remaining on the second transfer substrate 7 to be used for the next substrate to be mounted, even with selective ultraviolet irradiation, leading to cost reduction. In other words, in step S9, the pixel circuit chip 2 transferred to the second transfer substrate 7 can be effectively utilized according to the degree of integration, even with selective ultraviolet irradiation.

As described above, by carrying out a series of processes from step S1 to step S9 shown in FIG. 1 based on the circuit board manufacturing method of the present invention, a circuit board 9 having a pixel circuit chip 2 mounted on a substrate 8 can be manufactured.

In the above embodiment, wet etching is used as the etching in step S5, but this is not limited thereto. For example, dry etching, in which etching is performed in plasma, may be used. Therefore, etching includes wet etching and dry etching.

Next, a first micro LED display having a circuit board according to the present invention will be described. FIG. 15 is an explanatory diagram showing the configuration of a first micro LED display 100 having a circuit board according to the present invention. FIG. 16 is an explanatory diagram showing the configuration of a micro LED.

The first micro LED display 100 employs a first method of combining three types of micro LEDs, R (red), G (green), and B (blue), into one pixel unit to achieve full color display.

The first micro LED display 100 includes a circuit board 9a, which is composed of micro LEDs 10R, 10G, and 10B as the light-emitting unit 10, a pixel circuit chip 2 as a driving unit, and a substrate 8a on which the light-emitting unit 10 and the pixel circuit chip 2 are mounted according to a predetermined arrangement. In FIG. 15, as an example, the light-emitting unit 10 and the pixel circuit chip 2 are arranged in 4 rows and 4 columns. Here, if the arrangement of the light-emitting unit 10 is m rows and n columns, and the arrangement of the pixel circuit chip 2 is m rows and n columns, m and n are natural numbers, and the pixel circuit chip 2 and the light-emitting unit 10 with the same index value are associated. For example, if the arrangement of the pixel circuit chips 2 located in the area surrounded by the dashed line R4 is 1 row and 1 column, and the arrangement of the light-emitting unit 10 is 1 row and 1 column, the pixel circuit chip 2 arranged in 1 row and 1 column will drive the light-emitting unit 10 arranged in 1 row and 1 column. In other words, one pixel circuit chip 2 controls the light emission of one light-emitting section 10.

In FIG. 16, the configuration will be described using the micro LED 10B shown in FIG. 15 as an example. The micro LED 10B is a blue light emitting diode, and has a main body 10a, an anode electrode 10b for emitting light and a cathode electrode 10c on one side of the main body, and a light emission surface 10d that emits light from the main body 10a on the other side. Note that the main body 10a of the micro LED 10R is a red light emitting diode, and the main body 10a of the micro LED 10G is a green light emitting diode.

The circuit board 9a is connected to the pixel circuit chip 2 and the light-emitting unit 10 by wiring (not shown) on the substrate 8a. In detail, the anode electrode 10b and the cathode electrode 10c of each of the micro LEDs 10R, 10G, and 10B as the light-emitting unit 10 are electrically connected via bump electrodes (not shown) provided on the substrate 8a. As a result, the micro LEDs 10R, 10G, and 10B are each mounted on the substrate 8a in a state in which electricity can be passed therethrough.

With the above configuration, in the first micro LED display 100, each pixel circuit chip 2 is controlled by a separately prepared control circuit such as a driver IC (not shown), and the micro LEDs 10R, 10G, and 10B can perform full-color display in response to external power.

Next, a second micro LED display having a circuit board according to the present invention will be described. FIG. 17 is an explanatory diagram showing the configuration of a second micro LED display 101 having a circuit board according to the present invention.

The second micro LED display 101 employs a second method of achieving full color display by combining micro LEDs that emit short wavelength light, such as ultraviolet light emitting diodes (UV-LEDs), with RGB phosphors.

The second micro LED display 101 has a circuit board 9b, which is composed of phosphor cells 11 for emitting light, a pixel circuit chip 2 as a driving unit, and a substrate 8b on which the phosphor cells 11 and the pixel circuit chips 2 are mounted according to a predetermined arrangement.

Figure 18 is an explanatory diagram showing the configuration of the phosphor cell 11. (a) is an enlarged plan view of the phosphor cell 11 shown in Figure 17, (b) is a cross-sectional view taken along line B-B in Figure 18(a). (c) is a front view of the micro LED 12.

As shown in FIG. 18(b), the phosphor cell 11 includes a fluorescent light-emitting layer 11a, a micro LED 12, and a planarization film 13.

The fluorescent light-emitting layer 11a has a fluorescent material layer 11R filled with a red fluorescent pigment, a fluorescent material layer 11G filled with a green fluorescent pigment, and a fluorescent material layer 11B filled with a blue fluorescent pigment. These fluorescent pigments are examples of RGB phosphors. The fluorescent light-emitting layer 11a converts the wavelengths of the red, green, and blue fluorescent pigments into red (R), green (G), and blue (B) fluorescence, respectively, to achieve a full-color display.

Specifically, the fluorescent pigments in each of the fluorescent material layers 11R, 11G, and 11B transition to an excited state by the light (excitation light) emitted from the micro-LEDs 12, and then when they return to the ground state, they emit fluorescence corresponding to the visible spectrum of red (R), green (G), and blue (B) that have been wavelength-converted by each fluorescent material. These fluorescent material layers 11R, 11G, and 11B are partitioned by partition walls 15 that have a reflective metal film 14 on their surface to prevent color mixing.

As shown in FIG. 18(c), the micro LED 12 has a main body 12a, an anode electrode 12b for emitting light and a cathode electrode 12c on one side of the main body, and a light emission surface 12d for emitting light from the main body 12a on the other side. The main body 12a of the micro LED 12 is manufactured using, for example, gallium nitride (GaN) as a main material. The micro LED 12 may be an ultraviolet light emitting diode (UV-LED) or an LED that emits blue light. In this embodiment, for example, an ultraviolet light emitting diode (UV-LED) that emits light corresponding to a peak wavelength of 385 nm may be selected, taking into consideration the conversion efficiency of RGB phosphors, etc.

The planarization film 13 is formed in a flat plate shape and adheres to the peripheral side surface of the micro-LED 12 to hold it in place.

With the above configuration, each pixel circuit chip 2 is controlled by a separately prepared control circuit such as a driver IC (not shown), and the phosphor cell 11 can perform full-color display according to external power. In this case, in the pixel circuit 2a shown in FIG. 4, the first method is changed to the second method, and the wiring (three lines) that transfers the RGB data voltage values transfers the data voltage values of each micro LED 12 that is associated with the RGB of the RGB phosphor to emit the above-mentioned fluorescence. Then, in the pixel circuit 2a, each voltage data in the second method is converted into current data for driving the LED, and each micro LED 12 shown in FIG. 18(b) is current-driven at a predetermined timing. As a result, the phosphor cell 11 emits light according to the magnitude of the current passed therethrough, enabling full-color display.

The pixel circuit 2a therefore supports a first method of combining three types of micro-LEDs, R (red), G (green), and B (blue), into one pixel unit to achieve a full-color display, and a second method of combining micro-LEDs that emit short-wavelength light, such as ultraviolet light-emitting diodes (UV-LEDs), with RGB phosphors to achieve a full-color display, and is characterized by driving the micro-LEDs according to the first method or the second method. As a result, the circuit board according to the present invention can be used for both the first method and the second method, thereby increasing its versatility.

As described above, by using the circuit board manufacturing method of the present invention, large-scale capital investment is not required, as in the backplanes using conventional low-temperature polycrystalline silicon TFTs or oxide TFTs, as described above. Furthermore, by utilizing existing semiconductor equipment, circuit boards can be manufactured at low cost using the circuit board manufacturing method of the present invention, and it is also possible to manufacture micro LED displays equipped with these circuit boards.

In addition, by simply making design changes to the size, resolution, etc. of the FPC or other substrate, and performing the selective laser lift-off or selective UV irradiation described above, it is possible to accommodate displays of different sizes and specifications. This allows for flexible response to demands for high-mix, low-volume production.

In addition, the circuit board manufactured by the manufacturing method of the present invention uses a silicon semiconductor with excellent driving capability, and therefore has approximately 10 times the driving capability compared to when an LTPS semiconductor or an oxide semiconductor is used. From the viewpoint of the light emission efficiency characteristics of micro LEDs, it is possible to ensure sufficient driving capability for PWM (Pulse Width Modulation) driving, which is necessary to drive micro LED devices.

Furthermore, in the case of silicon semiconductors, if further miniaturization is possible while maintaining sufficient transistor characteristics, it is possible to mount more transistors in the same area. Therefore, in the above-mentioned embodiment, as shown in FIG. 4, in addition to the pixel drive circuit 2b, it is possible to integrate necessary circuit functions such as a scan circuit 1c that is usually placed outside the display area in the pixel circuit 2a. Furthermore, the pixel circuit 2a may be provided with a circuit for converting, for example, input RGB parallel data into RGB serial data, as necessary.

By integrating these functions, it is possible to reduce the number of connection terminals by minimizing the number of wires inside the display, and to reduce the number of circuits that are usually placed outside the display area. This is expected to improve reliability by reducing terminal connection failures inside the display, and reduce costs by reducing external circuits.

The above-described embodiment is presented to the extent that the present invention can be understood and implemented, and the present invention is not limited thereto. The present invention can be modified and altered in various ways without departing from the scope of the technical ideas set forth in the claims.

REFERENCE SIGNS LIST 1...wafer 1c...wafer portion 2, 21, 22, 23, 24...pixel circuit chip 2a...pixel circuit 2d, 2e...electrode pad 3...first transfer substrate 7...second transfer substrate 8, 8a, 8b...substrate 9, 9a, 9b...circuit substrate 10R, 10G, 10B, 12...micro LED
100: First micro LED display 101: Second micro LED display

Claims (5)

A method for manufacturing a circuit board including a pixel circuit chip including a pixel circuit for driving a micro LED, comprising:
forming pixel circuits on a surface of a silicon wafer according to a predetermined arrangement;
forming a connection electrode pad on the pixel circuit;
a surface of the wafer is attached to a first transfer substrate via the pixel circuit, and then the wafer is thinned;
Etching the thinned wafer so as to leave a wafer portion connected to the pixel circuit, thereby transferring a pixel circuit chip consisting of a separated wafer portion and the pixel circuit having the electrode pad to the first transfer substrate;
attaching the first transfer substrate to a second transfer substrate via the pixel circuit chip, and then peeling off the first transfer substrate to invert the pixel circuit chip and transfer it to the second transfer substrate;
affixing the second transfer substrate to a mounting substrate via the pixel circuit chip, and then bonding the pixel circuit chip to the substrate for mounting;
peeling the second transfer substrate from the substrate;
A method for manufacturing a circuit board, comprising: The method for manufacturing a circuit board according to claim 1, characterized in that the etching is wet etching. The method for manufacturing a circuit board according to claim 2, characterized in that the wet etching causes the wafer portion to have a trapezoidal shape. The method for manufacturing a circuit board according to any one of claims 1 to 3, characterized in that laser lift-off is used as a means for peeling off the second transfer substrate from the substrate. The method for manufacturing a circuit board according to any one of claims 1 to 3, characterized in that ultraviolet irradiation is used as a means for peeling off the second transfer substrate from the substrate.