JP7586320B2 - Quantum computing device, quantum error suppression method, and program - Google Patents

Description

Application of Article 30, paragraph 2 of the Patent Act Published on October 8, 2020 at https://arxiv.org/abs/2010.03887v1 and https://arxiv.org/pdf/2010.03887v1.pdf Published on November 23, 2020 at https://arxiv.org/abs/2010.03887v2 and https://arxiv.org/pdf/2010.03887v2.pdf Published on March 9, 2021 at https://arxiv.org/abs/2010.03887v3 and https://arxiv. Published at https://arxiv.org/abs/2010.03887v3.pdf Published on March 23, 2021 at https://arxiv.org/abs/2010.03887v4 and https://arxiv.org/pdf/2010.03887v4.pdf

The present invention relates to quantum error tolerance technology in quantum information processing.

The potential of quantum computers and quantum networks has been attracting attention in recent years. Quantum error tolerance technology is important for realizing them.

Conventional quantum error tolerant computing uses quantum error correction to represent one logical quantum bit using multiple physical quantum bits, thereby providing redundancy and reducing computational errors. Quantum error correction is the only known technique that can scalably increase the size of a quantum computer as long as the physical error of the physical quantum bits used to provide redundancy is below a certain threshold (Non-Patent Document 1).

Endo Suguru, Simon C. Benjamin, and Ying Li. "Practical quantum error mitigation for near-future applications." Physical Review X 8.3 (2018): 031027.

While quantum error correction is a scalable technique that allows the size of quantum computers to be increased, the overhead of a very large number of qubits is huge. For example, even if we could achieve an error rate of 10 percent of the currently available qubits, it is estimated that hundreds of thousands of qubits would be needed, at a minimum, to solve useful problems that cannot be simulated with classical computers.

The present invention has been made in consideration of the above points, and aims to provide a technology that makes it possible to significantly reduce the number of quantum bits required for error-tolerant quantum computing.

According to the disclosed technology, a calculation unit that performs calculations of a quantum algorithm;
a quantum error correction unit that performs quantum error correction using a quantum error correction code during the calculation by the calculation unit;
A quantum computing device comprising: a quantum error suppression unit that cancels a decoding error occurring in the quantum error correction by a quantum error suppression method,
The quantum error suppression unit cancels the decoding error using a pseudo-probability method as the quantum error suppression method based on an error map of the decoding error created in advance by gate set tomography.
A quantum computing device is provided.

The disclosed technology makes it possible to significantly reduce the number of quantum bits required for error-tolerant quantum computing.

1 is a configuration diagram of a quantum computing device according to an embodiment of the present invention. FIG. 2 is a functional configuration diagram of a control device. 1 is a flowchart for explaining the operation of the quantum computing device. FIG. 1 is a diagram for explaining an overview of quantum error suppression. FIG. 1 is a diagram for explaining an overview of a Pauli frame. FIG. 1 is a diagram for explaining an overview of a Pauli frame incorporating quantum error suppression. FIG. 2 is a diagram illustrating an example of a hardware configuration of a control device.

Hereinafter, an embodiment of the present invention (the present embodiment) will be described with reference to the drawings. The embodiment described below is merely an example, and the embodiment to which the present invention is applicable is not limited to the following embodiment.

For example, in the following example, a pseudo-probability method is used as a quantum error suppression method to cancel decoding errors and approximation errors, but quantum error suppression methods other than the pseudo-probability method (e.g., extrapolation, symmetry verification, subspace expansion, etc.) may also be used.

(Overview of the embodiment)
In this embodiment, in order to significantly reduce the number of quantum bits necessary for error-tolerant quantum computing, a quantum computer executes error-tolerant quantum computing that combines a quantum error correction method and a quantum error suppression method.

The quantum error suppression method is a method for suppressing errors in quantum computers without increasing the number of quantum bits, but the cost is that the number of measurements must be increased. Since the increase in the number of measurements increases exponentially with the number of errors that occur in the quantum computer, the quantum error suppression method is not a scalable method, but when the number of calculation errors in the entire quantum circuit is one or two, the increase in the number of measurements is within the acceptable range, making it very useful.

In this embodiment, quantum error correction is used to reduce calculation errors to about one or two times, and quantum error suppression is performed to reduce calculation errors beyond that. This is expected to dramatically reduce the number of quantum bits required to perform error-tolerant quantum computing.

Furthermore, in the error-tolerant quantum computation of this embodiment, in order to implement an arbitrary quantum gate, an approximation is performed using the Solovay-Kitaev algorithm using multiple H, T, and CNOT. In this case, an approximation error occurs, but the method according to this embodiment can suppress the approximation error. The Solovay-Kitaev algorithm is described in Nielsen, M. A., & Chuang, I. (2002). Quantum computation and quantum information.

The device configuration and device operation of this embodiment are described below.

(Overall device configuration)
1 shows an example of the configuration of a quantum computing device 300 according to the present embodiment. The "quantum computing device" may also be called a "quantum computer."

As shown in FIG. 1, the quantum computing device 300 includes a control device 100 and a quantum processor 200. The control device 100 performs error-tolerant quantum computing by transmitting a control signal to the quantum processor 200 and obtaining a calculation result (measurement result) from the quantum processor 200. The control device 100 can be realized, for example, by a classical computer. Note that hereafter, "computer" means "classical computer."

The quantum processor 200 forms a quantum two-level system called a physical quantum bit, and performs physical operations such as initialization, gate operation (unitary transformation), and measurement on the physical quantum bit. There is no particular limitation on the physical system for realizing the physical quantum bit, and any physical system may be used. For example, superconducting circuits, ion traps, photons, quantum dots, etc. can be used as physical systems. These physical systems are described in Nielsen, M. A., & Chuang, I. (2002). Quantum computation and quantum information.

The following mainly describes the configuration and operation of the control device 100. Note that in the operation of the control device 100, processing proceeds physically by sending signals to the quantum processor 200 and receiving information from the quantum processor 200; however, for the sake of convenience, in the following description, this physical operation is not explicitly shown, but is described as being implicitly included in the operation of the control device 100. For example, when the control device 100 performs a "quantum algorithm operation," the "quantum algorithm operation" includes sending signals to the quantum processor 200 and receiving information from the quantum processor 200. Note that there are also cases where quantum operations are performed without physically operating the quantum processor 200, such as when using a Pauli frame, which will be described later.

(Configuration of the control device)
Fig. 2 shows an example of the functional configuration of the control device 100. As shown in Fig. 2, the control device 100 includes a calculation unit 110, a quantum error suppression unit 120, a quantum error correction unit 130, an error map creation unit 140, and a storage unit 150. The functions of each unit are outlined below.

The quantum error correction unit 130 constructs a pseudo two-level system called a logical quantum bit from multiple quantum bits according to the technique of quantum error correction codes such as stabilizer codes, and performs error correction by encoding and decoding the quantum bits.

The computing unit 110 performs logical operations on the logical quantum bits in an appropriate order to perform the desired quantum algorithm. When performing quantum error correction, the operation is performed by operating logical quantum gates on the logical quantum bits while they are still in the encoded state.

The error map creation unit 140 creates an error map of the decoding errors in the quantum error correction unit 130 and stores the error map in the memory unit 150. Furthermore, the error map creation unit 140 calculates an error map of approximation errors that occur when a quantum gate is approximated using the Solovay-Kitaev algorithm and stores the error map in the memory unit 150.

During calculation by the calculation unit 110, the quantum error suppression unit 120 cancels the decoding errors in the quantum error correction unit 130 based on the error map of the decoding errors, and cancels the approximation errors based on the error map of the approximation errors.

In the examples of Figures 1 and 2, the quantum computing device 300 is shown as having a quantum processor 200 and a control device 100, but this is an example. For example, the quantum computing device 300 may include a quantum processor 200, an arithmetic unit 110, a quantum error suppression unit 120, a quantum error correction unit 130, an error map creation unit 140, and a memory unit 150. In addition, a control device 100 that does not include a quantum processor 200 may be called a quantum computing device.

(Operation of the control device)
An example of the operation of the control device 100 will be described below with reference to the flowchart of FIG.

<S1 (Step 1)>
In S1, the error map creation unit 140 calculates an error map of decoding errors (errors caused by insufficient code distance, etc.) that are errors remaining due to failure in error correction when quantum error correction is performed by the quantum error correction unit 130. Here, the error map is characterized (created) using an error identification method called gate set tomography. Note that the error map may be any information that can identify the state in which an error occurs, and may be, for example, probabilistic information using the probability of error occurrence for each operation.

Gate set tomography is a method for investigating the occurrence of errors by performing quantum state tomography, quantum process tomography, and POVM tomography experiments together and simultaneously estimating all quantum state quantum gate measurements (POVMs) from the obtained experimental data. Gate set tomography itself is a known method, as disclosed in, for example, Non-Patent Document 1.

Note that the error identification method for decoding errors is not limited to gated set tomography, and other error identification methods may be used.

<S2>
The calculation unit 110 uses the Solovay-Kitaev algorithm to approximate any quantum gate from multiple H, T, and CNOT. In other words, the operation of any quantum gate can be approximated by a combination of multiple simple quantum gates by using the Solovay-Kitaev algorithm.

For this reason, an approximation error occurs. Therefore, in S2, the error map creation unit 140 calculates in advance an error map of the logical single gate operation generated by the Solovay-Kitaev algorithm. The calculated error map is stored in the memory unit 150. The error map of the approximation error can be accurately calculated in advance using information on the target quantum gate and information on the approximated quantum gate.

<S3>
The calculation unit 110 starts the calculation of the target quantum algorithm. During the calculation, the quantum error correction unit 130 performs error correction by encoding and decoding. The error correction by the quantum error correction unit 130 is performed by stabilizer code and magic-state distillation. Note that error correction methods such as stabilizer code and magic-state distillation are described in Nielsen, MA, & Chuang, I. (2002). Quantum computation and quantum information.

<S4>
During the calculation by the calculation unit 110, the quantum error suppression unit 120 cancels the decoding error that occurs during the error correction by the quantum error correction unit 130, using the error map created in S1.

More specifically, the quantum error suppression unit 120 cancels the decoding error using a quasi-probability method, which is one of the quantum error suppression techniques. As disclosed as quasi-probability decomposition in Non-Patent Document 1, the quasi-probability method itself is an existing technology.

The pseudo-probability method is a method for canceling errors by effectively applying the inverse transformation of the error map through the operation of the quantum circuit and post-processing of the measurement results. In the pseudo-probability method of this embodiment, when canceling a decoding error, instead of physically operating the quantum circuit, a classical memory called a Pauli frame is updated, so that the error can be canceled only by classical processing without physically operating the quantum processor. The Pauli frame is described in L. Riesebos, X. Fu, S. Varsamopoulos, C. G. Almudever, and K. Bertels, Pauli frames for quantum computer architectures, in Proceedings of the 54th Annual Design Automation Conference 2017 (2017) pp. 1-6.

Here, we will explain the outline of quantum error suppression assuming a pseudo-probabilistic method with reference to Figures 4(a) and (b). Figure 4(a) shows quantum computation without quantum error suppression for comparison with (b).

As shown in Figure 4(a), the operations of the quantum circuit are repeated many times, and the measurement results for each time are collected and the average is calculated. If quantum error suppression is not performed, as shown on the right side of Figure 4(a), the implementation of the quantum circuit is incomplete, and the distribution deviates from the ideal value. Note that the ideal value is the expected value that would be expected if the quantum circuit were perfectly implemented without errors.

When quantum error suppression is performed, the original circuit is replaced with a modified circuit for error cancellation, as shown in Figure 4(b). Each modified circuit is determined by a random number, and the distribution of the random numbers (modified circuits) depends on the error map (error model) measured by the gate set tomography mentioned above. By repeating the generation of random numbers and the operation by the modified circuit, the inverse transformation of the error map can be effectively applied. The diagram on the right side of Figure 4(b) shows that the average of the measurement results has become the ideal value by effectively applying the inverse transformation of the error map.

The outline of the Pauli frame will be explained with reference to Figures 5 and 6. For the purpose of explanation, Figure 5 shows an outline of the Pauli frame when quantum error suppression is not included. Specifically, it shows the application of a Pauli operation (Recover) for error correction (recovery) estimated from the syndrome, which is the measurement result of the stabilizer. However, the recovery operation is not physically applied to the quantum processor, but is stored in a classical memory called a Pauli frame. The recovery operation is updated with each gate operation. Finally, post-processing is performed on the measurement result according to the operation stored in the Pauli frame.

Figure 6 shows an overview of the Pauli frame when quantum error suppression (QEM) is performed using the pseudo-probability method described above in addition to the recovery operation shown in Figure 5. When the recovery operation for error cancellation in quantum error suppression is a Pauli operation, the recovery operation is stored in the Pauli frame (classical memory) without being physically applied to the quantum processor. The recovery operation is updated with each gate operation. The parity is also updated. Post-processing is performed on the measurement results according to the operation, parity, and quantum error suppression cost stored in the Pauli frame. Note that post-processing of the measurement results is a process performed in S7, which will be described later.

＜S5＞
In S5, during the calculation by the calculation unit 110, the quantum error suppression unit 120 cancels the approximation error based on the error map of the approximation error calculated in S2 by using a pseudo probability method. The processing operation is the same as the cancellation processing in S4.

<S6>
S4 and S5 are repeated during the calculation by the calculation unit 110. When the calculation by the calculation unit 110 is completed, the process proceeds to S7.

<S7>
In S7, for example, quantum error suppression unit 120 reads the measurement result from quantum processor 200. Quantum error suppression unit 120 performs post-processing on the measurement result according to the pseudo-probability method process and the state of the Pauli frame, and stores the measurement result after the post-processing in storage unit 150. Performing post-processing means, for example, correcting "1" to "0" and "0" to "1".

<S8>
S3 to S7 are repeated, and when the repetition is completed, the process proceeds to S9. The number of repetitions may be determined in advance, or the repetitions may be repeated until the average value of the measurement results converges to a certain value.

<S9>
For example, the quantum error suppression unit 120 outputs the average value of the measurement results obtained by repeating S3 to S7 as the measurement result in which the calculation error has been suppressed. In addition, the quantum error suppression unit 120 may store the measurement result in which the calculation error has been suppressed in the storage unit 150.

(Example of control device configuration)
The control device 100 can be realized, for example, by causing a computer to execute a program. This computer may be a physical computer or a virtual machine on the cloud.

That is, the control device 100 can be realized by executing a program corresponding to the processing performed by the control device 100 using hardware resources such as a CPU and memory built into the computer. The program can be recorded on a computer-readable recording medium (such as a portable memory) and stored or distributed. The program can also be provided via a network such as the Internet or email.

Figure 7 is a diagram showing an example of the hardware configuration of the computer. The computer in Figure 7 has a drive device 1000, an auxiliary storage device 1002, a memory device 1003, a CPU 1004, an interface device 1005, a display device 1006, an input device 1007, an output device 1008, etc., which are all interconnected by a bus BS.

The program that realizes the processing on the computer is provided by a recording medium 1001, such as a CD-ROM or a memory card. When the recording medium 1001 storing the program is set in the drive device 1000, the program is installed from the recording medium 1001 via the drive device 1000 into the auxiliary storage device 1002. However, the program does not necessarily have to be installed from the recording medium 1001, but may be downloaded from another computer via a network. The auxiliary storage device 1002 stores the installed program as well as necessary files, data, etc.

When an instruction to start a program is received, the memory device 1003 reads out and stores the program from the auxiliary storage device 1002. The CPU 1004 realizes functions related to the control device 100 in accordance with the program stored in the memory device 1003. The interface device 1005 is used as an interface for connecting to a network or the quantum processor 200. The display device 1006 displays a GUI (Graphical User Interface) or the like according to a program. The input device 1007 is composed of a keyboard and mouse, buttons, a touch panel, or the like, and is used to input various operational instructions. The output device 1008 outputs the results of calculations.

(Effects of the embodiment)
In order to reduce the decoding error that occurs in quantum error correction, the number of quantum bits used for encoding must be increased, but in this embodiment, the decoding error is canceled using quantum error suppression, so the number of quantum bits required can be dramatically reduced. For example, if the error rate of the physical quantum bit is about 10% of the error threshold, and if the experimenter can estimate the decoding error with an accuracy of 10% of the decoding error, the code distance can be reduced by about 2. If the original code distance is 11, the number of quantum bits can be reduced by about 33%.

(Summary of the embodiment)
This specification discloses at least the following quantum computing device, quantum error suppression method, and program.
(Section 1)
A calculation unit that performs calculations of a quantum algorithm;
a quantum error correction unit that performs quantum error correction using a quantum error correction code during the calculation by the calculation unit;
A quantum error suppression unit that cancels a decoding error occurring in the quantum error correction by a quantum error suppression method;
A quantum computing device comprising:
(Section 2)
2. The quantum computing device according to claim 1, wherein the quantum error suppression unit cancels the decoding error using a pseudo-probability method as the quantum error suppression method, based on an error map of the decoding error created in advance by gate set tomography.
(Section 3)
3. The quantum computing device according to claim 1, wherein the quantum error suppression unit cancels an approximation error caused by approximating a quantum gate from a plurality of quantum gates using the Solovay-Kitaev algorithm by the quantum error suppression method.
(Section 4)
The quantum computing device according to any one of claims 1 to 3, wherein the quantum error suppression unit stores in a memory a gate operation used to cancel the decoding error, and uses the gate operation in a post-processing of the measurement result obtained from the quantum processor.
(Section 5)
A quantum error suppression method performed by a quantum computing device, comprising:
A calculation step for performing a quantum algorithm;
a quantum error correction step of performing quantum error correction using a quantum error correction code during the calculation by the calculation step;
a quantum error suppression step of canceling a decoding error occurring in the quantum error correction by a quantum error suppression method;
A quantum error suppression method comprising:
(Section 6)
A program for causing a computer to function as each unit in the quantum computing device according to any one of claims 1 to 4.

Although the present embodiment has been described above, the present invention is not limited to such a specific embodiment, and various modifications and variations are possible within the scope of the gist of the present invention as described in the claims.

REFERENCE SIGNS LIST 100 Control device 110 Calculation unit 120 Quantum error suppression unit 130 Quantum error correction unit 140 Error map creation unit 150 Storage unit 200 Quantum processor 300 Quantum computing device 1000 Drive device 1001 Recording medium 1002 Auxiliary storage device 1003 Memory device 1004 CPU
1005 Interface device 1006 Display device 1007 Input device 1008 Output device

Claims (5)

A calculation unit that performs calculations of a quantum algorithm;
a quantum error correction unit that performs quantum error correction using a quantum error correction code during the calculation by the calculation unit;
A quantum computing device comprising: a quantum error suppression unit that cancels a decoding error occurring in the quantum error correction by a quantum error suppression method,
The quantum error suppression unit cancels the decoding error using a pseudo-probability method as the quantum error suppression method based on an error map of the decoding error created in advance by gate set tomography.
Quantum computing device. 2. The quantum computing device according to claim 1, wherein the quantum error suppression unit cancels an approximation error that occurs when a quantum gate is approximated from a plurality of quantum gates by the Solovay-Kitaev algorithm, using the quantum error suppression method. The quantum computing device according to claim 1 or 2 , wherein the quantum error suppression unit stores in a memory a gate operation used when canceling the decoding error, and uses the gate operation in a post-processing of a measurement result obtained from a quantum processor. A quantum error suppression method performed by a quantum computing device, comprising:
A calculation step for performing a quantum algorithm;
a quantum error correction step of performing quantum error correction using a quantum error correction code during the calculation by the calculation step;
A quantum error suppression step of canceling a decoding error occurring in the quantum error correction by a quantum error suppression method,
In the quantum error suppression step, the decoding error is canceled using a pseudo-probability method as the quantum error suppression method based on an error map of the decoding error created in advance by gate set tomography.
Quantum error suppression methods. A program for causing a computer to function as each unit in the quantum computing device according to any one of claims 1 to 3 .

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