JP7600083B2 - Power Conversion Equipment - Google Patents

Description

This disclosure relates to a power conversion device.

JP 1-295680 A (Patent Document 1) discloses an overcurrent protection method for an inverter. In Patent Document 1, the output current of the inverter is detected using two-stage detection standards, and when the output current exceeds the lower standard, the output current is suppressed. In addition, when the output current exceeds the lower standard for a predetermined period of time, or when the output current exceeds the upper standard, the inverter is stopped.

Japanese Patent Application Publication No. 1-295680

According to Patent Document 1, the inverter's overcurrent protection function is improved by providing two levels of overcurrent detection levels. However, while the inverter can be protected depending on the lower reference current level, there is concern that it may be difficult to fully utilize the current drive capacity of the semiconductor switching elements that make up the inverter.

Therefore, the main objective of this disclosure is to provide a power conversion device that can appropriately set the limit value of the inverter output current.

A power conversion device according to one aspect of the present disclosure includes an inverter and a control device. The inverter includes a plurality of switching elements and converts a DC voltage into an AC voltage. The control device controls the switching operation of the plurality of switching elements so that the AC current flowing through the inverter matches a current command value. The control device includes a setting unit and a limiter circuit. The setting unit sets a limit value for the current command value according to the magnitude of the DC voltage. The limiter circuit limits the current command value within a range according to the limit value. The setting unit increases the magnitude of the limit value as the DC voltage decreases.

This disclosure provides a power conversion device that can appropriately set the limit value of the inverter output current.

1 is a circuit block diagram showing a configuration example of an uninterruptible power supply to which a power conversion device according to a first embodiment is applied; 2 is a circuit block diagram showing a configuration of the inverter shown in FIG. 1 and its peripheral parts. 3 is a diagram for explaining the operation of the inverter shown in FIG. 2; 3 is a circuit block diagram showing a configuration of an inverter control circuit shown in FIG. 2 . 5 is a circuit block diagram showing a configuration of a voltage command unit shown in FIG. 4 . 6 is a diagram for explaining a method of setting a current command limit value in a limit value setting unit shown in FIG. 5 . 6 is a diagram illustrating an example of the configuration of a limit value setting unit illustrated in FIG. 5 . 11 is a circuit block diagram showing a configuration of an inverter and its peripheral parts included in an uninterruptible power supply device according to a second embodiment. FIG. 9 is a circuit block diagram showing a configuration of an inverter control circuit shown in FIG. 8 .

The following describes in detail the embodiments of the present disclosure with reference to the drawings. Note that the same or equivalent parts in the drawings are given the same reference numerals, and in principle, their descriptions will not be repeated.

[First embodiment]
<Application examples of power conversion devices>
Fig. 1 is a circuit block diagram showing a configuration example of an uninterruptible power supply 1 to which a power conversion device according to embodiment 1 is applied. The uninterruptible power supply 1 is configured to once convert three-phase AC power from a commercial AC power supply 21 into DC power, and then convert the DC power into three-phase AC power to supply to a load 24. In Fig. 1 and Fig. 2, for the sake of simplicity of the drawings and explanation, only a portion of the circuit corresponding to one phase (e.g., U phase) of the three phases (U phase, V phase, W phase) is shown.

Referring to FIG. 1, the uninterruptible power supply 1 includes an AC input terminal T1, a bypass input terminal T2, a battery terminal T3, and an AC output terminal T4. The AC input terminal T1 receives AC power of a commercial frequency from a commercial AC power source 21. The bypass input terminal T2 receives AC power of a commercial frequency from a bypass AC power source 22. The bypass AC power source 22 may be a commercial AC power source or a generator.

The battery terminal T3 is connected to a battery 23. The battery 23 stores DC power. The battery 23 corresponds to one embodiment of a "power storage device." A capacitor may be connected instead of the battery 23. The AC output terminal T4 is connected to a load 24. The load 24 is driven by AC power.

The uninterruptible power supply 1 further includes electromagnetic contactors 2, 8, 14, and 16, current detectors 3 and 11, capacitors 4, 9, and 13, reactors 5 and 12, a converter 6, a bidirectional chopper 7, an inverter 10, a semiconductor switch 15, an operating unit 17, and a control device 18.

The electromagnetic contactor 2 and reactor 5 are connected in series between the AC input terminal T1 and the input node of the converter 6. The capacitor 4 is connected to a node N1 between the electromagnetic contactor 2 and reactor 5. The electromagnetic contactor 2 is turned on when the uninterruptible power supply 1 is in use, and is turned off, for example, during maintenance of the uninterruptible power supply 1.

The instantaneous value of the AC input voltage Vi appearing at node N1 is detected by the control device 18. The presence or absence of a power outage is determined based on the instantaneous value of the AC input voltage Vi. The current detector 3 detects the AC input current Ii flowing through node N1 and provides the control device 18 with a signal Iif indicating the detected value.

The capacitor 4 and reactor 5 form a low-pass filter that passes commercial frequency AC power from the commercial AC power source 21 to the converter 6 and prevents the switching frequency signal generated by the converter 6 from passing to the commercial AC power source 21.

Converter 6 is controlled by control device 18, and during normal operation when AC power is being supplied from commercial AC power source 21, converts the AC power into DC power and outputs it to DC line L1. During a power outage when the supply of AC power from commercial AC power source 21 is stopped, operation of converter 6 is stopped. The output voltage of converter 6 can be controlled to a desired value. Converter 6 corresponds to one embodiment of a "converter."

The capacitor 9 is connected to the DC line L1 and smoothes the voltage of the DC line L1. The instantaneous value of the DC voltage VDC appearing on the DC line L1 is detected by the control device 18. The DC line L1 is connected to the high-voltage side node of the bidirectional chopper 7, and the low-voltage side node of the bidirectional chopper 7 is connected to the battery terminal T3 via the electromagnetic contactor 8.

The electromagnetic contactor 8 is turned on when the uninterruptible power supply 1 is in use, and is turned off, for example, during maintenance of the uninterruptible power supply 1 and the battery 23. The instantaneous value of the terminal voltage VB of the battery 23 that appears at the battery terminal T3 is detected by the control device 18.

The bidirectional chopper 7 is controlled by the control device 18. During normal operation, the DC power generated by the converter 6 is stored in the battery 23, and during a power outage, the DC power from the battery 23 is supplied to the inverter 10 via the DC line L1.

When storing DC power in the battery 23, the bidirectional chopper 7 steps down the DC voltage VDC on the DC line L1 and supplies it to the battery 23. When supplying DC power from the battery 23 to the inverter 10, the bidirectional chopper 7 steps up the terminal voltage VB of the battery 23 and outputs it to the DC line L1. The DC line L1 is connected to the input node of the inverter 10.

The inverter 10 is controlled by the control device 18, and converts the DC power supplied from the converter 6 or the bidirectional chopper 7 via the DC line L1 into AC power of a commercial frequency and outputs it. That is, the inverter 10 normally converts the DC power supplied from the converter 6 via the DC line L1 into AC power, and during a power outage, converts the DC power supplied from the battery 23 via the bidirectional chopper 7 into AC power. The output of the inverter 10 can be controlled to a desired value. The inverter 10 corresponds to one embodiment of an "inverter".

The output node 10a of the inverter 10 is connected to a first terminal of the reactor 12, and the second terminal (node N2) of the reactor 12 is connected to the AC output terminal T4 via the electromagnetic contactor 14. The capacitor 13 is connected to node N2.

The current detector 3 detects the instantaneous value of the output current Io of the inverter 10 and provides a signal Iof indicating the detected value to the control device 18. The instantaneous value of the AC output voltage Vo appearing at node N2 is detected by the control device 18.

The reactor 12 and the capacitor 13 form a low-pass filter that allows the commercial frequency AC power generated by the inverter 10 to pass to the AC output terminal T4 and prevents the switching frequency signal generated by the inverter 10 from passing to the AC output terminal T4.

The electromagnetic contactor 14 is controlled by the control device 18 and is turned on in an inverter power supply mode in which the AC power generated by the inverter 10 is supplied to the load 24, and is turned off in a bypass power supply mode in which the AC power from the bypass AC power source 22 is supplied to the load 24.

The semiconductor switch 15 includes a thyristor and is connected between the bypass input terminal T2 and the AC output terminal T4. The electromagnetic contactor 16 is connected in parallel with the semiconductor switch 15. The semiconductor switch 15 is controlled by the control device 18 and is normally turned off. If the inverter 10 fails, the semiconductor switch 15 is instantly turned on and supplies AC power from the bypass AC power supply 22 to the load 24. The semiconductor switch 15 is turned off a predetermined time after it is turned on.

The electromagnetic contactor 16 is turned off in the inverter power supply mode and turned on in the bypass power supply mode. Furthermore, the electromagnetic contactor 16 is turned on when the inverter 10 fails and supplies AC power from the bypass AC power supply 22 to the load 24. In other words, when the inverter 10 fails, the semiconductor switch 15 is instantly turned on for a predetermined time and the electromagnetic contactor 16 is turned on. This makes it possible to prevent the semiconductor switch 15 from overheating and being damaged.

The operation unit 17 includes a number of buttons operated by the user of the uninterruptible power supply 1, a display that displays various information, and the like. By operating the operation unit 17, the user can turn the power supply of the uninterruptible power supply 1 on and off, and select either the bypass power supply mode or the inverter power supply mode.

The control device 18 incorporates a processor 180 and a memory 182, and controls each device of the uninterruptible power supply 1 based on information stored in the memory 182 and information from each sensor. That is, the control device 18 detects whether a power outage has occurred based on the detected value of the AC input voltage Vi, and controls the converter 6 and the inverter 10 in synchronization with the phase of the AC input voltage Vi.

In addition, the control device 18 normally controls the converter 6 so that the DC voltage VDC becomes the desired reference voltage VDCr, and stops the operation of the converter 6 in the event of a power outage.

Furthermore, the control device 18 controls the bidirectional chopper 7 so that the terminal voltage VB of the battery 23 becomes the desired reference voltage VBr during normal operation, and controls the bidirectional chopper 7 so that the DC voltage VDC becomes the desired reference voltage VDCr during a power outage.

Next, the operation of the uninterruptible power supply 1 will be described. Under normal circumstances, when the inverter power supply mode is selected, the semiconductor switch 15 and the electromagnetic contactor 16 are turned off, and the electromagnetic contactors 2, 8, and 14 are turned on.

AC power supplied from a commercial AC power source 21 is converted to DC power by the converter 6. The DC power generated by the converter 6 is stored in the battery 23 by the bidirectional chopper 7 and is also supplied to the inverter 10. The inverter 10 converts the DC power supplied from the converter 6 into AC power and supplies it to the load 24. The load 24 is driven by the AC power supplied from the inverter 10.

When the supply of AC power from the commercial AC power source 21 is stopped, i.e., when a power outage occurs, the operation of the converter 6 is stopped and DC power from the battery 23 is supplied to the inverter 10 by the bidirectional chopper 7. The inverter 10 converts the DC power from the bidirectional chopper 7 into AC power and supplies it to the load 24. Therefore, the operation of the load 24 can be continued while DC power is stored in the battery 23.

In addition, if the inverter 10 fails during inverter power supply mode, the semiconductor switch 15 instantly turns on, the electromagnetic contactor 14 turns off, and the electromagnetic contactor 16 turns on. This allows AC power from the bypass AC power supply 22 to be supplied to the load 24 via the semiconductor switch 15 and the electromagnetic contactor 16, and the operation of the load 24 continues. After a certain period of time, the semiconductor switch 15 turns off, preventing the semiconductor switch 15 from overheating and being damaged.

Figure 2 is a circuit block diagram showing the configuration of the inverter 10 and its peripheral parts shown in Figure 1. In Figure 2, a positive DC line L1 and a negative DC line L2 are connected between the converter 6 and the inverter 10. A capacitor 9 is connected between the DC lines L1 and L2.

Under normal circumstances, the converter 6 converts the AC input voltage Vi from the commercial AC power source 21 into a DC voltage VDC and outputs it between the DC lines L1 and L2. During a power outage, the operation of the converter 6 is stopped, and the bidirectional chopper 7 boosts the terminal voltage VB of the battery 23 and outputs the DC voltage VDC between the DC lines L1 and L2.

The inverter 10 includes IGBTs (Insulated Gate Bipolar Transistors) Q1 to Q4 and diodes D1 to D4. The IGBTs Q1 to Q4 correspond to one embodiment of a "switching element." In addition to IGBTs, any self-extinguishing switching element such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) can be used as the switching element.

The collectors of IGBTs Q1 and Q3 are both connected to DC line L1, and their emitters are connected to output nodes 10a and 10b, respectively. The collectors of IGBTs Q2 and Q4 are both connected to output nodes 10a and 10b, and their emitters are both connected to DC line L2. Diodes D1 to D4 are connected in anti-parallel to IGBTs Q1 to Q4, respectively. Each of diodes D1 to D4 is provided to pass a freewheel current when the corresponding IGBT is off. When the switching element is a MOSFET, the freewheel diode is formed by a parasitic diode (body diode).

The output node 10a of the inverter 10 is connected to the node N2 via the reactor 12, and the output node 10b is connected to the neutral point NP. The capacitor 13 is connected between the node N2 and the neutral point NP.

IGBTs Q1 and Q4 and IGBTs Q2 and Q3 are alternately turned on. When IGBTs Q1 and Q3 are turned on and IGBTs Q2 and Q3 are turned off, the positive terminal of capacitor 9 (DC line L1) is connected to output node 10a via IGBT Q1, and output node 10b is connected to the negative terminal of capacitor 13 (DC line L2) via IGBT Q4, and the terminal voltage of capacitor 9 is output between output nodes 10a and 10b. In other words, a positive DC voltage is output between output nodes 10a and 10b.

When IGBTs Q2 and Q3 are turned on and IGBTs Q1 and Q4 are turned off, the positive terminal of capacitor 9 (DC line L1) is connected to output node 10b via IGBT Q3, and output node 10a is connected to the negative terminal of capacitor 9 (DC line L2) via IGBT Q2, and the terminal voltage of capacitor 9 is output between output nodes 10b and 10a. In other words, a negative DC voltage is output between output nodes 10a and 10b.

The on/off of the above-mentioned IGBTs Q1 to Q4 is controlled by the inverter control circuit 30. The inverter control circuit 30 is included in the control device 18.

Here, we will explain the problems with the operation of the inverter 10. Figure 3 is a diagram for explaining the operation of the inverter 10 shown in Figure 2.

In the upper part of FIG. 3, the dashed line indicates the waveform of the current command value Io*, which is the target value of the output current Io of the inverter 10. The current command value Io* is generated based on the reference AC voltage Vor, as described below. The current command value Io* is a sine wave signal at commercial frequency, and its phase is synchronized with the phase of the reference AC voltage Vor of the corresponding phase (here, U phase) of the three phases (U phase, V phase, W phase).

In the upper part of Figure 3, the solid line shows the waveform of the output current Io (here, U-phase current) of the inverter 10 detected by the current detector 11. The lower part of Figure 3 shows the waveform of the output voltage Vo between the output nodes 10a and 10b of the inverter 10.

In the inverter control circuit 30, a voltage command value is generated so that the deviation ΔIo between the current command value Ior and the output current Io detected by the current detector 11 becomes 0, and the on/off of the IGBTs Q1 to Q4 of the inverter 10 is controlled based on the generated voltage command value.

However, because a reactor 12 is connected to output nodes 10a and 10b of inverter 10, the output current Io of inverter 10 has a waveform in which a high-frequency (corresponding to the switching frequency) ripple current Iripple is superimposed on a sine wave signal according to the current command value Ior. Therefore, as shown in FIG. 3, the positive peak value of output current Io is larger than the positive peak value of current command value Io* by the amount of ripple current Iripple. In addition, the negative peak value of output current Io is smaller than the negative peak value of current command value Io*.

In inverter 10, as a measure to prevent an overcurrent from flowing through IGBTs Q1 to Q4 and damaging them, a limit value for output current Io (hereinafter also referred to as "output current limit value") is set to a current value lower than the overcurrent detection level determined according to the rated current of the IGBT. The output current limit value is determined by the upper limit value (positive value) of output current Io and the lower limit value (negative value) of output current Io.

In FIG. 3, Iovr indicates the positive side overcurrent detection level, and Io_lim indicates the positive side output current limit value (i.e., the upper limit value of the output current Io). Although not shown in the figure, the negative side output current limit value Io_lim (i.e., the lower limit value of the output current Io) is greater than the negative side overcurrent detection level Iovr.

In controlling the inverter 10, the output current Io of the inverter 10 is limited according to the output current limit value Io_lim, thereby suppressing the occurrence of overcurrent in the IGBT. Specifically, in the inverter control circuit 30, a limit value of the current command value Io* (hereinafter also referred to as the "current command limit value") is set in advance according to the output current limit value Io_lim. The inverter control circuit 30 is configured to limit the current command value Io* within a range that conforms to this current command limit value. As a result, the output current Io is controlled according to the limited current command value Io*, and as a result, it is possible to keep the output current Io within a range that conforms to the output current limit value Io_lim.

To realize such an overcurrent protection function while maximizing the current drive capacity of the switching elements of the inverter 10, it is important to know how to set the current command limit value. This embodiment provides a method for setting the current command limit value.

In the inverter 10, as the DC voltage VDC applied to the input node increases, the peak value of the sine wave signal in the output current Io increases. Therefore, even when the inverter 10 is operated under the maximum DC voltage VDC assumed for the operation of the uninterruptible power supply 1, it is necessary to set the current command limit value so that the output current Io according to the current command value Io* does not exceed the range according to the output current limit value Io_lim.

3, the output current Io of the inverter 10 includes a ripple current Iripple. The ripple current Iripple can be expressed by the following equation (1).
Iripple=VDC/(2L)×1/fsw/2...(1)
In equation (1), L is the inductance of reactor 12, and fsw is the switching frequency of IGBTs Q1 to Q4.

As can be seen from equation (1), the magnitude of the ripple current Iripple is determined by the DC voltage VDC and the inductance L. However, since the inductance L is a fixed value, the ripple current Iripple changes solely in response to the DC voltage VDC. As the DC voltage VDC increases, the ripple current Iripple also increases.

As the DC voltage VDC increases, the peak value of the sine wave signal in the output current Io increases, and the ripple current Iripple also increases. Therefore, it is necessary to set the current command limit value so that the output current Io does not exceed the output current limit value Io_lim even under the maximum DC voltage VDC in operation.

On the other hand, in the operation of the uninterruptible power supply 1, the DC voltage VDC is usually controlled to a voltage value lower than the maximum voltage assumed in the above-mentioned operation. Therefore, the peak value of the sine wave signal and the ripple current Iripple are both smaller in current value than when the DC voltage VDC is at its maximum voltage. Therefore, if the current command limit value is set taking into account the maximum voltage of the DC voltage VDC as described above, in actual operation, the output current Io of the inverter 10 is designed to have a sufficient margin with respect to the output current limit value Io_lim. In other words, the problem is that the current driving capacity of the switching elements of the inverter 10 is not maximized.

Therefore, in this embodiment, the current command limit value is variably set according to the magnitude of the DC voltage VDC. This makes it possible to maximize the current drive capacity of the switching elements of the inverter 10 while realizing the overcurrent protection function.

Figure 4 is a circuit block diagram showing the configuration of the inverter control circuit 30 shown in Figure 2.

Referring to FIG. 4, the inverter control circuit 30 includes a voltage command unit 31, a triangular wave generator 32, a comparator 33, a buffer 34, an inverter 35, and gate drive circuits 36 and 37. These functional configurations are realized by the processor 181 executing a predetermined program in the control device 18 shown in FIG. 1.

The voltage command unit 31 generates a sinusoidal voltage command value Vo# based on the instantaneous value of the AC output voltage Vo appearing at node N2 (Fig. 1) and the output signal Iof of the current detector 11 (Fig. 1). The phase of the voltage command value Vo# is synchronized with the phase of the AC input voltage Vi of the corresponding phase (here, the U phase) of the three phases (U phase, V phase, W phase).

The triangular wave generator 32 outputs a triangular wave signal Cu1 with a frequency sufficiently higher than the commercial frequency. The comparator 33 compares the voltage command value Vo# from the voltage command unit 31 with the triangular wave signal Cu1 from the triangular wave generator 32, and outputs a PWM (Pulse Width Modulation) signal Au1 indicating the comparison result. The buffer 34 provides the PWM signal Au1 to the gate drive circuits 36 and 37. The inverter 35 inverts the PWM signal Au1 to generate a PWM signal Bu1 and provides it to the gate drive circuits 36 and 37.

The gate drive circuit 36 generates gate drive signals VG1 and VG2 for turning on and off the IGBTs Q1 and Q2 based on the PWM signals Au1 and Bu1. The gate drive circuit 37 generates gate drive signals VG3 and VG4 for turning on and off the IGBTs Q3 and Q4 based on the PWM signals Au1 and Bu1.

Figure 5 is a circuit block diagram showing the configuration of the voltage command unit 31 shown in Figure 4.

Referring to FIG. 5, the voltage command unit 31 includes a reference voltage generation unit 40, a voltage control unit 42, a limiter circuit 44, a subtractor 46, a current control unit 48, an adder 50, a voltage detector 56, and a limit value setting unit 60.

The reference voltage generating unit 40 generates a three-phase reference AC voltage Vor. The reference AC voltage Vor of each phase is a sine wave signal at commercial frequency. The voltage control unit 42 generates a three-phase current command value Io* based on the reference AC voltage Vor from the reference voltage generating unit 40.

The limiter circuit 44 generates a current command value Io# by limiting the current command value Io* generated by the voltage control unit 42 to a range that conforms to the current command limit value Io*_lim. The range that conforms to the current command limit value Io*_lim is specified by an upper limit value (+Io*_lim) and a lower limit value (-Io*_lim).

In the limiter circuit 44, if the peak value (absolute value) of the current command value Io* is equal to or less than the current command limit value Io*_lim, Io* becomes Io# as is. If the peak value (absolute value) of the current command value Io* is greater than the current command limit value Io*_lim, Io*_lim becomes the peak value (absolute value) of Io#.

The subtractor 46 calculates the deviation ΔIo=Io#-Io between the current command value Io# and the output current Io detected by the current detector 11. The current control unit 48 generates a voltage command value Vo* so that the deviation ΔIo becomes 0. The current control unit 48 generates the voltage command value Vo* by amplifying the deviation ΔIo according to proportional control or proportional-integral control, for example.

The adder 50 adds the voltage command value Vo* and the detected value of the AC output voltage Vo to generate the voltage command value Vo#.

The voltage detector 56 detects the instantaneous value of the DC voltage VDC appearing on the DC line L1. The limit value setting unit 60 sets the current command limit value Io*_lim and provides it to the limiter circuit 44. The limit value setting unit 60 is configured to set the current command limit value Io*_lim based on the detection value of the DC voltage VDC by the voltage detector 56, as described below.

Figure 6 is a diagram for explaining how the current command limit value Io*_lim is set in the limit value setting unit 60 shown in Figure 5.

Figure 6 shows an example of the relationship between the current command limit value Io*_lim and the DC voltage VDC. Figure 5 also shows the above relationship, as well as the overcurrent detection level Iovr and the output current limit value Io_lim. Note that in Figure 6, the current command limit value Io*_lim, the overcurrent detection level Iovr, and the output current limit value Io_lim are all shown as absolute values.

The overcurrent detection level Iovr is determined according to the rated current of the switching elements (e.g., IGBTs) that make up the inverter 10. When the magnitude of the output current Io detected by the current detector 11 exceeds the overcurrent detection level Iovr, the control device 18 (inverter control circuit 30) stops the operation of the inverter 10 by turning off all of the IGBTs Q1 to Q4. The control device 18 also stops the operation of the converter 6, instantly turns on the semiconductor switch 15, turns off the electromagnetic contactor 14, and turns on the electromagnetic contactor 16. This switches the uninterruptible power supply 1 from the inverter power supply mode to the bypass power supply mode. The control device 18 turns off the semiconductor switch 15 after a certain period of time.

The output current limit value Io_lim is set to a value that prevents the output current Io of the inverter 10 from exceeding the overcurrent detection level Iovr, taking into account the ripple current Iripple at the maximum DC voltage VDC (maximum voltage VDC_max in the figure) during operation of the uninterruptible power supply 1.

As shown in FIG. 6, the current command limit value Io*_lim is variably set according to the magnitude of the DC voltage VDC. Specifically, a minimum value Ili_min of the current command limit value Io*_lim is set corresponding to the maximum DC voltage VDC (corresponding to the maximum voltage VDC_max in the figure) during operation of the uninterruptible power supply 1. This minimum value Ilim_min is set so that the magnitude (absolute value) of the peak value of the output current Io when the DC voltage VDC is the maximum voltage VDC_max is equal to or less than the magnitude (absolute value) of the output current limit value Io_lim.

As described above, the ripple current Iripple contained in the output current Io is determined by the inductance L of the reactor 12 and the switching frequency fsw of the switching element in the inverter 10. Therefore, the minimum value Ilim_min can be set appropriately according to the maximum operational voltage VDC_max of the uninterruptible power supply 1, the inductance L of the reactor 12, and the switching frequency fsw.

The current command limit value Io*_lim is set so that the current value increases as the DC voltage VDC decreases from the maximum voltage VDC_max. Thus, as the DC voltage VDC increases toward the maximum voltage VDC, the current command limit value Io*_lim decreases toward the minimum value Ilim_min.

In the relationship shown in FIG. 6, the magnitude of the current command limit value Io*_lim for each DC voltage VDC is set so that the magnitude (absolute value) of the peak value of the output current Io of the inverter 10 receiving the DC voltage VDC at its input node is equal to or less than the magnitude (absolute value) of the output current limit value Io_lim.

According to the relationship shown in FIG. 6, when the DC voltage VDC is lower than the maximum voltage VDC_max, the current command limit value Io*_lim is set to a value greater than the minimum value Ilim_min, and the limiter circuit 44 relaxes the restriction on the current command value Io*. As a result, as the DC voltage VDC decreases, the amplitude of the sine wave contained in the output current Io of the inverter 10 can be increased within the range that follows the output current limit value Io_lim. This makes it possible to utilize the current drive capacity of the switching elements that make up the inverter 10 while realizing the overcurrent protection function.

Figure 7 shows an example of the configuration of the limit value setting unit 60 shown in Figure 5.

Referring to FIG. 7, the limit value setting unit 60 has a subtractor 62, a multiplier 64, and an adder 66. The subtractor 62 receives the DC voltage VDC detected by the voltage detector 56 and the maximum voltage VDC_max. The maximum voltage VDC_max is the maximum operational voltage of the uninterruptible power supply 1. The subtractor 62 calculates the deviation ΔVDC = VDC - VDC_max between the DC voltage VDC and the maximum voltage VDC_max.

The multiplier 64 calculates the correction amount ΔIlim of the current command limit value Io*_lim by multiplying the deviation ΔVDC by a coefficient k. The coefficient k corresponds to the slope of the straight line that represents the relationship between the DC voltage VDC and the current command limit value Io*_lim shown in FIG. 6.

The adder 66 calculates the current command limit value Io*_lim by adding the correction amount ΔIlim to the minimum value Ilim_min of the current command limit value Io*_lim.

Note that, although Figures 6 and 7 show an example in which the current command limit value Io*_lim is changed (decreased) linearly in response to an increase in the DC voltage VDC, the current command limit value Io*_lim may be changed nonlinearly (for example, in a curve) or in a stepwise manner in response to a change in the DC voltage VDC.

The control device (inverter control circuit 30) can store data indicating the relationship between the current command limit value Io*_lim and the DC voltage VDC in an internal memory. The limit value setting unit 60 can set the current command limit value Io*_lim based on the detected value of the DC voltage VDC by referring to the data. The data may be in the form of a table or a function.

As described above, according to the power conversion device of embodiment 1, the limit value Io*_lim of the current command value of the output current of the inverter 10 is set to increase as the DC voltage VDC input to the inverter 10 decreases. This makes it possible to maximize the current driving capability of the inverter 10 while realizing the overcurrent protection function.

[Embodiment 2]
8 is a circuit block diagram showing an inverter 10A and its peripheral parts included in an uninterruptible power supply according to embodiment 2. The uninterruptible power supply according to embodiment 2 differs from uninterruptible power supply 1 according to embodiment 1 in that converter 6, bidirectional chopper 7, inverter 10, and inverter control circuit 30 are replaced with converter 6A, bidirectional chopper 7A, inverter 10A, and inverter control circuit 30A, respectively.

Referring to FIG. 8, three DC lines L1 to L3 are connected between the converter 6A and the inverter 10A. The DC line L2 is connected to the neutral point NP and is set to the neutral point voltage (e.g., 0 V). The capacitor 9 includes two capacitors 9a and 9b. The capacitor 9a is connected between the DC lines L1 and L2. The capacitor 9b is connected between the DC lines L2 and L3.

When AC power is normally supplied from the commercial AC power source 21, the converter 6A converts the AC power from the commercial AC power source 21 into DC power and supplies it to the DC lines L1 to L3. At this time, the converter 6A charges each of the capacitors 9a and 9b so that the DC voltage VDCa between the DC lines L1 and L2 becomes the reference voltage VDCr, and the DC voltage VDCb between the DC lines L2 and L3 becomes the reference voltage VDCr.

The voltages of the DC lines L1, L2, and L3 are set to a positive DC voltage (+VDCr), a neutral voltage (0V), and a negative DC voltage (-VDCr), respectively. In the event of a power outage in which the supply of AC power from the commercial AC power source 21 is stopped, the operation of the converter 6A is stopped.

Under normal conditions, the bidirectional chopper 7A stores the DC power generated by the converter 6A in the battery 23. At this time, the bidirectional chopper 7A charges the battery 23 so that the terminal voltage VB of the battery 23 becomes equal to the reference voltage VBr.

During a power outage, the bidirectional chopper 7A supplies DC power from the battery 23 to the inverter 10A. At this time, the bidirectional chopper 7A charges the capacitors 9a and 9b so that the inter-terminal voltages VDCa and VDCb of the capacitors 9a and 9b each become the reference voltage VDCr.

In normal operation, inverter 10A converts the DC power generated by converter 6A into AC power of commercial frequency and supplies it to load 24. At this time, inverter 10A generates AC output voltage Vo of commercial frequency based on the positive DC voltage, neutral voltage, and negative DC voltage supplied from DC lines L1 to L3.

Inverter 10A includes IGBTs Q21 to Q24 and diodes D21 to D24. The collector of IGBT Q21 is connected to DC line L1, and its emitter is connected to output node 10a. The collectors of IGBTs Q22 and Q24 are connected to each other, and their emitters are connected to DC line L2 and output node 10a, respectively. The collector of IGBT Q23 is connected to output node 10a, and its emitter is connected to DC line L3. Diodes D21 to D24 are connected in inverse parallel to IGBTs Q21 to Q24, respectively. Output node 10a is connected to node N2 via reactor 12.

In inverter 10A, during the first period, IGBTs Q23 and Q24 are turned off and on, respectively, and IGBTs Q21 and Q22 are alternately turned on, and during the second period, IGBTs Q21 and Q22 are turned off and on, respectively, and IGBTs Q23 and Q24 are alternately turned on.

Figure 9 is a circuit block diagram showing the configuration of the inverter control circuit 30A shown in Figure 8. The inverter control circuit 30A is included in the control device 18.

Referring to FIG. 9, the inverter control circuit 30A includes a voltage command unit 31, triangular wave generators 82 and 83, comparators 84 and 85, buffers 86 and 87, inverters 88 and 89, and gate drive circuits 90 and 91. These functional configurations are realized by the processor 181 executing a predetermined program in the control device 18 shown in FIG. 1.

The voltage command unit 31 generates a sinusoidal voltage command value Vo# based on the instantaneous value of the AC output voltage Vo appearing at node N2 (FIG. 1) and the output signal Iof of the current detector 11 (FIG. 1). The voltage command unit 31 has a configuration similar to that of the voltage command unit 31 (see FIG. 5) in the first embodiment. In the second embodiment, the voltage detector 56 detects the DC voltage VDC, which is the sum of the inter-terminal voltages VDCa and VDCb of the capacitors 9a and 9b.

The triangular wave generator 82 outputs a triangular wave signal Cu1a with a frequency that is sufficiently higher than the commercial frequency. The triangular wave generator 83 outputs a triangular wave signal Cu1b with the same phase and frequency as the triangular wave signal Cu1a.

The comparator 84 compares the voltage command value Vo# from the voltage command unit 31 with the triangular wave signal Cu1a from the triangular wave generator 82, and outputs a PWM signal φ1 indicating the comparison result. The buffer 86 provides the PWM signal φ1 to the gate drive circuit 90. The inverter 88 inverts the PWM signal φ1 to generate a PWM signal φ2 and provides it to the gate drive circuit 90.

The comparator 85 compares the voltage command value Vo# from the voltage command unit 31 with the triangular wave signal Cu1b from the triangular wave generator 83, and outputs a PWM signal φ3 indicating the comparison result. The buffer 87 provides the PWM signal φ3 to the gate drive circuit 91. The inverter 89 inverts the PWM signal φ3 to generate a PWM signal φ4 and provides it to the gate drive circuit 91.

The gate drive circuit 90 generates gate drive signals VG21 and VG22 for turning on and off the IGBTs Q21 and Q22 based on the PWM signals φ1 and φ2. The gate drive circuit 91 generates gate drive signals VG23 and VG24 for turning on and off the IGBTs Q23 and Q24 based on the PWM signals φ3 and φ4.

As described above, in the second embodiment as well, the limit value Io*_lim of the current command value of the output current of the inverter 10A is set to increase as the DC voltage VDC input to the inverter 10A decreases. Therefore, the same effect as in the first embodiment can be obtained.

The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present invention is indicated by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims.

1 Uninterruptible power supply, 2, 8, 14, 16 Electromagnetic contactor, 3, 11 Current detector, 4, 9, 13 Capacitor, 5, 12 Reactor, 6, 6A Converter, 7, 7A Bidirectional chopper, 10, 10A Inverter, 15 Semiconductor switch, 17 Operation unit, 18 Control device, 23 Battery, 30, 30A Inverter control circuit, 31 Voltage command unit, 32, 82, 83 Triangular wave generator, 33, 84, 85 Comparator, 34, 86, 87 Buffer, 35, 88, 89 Inverter, 36, 37, 90, 91 Gate drive circuit, 40 Reference voltage generation unit, 42 Voltage control unit, 44 Limiter circuit, 46, 62 Subtractor, 48 Current control unit, 50, 66 Adder, 60 Limit value setting unit, 64 Multiplier, 181 Processor, 182 memory, T1 AC input terminal, T2 bypass input terminal, T3 battery terminal, T4 AC output terminal, Q1 to Q4, Q21 to Q24 IGBTs, D1 to D4, D21 to D24 diodes, L1 to L3 DC lines, Io output current, Iripple ripple current, Iovr overcurrent detection level, Io_lim output current limit value, Io*_lim current command limit value.

Claims (3)

A power conversion device,
an inverter including a plurality of switching elements for converting a DC voltage into an AC voltage;
a reactor connected between an output node of the inverter and an AC output terminal;
a control device that controls a switching operation of the plurality of switching elements so that an output current of the inverter coincides with a current command value;
The control device includes:
a setting unit that sets a limit value of the current command value in accordance with the magnitude of the DC voltage;
a limiter circuit that limits the current command value within a range that conforms to the limit value,
a setting unit that sets a minimum value of the limit value based on a maximum value of the DC voltage during operation of the power conversion device, an inductance of the reactor, and a switching frequency of the multiple switching elements, and increases the magnitude of the limit value from the minimum value of the limit value as the DC voltage decreases from the maximum value . A voltage detector for detecting the DC voltage is further provided.
The power conversion device according to claim 1 , wherein the setting unit sets the limit value by adding a correction amount corresponding to a deviation between the detection value of the voltage detector and the maximum value to the minimum value of the limit value. The power conversion device according to claim 1 , further comprising a converter that converts an AC voltage into a DC voltage and outputs the DC voltage to the inverter.

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