JP7601664B2 - Chip Resistors - Google Patents

Description

The present invention relates to a surface-mount type chip resistor.

In general, chip resistors are mainly composed of a rectangular insulating substrate, a pair of front electrodes arranged facing each other with a specified distance on the surface of the insulating substrate, a pair of rear electrodes arranged facing each other with a specified distance on the rear surface of the insulating substrate, a pair of end electrodes that connect the front and rear electrodes, a pair of external plating layers that cover each of these electrodes, a resistor that bridges the pair of front electrodes, and an insulating protective film that covers the resistor.

In this type of chip resistor, the front electrode is usually made of a low resistivity Ag (silver) based metal material, and an external plating layer is formed to cover this front electrode. However, highly corrosive sulfide gases and the like can easily penetrate through the gap at the boundary between the external plating layer and the protective film, and there is a risk that the front electrode portion at the boundary between the front electrode and the protective film will be corroded by the sulfide gases and the like, resulting in problems such as changes in resistance value and breakage.

As disclosed in Patent Document 1, a chip resistor has been proposed that aims to improve sulfur resistance by forming a protective electrode that connects to both the front electrode and the protective film, forming end electrodes on the front electrode and the protective electrode so as not to contact the protective film, and forming an external plating layer that extends beyond the boundary between the protective electrode and the end electrode and covers the end of the protective film.

International Publication No. 2018/123419

In the chip resistor disclosed in Patent Document 1, the outer plating layer is formed on a conductive protective electrode, which provides better adhesion than an insulating protective film, and the outer plating layer and the protective electrode form a double shielding structure, preventing the intrusion of sulfide gas into the front electrode.

However, since the protective electrode is formed along the slope of the end of the protective layer and the external plating layer is formed to cover this protective electrode, if the adhesion between the external plating layer and the protective electrode is reduced due to thermal stress caused by heat cycles, etc., a gap will appear at the boundary between the protective layer and the protective electrode, allowing sulfide gas and other gases to enter through this area.

In addition, end electrodes are generally formed using a highly productive sputtering method, but if the sputtered particles during sputtering exceed the protective electrode and reach the top surface of the protective layer, the external plating layer will be deposited up to that area. In this case, since the external plating layer has low adhesion to the insulating protective layer, even if a protective electrode is formed inside the external plating layer, the stress generated from the tip of the external plating layer makes it easy for the external plating layer on the protective electrode to peel off from the protective layer.

The present invention has been made in consideration of the above-mentioned current state of the prior art, and an object of the present invention is to provide a chip resistor having excellent corrosion resistance.
.

In order to achieve the above object, the chip resistor of the present invention comprises a rectangular parallelepiped insulating substrate, a pair of front electrodes provided at both ends of the front surface of the insulating substrate, a pair of back electrodes provided at both ends of the back surface of the insulating substrate, a resistor provided so that both ends overlap the pair of front electrodes, a first insulating layer made of a glass material provided so as to cover the entire resistor including the connection portion between the front electrodes and the resistor, a second insulating layer made of a resin material laminated on the first insulating layer, and a pair of auxiliary electrodes laminated on the front electrodes and made of a material more resistant to sulfurization than the front electrodes. The insulating substrate is provided with an electrode layer, a pair of end surface electrodes extending at least to both end surfaces of the insulating substrate and electrically connecting the auxiliary electrode layer and the back electrode, and an external plating layer covering the auxiliary electrode layer, the end surface electrodes, and the back electrode, the first insulating layer having a protruding portion that is not covered by the second insulating layer and overlaps a portion of the upper surface of the front electrode, the auxiliary electrode layer is formed to cover at least the front electrode and the protruding portion, and the maximum height position on the surface of the auxiliary electrode layer is set to be equal to or higher than the maximum height position on the surface of the second insulating layer.

In a chip resistor configured in this manner, the step from the top surface of the front electrode to the top surface of the second insulating layer is divided into a step from the top surface of the front electrode to the top surface of the protruding portion of the first insulating layer and a step from the top surface of the protruding portion of the first insulating layer to the top surface of the second insulating layer, and the height of each step is small, so that the auxiliary electrode layer can be formed in a stable shape in the portion including these steps. In addition, by making the maximum height position on the surface of the auxiliary electrode equal to or higher than the maximum position on the surface of the second insulating layer, the shape is stabilized at the end of the auxiliary electrode layer that overlaps the second insulating layer, so that stress concentration at the end of the auxiliary electrode layer is reduced, and peeling between the auxiliary electrode layer and the second insulating layer and peeling between the external plating layer and the auxiliary electrode layer can be prevented.

In addition, this chip resistor has a structure in which the first insulating layer is not covered by the second insulating layer and has a protruding portion that overlaps the upper surface of the front electrode, and the second insulating layer is not in direct contact with the front electrode. Therefore, even if sulfur gas enters from the interface between the auxiliary electrode layer and the second insulating layer, the sulfur gas is received by the protruding portion of the first insulating layer made of a glass material before it reaches the front electrode, and the front electrode can be prevented from being corroded by the sulfur gas. Note that sulfur gas tends to enter the inside of the second insulating layer made of a resin material in a high humidity atmosphere, but even in this case, the sulfur gas that passes through the inside of the second insulating layer is received by the first insulating layer made of a glass material before it reaches the front electrode, and therefore the front electrode can be prevented from being corroded by the sulfur gas.

In the above configuration, the auxiliary electrode layer may be formed of a material that is more resistant to sulfurization than the front electrode, but it is particularly preferable that the auxiliary electrode layer be made of a resin material containing conductive particles. Here, the conductive particles contained in the resin material are preferably metal particles such as silver (Ag) or nickel (Ni) or carbon particles, and either one of these metal particles or carbon particles may be used alone, or both metal particles and carbon particles may be used in combination.

In this case, if the surface of the auxiliary electrode layer is roughened, the adhesive strength of the external plating layer to the auxiliary electrode layer can be increased. In particular, if the auxiliary electrode layer is made of a carbon-based resin that does not contain metal particles, the adhesiveness of the auxiliary electrode layer to the first insulating layer and the second insulating layer can be increased, and the adhesiveness of the external plating layer to the auxiliary electrode layer can be increased by the roughening treatment.

In the above configuration, the second insulating layer may be formed so that both ends overlap both the front electrode and the first insulating layer. However, if both ends of the second insulating layer are formed in a position where they do not overlap the front electrode, even if the sulfur gas penetrates into the second insulating layer made of a resin material, the path that the sulfur gas travels to reach the front electrode is longer, so corrosion of the front electrode can be more reliably prevented, and the step between the first insulating layer and the second insulating layer is smaller, improving printability when forming the auxiliary electrode layer.

In the above configuration, the auxiliary electrode layer may have a single layer structure, but if the auxiliary electrode layer has a two-layer structure consisting of an upper auxiliary electrode layer and a lower auxiliary electrode layer, and the upper auxiliary electrode layer is made of a conductive material with a higher electrical conductivity than the lower auxiliary electrode layer, the adhesion strength of the lower auxiliary electrode layer to the protruding portion of the front electrode and the first insulating layer can be increased, and the adhesion strength of the external plating layer to the upper auxiliary electrode layer can be increased. In this case, it is preferable that the lower auxiliary electrode layer is made of a carbon-based resin material containing carbon particles, and the upper auxiliary electrode layer is made of a metal-based resin material containing metal particles.

In this case, if the top surface of the lower auxiliary electrode layer is set at a position lower than the top surface of the second insulating layer, the end shape of the upper auxiliary electrode layer formed from the lower auxiliary electrode layer to the top surface of the second insulating layer is stabilized, so that stress concentration at the ends between the second insulating layer and the auxiliary electrode layer and between the auxiliary electrode layer and the external plating layer is reduced, and peeling between the layers can be prevented.

The present invention provides a chip resistor that prevents peeling of the outer plating layer and has excellent corrosion resistance.

1 is a cross-sectional view of a chip resistor according to a first embodiment of the present invention. 5A to 5C are plan views showing a manufacturing process of the chip resistor. 3A to 3C are cross-sectional views showing a manufacturing process of the chip resistor. FIG. 4 is a cross-sectional view of a chip resistor according to a second embodiment of the present invention. FIG. 11 is a cross-sectional view of a chip resistor according to a third embodiment of the present invention.

The following describes the embodiments of the invention with reference to the drawings. FIG. 1 is a cross-sectional view of a chip resistor according to a first embodiment, FIG. 2 is a plan view showing the manufacturing process of the chip resistor, and FIG. 3 is a cross-sectional view showing the manufacturing process of the chip resistor.

As shown in FIG. 1, the chip resistor 1 according to the first embodiment is mainly composed of a rectangular insulating substrate 2, a pair of front electrodes 3 provided at both ends of the upper surface of the insulating substrate 2 in the longitudinal direction, a pair of back electrodes 4 provided at both ends of the lower surface of the insulating substrate 2 in the longitudinal direction, a rectangular resistor 5 provided so that both ends overlap the pair of front electrodes 3, a first insulating layer 6 covering the entire resistor 5 including the connection portion between the front electrodes 3 and the resistor 5, a second insulating layer 7 laminated on the first insulating layer 6, a pair of auxiliary electrode layers 8 laminated on the front electrodes 3, a pair of end surface electrodes 9 extending on both end surfaces of the insulating substrate 2 and conducting between the corresponding auxiliary electrode layers 8 and the back electrodes 4, and a pair of external plating layers 10 provided to cover the auxiliary electrode layers 8, the end electrodes 9, and the back electrodes 4.

The insulating substrate 2 is made of ceramics or the like, and is obtained by dividing a large sheet-like substrate (described later) along the primary dividing grooves and secondary dividing grooves that run lengthwise and widthwise, resulting in a large number of insulating substrates 2.

The front electrode 3 is made by screen printing an Ag (silver)-based paste containing Pd (palladium), then drying and firing it.

The back electrode 4 is made by screen printing and then heating and curing (baking) a resin paste filled with metal particles such as silver (Ag) or nickel (Ni) or carbon particles.

The resistor 5 is made by screen printing a resistive paste such as ruthenium oxide, drying and firing it, and both ends of the resistor 5 in the longitudinal direction overlap the front electrode 3. Although not shown in the figure, the resistor 5 has a trimming groove formed therein for adjusting the resistance value.

The first insulating layer 6 is formed by screen printing a glass paste, then drying and firing it. The first insulating layer 6 is formed to cover the resistor 5 before the trimming groove is formed, and both ends of the first insulating layer 6 exposed from the resistor 5 form protrusions 6a. The protrusions 6a overlap flatly on the upper surface of the inner part of the front electrode 3 away from the end face of the insulating substrate 2.

The second insulating layer 7 is made by screen printing an epoxy resin paste and then heating and hardening it. The second insulating layer 7 is formed so as to cover the first insulating layer 6 except for the protruding portion 6a after the trimming groove is formed.

The auxiliary electrode layer 8 is made of a material more resistant to sulfuration than the front electrode 3, specifically a resin paste filled with conductive particles such as silver (Ag), nickel (Ni) or carbon, which is screen-printed and then heat-cured. The auxiliary electrode layer 8 covers the front electrode 3 and the protruding portion 6a of the first insulating layer 6, and is formed in an area extending partway up the top surface of the second insulating layer 7, with the maximum height position on the surface of the auxiliary electrode layer 8 being equal to or higher than the maximum height position on the surface of the second insulating layer 7.

The end electrode 9 is formed by sputtering nickel (Ni)/chromium (Cr) or the like, and this end electrode 9 provides electrical continuity between the auxiliary electrode layer 8 and the back electrode 4, which are spaced apart vertically, via the end face of the insulating substrate 2. The upper surface of the auxiliary electrode layer 8 near the second insulating layer 7 is not covered by the end electrode 9, and the inner portion of the back electrode 4 away from the end face of the insulating substrate 2 is also not covered by the end electrode 9.

The external plating layer 10 has a two-layer structure consisting of a barrier layer 11 and an external connection layer 12, of which the barrier layer 11 is a Ni plating layer formed by electrolytic plating, and the external connection layer 12 is a Sn plating layer formed by electrolytic plating. This external plating layer 10 covers the entire surface of the end electrode 9 and the auxiliary electrode layer 8 exposed from the end electrode 9, as well as covering the back electrode 4 exposed from the end electrode 9.

Next, a method for manufacturing the chip resistor 1 configured as described above will be described with reference to Figures 2 and 3.

First, a large substrate 2A is prepared, on which primary and secondary dividing grooves extending in a lattice pattern are formed. These primary and secondary dividing grooves divide the front and back surfaces of the large substrate 2A into numerous chip formation regions, and each of these chip formation regions becomes one insulating substrate 2. Although one chip formation region is shown representatively in Figures 2 and 3, in reality, many such chip formation regions are arranged in a lattice pattern.

As shown in Figures 2(a) and 3(a), Ag-Pd paste is screen-printed on the surface of the large-sized substrate 2A, which is then dried and fired to form a pair of surface electrodes 3 facing each other at a specified distance at both ends of the longitudinal direction of each chip formation area.

Next, as shown in Figures 2(b) and 3(b), a resistive paste containing ruthenium oxide or the like is screen-printed on the surface of the large-sized substrate 2A, which is then dried and fired to form a rectangular resistor 5 with both ends overlapping the front electrodes 3.

Next, as shown in Figures 2(c) and 3(c), a glass paste is screen-printed in the area covering the resistor 5, and then dried and baked to form a first insulating layer 6 that covers the entire resistor 5, including the connection end with the front electrode 3. Then, a laser beam is irradiated from above this first insulating layer 6 to form a trimming groove (not shown) in the resistor 5 and adjust the resistance value.

Next, as shown in Figures 2(d) and 3(d), an epoxy resin paste is screen-printed on the first insulating layer 6 and then heat-cured (baked) to form a second insulating layer 7 covering the first insulating layer 6. At this time, the protrusions 6a formed at both ends of the first insulating layer 6 are exposed from the second insulating layer 7 and overlap the top surface of the front electrode 3 in a flat manner. At the same time or before or after this, a resin paste filled with a carbon-based conductive filler is screen-printed on the back surface of the large-format substrate 2A and then heat-cured to form a pair of opposing back electrodes 4 at a predetermined distance at both longitudinal ends of each chip formation region.

Next, as shown in Figures 2(e) and 3(e), a resin paste filled with a carbon-based conductive filler is screen-printed and heat-cured to form a pair of auxiliary electrode layers 8 that cover the surface electrode 3 and the protruding portion 6a of the first insulating layer 6, and then the surface of the auxiliary electrode layer 8 is roughened using an organic solvent, blasting, or the like. These auxiliary electrode layers 8 are formed in a range that extends beyond both ends of the second insulating layer 7 and reaches partway up the top surface, so that the maximum height position on the surface of the auxiliary electrode layer 8 is equal to or greater than the maximum height position on the surface of the second insulating layer 7.

The steps up to this point have been a one-time process on the large substrate 2A, but in the next step, the large substrate 2A is primarily divided into strips along the primary division grooves to obtain strip-shaped substrates 2B whose width dimension is the longitudinal direction of the chip formation area.

Next, Ni/Cr is sputtered toward the divided surfaces of the rectangular substrate 2B to form a pair of end electrodes 9 that conduct electricity between the auxiliary electrode layer 8 and the back electrode 4, as shown in Figures 2(f) and 3(f). At this time, the end electrodes 9 are formed with a U-shaped cross section so as to cover the surfaces of the auxiliary electrode layer 8 and the back electrode 4 near the outer ends, but the upper surface of the auxiliary electrode layer 8 near the second insulating layer 7 is not covered by the end electrodes 9, and the surface of the back electrode 4 near the inner end is not covered by the end electrodes 9 either.

Next, the rectangular substrate 2B is divided into a plurality of chip-shaped substrates 2C along the secondary dividing grooves, and then these chip-shaped substrates 2C are electrolytically plated with Ni to form a barrier layer 11 that covers the end electrodes 9, as shown in Figures 2(g) and 3(g).

Then, electrolytic Sn plating is applied to the chip-shaped substrate 2C to form an external connection layer 12 that covers the barrier layer 11, as shown in Figures 2(h) and 3(h). This forms an external plating layer 10 consisting of a two-layer structure of a Ni plating layer and a Sn plating layer, completing the chip resistor 1 shown in Figure 1.

As described above, in the chip resistor 1 according to the first embodiment, the step from the upper surface of the front electrode 3 to the upper surface of the second insulating layer 7 is divided into a step from the upper surface of the front electrode 3 to the upper surface of the protruding portion 6a of the first insulating layer 6 (i.e., the thickness of the protruding portion 6a) and a step from the upper surface of the protruding portion 6a of the first insulating layer 6 to the upper surface of the second insulating layer 7 (i.e., the thickness of the second insulating layer 7). Since the height of each step is small, the auxiliary electrode layer 8 can be formed in a stable shape in the part including these steps. In addition, by making the maximum height position on the surface of the auxiliary electrode 8 equal to or higher than the maximum position on the surface of the second insulating layer 7, the printability of the auxiliary electrode layer 8 is improved, and the shape is stabilized at the end of the auxiliary electrode layer 8 overlapping the second insulating layer 7, so that stress concentration at the end of the auxiliary electrode layer 8 is reduced, and peeling between the auxiliary electrode layer 8 and the second insulating layer 7 and peeling between the external plating layer 10 and the auxiliary electrode layer 8 can be prevented.

In addition, in the chip resistor 1 according to the first embodiment, the first insulating layer 6 has a protruding portion 6a that overlaps the upper surface of the front electrode 3 without being covered by the second insulating layer 7, and the second insulating layer 7 is not in direct contact with the front electrode 3. Therefore, even if sulfur gas enters from the interface between the auxiliary electrode layer 8 and the second insulating layer 7, the sulfur gas is received by the protruding portion 6a of the first insulating layer 6 made of a glass material before it reaches the front electrode 3, and the front electrode 3 can be prevented from being corroded by the sulfur gas. Note that sulfur gas tends to enter the inside of the second insulating layer 7 made of a resin material in a high humidity atmosphere, but even in this case, the sulfur gas that has passed through the inside of the second insulating layer 7 is received by the first insulating layer 6 made of a glass material before it reaches the front electrode 3, so that the front electrode 3 can be prevented from being corroded by the sulfur gas.

In addition, in the chip resistor 1 according to the first embodiment, the auxiliary electrode layer 8 is formed of a carbon-based resin material that does not contain metal particles, and the surface of the auxiliary electrode layer 8 covered with the barrier layer 11 is roughened, so that the adhesion of the auxiliary electrode layer 8 to the front electrode 3 and the protruding portion 6a of the first insulating layer 6 can be improved, and the adhesion of the barrier layer 11 (external plating layer 10) to the auxiliary electrode layer 8 can be improved. Note that the auxiliary electrode layer 8 may be formed of a material other than a resin containing only carbon particles, such as a resin containing only metal particles such as silver (Ag) or nickel (Ni) or a resin containing both metal particles and carbon particles, as long as it is formed of a material that is more resistant to sulfurization than the front electrode 3.

Furthermore, in the chip resistor 1 according to the first embodiment, the back electrode 4 is formed from a material with high resistance to sulfurization (e.g., a resin material filled with carbon particles), which prevents sulfurization of the back electrode 4 and results in a chip resistor 1 with excellent resistance to sulfurization.

Figure 4 is a cross-sectional view of a chip resistor 20 according to the second embodiment, and parts corresponding to those in Figure 1 are given the same reference numerals.

As shown in FIG. 4, the chip resistor 20 according to the second embodiment is formed in a position where both ends of the second insulating layer 7 do not overlap the front electrode 3, and the rest of the configuration is basically the same as the chip resistor 1 according to the first embodiment.

In the chip resistor 20 according to the second embodiment configured in this manner, both ends of the second insulating layer 7 are formed in positions that do not overlap the front electrode 3. Therefore, even if sulfur gas penetrates into the second insulating layer 7 made of a resin material, the path of movement of the sulfur gas until it reaches the front electrode 3 is longer, and corrosion of the front electrode 3 can be more reliably prevented. Moreover, the step from the upper surface of the protruding portion 6a of the first insulating layer 6 to the upper surface of the second insulating layer 7 is stepped due to the portion of the first insulating layer 6 that overlaps both ends of the resistor 5 (portion marked with the symbol 6b in the figure), so the step between the first insulating layer 6 and the second insulating layer 7 is smaller, and printability can be improved when forming the auxiliary electrode layer 8.

Figure 5 is a cross-sectional view of a chip resistor 30 according to the third embodiment, and parts corresponding to those in Figure 1 are given the same reference numerals.

As shown in FIG. 5, the chip resistor 30 according to the third embodiment has an auxiliary electrode layer 8 with a two-layer structure of a lower auxiliary electrode layer 31 and an upper auxiliary electrode layer 32, and the rest of the configuration is basically the same as the chip resistor 1 according to the first embodiment.

Here, the upper surface of the lower auxiliary electrode layer 31 is set at a position lower than the upper surface of the second insulating layer 7, and the upper auxiliary electrode layer 32 is formed of a conductive material having a higher electrical conductivity than the lower auxiliary electrode layer 31. Specifically, the lower auxiliary electrode layer 31 is formed of a carbon-based resin material containing carbon particles, and the upper auxiliary electrode layer 32 is formed of a metal-based resin material containing metal particles such as Ag and Ni.

In the chip resistor 30 according to the third embodiment configured in this manner, the auxiliary electrode layer 8 has a two-layer structure consisting of a lower auxiliary electrode layer 31 and an upper auxiliary electrode layer 32, and the upper auxiliary electrode layer 32 is made of a conductive material with a higher electrical conductivity than the lower auxiliary electrode layer 31. This increases the adhesion strength of the lower auxiliary electrode layer 31 to the surface electrode 3 and the protruding portion 6a of the first insulating layer 6, and also increases the adhesion strength of the barrier layer 11 (external plating layer 10) to the upper auxiliary electrode layer 32.

In addition, in the chip resistor 30 according to the third embodiment, the upper surface of the lower auxiliary electrode layer 31 of the two-layered auxiliary electrode layer 8 is set at a lower position than the upper surface of the second insulating layer 7, so that the end shape of the upper auxiliary electrode layer 32 formed from the lower auxiliary electrode layer 31 to the upper surface of the second insulating layer 7 is stabilized. As a result, stress concentration at the ends is reduced between the second insulating layer 7 and the auxiliary electrode layer 8 and between the auxiliary electrode layer 8 and the outer plating layer 10, and peeling between the layers can be prevented.

REFERENCE SIGNS LIST 1, 20, 30 Chip resistor 2 Insulating substrate 2A Large substrate 2B Strip-shaped substrate 2C Chip-shaped substrate 3 Front electrode 4 Back electrode 5 Resistor 6 First insulating layer 6a Protruding portion 7 Second insulating layer 8 Auxiliary electrode layer 9 End electrode 10 External plating layer 11 Barrier layer 12 External connection layer 31 Lower auxiliary electrode layer 32 Upper auxiliary electrode layer

Claims (8)

a pair of front electrodes provided on both ends of a front surface of the insulating substrate, a pair of back electrodes provided on both ends of a back surface of the insulating substrate, a resistor provided so as to overlap the pair of front electrodes at both ends, a first insulating layer made of a glass material provided so as to cover the entire resistor including a connection portion between the front electrode and the resistor, a second insulating layer made of a resin material laminated on the first insulating layer, a pair of auxiliary electrode layers laminated on the front electrodes and made of a material having higher resistance to sulfuration than the front electrodes, a pair of end electrodes extending at least on both end surfaces of the insulating substrate and conducting electrical current between the auxiliary electrode layer and the back electrode, and an external plating layer covering the auxiliary electrode layer, the end electrodes, and the back electrode,
the first insulating layer has a protruding portion that is not covered by the second insulating layer and overlaps a portion of an upper surface of the front electrode,
the auxiliary electrode layer is formed so as to cover at least the front electrode and the protruding portion, and the maximum height position on the surface of the auxiliary electrode layer is set to be equal to or higher than the maximum height position on the surface of the second insulating layer.
A chip resistor characterized in that The chip resistor according to claim 1, characterized in that the auxiliary electrode layer is made of a resin material containing conductive particles. The chip resistor according to claim 2, characterized in that the conductive particles are either or both of metal particles and carbon particles. The chip resistor according to claim 2 or 3, characterized in that the surface of the auxiliary electrode layer is roughened. The chip resistor according to claim 1, characterized in that the second insulating layer is formed in a position where both ends do not overlap the front electrode. The chip resistor according to claim 1, characterized in that the auxiliary electrode layer is made of an upper auxiliary electrode layer and a lower auxiliary electrode layer, and the upper auxiliary electrode layer is made of a conductive material having a higher electrical conductivity than the lower auxiliary electrode layer. The chip resistor according to claim 6, characterized in that the lower auxiliary electrode layer is made of a carbon-based resin material containing carbon particles, and the upper auxiliary electrode layer is made of a metal-based resin material containing metal particles. The chip resistor according to claim 6 or 7, characterized in that the upper surface of the lower auxiliary electrode layer is set at a position lower than the upper surface of the second insulating layer.