JP7612558B2 - POWER CONVERSION DEVICE, CONTROL METHOD FOR POWER CONVERSION DEVICE, AND PROGRAM - Google Patents

Description

Embodiments of the present invention relate to a power conversion device, a control method for a power conversion device, and a program.

In recent years, the introduction of renewable energy sources such as solar and wind power has been expanding. There is concern that the supply of power from renewable energy sources may cause the voltage of the power grid to become unstable. For this reason, there is an increasing demand for static synchronous compensators (STATCOMs) to ensure stable operation of the power grid. STATCOMs compensate for reactive power using self-commutated converters. STATCOMs are introduced, for example, in power transmission and distribution systems installed in substations and are operated continuously. During normal operation, STATCOMs contribute to stabilizing the system voltage by controlling the reactive power at the interconnection point.

In recent years, there has been an increase in the use of modular multilevel converters (MMCs) as a circuit topology for STATCOMs. MMCs are power converters that have arms made up of multiple stages of small-capacity converters called cells, and can convert the voltage level of the output voltage to the AC side into multiple levels according to the number of cell stages. The use of MMCs in STATCOMs has the advantage of eliminating the need for AC filters, which were previously necessary.

STATCOM uses, for example, a delta-connected MMC in which both ends of an arm corresponding to each of the three phases are connected to different phases. In a delta-connected MMC, a circulating current flows in the delta connection according to the zero-phase component of the output voltage of the arm between each phase and the impedance component in the delta-connected configuration. In general, in a delta-connected MMC, the circulating current is controlled to balance the voltage (charge amount) of the capacitors that make up the cells so that they are relatively uniform. However, if a control error occurs due to the influence of delay time caused by calculations and communications for controlling the operation of the delta-connected MMC, the circulating current may become a circulating current that is not necessary for capacitor voltage control due to a disturbance component being superimposed on the zero-phase component. The circulating current with the disturbance component superimposed may increase the power loss during operation (driving) of the delta-connected MMC by flowing through the semiconductor elements that make up the cells. As a countermeasure against this, an impedance component may be added to the delta connection. However, in this case, it becomes necessary to use large components (especially passive elements) with high rated values that make up the delta-connected MMC, which increases the cost of components.

International Publication No. 2016/017517

The problem that the present invention aims to solve is to provide a power conversion device, a control method for the power conversion device, and a program that can suppress disturbance components contained in the circulating current flowing through a delta-connected modular multilevel converter.

The power conversion device of the embodiment is a power conversion device connected to a three-phase power system, and includes a power converter and a control device. The power converter includes a delta connection circuit in which three phase circuits corresponding to the respective phases of the power system are delta-connected. The control device controls the power converter. The phase circuit includes an arm in which a plurality of cells each including a plurality of self-extinguishing semiconductor switching elements and a DC capacitor are connected in series, and an impedance component is connected in series, and includes a current detector at any position of the series-connected circuit for detecting an arm current flowing in the arm. The control device detects a circulating current flowing in the delta connection circuit based on the arm current, and controls the power converter so as to suppress a predetermined disturbance component included in the detected circulating current.

1 is a diagram showing an example of the configuration of a power conversion device according to a first embodiment; FIG. 2 is a diagram showing an example of the configuration of a cell included in an MMC; FIG. 4 is a schematic waveform diagram showing an example of a waveform of a delta connection circuit in the MMC. 5 is a flowchart showing an example of a circulating current suppression control process in the control device. FIG. 2 is a diagram showing an example of a functional configuration for realizing a first zero-phase disturbance voltage compensation function in the control device. FIG. 11 is a schematic waveform diagram showing an example of a waveform of a delta connection circuit in the MMC when the control device executes a first zero-phase disturbance voltage compensation function. FIG. 4 is a diagram showing an example of a functional configuration for realizing a second zero-phase disturbance voltage compensation function in the control device. FIG. 11 is a schematic waveform diagram showing an example of a waveform of a delta connection circuit in the MMC when the control device executes a second zero-phase disturbance voltage compensation function. FIG. 13 is a diagram showing an example of a functional configuration for realizing a third zero-phase disturbance voltage compensation function in the control device. FIG. 13 is a diagram showing an example of the configuration of a power conversion device according to a second embodiment.

The power conversion device, the control method for the power conversion device, and the program of the embodiment will be described below with reference to the drawings.

(First embodiment)
[Configuration of power conversion device]
FIG. 1 is a diagram showing an example of the configuration of a power conversion device according to a first embodiment. FIG. 1 shows an example of a power conversion device 1 that is installed (connected) in parallel with a power system and stabilizes AC power of the power system by compensating (adjusting) reactive power output (supplied) to the power system. The power system is, for example, an AC power source or an AC load. The power system is, for example, a three-phase AC system having a first phase (A phase), a second phase (B phase), and a third phase (C phase). The power conversion device 1 is, for example, a static synchronous COMpensator (STATCOM). In the following description, a connection point between the power conversion device 1 and the power system is referred to as an interconnection point. Furthermore, in the following description, unless otherwise specified, no distinction is made between the three phases.

The power conversion device 1 includes, for example, a power converter 10 and a control device 50. The power converter 10 stabilizes the system voltage in the power system by supplying AC power (reactive power) to the interconnection point or consuming the reactive power of the interconnection point according to the control from the control device 50. The reactive power supplied to or consumed by the power converter 10 is positive-phase reactive power (positive-phase reactive power) or negative-phase reactive power (negative-phase reactive power). Here, the negative phase means that, for example, when the power system has three phases, A, B, and C, the phase order of the AC current in the AC power supplied to the interconnection point is shifted by 120° in the order of A, B, and C, and the positive phase is the phase order of the AC voltage, such as A, C, and B, that is different from the positive phase.

The power converter 10 includes, for example, a transformer 11 and a modular multilevel converter (hereinafter referred to as "MMC") 12. The transformer 11 may be, for example, a three-phase transformer, or may be configured with three single-phase transformers connected, one for each of the three phases. In some cases, the power converter 10 is directly connected to the power system without a transformer. The power converter 10 outputs an AC voltage from the MMC 12 in response to control from the control device 50, thereby causing an AC current to flow in response to control from the control device 50.

The MMC 12 is a delta-connected MMC. The MMC 12 includes, for example, three phase circuits 121 (phase circuits 121_a, 121_b, and 121_c) corresponding to each of the three phases. In the MMC 12, both ends of each phase circuit 121 are connected to different phases in the transformer 11, thereby forming a delta-connected circuit in which the three phase circuits 121 are delta-connected.

Each phase circuit 121 includes, for example, a current detector (CT in the figure) 122, a buffer reactor (BR in the figure) 123, and an arm 124. In the phase circuit 121, the current detector 122, the buffer reactor 123, and the arm 124 are connected in series. In FIG. 1, the letters following the "_ (underscore)" after the reference numbers of the phase circuit 121, the current detector 122, the buffer reactor 123, and the arm 124 indicate the phase to which each component corresponds. More specifically, "_a" after the reference number indicates that the component corresponds to phase A, "_b" indicates that the component corresponds to phase B, and "_c" indicates that the component corresponds to phase C.

The current detector 122 detects the current flowing in the phase circuit 121. The current detector 122 is arranged on the side of the phase circuit 121 to which the buffer reactor 123 is connected (in other words, on the interconnection point side (AC side) of the power converter 10), and detects the current (AC current) at the arranged position. The current detected by the current detector 122 is the current flowing in the arm 124. In the following description, the current detected by the current detector 122 is referred to as the "arm current Iarm." The current detector 122 outputs the detection value of the detected arm current Iarm (hereinafter simply referred to as the "arm current Iarm") to the control device 50. The current detector 122 can be connected to any position in the phase circuit 121 as long as the arm current Iarm can be detected.

The buffer reactor 123 is an impedance element having an impedance component for suppressing changes in the current flowing through the arm 124. The buffer reactor 123 is an example of an "impedance component" in the claims.

The arm 124 is configured, for example, with multiple cells 125 (cell 125-1 to cell 125-n (n is a natural number)) connected in series. That is, the arm 124 is configured with multiple stages (n stages) of cells 125. Each of the cells 125 is a small-capacity converter. The cell 125 includes multiple self-extinguishing semiconductor switching elements and a DC capacitor. The semiconductor switching elements are, for example, insulated gate bipolar transistors (IGBTs). The semiconductor switching elements operate (switching operation) in response to control (switching control) from the control device 50.

Figure 2 is a diagram showing an example of the configuration of a cell 125 included in the MMC 12. The cell 125a shown in (a) of Figure 2 has a configuration to which a half bridge is applied. The cell 125a includes, for example, two semiconductor switch units 126 (semiconductor switch unit 126-1 and semiconductor switch unit 126-2) and one DC capacitor 127. The semiconductor switch unit 126 may be, for example, a semiconductor switching element, or may be a configuration in which a semiconductor switching element and a diode are connected in parallel to each other. In the cell 125a, the semiconductor switch unit 126-1 and the semiconductor switch unit 126-2 are connected in series, and the DC capacitor 127 is connected to both ends of the series. In the cell 125a, the connection point between the semiconductor switch unit 126-1 and the semiconductor switch unit 126-2 and one end of the semiconductor switch unit 126-2 are each an output terminal. In other words, in the cell 125a, the midpoint and one end of the series circuit to which the two semiconductor switch units 126 are connected are each an output terminal. With this configuration, cell 125a outputs an output voltage with two voltage levels, either positive or negative, from the output terminal.

The cell 125b shown in FIG. 2B has a full-bridge configuration. The cell 125b includes, for example, four semiconductor switch units 126 (semiconductor switch units 126-1 to 126-4) and one DC capacitor 127. In the cell 125b, a series circuit in which the semiconductor switch units 126-1 and 126-2 are connected in series and a series circuit in which the semiconductor switch units 126-3 and 126-4 are connected in series are connected in parallel, and the DC capacitor 127 is connected to both ends of each series circuit. In the cell 125b, the midpoint of the series circuit in which the semiconductor switch units 126-1 and 126-2 are connected, and the midpoint of the series circuit in which the semiconductor switch units 126-3 and 126-4 are connected are each an output terminal. With this configuration, cell 125b outputs an output voltage with three voltage levels from the output terminal with both positive and negative polarities.

Cell 125a is an example of a "half-bridge circuit" in the claims. Cell 125b is an example of a "full-bridge circuit" in the claims. Semiconductor switch unit 126-1 is an example of a "semiconductor switching element" and a "first semiconductor switching element" in the claims, and semiconductor switch unit 126-2 is an example of a "semiconductor switching element" and a "second semiconductor switching element" in the claims. Semiconductor switch unit 126-3 is an example of a "semiconductor switching element" and a "third semiconductor switching element" in the claims, and semiconductor switch unit 126-4 is an example of a "semiconductor switching element" and a "fourth semiconductor switching element" in the claims. The series circuit of semiconductor switch unit 126-1 and semiconductor switch unit 126-2 is an example of a "first series circuit" in the claims, and the series circuit of semiconductor switch unit 126-3 and semiconductor switch unit 126-4 is an example of a "second series circuit" in the claims.

Returning to FIG. 1, the control device 50 controls the operation of the power converter 10 to cause the power converter 10 to output (supply) reactive power to the interconnection point with the power grid. That is, the control device 50 controls the switching of each semiconductor switch unit 126 provided in the cell 125 in each arm 124 of the MMC 12. The control device 50 controls the operation of the power converter 10 by, for example, a hardware processor such as a CPU (Central Processing Unit) executing a program (software). The control device 50 may be realized by hardware (including circuitry) such as an LSI (Large Scale Integration), an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or a GPU (Graphics Processing Unit), or may be realized by cooperation between software and hardware. The control device 50 may be realized by a dedicated LSI. The program may be stored in advance in a storage device (storage device with a non-transient storage medium) such as a hard disk drive (HDD) or flash memory provided in the control device 50 or the power conversion device 1, or may be stored in a removable storage medium (non-transient storage medium) such as a DVD or CD-ROM, and installed in the HDD or flash memory provided in the control device 50 or the power conversion device 1 by mounting the storage medium in a drive device provided in the control device 50 or the power conversion device 1.

The control device 50 generates a control signal (gate signal Gate) for controlling the switching of the semiconductor switch unit 126 provided in the cell 125 in each delta-connected arm 124 in the MMC 12 in the power converter 10, and outputs it to each cell 125. More specifically, the control device 50 generates a gate signal Gate_a for controlling the switching of the semiconductor switch unit 126 provided in the cell 125 in the A-phase arm 124_a, a gate signal Gate_b for controlling the switching of the semiconductor switch unit 126 provided in the cell 125 in the B-phase arm 124_b, and a gate signal Gate_c for controlling the switching of the semiconductor switch unit 126 provided in the cell 125 in the C-phase arm 124_c, and outputs them to the corresponding cells 125. As a result, in the power conversion device 1, the power converter 10 outputs an AC voltage from the MMC 12 to the interconnection point side (AC side) in response to control from the control device 50, so that reactive power in response to control from the control device 50 can be output (supplied) to the interconnection point.

By the way, in the MMC 12, a circulating current (hereinafter referred to as "circulating current Iz") flows in the delta connection circuit according to the zero-sequence component of the output voltage of the arm 124 of each phase (hereinafter referred to as "arm zero-sequence voltage Vz") and the impedance component of the buffer reactor 123, due to the switching control of the semiconductor switch unit 126 by the control device 50. This circulating current Iz is a current that flows (circulates) sequentially through all the cells 125 that make up the delta connection circuit in the MMC 12. More specifically, the circulating current Iz flows, for example, from the A-phase side of the transformer 11 through the buffer reactor 123_a and each cell 125 in the arm 124_a of the phase circuit 121_a to the C-phase side of the transformer 11, then through the buffer reactor 123_c and each cell 125 in the arm 124_c of the phase circuit 121_c to the B-phase side of the transformer 11, and further through the buffer reactor 123_b and each cell 125 in the arm 124_b of the phase circuit 121_b to the A-phase side of the transformer 11 (return). This circulating current Iz balances the voltages (charge amounts) of the DC capacitors 127 of the cells 125 in the MMC 12 so that they are relatively uniform.

When the control device 50 controls the operation of the power converter 10 in this way, it is possible that an error occurs in the control. Various factors can be considered as causes of an error in the control of the power converter 10 by the control device 50 (hereinafter referred to as "control error"), such as delay times in calculations and communications in the control device 50, and delay times from when the control device 50 performs control until the power converter 10 actually operates. For example, the influence of delay times between when the control device 50 outputs the gate signal Gate and when the corresponding semiconductor switch unit 126 operates according to the input gate signal Gate, etc., can be considered as causes of control errors. If a control error occurs in the control of the power converter 10 in the control device 50, it is possible that an unintended circulating current Iz flows through the delta connection circuit in the MMC 12, causing a power loss in the operation (driving) of the MMC 12. This is because a control error occurs in the control of the power converter 10 by the control device 50, and a voltage component that is not necessary for controlling the voltage of the DC capacitor 127 of each cell 125 is superimposed on the arm zero-sequence voltage Vz as a disturbance component (hereinafter referred to as the "zero-sequence disturbance voltage Vz_dis").

Here, an example of the relationship between the arm zero-phase voltage Vz in the delta connection circuit and the circulating current Iz and the arm current Iarm of each phase will be described. FIG. 3 is a schematic waveform diagram showing an example of the waveform of the delta connection circuit in the MMC 12. FIG. 3 shows an example of the waveform of the arm zero-phase voltage Vz, the circulating current Iz, and the arm current Iarm of each phase (A phase, B phase, C phase) in the delta connection circuit when a control error occurs in the control of the power converter 10 by the control device 50 and the countermeasures described later are not taken (the zero-phase disturbance voltage compensation function described later is not executed). In FIG. 3, an example of the waveform of the arm zero-phase voltage Vz is shown in the upper part, and an example of the waveforms of the circulating current Iz, the arm current Iarm of the A phase (A phase arm current Iarm_a), the arm current Iarm of the B phase (B phase arm current Iarm_b), and the arm current Iarm of the C phase (C phase arm current Iarm_c) are shown in correspondence with the waveform of the arm zero-phase voltage Vz shown in the upper part. In Figure 3, the horizontal axis is time t.

In an example of a case where a control error occurs in the control of the power converter 10 shown in FIG. 3, as shown in the upper part of FIG. 3, a voltage component pulsating at three times the frequency fs of the power system is superimposed on the arm zero-phase voltage Vz due to the control error. This pulsating voltage component is the zero-phase disturbance voltage Vz_dis. Due to this zero-phase disturbance voltage Vz_dis, as shown in the lower part of FIG. 3, the circulating current Iz also pulsates at three times the frequency fs of the power system. As a result, each of the A-phase arm current Iarm_a, the B-phase arm current Iarm_b, and the C-phase arm current Iarm_c is a sinusoidal AC waveform with a frequency fs that is not pulsating, but distortion occurs due to the pulsation of the circulating current Iz, and the difference between the maximum current value and the minimum current value of the AC waveform may be increased. In other words, the peak value of the arm current Iarm of each phase may increase. For this reason, the buffer reactor 123 that constitutes the MMC 12, the semiconductor switch unit 126 and the DC capacitor 127 (particularly the passive elements) that the cell 125 has must have high rated values so that they do not break down or become unstable even if the peak value of the arm current Iarm increases. This can also be a factor in increasing the cost of the MMC 12.

For this reason, the control device 50 detects the circulating current Iz in the MMC 12 by calculating it based on the arm current Iarm of each phase detected by each current detector 122 provided in the MMC 12. The control device 50 calculates the circulating current Iz from the A-phase arm current Iarm_a detected by the current detector 122_a, the B-phase arm current Iarm_b detected by the current detector 122_b, and the C-phase arm current Iarm_c detected by the current detector 122_c, using the following formula (1).

Iz=(Iarm_a+Iarm_b+Iarm_c)/3...(1)

Based on the calculated (detected) circulating current Iz, the control device 50 generates a gate signal Gate for controlling each semiconductor switch unit 126 so as to suppress the zero-phase disturbance voltage Vz_dis contained in the arm zero-phase voltage Vz. In other words, based on the calculated circulating current Iz, the control device 50 controls each semiconductor switch unit 126 so that a circulating current Iz with less pulsation due to the zero-phase disturbance voltage Vz_dis flows through the delta connection circuit. For example, if there is a delay time between when the control device 50 outputs the gate signal Gate and when each semiconductor switch unit 126 operates according to the input gate signal Gate, the control device 50 outputs the gate signal Gate at a timing that takes the delay time into consideration (for example, at an earlier timing). To achieve this, future control information is required, but in reality, it is difficult to completely predict the future, so control is performed to reduce the effect of the delay time equivalently. As a result, the control device 50 suppresses the circulating current Iz that flows due to the zero-phase disturbance voltage Vz_dis. In the following description, the control performed by the control device 50 to suppress the circulating current Iz that flows due to the zero-phase disturbance voltage Vz_dis is referred to as "circulating current suppression control."

In the circulating current suppression control, the control device 50 calculates a control voltage value (hereinafter referred to as "circulating current control output Vz_ref") for suppressing the circulating current Iz flowing due to the zero-phase disturbance voltage Vz_dis based on the calculated current value of the circulating current Iz (hereinafter referred to as "circulating current detection value Iz_det") and a current command value (hereinafter referred to as "circulating current command value Iz_ref") for causing the circulating current Iz to flow through the MMC 12. The circulating current control output Vz_ref is used for controlling the circulating current Iz to adjust the circulating current Iz and balance the voltage (charge amount) of the DC capacitor 127 provided in each cell 125 so that it is relatively uniform. In the following description, the function of the control device 50 to calculate the circulating current control output Vz_ref based on the circulating current detection value Iz_det and the circulating current command value Iz_ref is referred to as the "zero-phase disturbance voltage compensation function". The control device 50 generates a control signal (gate signal Gate) that causes the circulating current Iz based on the circulating current control output Vz_ref calculated by the zero-phase disturbance voltage compensation function to flow through the delta connection circuit in the MMC 12, and outputs the signal to the corresponding cell 125 (corresponding semiconductor switch unit 126). This prevents the circulating current Iz (a component unnecessary for the control to balance the voltage (charge amount) of the DC capacitor 127 to be relatively uniform) due to the zero-phase disturbance voltage Vz_dis from flowing through the delta connection circuit in the power conversion device 1. The circulating current control output Vz_ref is an example of the "control output amount of the circulating current" in the claims.

[Circulating current suppression control process]
FIG. 4 is a flowchart showing an example of the process of the circulating current suppression control in the control device 50. FIG. 4 shows an example of the flow of the process executed by the control device 50 when outputting the gate signal Gate in the circulating current suppression control. The process of this flowchart may be repeatedly executed while the power conversion device 1 is operating. In the following description, it is assumed that a circulating current command value Iz_ref for causing the circulating current Iz to flow through the MMC 12 in the power converter 10 is determined in advance and input (set) to the control device 50, or calculated by a control for balancing the voltage (charge amount) of the DC capacitor 127 of the control device 50 so as to be relatively uniform. Furthermore, in the following description, it is assumed that the arm current Iarm is output from each current detector 122, that is, the detection of the arm current Iarm in each current detector 122 is completed.

When the control device 50 starts circulating current suppression control, it first acquires the arm current Iarm output by each current detector 122 (step S1). Based on the acquired arm current Iarm, the control device 50 calculates (detects) the circulating current detection value Iz_det using the above formula (1) (step S2). Based on the calculated circulating current detection value Iz_det and the circulating current command value Iz_ref, the control device 50 calculates the circulating current control output Vz_ref (step S3). Based on the calculated circulating current control output Vz_ref, the control device 50 generates a gate signal Gate for switching control of each semiconductor switch unit 126, and outputs the generated gate signal Gate to each semiconductor switch unit 126 (step S4).

In this way, the control device 50 calculates the circulating current control output Vz_ref based on the calculated circulating current detection value Iz_det and the set circulating current command value Iz_ref, generates a gate signal Gate to be output to the power converter 10, and controls the operation of the power converter 10, thereby causing the power converter 10 to balance the voltage (charge amount) of the DC capacitor 127 so that it is relatively uniform, and outputs (supplies) the compensated reactive power to the power grid.

[First zero-phase disturbance voltage compensation function]
Here, an example of a configuration for realizing the zero-phase disturbance voltage compensation function in the control device 50 will be described. Fig. 5 is a diagram showing an example of a functional configuration for realizing the first zero-phase disturbance voltage compensation function in the control device 50. In the first zero-phase disturbance voltage compensation function in the control device 50, specific order component suppression control is performed to suppress (approach zero) a component of the zero-phase disturbance voltage Vz_dis of a specific order, and calculate the circulating current control output Vz_ref. The control device 50 includes an adder 500, a compensator (Gz in the figure) 510, an adder 520, an adder 530, and a specific order component suppression control unit 540 as a configuration for realizing the first zero-phase disturbance voltage compensation function.

The adder 500 subtracts the circulating current detection value Iz_det from the circulating current command value Iz_ref. In other words, the adder 500 takes the deviation between the circulating current command value Iz_ref and the circulating current detection value Iz_det. The adder 500 outputs the circulating current difference value ΔIz resulting from the subtraction. The adder 500 may be configured, for example, as a subtractor.

The compensator 510 performs feedback control on the circulating current difference value ΔIz output by the adder 500. The feedback control in the compensator 510 may be, for example, P (Proportional) control, I (Integral) control, or D (Differential) control, or a combination of these controls (e.g., PID control).

The adder 520 adds a predetermined feedforward voltage value Vff to the result of the feedback control by the compensator 510. In other words, the adder 520 performs feedforward control based on the feedforward voltage value Vff on the result of the feedback control by the compensator 510. In other words, in the first zero-phase disturbance voltage compensation function, a two-degree-of-freedom control system is configured that combines the feedback control by the compensator 510 and the feedforward control by the adder 520. The adder 520 outputs the result of the feedforward control as a two-degree-of-freedom control output Vz' for controlling the arm zero-phase voltage Vz with two degrees of freedom.

The above configuration, that is, the configuration of the adder 500, compensator 510, and adder 520 for outputting the two-degree-of-freedom control output Vz', is the same as the configuration when the zero-phase disturbance voltage compensation function is not executed, that is, the zero-phase disturbance voltage Vz_dis contained in the arm zero-phase voltage Vz is not suppressed. In other words, it is a configuration for performing circulating current control that does not include control to suppress the circulating current Iz flowing due to the zero-phase disturbance voltage Vz_dis, which is also performed in general control devices equipped to control the MMC in conventional STATCOMs. In contrast, the adder 530 and the specific order component suppression control unit 540 are provided as components for realizing the first zero-phase disturbance voltage compensation function.

The specific-order component suppression control unit 540 calculates a compensation voltage Vcmp1 based on the circulating current detection value Iz_det. The compensation voltage Vcmp1 represents the disturbance component contained in the arm zero-sequence voltage Vz based on the two-degree-of-freedom control output Vz' described below. The specific-order component suppression control unit 540 includes an n-th harmonic component amplitude/phase extraction unit 541, a proportional-integral (PI in the figure) controller 542, and a sine wave (sin in the figure) generation unit 543.

The n-th harmonic component amplitude/phase extraction unit 541 extracts the amplitude Izn and phase Φn of the n-th harmonic component contained in the circulating current detection value Iz_det. For example, as shown in FIG. 3, when a voltage component pulsating at three times the power system frequency fs is superimposed on the arm zero-phase voltage Vz, the third harmonic component of the circulating current Iz becomes the target to be suppressed, so n=3. The method of extracting the amplitude Izn in the n-th harmonic component amplitude/phase extraction unit 541 may be, for example, a method of using the result of multiplying the result of the effective value calculation of the circulating current n-th bandpass filter value Iz_bpfn by √2 after processing the circulating current detection value Iz_det with a bandpass filter that passes the n-th harmonic component to obtain the circulating current n-th bandpass filter value Iz_bpfn. The method of extracting the amplitude Izn in the nth harmonic component amplitude/phase extraction unit 541 may be, for example, a method using the result obtained by dq transforming the circulating current detection value Iz_det in an nth-order rotating coordinate system. The method of extracting the phase Φn in the nth harmonic component amplitude/phase extraction unit 541 may be, for example, a method of applying a single-phase PLL (Phase Locked Loop) method using a Hilbert transform or the like to the circulating current detection value Iz_det (or the circulating current nth-order bandpass filter value Iz_bpfn). The method of extracting the phase Φn in the nth harmonic component amplitude/phase extraction unit 541 may be, for example, a method of generating a pseudo three-phase signal from the circulating current detection value Iz_det (or the circulating current nth-order bandpass filter value Iz_bpfn), which is a single-phase signal, using delay processing, and applying the three-phase PLL method to this three-phase signal.

The proportional integral controller 542 performs proportional integral processing on the amplitude Izn of the nth harmonic component extracted by the nth harmonic component amplitude/phase extraction unit 541 using the transfer function Fs expressed by the following equation (2) to calculate the nth harmonic component voltage Vzn.

Fs=Kp+Ki/s...(2)

In the above equation (2), Kp represents the proportional gain, Ki represents the integral gain, and s represents a complex variable in Laplace space.

The sine wave generating unit 543 calculates the compensation voltage Vcmp1 expressed by the following formula (3) by multiplying the nth-order harmonic component voltage Vzn calculated by the proportional-integral controller 542 by a sine wave sinΦn whose phase is the phase Φn of the nth-order harmonic component extracted by the nth-order harmonic component amplitude/phase extracting unit 541.

Vcmp1=Vzn×sinΦn...(3)

The sine wave generating unit 543 outputs the calculated compensation voltage Vcmp1 as the calculation result of the specific order component suppression control unit 540.

The adder 530 subtracts the compensation voltage Vcmp1 output by the specific order component suppression control unit 540 from the two degree of freedom control output Vz' output by the adder 520. The adder 530 may be configured, for example, as a subtractor. The adder 530 outputs the subtraction result as the circulating current control output Vz_ref.

With such a functional configuration and processing, the control device 50 performs feedback control in the first zero-phase disturbance voltage compensation function to bring the current component of the circulating current Iz of the order to be suppressed (here, the third harmonic component) closer to zero to calculate the circulating current control output Vz_ref, and outputs a gate signal Gate to the corresponding semiconductor switch unit 126 based on the calculated circulating current control output Vz_ref to control the operation of the power converter 10. As a result, in the power conversion device 1, the circulating current Iz due to the zero-phase disturbance voltage Vz_dis is prevented from flowing through the delta connection circuit. More specifically, for example, when the compensation voltage Vcmp1 matches the zero-phase disturbance voltage Vz_dis to be compensated for, the influence of the zero-phase disturbance voltage Vz_dis is cancelled out from the circulating current control output Vz_ref.

Here, an example of the relationship between the arm zero-sequence voltage Vz in the delta connection circuit and the circulating current Iz and the arm current Iarm of each phase when the control device 50 controls the power converter 10 by the first zero-sequence disturbance voltage compensation function will be described. FIG. 6 is a schematic waveform diagram showing an example of the waveform of the delta connection circuit in the MMC 12 when the control device 50 executes the first zero-sequence disturbance voltage compensation function. In FIG. 6, as in FIG. 3, an example of the waveform of the arm zero-sequence voltage Vz is shown in the upper part, and examples of the waveforms of the circulating current Iz and the A-phase arm current Iarm_a, B-phase arm current Iarm_b, and C-phase arm current Iarm_c are shown in the lower part in correspondence with the waveform of the arm zero-sequence voltage Vz shown in the upper part. In FIG. 6, the horizontal axis is also time t.

As shown in the upper part of FIG. 6, when the control device 50 executes the first zero-phase disturbance voltage compensation function in the case where a control error occurs in the control of the power converter 10, it can be seen that the voltage component (zero-phase disturbance voltage Vz_dis) pulsating at three times the frequency fs of the power system superimposed on the arm zero-phase voltage Vz due to the control error is suppressed compared to the case where the zero-phase disturbance voltage compensation function shown in FIG. 3 is not executed. As a result, as shown in the lower part of FIG. 6, the pulsation of the circulating current Iz at three times the frequency fs of the power system due to the zero-phase disturbance voltage Vz_dis is suppressed. As a result, the increase in the peak value of each of the A-phase arm current Iarm_a, B-phase arm current Iarm_b, and C-phase arm current Iarm_c is suppressed. In other words, the AC waveforms of each of the A-phase arm current Iarm_a, B-phase arm current Iarm_b, and C-phase arm current Iarm_c become waveforms close to the original sine waves. As a result, the power conversion device 1 can suppress power loss during the operation (driving) of the MMC 12. Therefore, the power conversion device 1 does not need to use components with high rated values for the buffer reactor 123 that constitutes the MMC 12, or the semiconductor switch unit 126 and DC capacitor 127 that the cell 125 has, and this can suppress increases in the cost of the MMC 12.

In the above-mentioned first zero-phase disturbance voltage compensation function, the n-th harmonic component amplitude/phase extraction unit 541 has been described as a case in which the third harmonic component of the circulating current Iz is suppressed, but the n-th harmonic component amplitude/phase extraction unit 541 may be configured to suppress the fifth harmonic component or higher frequency components. In other words, the n-th harmonic component amplitude/phase extraction unit 541 may extract the amplitude Izn and phase Φn of the frequency component of n=5 or n>5 in addition to or instead of n=3. In this case, the processing of the n-th harmonic component amplitude/phase extraction unit 541, that is, the method of extracting the amplitude Izn and phase Φn, may be equivalent to the processing of the n-th harmonic component amplitude/phase extraction unit 541 described above. Furthermore, the processing of the proportional integral controller 542, sine wave generator 543, and adder 530 provided in the specific order component suppression control unit 540 can be made equivalent according to the order targeted for suppression by the nth order harmonic component amplitude/phase extraction unit 541.

[Second zero-phase disturbance voltage compensation function]
7 is a diagram showing an example of a functional configuration for realizing the second zero-phase disturbance voltage compensation function in the control device 50. In the second zero-phase disturbance voltage compensation function in the control device 50, an estimation process using a disturbance observer is performed to estimate an error amount contained in the circulating current control output Vz_ref, and the circulating current control output Vz_ref obtained by subtracting the estimated error amount is calculated. The control device 50 in this case (hereinafter referred to as "control device 50a") includes an adder 500, a compensator (Gz in the figure) 510, an adder 520, an adder 530, and a disturbance observer unit 550 as a configuration for realizing the second zero-phase disturbance voltage compensation function. The adder 500, the compensator 510, the adder 520, and the adder 530 included in the control device 50a are the same as the respective components included in the control device 50 that realizes the first zero-phase disturbance voltage compensation function. That is, in the control device 50a as well, a two-degree-of-freedom control system is configured that combines feedback control by the compensator 510 and feedforward control by the adder 520 to output a two-degree-of-freedom control output Vz'. Then, in the control device 50a as well, the adder 530 calculates a circulating current control output Vz_ref by subtracting a compensation voltage (called "compensation voltage Vcmp2" because it is output by the disturbance observer unit 550 in the second zero-phase disturbance voltage compensation function) from the two-degree-of-freedom control output Vz'. Like the compensation voltage Vcmp1, the compensation voltage Vcmp2 also represents a disturbance component included in the arm zero-phase voltage Vz based on the two-degree-of-freedom control output Vz'.

The disturbance observer unit 550 calculates the amount of error contained in the arm zero-phase voltage Vz as a compensation voltage Vcmp2 based on the circulating current detection value Iz_det and the circulating current control output Vz_ref. The disturbance observer unit 550 includes a compensator (Gdob in the figure) 551, an adder 552, and a low-pass filter (LPF in the figure) 553.

The compensator 551 compensates (estimates) the circulating current detection value Iz_det with a transfer function of 1/Gp. Here, Gp indicates the transfer characteristic from the arm zero-phase voltage Vz to the circulating current Iz.

The adder 552 subtracts the circulating current control output Vz_ref, which is the subtraction result of the adder 530, from the compensation result of the compensator 551. In other words, the adder 552 calculates the amount of error contained in the arm zero-phase voltage Vz by taking the deviation between the compensation result of the compensator 551 and the previous circulating current control output Vz_ref. The adder 552 may be configured, for example, as a subtractor.

The low-pass filter 553 performs a filtering process on the result of subtraction by the adder 552 to suppress voltage values at frequencies higher than a predetermined frequency (cut-off frequency). The cut-off frequency in the low-pass filter 553 is set to a value higher than the zero-phase disturbance voltage Vz_dis. The filter characteristics of the low-pass filter 553 may be a first-order system, a second-order system, or a higher order system. The low-pass filter 553 outputs the result of the filtering process as the compensation voltage Vcmp2 calculated by the disturbance observer unit 550.

The adder 530 subtracts the compensation voltage Vcmp2 output by the disturbance observer unit 550 from the two-degree-of-freedom control output Vz' output by the adder 520, and outputs the result as the circulating current control output Vz_ref.

With this functional configuration and processing, the control device 50a calculates the circulating current control output Vz_ref minus the error amount estimated by the estimation process by the disturbance observer unit 550 in the second zero-phase disturbance voltage compensation function, and outputs a gate signal Gate generated based on the calculated circulating current control output Vz_ref to the corresponding semiconductor switch unit 126 to control the operation of the power converter 10. As a result, in the power conversion device 1, the circulating current Iz due to the zero-phase disturbance voltage Vz_dis is suppressed from flowing through the delta connection circuit, similar to when the control device 50 executes the first zero-phase disturbance voltage compensation function.

Here, an example of the relationship between the arm zero-sequence voltage Vz in the delta connection circuit and the circulating current Iz and the arm current Iarm of each phase when the control device 50a controls the power converter 10 by the second zero-sequence disturbance voltage compensation function will be described. FIG. 8 is a schematic waveform diagram showing an example of the waveform of the delta connection circuit in the MMC 12 when the control device 50a executes the second zero-sequence disturbance voltage compensation function. In FIG. 8, as in FIG. 3 and FIG. 6, an example of the waveform of the arm zero-sequence voltage Vz is shown in the upper part, and examples of the waveforms of the circulating current Iz, the A-phase arm current Iarm_a, the B-phase arm current Iarm_b, and the C-phase arm current Iarm_c are shown in the lower part in correspondence with the waveform of the arm zero-sequence voltage Vz shown in the upper part. In FIG. 8, the horizontal axis is also time t.

As shown in the upper part of FIG. 8, even when the control device 50a executes the second zero-phase disturbance voltage compensation function when a control error occurs in the control of the power converter 10, the voltage component (zero-phase disturbance voltage Vz_dis) pulsating at three times the frequency fs of the power system superimposed on the arm zero-phase voltage Vz due to the control error is suppressed compared to when the zero-phase disturbance voltage compensation function shown in FIG. 3 is not executed, as in the case where the control device 50 executes the first zero-phase disturbance voltage compensation function (see FIG. 6). As a result, as shown in the lower part of FIG. 8, even when the control device 50a executes the second zero-phase disturbance voltage compensation function, the pulsation of the circulating current Iz at three times the frequency fs of the power system due to the zero-phase disturbance voltage Vz_dis is suppressed, as in the case where the control device 50 executes the first zero-phase disturbance voltage compensation function (see FIG. 6). As a result, even when the control device 50a executes the second zero-phase disturbance voltage compensation function, as in the case where the control device 50 executes the first zero-phase disturbance voltage compensation function (see FIG. 6), the A-phase arm current Iarm_a, the B-phase arm current Iarm_b, and the C-phase arm current Iarm_c each have their peak values suppressed from increasing, and their AC waveforms become waveforms close to their original sine waves. As a result, in the power conversion device 1, the second zero-phase disturbance voltage compensation function can suppress power loss during the operation (driving) of the MMC 12, as in the first zero-phase disturbance voltage compensation function, and there is no need to use components of the MMC 12 with high rated values, which can suppress an increase in the cost of the MMC 12.

In the above-mentioned second zero-phase disturbance voltage compensation function, the configuration in which the compensation voltage Vcmp2 is calculated by the disturbance observer unit 550 is shown, but the control device 50 may combine the first zero-phase disturbance voltage compensation function and the second zero-phase disturbance voltage compensation function to execute the zero-phase disturbance voltage compensation function. In other words, the control device 50 may be provided with a specific order component suppression control unit 540 and a disturbance observer unit 550 as a configuration for realizing the zero-phase disturbance voltage compensation function. In addition, in each of the zero-phase disturbance voltage compensation functions executed by the two, common components (i.e., the adder 500, the compensator 510, the adder 520, and the adder 530) may be shared. In this case, the adder 530 subtracts the compensation voltage Vcmp1 output by the specific order component suppression control unit 540 and the compensation voltage Vcmp2 output by the disturbance observer unit 550 from the two degree of freedom control output Vz' output by the adder 520, and outputs the result as the circulating current control output Vz_ref.

[Third zero-phase disturbance voltage compensation function]
9 is a diagram showing an example of a functional configuration for realizing the third zero-phase disturbance voltage compensation function in the control device 50. In the third zero-phase disturbance voltage compensation function in the control device 50, a repetitive control is performed to calculate a circulating current control output Vz_ref for bringing the circulating current detection value Iz_det, that is, the difference between the circulating current Iz and the circulating current command value Iz_ref, closer to zero. The control device 50 in this case (hereinafter referred to as "control device 50b") includes an adder 500, a repetitive control unit 560, an adder 570, a compensator (Gz in the figure) 510, and an adder 520 as a configuration for realizing the third zero-phase disturbance voltage compensation function. The adder 500, the compensator 510, the adder 520, and the adder 530 included in the control device 50b are similar to the respective components included in the control device 50 that realizes the first zero-phase disturbance voltage compensation function and the control device 50a that realizes the second zero-phase disturbance voltage compensation function.

The adder 500 outputs the circulating current difference value ΔIz obtained by subtracting the circulating current detection value Iz_det from the circulating current command value Iz_ref.

The repetitive control unit 560 calculates a compensation current Icmp by performing a delay operation on the circulating current difference value ΔIz output by the adder 500. The compensation current Icmp represents the disturbance component contained in the circulating current difference value ΔIz. The repetitive control unit 560 includes an adder 561, a delay unit (Delay in the figure) 562, a low-pass filter (LPF in the figure) 563, and a compensator (Grp in the figure) 564.

The adder 561 adds the circulating current difference value ΔIz output by the adder 500 to the filter output value ΔIz' output by the low-pass filter 563.

The delay unit 562 performs a delay calculation on the sum of the adder 561 (equation (4) below) using a delay transfer function Fd expressed by equation (5) below.

ΔIz+ΔIz'...(4)

Fd=exp(-s×Ts)...(5)

In the above formula (5), Ts is set by selecting the fundamental wave period of the circulating current command value Iz_ref. Therefore, the repetitive control is based on the repetitive waveform information of the fundamental wave period.

The low-pass filter 563 performs filtering on the delay calculation result of the delay unit 562 at a predetermined frequency (cut-off frequency). The cut-off frequency in the low-pass filter 563 is set to a value sufficiently larger than the frequency at which the tracking effect by the repetitive control is expected. For example, 1 kHz is set as the cut-off frequency in the low-pass filter 563. The low-pass filter 563 outputs the result of the filtering as a filter output value ΔIz'. As described above, the filter output value ΔIz' output by the low-pass filter 563 is added to the circulating current difference value ΔIz in the adder 561.

The compensator 564 compensates the filter output value ΔIz' output by the low-pass filter 563 with a transfer function of 1/Gp. The transfer function in the adder 561 is the same as the transfer function in the compensator 551 in the disturbance observer unit 550 provided in the control device 50a. Therefore, Gp indicates the transfer characteristic from the arm zero-phase voltage Vz to the circulating current Iz. The compensator 564 outputs the result of the compensation for the filter output value ΔIz' as the compensation current Icmp calculated by the repetitive control unit 560.

The adder 570 subtracts the compensation current Icmp output by the repetitive control unit 560 from the circulating current difference value ΔIz output by the adder 500. The adder 570 outputs the subtraction result (equation (6) below).

ΔIz-Icmp...(6)

In the third zero-phase disturbance voltage compensation function, the control device 50b treats the subtraction result of the above formula (6) output by the adder 570 as the same subtraction result as that calculated in a general control device equipped to control the MMC in a conventional STATCOM. More specifically, the control device 50b treats the subtraction result of the above formula (6) as the subtraction result of the adder 500 that is also equipped in the conventional control device. Therefore, the compensator 510 performs feedback control using the subtraction result of the above formula (6) output by the adder 570 as the circulating current difference value ΔIz output by the adder 500. Furthermore, the adder 520 performs feedforward control by adding a predetermined feedforward voltage value Vff to the result of the feedback control by the compensator 510. The adder 520 outputs the two-degree-of-freedom control output Vz', which is the result of the feedforward control, as the circulating current control output Vz_ref.

With such a functional configuration and processing, the control device 50b performs repetitive control by the repetitive control unit 560 in the third zero-phase disturbance voltage compensation function to obtain the subtraction result of the above formula (6), calculates the circulating current control output Vz_ref controlled with two degrees of freedom by combining the compensator 510 and the adder 520, and outputs a gate signal Gate generated based on the calculated circulating current control output Vz_ref to the corresponding semiconductor switch unit 126 to control the operation of the power converter 10. As a result, in the power conversion device 1, the circulating current Iz due to the zero-phase disturbance voltage Vz_dis is suppressed from flowing through the delta connection circuit, similar to when the control device 50 executes the first zero-phase disturbance voltage compensation function or when the control device 50a executes the second zero-phase disturbance voltage compensation function.

When the control device 50b controls the power converter 10 using the third zero-phase disturbance voltage compensation function, the relationship between the arm zero-phase voltage Vz in the delta-connected circuit and the circulating current Iz and the arm current Iarm of each phase is similar to that of the first zero-phase disturbance voltage compensation function (see FIG. 6) and the second zero-phase disturbance voltage compensation function (see FIG. 8), so a detailed description is omitted.

As described above, in the power conversion device 1 of the first embodiment, the control device 50 calculates the circulating current Iz flowing in the delta connection circuit of the MMC 12 based on the arm current Iarm of the phase circuit 121 corresponding to each phase of the MMC 12 in the power converter 10. Then, in the power conversion device 1 of the first embodiment, the control device 50 controls each semiconductor switch unit 126 so as to suppress the zero-phase disturbance voltage Vz_dis contained in the arm zero-phase voltage Vz based on the calculated circulating current Iz. As a result, in the power conversion device 1 of the first embodiment, the circulating current Iz due to the zero-phase disturbance voltage Vz_dis, which is unnecessary for balancing the voltage (charge amount) of the DC capacitor 127 in each cell 125 of the MMC 12, is suppressed from flowing in the delta connection circuit, and the reactive power output (supplied) by the power converter 10 to the interconnection point with the power system is compensated. As a result, in the power conversion device 1 of the first embodiment, the power loss during the operation (operation) of the MMC 12 can be suppressed. As a result, in the power conversion device 1 of the first embodiment, it is no longer necessary to use components with high rated values that will not break down or become unstable as the buffer reactor 123 constituting the MMC 12, or the semiconductor switch section 126 and DC capacitor 127 (particularly passive elements) equipped in the cell 125, and this makes it possible to suppress increases in the cost of the MMC 12.

Second Embodiment
[Configuration of power conversion device]
The second embodiment will be described below. FIG. 10 is a diagram showing an example of the configuration of a power conversion device according to the second embodiment. FIG. 10 also shows an example of a power conversion device 2 that is installed (connected) in parallel to a power system, similar to the power conversion device 1 of the first embodiment, and stabilizes the AC power of the power system by compensating (adjusting) the reactive power output (supplied) to the power system. The power conversion device 2 is also, for example, a static var compensator (STATCOM). In the following description, the connection point between the power conversion device 2 and the power system is called an interconnection point. Furthermore, in the following description, unless otherwise specified, the three phases are not distinguished from each other. In FIG. 10, the same reference numerals are used for components having the same functions as those of the power conversion device 1 of the first embodiment, and detailed description thereof will be omitted.

The power conversion device 2 includes, for example, a power converter 20 and a control device 50. Like the power converter 10 of the first embodiment, the power converter 20 also stabilizes the system voltage in the power system by supplying AC power (reactive power) to the interconnection point or consuming reactive power at the interconnection point according to control from the control device 50. The reactive power that the power converter 20 supplies to the interconnection point or consumes is also positive-phase reactive power or negative-phase reactive power.

The power converter 20 includes, for example, a transformer 21 and a modular multilevel converter (MMC) 22. The transformer 21 is configured such that, for example, the wiring on the MMC 22 side is delta-shaped, and arms (described later) of the MMC 22 are directly connected between the wires of the windings. Like the power converter 10 of the first embodiment, the power converter 20 also outputs an AC voltage from the MMC 22 in response to control from the control device 50, thereby passing an AC current in response to control from the control device 50.

The MMC22 includes, for example, three phase circuits 221 (phase circuits 221_a, 221_b, and 221_c) corresponding to each of the three phases. In the MMC22, both ends of each phase circuit 221 are connected to the converter side terminal of the corresponding phase in the transformer 21. In the MMC22, the three phase circuits 221 are connected to different phases in the transformer 21, thereby forming a delta connection circuit (hereinafter referred to as "delta connection circuit A") in which the three phase circuits 221 are delta connected. Figure 10 shows an example of how the phase circuits 221 are connected in the transformer 21.

Each phase circuit 221 includes, for example, a current detector (CT in the figure) 122 and an arm 124. In FIG. 10, as in the first embodiment, the letters following the "_ (underscore)" after the reference numbers of the phase circuit 221, the current detector 122, and the arm 124 indicate the phase to which each component corresponds.

In the phase circuit 221, the buffer reactor 123 is omitted from the phase circuit 121 of the first embodiment. Therefore, in the phase circuit 221, the current detector 122 and the arm 124 are connected in series. However, in the power converter 20, the leakage impedance component included in the transformer 21 functions in place of the buffer reactor 123. Therefore, in the power converter 20, the control device 50 controls the switching of the semiconductor switch unit 126, and in the MMC 22, a circulating current Iz flows in the delta connection circuit A according to the arm zero-phase voltage Vz of the arm 124 of each phase and the leakage impedance component in the transformer 21 in place of the buffer reactor 123. In other words, in the power converter 20, instead of the buffer reactor 123, the leakage impedance component in the transformer 21 contributes to the circulating current Iz flowing in the delta connection circuit A. The leakage impedance component is an example of an "impedance component" in the claims.

For this reason, also in the power conversion device 2, the control device 50 controls the operation of the power converter 20 (i.e., controls the switching of each semiconductor switch unit 126 provided in the cells 125 in each arm 124 of the MMC 22), thereby causing the power converter 20 to output (supply) reactive power to the interconnection point with the power grid. In this case, the configuration, operation, and processing of the control device 50 should be equivalent to those of the control device 50 of the first embodiment.

As described above, in the power conversion device 2 of the second embodiment, similar to the power conversion device 1 of the first embodiment, the control device 50 calculates the circulating current Iz flowing in the delta connection circuit A of the MMC 22 based on the arm current Iarm of the phase circuit 221 corresponding to each phase of the MMC 22 in the power converter 20. Then, in the power conversion device 2 of the second embodiment, similar to the power conversion device 1 of the first embodiment, the control device 50 controls each semiconductor switch unit 126 so as to suppress the zero-phase disturbance voltage Vz_dis contained in the arm zero-phase voltage Vz based on the calculated circulating current Iz. As a result, in the power conversion device 2 of the second embodiment, similar to the power conversion device 1 of the first embodiment, the circulating current Iz due to the zero-phase disturbance voltage Vz_dis, which is unnecessary for balancing the voltage (charge amount) of the DC capacitor 127 in each cell 125 of the MMC 22, is suppressed from flowing in the delta connection circuit A, and the reactive power output (supplied) by the power converter 20 to the interconnection point with the power system is compensated. As a result, in the power conversion device 2 of the second embodiment, as in the power conversion device 1 of the first embodiment, it is possible to suppress power loss during the operation (driving) of the MMC 22. As a result, in the power conversion device 2 of the second embodiment, as in the power conversion device 1 of the first embodiment, it is no longer necessary to use semiconductor switch units 126 and DC capacitors 127 (particularly passive elements) with high rated values that will not break down or become unstable, and it is possible to suppress an increase in the cost of the MMC 22.

In the power conversion device 2, the arm 124 of the MMC 22 is connected on the secondary side of the transformer 21, so that the circulating current Iz flows through the delta connection circuit A via each cell 125 in the arm 124 and the leakage impedance component in the transformer 21. However, in the power conversion device 2, if the circulating current Iz flows through the delta connection circuit A in the MMC 22 due to a delta connection at any point, the control device 50 can similarly control the switching of each semiconductor switch unit 126 to obtain the same effect.

Furthermore, in the power conversion device 2, a case has been described in which a delta connection is made within the transformer 21, but the connection within the transformer 21 is not limited to a delta connection. For example, even if an open delta connection or other connection is made within the transformer 21, as long as a circulating current Iz flows to balance the voltage (charge amount) of the DC capacitor 127 in each cell 125 provided in the arm 124 so that it is relatively uniform, the control device 50 can achieve the same effect by controlling the switching of each semiconductor switch unit 126 in the same way, regardless of the type of connection made within the transformer 21.

As described above, in the power conversion device of each embodiment, the control device controls the semiconductor switch unit of each cell so as to suppress the zero-phase disturbance voltage included in the arm zero-phase voltage. More specifically, in the power conversion device of each embodiment, the control device calculates the circulating current flowing in the delta connection circuit of the MMC based on the arm current of the phase circuit corresponding to each phase of the MMC in the power converter. Then, in the power conversion device of each embodiment, the control device executes a zero-phase disturbance voltage compensation function based on the calculated circulating current, calculates a circulating current control output for suppressing the zero-phase disturbance voltage superimposed on the arm zero-phase voltage, and generates and outputs a gate signal for controlling each semiconductor switch unit. As a result, in the power conversion device of each embodiment, the circulating current due to the zero-phase disturbance voltage that is unnecessary for balancing the voltage (charge amount) of the DC capacitor in each cell of the MMC is suppressed from flowing in the delta connection circuit, and the reactive power output (supplied) by the power converter to the interconnection point with the power system is compensated. As a result, in the power conversion device of each embodiment, the power loss during operation (operation) of the MMC can be suppressed. As a result, in the power conversion device of each embodiment, there is no need to use passive elements with high rated values that will not break down or become unstable as components that make up the MMC, which helps to prevent increases in the cost of the MMC.

According to at least one embodiment described above, a power conversion device (1) connected to a three-phase power system includes a power converter (10) having a delta-connected circuit in which three phase circuits (121) corresponding to each phase of the power system are delta-connected, and a control device (50) that controls the power converter. The phase circuit includes an arm (124) in which a plurality of cells (125) each having a plurality of self-extinguishing semiconductor switching elements (126) and a DC capacitor (127) are connected in series, and an impedance component (123) is connected in series. The current detector (122) detects an arm current (Iarm) flowing in the arm at any position of the series-connected circuit. The control device detects a circulating current (Iz) flowing in the delta-connected circuit based on the arm current, and controls the power converter to suppress a predetermined disturbance component (Vz_dis) contained in the detected circulating current. This realizes a power conversion device that can suppress disturbance components contained in the circulating current flowing in a delta-connected modular multilevel converter.

Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the gist of the invention. These embodiments and their modifications are within the scope of the invention and its equivalents as set forth in the claims, as well as the scope and gist of the invention.

1, 2... Power conversion device, 10, 20... Power converter, 11, 21... Transformer, 12, 22... MMC, 121, 121_a, 121_b, 121_c, 221, 221_a, 221_b, 221_c... Phase circuit, 122, 122_a, 122_b, 122_c... Current detector, 123, 123_a, 123_b, 123_c... Buffer reactor, 124, 124_a, 124_b, 124_c... Arm, 125, 125-1, 125-n, 125a, 125b... Cell, 126, 126-1, 126-2, 126-3, 126-4... Semiconductor switch switch section, 127...DC capacitor, 50, 50a, 50b...control device, 500...adder, 510...compensator, 520...adder, 530...adder, 540...specific order component suppression control section, 541...nth order harmonic component amplitude/phase extraction section, 542...proportional integral controller, 543...sine wave generation section, 550...disturbance observer section, 551...compensator, 552...adder, 553...low-pass filter, 560...repetitive control section, 561...adder, 562...delay section, 563...low-pass filter, 564...compensator, 570...adder

Claims (11)

A power conversion device connected to a three-phase power system,
a power converter including a delta connection circuit in which three phase circuits corresponding to each of the phases of the power system are delta connected;
A control device that controls the power converter;
Equipped with
The phase circuit includes:
An arm in which a plurality of cells, each including a plurality of self-extinguishing semiconductor switching elements and a DC capacitor, are connected in series with an impedance component;
a current detector for detecting a branch current flowing through the branch at an arbitrary position of the series-connected circuit,
The control device includes:
detecting a circulating current flowing in the delta connection circuit based on the arm current, and controlling the power converter so as to suppress a predetermined disturbance component contained in the detected circulating current.
Power conversion equipment. The control device feedback controls the power converter so as to bring a current component of the circulating current of an order to be suppressed closer to zero.
The power conversion device according to claim 1 . the control device controls the power converter based on an error amount included in a voltage of the delta connection circuit estimated based on the circulating current and a control output amount of the circulating current.
The power conversion device according to claim 1 or 2. the control device repeatedly controls the power converter based on repetitive waveform information of a fundamental wave period so as to bring a difference between the circulating current and a circulating current command value closer to zero.
The power conversion device according to any one of claims 1 to 3. The control device controls the power converter so that the circulating current flows to balance the voltages of the DC capacitors included in the cells in the phase circuits corresponding to the respective phases.
The power conversion device according to any one of claims 1 to 4. The control device controls the power converter to supply negative-sequence reactive power to the power grid or to consume the negative-sequence reactive power.
The power conversion device according to any one of claims 1 to 5. The cell is a half-bridge circuit in which a series circuit in which two semiconductor switching elements, a first semiconductor switching element and a second semiconductor switching element, are connected in series, and the DC capacitor are connected in parallel.
The power conversion device according to any one of claims 1 to 6. The cell is a full bridge circuit in which a first series circuit in which two semiconductor switching elements, a first semiconductor switching element and a second semiconductor switching element, are connected in series, a second series circuit in which two semiconductor switching elements, a third semiconductor switching element and a fourth semiconductor switching element, are connected in series, and the DC capacitor are connected in parallel.
The power conversion device according to any one of claims 1 to 6. The impedance component contributing to the circulating current is a leakage impedance component included in a transformer connected between the three-phase power system and the delta connection circuit.
The power conversion device according to any one of claims 1 to 8. A power conversion device connected to a three-phase power system,
a power converter including a delta connection circuit in which three phase circuits corresponding to each of the phases of the power system are delta connected;
A control device that controls the power converter;
Equipped with
The phase circuit includes:
An arm in which a plurality of cells, each including a plurality of self-extinguishing semiconductor switching elements and a DC capacitor, are connected in series with an impedance component;
A control method for the power conversion device, comprising: a current detector for detecting a valve branch current flowing through the valve branch at an arbitrary position of the series-connected circuit,
The computer of the control device
Detecting a circulating current flowing in the delta connection circuit based on the arm current;
controlling the power converter so as to suppress a predetermined disturbance component contained in the detected circulating current;
A method for controlling a power conversion device. A power conversion device connected to a three-phase power system,
a power converter including a delta connection circuit in which three phase circuits corresponding to each of the phases of the power system are delta connected;
A control device that controls the power converter;
Equipped with
The phase circuit includes:
An arm in which a plurality of cells, each including a plurality of self-extinguishing semiconductor switching elements and a DC capacitor, are connected in series with an impedance component;
A program for controlling the power conversion device, comprising a current detector for detecting a valve branch current flowing through the valve branch at an arbitrary position of the series-connected circuit,
The computer of the control device
detecting a circulating current flowing in the delta connection circuit based on the arm current;
controlling the power converter so as to suppress a predetermined disturbance component contained in the detected circulating current;
program.

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