JP7614073B2 - Power Conversion Equipment - Google Patents

Description

The present invention relates to a power conversion device that transforms a voltage input from an input terminal and outputs it from an output terminal.

As described in Patent Document 1, a known example of this type of power conversion device is a boost converter that uses LC resonance to achieve a boost ratio of 1.5. In more detail, the boost converter described in Figure 5 of Patent Document 1 includes four switches, four diodes, two reactors, and five capacitors.

U.S. Pat. No. 1,063,7352

Due to space limitations in the installation location of the power conversion device, there is a demand for miniaturization of the power conversion device. For this reason, it is desirable to reduce the number of passive elements, including reactors, and semiconductor elements, including switches.

The main objective of the present invention is to provide a power conversion device that can reduce the number of components.

The present invention relates to a power conversion device that transforms a voltage input from an input terminal and outputs the transformed voltage from an output terminal,
a series connection of an upper arm first semiconductor portion and an upper arm second semiconductor portion;
a series connection of an intermediate arm first switch portion and an intermediate arm second switch portion;
a series connection of a lower arm first semiconductor portion and a lower arm second semiconductor portion;
a series connection of a reactor and a first intermediate capacitor connecting a connection point between the upper arm first semiconductor portion and the upper arm second semiconductor portion and a connection point between the intermediate arm second switch portion and the lower arm first semiconductor portion;
The intermediate arm switch portion includes a first intermediate capacitor and a second intermediate capacitor provided in an electrical path connecting a connection point between the intermediate arm first switch portion and the intermediate arm second switch portion and a connection point between the lower arm first semiconductor portion and the lower arm second semiconductor portion.

The present invention can be embodied as a power conversion device with a boost function, for example, as follows:

A power conversion device that boosts a voltage input from a high potential side input terminal and a low potential side input terminal as the input terminals and outputs the boosted voltage from a high potential side output terminal and a low potential side output terminal as the output terminals,
the upper arm first semiconductor portion is an upper arm first diode portion,
the upper arm second semiconductor portion is an upper arm second diode portion,
the lower arm first semiconductor portion is a lower arm first switch portion,
the lower arm second semiconductor unit is a lower arm second switch unit,
the high potential side output terminal is connected to the cathode of the upper arm first diode portion,
a high potential side of both ends of the intermediate arm first switch section is connected to an anode of the upper arm second diode section;
a high potential side of each of both ends of the lower arm first switch section is connected to a low potential side of each of both ends of the intermediate arm second switch section,
the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section,
The high potential side input terminal is connected to a connection point between the upper arm second diode portion and the intermediate arm first switch portion.

The present invention can also be embodied as a power conversion device with a boost function, for example, as follows:

a first high potential side terminal, a first low potential side terminal, a second high potential side terminal, and a second low potential side terminal are provided as the input terminal and the output terminal;
the upper arm first semiconductor portion is an upper arm first switch portion,
the upper arm second semiconductor portion is an upper arm second switch portion,
the lower arm first semiconductor portion is a lower arm first switch portion,
the lower arm second semiconductor unit is a lower arm second switch unit,
the second high potential side terminal is connected to a high potential side of both ends of the upper arm first switch section,
a high potential side of each of both ends of the intermediate arm first switch section is connected to a low potential side of each of both ends of the upper arm second switch section,
a high potential side of each of both ends of the lower arm first switch section is connected to a low potential side of each of both ends of the intermediate arm second switch section,
the second low potential side terminal and the first low potential side terminal are connected to a low potential side of both ends of the lower arm second switch section,
The first high potential side terminal is connected to a connection point between the upper arm second switch portion and the intermediate arm first switch portion.

Moreover, the present invention can be embodied as a power conversion device having a step-down function, for example, as follows.
A power conversion device that steps down a voltage input from a high potential side input terminal and a low potential side input terminal as the input terminals, and outputs the voltage from a high potential side output terminal and a low potential side output terminal as the output terminals,
the upper arm first semiconductor portion is an upper arm first switch portion,
the upper arm second semiconductor portion is an upper arm second switch portion,
the lower arm first semiconductor portion is a lower arm first diode portion,
the lower arm second semiconductor portion is a lower arm second diode portion,
the high potential side input terminal is connected to a high potential side of both ends of the upper arm first switch section,
a high potential side of each of both ends of the intermediate arm first switch section is connected to a low potential side of each of both ends of the upper arm second switch section,
a cathode of the lower arm first diode section is connected to a lower potential side of both ends of the intermediate arm second switch section,
the low potential side output terminal and the low potential side input terminal are connected to an anode of the lower arm second diode section,
The high potential side output terminal is connected to a connection point between the upper arm second switch portion and the intermediate arm first switch portion.

The present invention makes it possible to reduce the number of reactors and capacitors, which are relatively large components of a power conversion device, and to miniaturize the power conversion device.

1 is a configuration diagram of a power conversion device according to a first embodiment. 4 is a time chart showing the driving state of a switch and transitions of current, voltage, etc. FIG. 4 is a diagram showing a current flow state in Mode 1. FIG. 13 is a diagram showing a current flow state in Mode 2. FIG. 13 is a diagram showing a current flow state in Mode 3. FIG. FIG. 11 is a configuration diagram of a power conversion device according to a second embodiment. 4 is a time chart showing the transition of the switch drive state, current, voltage, etc. FIG. 4 is a diagram showing a current flow state in Mode 1. FIG. 13 is a diagram showing a current flow state in Mode 2. FIG. 13 is a diagram showing a current flow state in Mode 3. FIG. 13 is a configuration diagram of a power conversion device according to a third embodiment. 4 is a time chart showing the transition of the switch drive state, current, voltage, etc. in boost control. FIG. 4 is a diagram showing a current flow state in Mode 1. FIG. 13 is a diagram showing a current flow state in Mode 2. FIG. 13 is a diagram showing a current flow state in Mode 3. 4 is a time chart showing the transition of the switch drive state, current, voltage, etc. in boost control. FIG. 4 is a diagram showing a current flow state in Mode 1. FIG. 13 is a diagram showing a current flow state in Mode 2. FIG. 13 is a diagram showing a current flow state in Mode 3. FIG. 13 is a configuration diagram of a power conversion device according to another embodiment. FIG. 13 is a configuration diagram of a power conversion device according to another embodiment. FIG. 13 is a configuration diagram of a power conversion device according to another embodiment.

First Embodiment
Hereinafter, a first embodiment of a power conversion device according to the present invention will be described with reference to the drawings. The power conversion device is mounted on a moving object such as a vehicle, an aircraft, or a ship. The vehicle is, for example, a hybrid vehicle equipped with a rotating electric machine and an engine, or an electric vehicle equipped with only the rotating electric machine of the rotating electric machine and the engine.

As shown in FIG. 1, the power conversion device 10 includes a first capacitor 21, an intermediate arm first switch QM1 (corresponding to the "intermediate arm first switch section"), an intermediate arm second switch QM2 (corresponding to the "intermediate arm second switch section"), a lower arm first switch QL1 (corresponding to the "lower arm first switch section"), and a lower arm second switch QL2 (corresponding to the "lower arm second switch section"). In this embodiment, each of the switches QM1, QM2, QL1, and QL2 is an N-channel MOSFET having a body diode.

The first end of the first capacitor 21 and the drain of the intermediate arm first switch QM1 are connected to the first high potential side terminal TH1 (corresponding to the "high potential side input terminal") of the power conversion device 10. The drain of the intermediate arm second switch QM2 is connected to the source of the intermediate arm first switch QM1, and the drain of the lower arm first switch QL1 is connected to the source of the intermediate arm second switch QM2. The drain of the lower arm second switch QL2 is connected to the source of the lower arm first switch QL1. The second end of the first capacitor 21 and the first low potential side terminal TL1 (corresponding to the "low potential side input terminal") of the power conversion device 10 are connected to the source of the lower arm second switch QL2. Each terminal TH1, TL1 is connected to, for example, a DC side terminal of an AC-DC converter or a secondary battery. The secondary battery is, for example, a lithium ion battery or a nickel metal hydride battery.

The power conversion device 10 includes an upper arm first diode DH1 (corresponding to the "upper arm first diode section"), an upper arm second diode DH2 (corresponding to the "upper arm second diode section"), and a second capacitor 22. The cathode of the upper arm first diode DH1 is connected to the second high potential side terminal TH2 (corresponding to the "high potential side output terminal") of the power conversion device 10 and the first end of the second capacitor 22. The second end of the second capacitor 22 is connected to the second low potential side terminal TL2 (corresponding to the "low potential side output terminal") of the power conversion device 10 and the source of the lower arm second switch QL2. The anode of the upper arm first diode DH1 is connected to the cathode of the upper arm second diode DH2. The anode of the upper arm second diode DH2 is connected to the drain of the intermediate arm first switch QM1. Each terminal TH2, TL2 is connected to, for example, a DC side terminal of an ACDC converter or a secondary battery. The secondary battery is, for example, a lithium ion battery or a nickel-metal hydride battery. In this embodiment, the rated voltage (e.g., 450 V) of the DC side terminal of the ACDC converter or the secondary battery connected to the second high potential side terminal TH2 and the second low potential side terminal TL2 is higher than the rated voltage (e.g., 300 V) of the DC side terminal of the ACDC converter or the secondary battery connected to the first high potential side terminal TH1 and the first low potential side terminal TL1.

The power conversion device 10 includes a reactor 30, a first intermediate capacitor 31, and a second intermediate capacitor 32. The first end of the reactor 30 is connected to the anode of the upper arm first diode DH1 and the cathode of the upper arm second diode DH2. The second end of the reactor 30 is connected to the first end of the first intermediate capacitor 31. The second end of the first intermediate capacitor 31 is connected to the source of the intermediate arm second switch QM2 and the drain of the lower arm first switch QL1. The first end of the second intermediate capacitor 32 is connected to the source of the intermediate arm first switch QM1 and the drain of the intermediate arm second switch QM2. The second end of the second intermediate capacitor 32 is connected to the source of the lower arm first switch QL1 and the drain of the lower arm second switch QL2.

The power conversion device 10 includes a first voltage sensor 51 and a second voltage sensor 52. The first voltage sensor 51 detects the voltage between the terminals of the first capacitor 21, and the second voltage sensor 52 detects the voltage between the terminals of the second capacitor 22. The detection values of the voltage sensors 51 and 52 are input to a control device 60 included in the power conversion device 10.

The control device 60 performs power conversion processing by controlling the switching of the intermediate arm first switch QM1, the intermediate arm second switch QM2, the lower arm first switch QL1, and the lower arm second switch QL2, thereby boosting the voltage input from the first high potential side terminal TH1 (corresponding to the "high potential side input terminal") and the first low potential side terminal TL1 (corresponding to the "low potential side input terminal") and outputting it from the second high potential side terminal TH2 (corresponding to the "high potential side output terminal") and the second low potential side terminal TL2 (corresponding to the "low potential side output terminal"). The functions provided by the control device 60 can be provided, for example, by software recorded in a physical memory device and a computer that executes the software, hardware, or a combination of these.

Next, the power conversion process will be described with reference to FIG. 2. In FIG. 2(a), the solid line indicates the transition of the low-voltage side voltage VL detected by the first voltage sensor 51, and the dashed line indicates the transition of the high-voltage side voltage VH detected by the second voltage sensor 52. FIG. 2(b) indicates the transition of the current iCf flowing from the connection point of the upper arm first diode DH1 and the upper arm second diode DH2 to the reactor 30, and FIG. 2(c) indicates the transition of the current iL flowing to the first capacitor 21. In FIG. 2(d), the solid line indicates the transition of the drive state of the intermediate arm first switch QM1, and the dashed line indicates the transition of the drive state of the intermediate arm second switch QM2. In FIG. 2(e), the solid line indicates the transition of the drive state of the lower arm first switch QL1, and the dashed line indicates the transition of the drive state of the lower arm second switch QL2. In FIG. 2(f), the solid line indicates the transition of the terminal voltage VDH1 of the upper arm first diode DH1, and the dashed line indicates the transition of the terminal voltage VDH2 of the upper arm second diode DH2. In FIG. 2(g), the solid line indicates the transition of the terminal voltage VQM1 (drain-source voltage) of the intermediate arm first switch QM1, and the dashed line indicates the transition of the terminal voltage VQM2 of the intermediate arm second switch QM2. In FIG. 2(h), the solid line indicates the transition of the terminal voltage VQL1 of the lower arm first switch QL1, and the dashed line indicates the transition of the terminal voltage VQL2 of the lower arm second switch QL2. In FIG. 2, the signs of each current and voltage are positive in the direction of the arrow shown in FIG. 1.

The control device 60 performs a power conversion process by repeating one cycle consisting of Mode 1, Mode 2, Mode 3, and Mode 2. As a result, the input voltage of the first high potential side terminal TH1 and the first low potential side terminal TL1 is multiplied by approximately 1.5 and output from the second high potential side terminal TH2 and the second low potential side terminal TL2. During the Mode 1 period, the intermediate arm second switch QM2 and the lower arm second switch QL2 are turned on, and the intermediate arm first switch QM1 and the lower arm first switch QL1 are turned off. During the Mode 2 period, the intermediate arm first and second switches QM1 and QM2 are turned on, and the lower arm first and second switches QL1 and QL2 are turned off. During Mode 3, the intermediate arm first switch QM1 and the lower arm first switch QL1 are turned on, and the intermediate arm second switch QM2 and the lower arm second switch QL2 are turned off.

During the period of Mode 1, as shown in FIG. 3, a current flows in a closed circuit including the upper arm second diode DH2, the reactor 30, the first intermediate capacitor 31, the intermediate arm second switch QM2, the second intermediate capacitor 32, the lower arm second switch QL2, and the first capacitor 21. In more detail, LC resonance occurs in this closed circuit due to the reactor 30 and the first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow.

When the capacitance of the first intermediate capacitor 31 is C1, the capacitance of the second intermediate capacitor 32 is C2, and the inductance of the reactor 30 is L, the first resonance period Tc1, which is the resonance period of the LC resonance in Mode 1, is expressed by the following equation (eq1).

制御装置６０は、Ｍｏｄｅ１が開始されてから第１共振周期Ｔｃ１の半周期（＝Ｔｃ１×１／２）が経過したタイミングにおいて、中間アーム第１スイッチＱＭ１をオンに切り替え、下アーム第２スイッチＱＬ２をオフに切り替える。これにより、Ｍｏｄｅ１からＭｏｄｅ２に移行する。この際、中間アーム第１スイッチＱＭ１のオンへの切り替えと、下アーム第２スイッチＱＬ２のオフへの切り替えとにおいてＺＣＳのソフトスイッチングを実現することができ、損失の低減を図ることができる。なお、ｉＬが０になるタイミングと、ｉＣｆが０になるタイミングとは同じタイミング又は略同じタイミングである。

The control device 60 switches the intermediate arm first switch QM1 on and the lower arm second switch QL2 off at a timing when a half cycle (=Tc1×1/2) of the first resonance cycle Tc1 has elapsed since the start of Mode 1. This transitions from Mode 1 to Mode 2. At this time, soft switching of the ZCS can be realized by switching the intermediate arm first switch QM1 on and the lower arm second switch QL2 off, and loss can be reduced. Note that the timing at which iL becomes 0 and the timing at which iCf becomes 0 are the same or approximately the same.

During the period of Mode 2, as shown in FIG. 4, a current flows through a closed circuit including the intermediate arm first switch QM1, the intermediate arm second switch QM2, the first intermediate capacitor 31, the reactor 30, the upper arm first diode DH1, the second capacitor 22, and the first capacitor 21. In detail, LC resonance occurs between the reactor 30 and the first intermediate capacitor 31 in this closed circuit, and a sinusoidal current flows.

The second resonance period Tc2, which is the resonance period of the LC resonance in Mode 2, is expressed by the following equation (eq2).

第２中間コンデンサ３２の静電容量Ｃ２は、第１中間コンデンサ３１の静電容量Ｃ１と同等又はＣ１よりも大きい。本実施形態では、第２中間コンデンサ３２の静電容量Ｃ２は、第１中間コンデンサ３１の静電容量Ｃ１よりも十分大きい。これにより、第２共振周期Ｔｃ２と第１共振周期Ｔｃ１とが同じ又は略等しい周期にされている。

The capacitance C2 of the second intermediate capacitor 32 is equal to or larger than the capacitance C1 of the first intermediate capacitor 31. In the present embodiment, the capacitance C2 of the second intermediate capacitor 32 is sufficiently larger than the capacitance C1 of the first intermediate capacitor 31. This makes the second resonant period Tc2 and the first resonant period Tc1 the same or approximately equal to each other.

The control device 60 switches the intermediate arm second switch QM2 off and the lower arm first switch QL1 on when half the second resonant period Tc2 (= Tc2 × 1/2) has elapsed since the start of Mode 2. This transitions from Mode 2 to Mode 3. At this time, soft switching of the ZCS can be achieved by switching the intermediate arm second switch QM2 off and the lower arm first switch QL1 on, thereby reducing losses.

During the period of Mode 3, as shown in FIG. 5, a current flows in a closed circuit including the intermediate arm first switch QM1, the upper arm second diode DH2, the reactor 30, the first intermediate capacitor 31, the lower arm first switch QL1, and the second intermediate capacitor 32. In more detail, LC resonance occurs in this closed circuit due to the reactor 30 and the first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow. The resonance period of this LC resonance is the above-mentioned first resonance period Tc1.

The control device 60 switches the intermediate arm second switch QM2 on and the lower arm first switch QL1 off at a timing when half a cycle of the first resonance cycle Tc1 has elapsed since the start of Mode 3. This transitions from Mode 3 to Mode 2. At this time, soft switching of the ZCS can be realized by switching the intermediate arm second switch QM2 on and the lower arm first switch QL1 off, thereby reducing losses.

The control device 60 switches the intermediate arm first switch QM1 off and the lower arm second switch QL2 on when half a cycle of the second resonance cycle Tc2 has elapsed since the start of Mode 2. This transitions from Mode 2 to Mode 1, and one cycle consisting of Mode 1, Mode 2, Mode 3, and Mode 2 ends. At this time, soft switching of the ZCS can be realized by switching the intermediate arm first switch QM1 off and the lower arm second switch QL2 on, thereby reducing losses.

Figure 6 shows the difference in size between the comparative example and this embodiment. The comparative example is the power conversion device of Figure 5 of Patent Document 1. The comparative example requires four switches and their drive circuits, while the present embodiment also requires four. On the other hand, the comparative example requires four diodes, while the present embodiment requires two. Also, the comparative example requires two reactors, while the present embodiment requires one, and in particular, the inductance of the reactor is 1/4 of that of the comparative example. Also, the comparative example requires five capacitors, while the present embodiment requires four, and in particular, the capacitance of the capacitor is 2/5 of that of the comparative example. In the comparative example and this embodiment, if the sum of the numbers of each component such as diodes is considered to be the size, the size of the comparative example is 19, while the size of this embodiment is 12.5. In other words, in this embodiment, the size of the power conversion device 10 is reduced by about 34%.

In particular, passive components such as capacitors and reactors tend to be large in size, so this embodiment, which can reduce the number of capacitors and reactors, can ideally reduce the size of the power conversion device.

As shown in FIG. 2, the current iCf fluctuates at twice the switching frequency of each switch QM1, QM2, QL1, and QL2. This allows the frequency of the applied voltage to the reactor 30 and each intermediate capacitor 31, 32 to be increased without excessively increasing the switching frequency of each switch QM1, QM2, QL1, and QL2. As a result, the reactor 30 and each intermediate capacitor 31, 32 can be made smaller without excessively increasing the switching frequency of each switch QM1, QM2, QL1, and QL2.

In contrast, in the above comparative example, the frequency of the voltage applied to the reactor and capacitor is the same as the switching frequency of the switch. Therefore, in the comparative example, if the reactor and capacitor are to be made smaller, it is necessary to increase the switching frequency of the switch.

<Modification of the First Embodiment>
The timing of switching from one Mode to another among Modes 1 to 3 is not limited to the timing when the currents iL and iCf become 0, but may be the timing when the currents iL and iCf become close to 0. The timing when the currents iL and iCf become close to 0 is, for example, the timing when the currents iL and iCf are greater than 0 and are equal to or less than 1/10, 1/20, or 1/40 of the maximum value that the peak values of the currents iL and iCf can take. The timing when the currents iL and iCf become close to 0 is a combination of the timing when the currents iL and iCf become 0 and the timing when the currents iL and iCf become close to 0.

- The reactor 30 is not limited to being provided between the connection point of the upper arm first and second diodes DH1 and DH2 and the first intermediate capacitor 31, but may also be provided between the first intermediate capacitor 31 and the connection point of the intermediate arm second switch QM2 and the lower arm first switch QL1.

Second Embodiment
The second embodiment will be described below with reference to the drawings, focusing on the differences from the first embodiment. In this embodiment, as shown in Fig. 7, instead of the upper arm first and second diodes DH1 and DH2, upper arm first and second switches QH1 and QH2 are provided, and instead of the lower arm first and second switches QL1 and QL2, lower arm first and second diodes DL1 and DL2 (corresponding to "lower arm first and second diode section") are provided. In this embodiment, the upper arm first and second switches QH1 and QH2 are N-channel MOSFETs. In Fig. 7, the same components as those shown in Fig. 1 are denoted by the same reference numerals for convenience.

The drain of the upper arm first switch QH1 is connected to the first end of the second capacitor 22 and the second high potential side terminal TH2. The source of the upper arm first switch QH1 is connected to the drain of the upper arm second switch QH2. The source of the upper arm second switch QH2 is connected to the drain of the intermediate arm first switch QM1.

The cathode of the lower arm first diode DL1 is connected to the source of the intermediate arm second switch QM2, and the cathode of the lower arm second diode DL2 is connected to the anode of the lower arm first diode DL1. The second ends of the first capacitor 21 and the second capacitor 22 are connected to the anode of the lower arm second diode DL2.

A first end of the reactor 30 is connected to the connection point of the upper arm first switch QH1 and the upper arm second switch QH2. A second end of the first intermediate capacitor 31 is connected to the connection point of the intermediate arm second switch QM2 and the lower arm first diode DL1. The connection point of the intermediate arm first switch QM1 and the intermediate arm second switch QM2 and the connection point of the lower arm first diode DL1 and the lower arm second diode DL2 are connected by a second intermediate capacitor 32.

The control device 60 performs switching control of the upper arm first switch QH1, the upper arm second switch QH2, the intermediate arm first switch QM1, and the intermediate arm second switch QM2 to perform power conversion processing in which the voltage input from the second high potential side terminal TH2 (corresponding to the "high potential side input terminal") and the second low potential side terminal TL2 (corresponding to the "low potential side input terminal") is stepped down and output from the first high potential side terminal TH1 (corresponding to the "high potential side output terminal") and the first low potential side terminal TL1 (corresponding to the "low potential side output terminal"). This power conversion processing will be explained using Figure 8. Figures 8(a) to (c) correspond to Figures 2(a) to (c). In Figure 8(d), the solid line indicates the transition of the drive state of the upper arm first switch QH1, and the dashed line indicates the transition of the drive state of the upper arm second switch QH2. In FIG. 8(e), the solid line indicates the transition of the driving state of the intermediate arm first switch QM1, and the dashed line indicates the transition of the driving state of the intermediate arm second switch QM2. In FIG. 8(f), the solid line indicates the transition of the terminal voltage VQH1 of the upper arm first switch QH1, and the dashed line indicates the transition of the terminal voltage VQL2 of the upper arm second switch QH2. In FIG. 8(g), the solid line indicates the transition of the terminal voltage VQM1 of the intermediate arm first switch QM1, and the dashed line indicates the transition of the terminal voltage VQM2 of the intermediate arm second switch QM2. In FIG. 8(h), the solid line indicates the transition of the terminal voltage VDL1 of the lower arm first diode DL1, and the dashed line indicates the transition of the terminal voltage VDL2 of the lower arm second diode DL2. In FIG. 8, the signs of each current and voltage are positive in the direction of the arrow shown in FIG. 7.

The control device 60 performs a power conversion process by repeating one cycle consisting of Mode 1, Mode 2, Mode 3, and Mode 2. As a result, the input voltage of the second high potential side terminal TH2 and the second low potential side terminal TL2 is multiplied by approximately 0.67 (2/3) and output from the first high potential side terminal TH1 and the first low potential side terminal TL1. During the Mode 1 period, the upper arm second switch QH2 and the intermediate arm second switch QM2 are turned on, and the upper arm first switch QH1 and the intermediate arm first switch QM1 are turned off. During the Mode 2 period, the upper arm first switch QH1 and the intermediate arm first and second switches QM1 and QM2 are turned on, and the upper arm second switch QH2 is turned off. During Mode 3, the upper arm second switch QH2 and the intermediate arm first switch QM1 are turned on, and the upper arm first switch QH1 and the intermediate arm second switch QM2 are turned off. Note that each mode of this embodiment is different from each mode of the first embodiment.

During the period of Mode 1, as shown in FIG. 9, a current flows in a closed circuit including the upper arm second switch QH2, the first capacitor 21, the lower arm second diode DL2, the second intermediate capacitor 32, the intermediate arm second switch QM2, the first intermediate capacitor 31, and the reactor 30. In more detail, LC resonance occurs in this closed circuit due to the reactor 30 and the first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow. The resonance period of this LC resonance is the above-mentioned first resonance period Tc1.

When half a cycle of the first resonance period Tc1 has elapsed since Mode 1 was started, the control device 60 switches the upper arm second switch QH2 off and switches the upper arm first switch QH1 on. The control device 60 also switches the intermediate arm first switch QM1 on. This transitions from Mode 1 to Mode 2. At this time, soft switching of the ZCS can be achieved by switching on the upper arm first switch QH1 and the intermediate arm first switch QM1 and switching off the upper arm second switch QH2, thereby reducing losses.

During the period of Mode 2, as shown in FIG. 10, a current flows through a closed circuit including the first capacitor 21, the second capacitor 22, the upper arm first switch QH1, the reactor 30, the first intermediate capacitor 31, the intermediate arm second switch QM2, and the intermediate arm first switch QM1. In more detail, LC resonance occurs between the reactor 30 and the first intermediate capacitor 31, and a sinusoidal current flows through this closed circuit. The resonance period of this LC resonance is the second resonance period Tc2.

The control device 60 switches the upper arm first switch QH1 off and the upper arm second switch QH2 on when half a cycle of the second resonance cycle Tc2 has elapsed since the start of Mode 2. The control device 60 also switches the intermediate arm second switch QM2 off. This transitions from Mode 2 to Mode 3. At this time, soft switching of the ZCS can be achieved by switching off the upper arm first switch QH1 and the intermediate arm second switch QM2 and switching on the upper arm second switch QH2, thereby reducing losses.

During the period of Mode 3, as shown in FIG. 11, a current flows through a closed circuit including the upper arm second switch QH2, the intermediate arm first switch QM1, the second intermediate capacitor 32, the lower arm first diode DL1, the first intermediate capacitor 31, and the reactor 30. In more detail, LC resonance occurs in this closed circuit due to the reactor 30 and the first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow. The resonance period of this LC resonance is the above-mentioned first resonance period Tc1.

When half a cycle of the first resonance cycle Tc1 has elapsed since Mode 3 was started, the control device 60 switches the upper arm second switch QH2 off and switches the upper arm first switch QH1 on. The control device 60 also switches the intermediate arm second switch QM2 on. This transitions from Mode 3 to Mode 2. At this time, soft switching of the ZCS can be achieved by switching the upper arm second switch QH2 off and switching the upper arm first switch QH1 and the intermediate arm second switch QM2 on, thereby reducing losses.

The control device 60 switches the upper arm first switch QH1 off and the upper arm second switch QH2 on at the timing when half a cycle of the second resonance cycle Tc2 has elapsed since the start of Mode 2. The control device 60 also switches the intermediate arm first switch QM1 off. This transitions from Mode 2 to Mode 1, and one cycle consisting of Mode 1, Mode 2, Mode 3, and Mode 2 ends. At this time, soft switching of the ZCS can be realized by switching off the upper arm first switch QH1 and the intermediate arm first switch QM1 and switching on the upper arm second switch QH2 and the intermediate arm second switch QM2, thereby reducing losses.

According to the present embodiment described above, the number of components in the power conversion device 10 having a step-down function can be reduced, similar to the first embodiment.

<Modification of the second embodiment>
Among Modes 1 to 3, the timing of switching from one Mode to another is not limited to the timing when the currents iL and iCf become 0, as in the modified example of the first embodiment, but may be the timing when the currents iL and iCf become close to 0.

Third Embodiment
The third embodiment will be described below with reference to the drawings, focusing on the differences from the first and second embodiments. In this embodiment, as shown in Fig. 12, lower arm first and second switches QL1 and QL2 are provided instead of the lower arm first and second diodes DL1 and DL2 in the configuration shown in Fig. 7. In Fig. 12, the same components as those shown in Figs. 1 and 7 are denoted by the same reference numerals for convenience.

The control device 60 selects and executes either step-up control or step-down control as the power conversion process.

First, the boost control will be explained using Figure 13. Figures 13(a)-(f), (h), and (i) correspond to Figures 8(a)-(g), and Figures 13(g) and (j) correspond to Figures 2(e) and (h).

The control device 60 performs step-down control by repeating one cycle consisting of Mode 1, Mode 2, Mode 3, and Mode 2. Note that each mode of this embodiment is different from each mode of the first and second embodiments.

During the period of Mode 1, the upper arm second switch QH2, the intermediate arm second switch QM2, and the lower arm second switch QL2 are turned on, and the upper arm first switch QH1, the intermediate arm first switch QM1, and the lower arm first switch QL1 are turned off. As a result, as shown in FIG. 14, a current flows in a closed circuit including the upper arm second switch QH2, the reactor 30, the first intermediate capacitor 31, the intermediate arm second switch QM2, the second intermediate capacitor 32, the lower arm second switch QL2, and the first capacitor 21. In detail, LC resonance occurs in this closed circuit by the reactor 30 and the first and second intermediate capacitors 31 and 32, and a sinusoidal current flows. The resonance period of this LC resonance is the above-mentioned first resonance period Tc1.

When half a cycle of the first resonance cycle Tc1 has elapsed since Mode 1 was started, the control device 60 switches the upper arm second switch QH2 and the lower arm second switch QL2 off and switches the upper arm first switch QH1 and the intermediate arm first switch QM1 on. This transitions from Mode 1 to Mode 2. At this time, soft switching of the ZCS can be achieved by switching the upper arm second switch QH2 and the lower arm second switch QL2 off and the upper arm first switch QH1 and the intermediate arm first switch QM1 on, thereby reducing losses.

During the period of Mode 2, as shown in FIG. 15, a current flows in a closed circuit including the intermediate arm first switch QM1, the intermediate arm second switch QM2, the first intermediate capacitor 31, the reactor 30, the upper arm first switch QH1, the second capacitor 22, and the first capacitor 21. In detail, LC resonance occurs in this closed circuit due to the reactor 30 and the first intermediate capacitor 31, and a sinusoidal current flows. The resonance period of this LC resonance is the above-mentioned second resonance period Tc2.

When half a cycle of the second resonance cycle Tc2 has elapsed since Mode 2 was started, the control device 60 switches the upper arm first switch QH1 and the intermediate arm second switch QM2 off and switches the upper arm second switch QH2 and the lower arm first switch QL1 on. This transitions from Mode 2 to Mode 3. At this time, soft switching of the ZCS can be realized by switching the upper arm first switch QH1 and the intermediate arm second switch QM2 off and switching the upper arm second switch QH2 and the lower arm first switch QL1 on, thereby reducing losses.

During the period of Mode 3, as shown in FIG. 16, a current flows in a closed circuit including the intermediate arm first switch QM1, the upper arm second switch QH2, the reactor 30, the first intermediate capacitor 31, the lower arm first switch QL1, and the second intermediate capacitor 32. In detail, LC resonance occurs in this closed circuit due to the reactor 30 and the first and second intermediate capacitors 31 and 32, and a sinusoidal current flows. The resonance period of this LC resonance is the above-mentioned first resonance period Tc1.

When half a cycle of the first resonance cycle Tc1 has elapsed since Mode 3 was started, the control device 60 switches the upper arm second switch QH2 and the lower arm first switch QL1 off and switches the upper arm first switch QH1 and the intermediate arm second switch QM2 on. This transitions from Mode 3 to Mode 2. At this time, soft switching of the ZCS can be realized by switching the upper arm second switch QH2 and the lower arm first switch QL1 off and switching the upper arm first switch QH1 and the intermediate arm second switch QM2 on, thereby reducing losses.

When half a cycle of the second resonance cycle Tc2 has elapsed since Mode 2 was started, the control device 60 switches the upper arm first switch QH1 and the intermediate arm first switch QM1 off and switches the upper arm second switch QH2 and the lower arm second switch QL2 on. This transitions from Mode 2 to Mode 1, and one cycle consisting of Mode 1, Mode 2, Mode 3, and Mode 2 ends. At this time, soft switching of the ZCS can be realized by switching the upper arm first switch QH1 and the intermediate arm first switch QM1 off and switching the upper arm second switch QH2 and the lower arm second switch QL2 on, thereby reducing losses.

Next, we will explain the step-down control using Figure 17. Figures 17(a) to (j) correspond to Figures 13(a) to (j) above.

The control device 60 performs step-down control that repeats one cycle consisting of Mode 1, Mode 2, Mode 3, and Mode 2. That is, in this embodiment, the switching control of the step-down control is the same as the switching control of the step-up control. The current flow patterns in Modes 1 to 3 of the step-down control are shown in Figures 18 to 20.

As described above, in this embodiment, the switching control modes are the same for the step-up control and the step-down control. Therefore, the step-up control and the step-down control can be seamlessly switched from one control to the other without switching the switching control mode.

<Other embodiments>
Each of the above embodiments may be modified as follows.

- In the third embodiment, the timing of switching from one of Modes 1 to 3 to another Mode is not limited to the timing when the currents iL and iCf become 0, as in the modified example of the first embodiment, but may be the timing when the currents iL and iCf become close to 0.

- The switch section of the power conversion device 10 is not limited to one semiconductor switch, but may be a series connection of multiple semiconductor switches, and the diode section of the power conversion device 10 is not limited to one diode, but may be a series connection of multiple diodes. Figure 21 shows an example in which the upper arm first and second diodes DH1 and DH2 in the configuration shown in Figure 1 are composed of two diodes connected in series, and each switch QM1, QM2, QL1, and QL2 is composed of two N-channel MOSFETs connected in series. This allows each switch and each diode to be a low-voltage element.

- The switch section of the power conversion device 10 may be a parallel connection of multiple switches, and the diode section of the power conversion device 10 may be a parallel connection of multiple diodes. Figure 22 shows an example in which, in the configuration shown in Figure 1, the upper arm first and second diodes DH1 and DH2 are configured as a parallel connection of two diodes, and each switch QM1, QM2, QL1, and QL2 is configured as a parallel connection of two N-channel MOSFETs. This allows each switch and each diode to be a low current capacity element.

- As shown in FIG. 23, the power conversion device 10 may be provided with a plurality of second intermediate capacitors. In the example shown in FIG. 23, the power conversion device 10 includes a second A intermediate capacitor 32A and a second B intermediate capacitor 32B. The power conversion device 10 includes a first changeover switch SA and a second changeover switch SB. In FIG. 23, each changeover switch SA, SB is configured with two N-channel MOSFETs with their drains connected to each other. The first changeover switch SA and the second A intermediate capacitor 32A are connected in series, and the second changeover switch SB and the second B intermediate capacitor 32B are connected in series. Note that each changeover switch SA, SB may be configured with two N-channel MOSFETs with their sources connected to each other.

The capacitance of the second A intermediate capacitor 32A is different from the capacitance of the second B intermediate capacitor 32B. Therefore, the first resonance period Tc1 can be changed by turning on at least one of the first changeover switch SA and the second changeover switch SB by the control device 60.

- The switches provided in the power conversion device 10 are not limited to N-channel MOSFETs, but may be, for example, IGBTs with freewheel diodes connected in inverse parallel.

10...power conversion device, 30...reactor, 31, 32...first and second intermediate capacitors, DH1, DH2...upper arm first and second diodes, QM1, QM2...intermediate arm first and second switches, QL1, QL2...lower arm first and second switches, 60...control device.

Claims (10)

In a power conversion device (10) that transforms a voltage inputted from input terminals (TH1, TH2; TL1, TL2) and outputs the transformed voltage from output terminals (TH2, TH1; TL2, TL1),
a series connection of an upper arm first semiconductor portion (DH1, QH1) and an upper arm second semiconductor portion (DH2, QH2);
a series connection of an intermediate arm first switch section (QM1) and an intermediate arm second switch section (QM2);
a series connection of a lower arm first semiconductor portion (QL1, DL1) and a lower arm second semiconductor portion (QL2, DL2);
a series connection of a reactor (30) and a first intermediate capacitor (31) connecting a connection point between the upper arm first semiconductor portion and the upper arm second semiconductor portion and a connection point between the intermediate arm second switch portion and the lower arm first semiconductor portion;
a second intermediate capacitor (32; 32A, 32B) provided in an electrical path connecting a connection point between the intermediate arm first switch section and the intermediate arm second switch section and a connection point between the lower arm first semiconductor section and the lower arm second semiconductor section;
A power conversion device comprising: A power conversion device that boosts a voltage input from a high potential side input terminal (TH1) and a low potential side input terminal (TL1) as the input terminals and outputs the boosted voltage from a high potential side output terminal (TH2) and a low potential side output terminal (TL2) as the output terminals,
the upper arm first semiconductor portion is an upper arm first diode portion (DH1),
the upper arm second semiconductor portion is an upper arm second diode portion (DH2),
the lower arm first semiconductor portion is a lower arm first switch portion (QL1),
the lower arm second semiconductor unit is a lower arm second switch unit (QL2),
the high potential side output terminal is connected to the cathode of the upper arm first diode portion,
a high potential side of both ends of the intermediate arm first switch section is connected to an anode of the upper arm second diode section;
a high potential side of each of both ends of the lower arm first switch section is connected to a low potential side of each of both ends of the intermediate arm second switch section,
the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section,
The power conversion device according to claim 1 , wherein the high potential side input terminal is connected to a connection point between the upper arm second diode section and the intermediate arm first switch section. The power conversion device according to claim 2, further comprising a control device (60) that executes boost control by repeating in this order: Mode 1 in which the intermediate arm first switch unit and the lower arm first switch unit are turned off and the intermediate arm second switch unit and the lower arm second switch unit are turned on; Mode 2 in which the intermediate arm first switch unit and the intermediate arm second switch unit are turned on and the lower arm first switch unit and the lower arm second switch unit are turned off; Mode 3 in which the intermediate arm first switch unit and the lower arm first switch unit are turned on and the intermediate arm second switch unit and the lower arm second switch unit are turned off; and Mode 2. The power conversion device according to claim 3, wherein the control device executes switching from Mode 1 to Mode 2, switching from Mode 2 to Mode 3, switching from Mode 3 to Mode 2, and switching from Mode 2 to Mode 1 at a timing when the current flowing through the reactor becomes close to zero. A first high potential side terminal (TH1), a first low potential side terminal (TL1), a second high potential side terminal (TH2), and a second low potential side terminal (TL2) are provided as the input terminal and the output terminal,
the upper arm first semiconductor portion is an upper arm first switch portion (QH1),
the upper arm second semiconductor unit is an upper arm second switch unit (QH2),
the lower arm first semiconductor portion is a lower arm first switch portion (QL1),
the lower arm second semiconductor unit is a lower arm second switch unit (QL2),
the second high potential side terminal is connected to a high potential side of both ends of the upper arm first switch section,
a high potential side of each of both ends of the intermediate arm first switch section is connected to a low potential side of each of both ends of the upper arm second switch section,
a high potential side of each of both ends of the lower arm first switch section is connected to a low potential side of each of both ends of the intermediate arm second switch section,
the second low potential side terminal and the first low potential side terminal are connected to a low potential side of both ends of the lower arm second switch section,
The power conversion device according to claim 1 , wherein the first high potential side terminal is connected to a connection point between the upper arm second switch section and the intermediate arm first switch section. The power conversion device according to claim 5, further comprising a control device (60) that executes control to repeat in this order: Mode 1 in which the upper arm first switch unit, the intermediate arm first switch unit, and the lower arm first switch unit are turned off, and the upper arm second switch unit, the intermediate arm second switch unit, and the lower arm second switch unit are turned on; Mode 2 in which the upper arm first switch unit, the intermediate arm first switch unit, and the intermediate arm second switch unit are turned on, and the upper arm second switch unit, the lower arm first switch unit, and the lower arm second switch unit are turned off; Mode 3 in which the upper arm second switch unit, the intermediate arm first switch unit, and the lower arm first switch unit are turned on, and the upper arm first switch unit, the intermediate arm second switch unit, and the lower arm second switch unit are turned off; and Mode 2. The power conversion device according to claim 6, wherein the control device executes switching from Mode 1 to Mode 2, switching from Mode 2 to Mode 3, switching from Mode 3 to Mode 2, and switching from Mode 2 to Mode 1 at a timing when the current flowing through the reactor becomes close to zero. A power conversion device that steps down a voltage input from a high potential side input terminal (TH2) and a low potential side input terminal (TL2) as the input terminals, and outputs the voltage from a high potential side output terminal (TH1) and a low potential side output terminal (TL1) as the output terminals,
the upper arm first semiconductor portion is an upper arm first switch portion (QH1),
the upper arm second semiconductor unit is an upper arm second switch unit (QH2),
the lower arm first semiconductor portion is a lower arm first diode portion (DL1),
the lower arm second semiconductor portion is a lower arm second diode portion (DL2),
the high potential side input terminal is connected to a high potential side of both ends of the upper arm first switch section,
a high potential side of each of both ends of the intermediate arm first switch section is connected to a low potential side of each of both ends of the upper arm second switch section,
a cathode of the lower arm first diode section is connected to a lower potential side of both ends of the intermediate arm second switch section,
the low potential side output terminal and the low potential side input terminal are connected to an anode of the lower arm second diode section,
The power conversion device according to claim 1 , wherein the high potential side output terminal is connected to a connection point between the upper arm second switch section and the intermediate arm first switch section. The power conversion device according to claim 8, further comprising a control device (60) that executes step-down control by repeating in this order: Mode 1 in which the upper arm first switch unit and the intermediate arm first switch unit are turned off and the upper arm second switch unit and the intermediate arm second switch unit are turned on; Mode 2 in which the upper arm first switch unit, the intermediate arm first switch unit and the intermediate arm second switch unit are turned on and the upper arm second switch unit is turned off; Mode 3 in which the upper arm second switch unit and the intermediate arm first switch unit are turned on and the upper arm first switch unit and the intermediate arm second switch unit are turned off; and Mode 2. The power conversion device according to claim 9, wherein the control device executes switching from Mode 1 to Mode 2, switching from Mode 2 to Mode 3, switching from Mode 3 to Mode 2, and switching from Mode 2 to Mode 1 at a timing when the current flowing through the reactor becomes close to zero.

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