JP7614769B2 - METHOD FOR PRODUCING NITRIDE SEMICONDUCTOR LAMINATE AND NITRIDE SEMICONDUCTOR LAMINATE - Google Patents

Description

The present disclosure relates to a method for manufacturing a nitride semiconductor laminate and a nitride semiconductor laminate.

A nitride semiconductor stack is a stack of nitride semiconductors with different bandgaps, and a two-dimensional carrier gas is induced at the interface between the nitride semiconductors. Conventionally, high electron mobility transistor (HEMT) devices have been fabricated using such two-dimensional carrier gas.

A typical power device using a nitride semiconductor laminate has an AlGaN barrier layer on a GaN substrate (see, for example, Patent Document 1). In order to increase the breakdown voltage of the power device, a method has been disclosed in which a nitride semiconductor laminate is grown on an AlN substrate with a wider band gap to create a power device on the AlN substrate (see, for example, Patent Document 2).

JP2009-49121Publication

Sumitomo Electric Technical Review No. 180, page 83 (2012)

Nitride power devices are required to have further improved breakdown voltage and low on-resistance. However, in the above-mentioned power devices, the electron mobility of the two-dimensional carrier gas generated at the interface is reduced due to alloy scattering of AlGaN. Since the on-resistance is determined by the electron mobility of the two-dimensional carrier gas and the concentration of the carrier gas, the on-resistance is deteriorated due to the reduction in the electron mobility of the two-dimensional carrier gas.
An object of the present disclosure is to provide a method for manufacturing a nitride semiconductor laminate that reduces the on-resistance and provides a high breakdown voltage, and the nitride semiconductor laminate.

In order to solve the above-mentioned problems, a method for manufacturing a nitride semiconductor laminate according to an embodiment of the present disclosure is characterized in that an Al _x Ga (1-x) N layer made of Al x Ga _(1-x) N (0≦x≦0.2) is formed on an Al-containing nitride semiconductor substrate at a temperature of 650° C. or more and less than 1000° C. by metalorganic chemical vapor deposition at a growth rate of 0.7 μm/hr or more such that the coverage of the _{Al x Ga (1-x) N} layer with respect to the layer immediately below is 80% or more and 100% or less.

Moreover, a nitride semiconductor stack according to an embodiment of the present disclosure includes a nitride semiconductor substrate containing Al, and an Al _x Ga (1 _-x) N layer formed of Al _x Ga (1 _-x) N (0≦x≦0.2) disposed on the nitride semiconductor substrate, and is characterized in that the coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below is 80% or more and 100% or less.

The present disclosure provides a method for producing a nitride semiconductor laminate that reduces on-resistance and provides a high breakdown voltage, and a nitride semiconductor laminate can be obtained.

1 is a cross-sectional view showing a configuration example of a nitride semiconductor stack according to a first embodiment of the present disclosure. 4 is a cross-sectional view showing another configuration example of the nitride semiconductor stack according to the first embodiment of the present disclosure. FIG. 4 is a cross-sectional view showing another configuration example of the nitride semiconductor stack according to the first embodiment of the present disclosure. FIG.

The nitride semiconductor stack according to this embodiment will be described below through embodiments, but the following embodiments do not limit the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

1. First Embodiment Hereinafter, a nitride semiconductor stack 1 according to a first embodiment will be described with reference to FIG.
The nitride semiconductor laminate 1 is a semiconductor element capable of emitting ultraviolet light.

(1.1) Configuration of the nitride semiconductor laminate The nitride semiconductor laminate 1 according to the first embodiment will be described with reference to Fig. 1. The nitride semiconductor laminate 1 comprises an Al-containing nitride semiconductor substrate (hereinafter referred to as substrate) 11, and an Al _x Ga _(1-x) N layer 12 formed of Al _x Ga (1 _-x ) N (0 < x < 0.2) disposed on the substrate 11, and the coverage of the Al _x Ga _(1-x) N layer with respect to the layer directly below is 80% or more and 100% or less. Such a nitride semiconductor laminate 1 is formed by forming the Al x Ga (1-x) N layer 12 formed of Al _{x Ga (1-x)} N (0 < x < 0.2) by metal organic chemical vapor deposition at a growth rate of 0.7 µm/hr or more on the Al-containing substrate 11 at a temperature of _{650°C or} more and less than 1000°C.
Each layer will be described in detail below.

(substrate)
The substrate 11 includes a nitride semiconductor containing Al. The nitride semiconductor containing Al is, for example, AlN. The nitride semiconductor containing Al is not limited to AlN, and may be, for example, AlGaN. For example, when the substrate 11 is a nitride semiconductor single crystal substrate such as AlN or AlGaN, the difference in lattice constant with the nitride semiconductor layer formed on the upper side of the substrate 11 becomes small, and the nitride semiconductor layer is grown in a lattice-matched system, thereby reducing threading dislocations.

The term "comprises" in the expression "substrate 11...comprises a nitride semiconductor" means that the layer mainly contains a nitride semiconductor, but this expression also includes cases where other elements are included. Specifically, this expression also includes cases where the composition of this layer is slightly changed by adding small amounts of other elements (for example, elements such as Ga (when Ga is not the main element), In, As, P, or Sb, at a few percent or less). In expressions regarding the composition of other layers, the wording "comprises" has a similar meaning. Furthermore, the small amounts of elements contained are not limited to those described above.

The substrate 11 may be doped with a donor impurity or an acceptor impurity to be n-type or p-type, or may be a mixed crystal of a nitride semiconductor such as AlN and sapphire ( _Al2O3 ), Si, _SiC , MgO, _Ga2O3 , ZnO, GaN, or _InN .

As an example, the substrate 11 preferably has a film thickness of 100 μm or more and 600 μm or less.
The plane orientation may be c-plane (0001), a-plane (11-20), m-plane (10-10), etc., with the c-plane substrate being more preferred.

(Al _x Ga _(1-x) N layer)
The Al _x Ga _(1-x) N layer 12 is a nitride semiconductor layer formed of Al _x Ga _(1-x) N (0≦x≦0.2), that is, Al _x Ga _(1-x) N with an Al composition of 0% to 20%. The Al _x Ga (1-x ₎ N layer 12 is formed on a substrate 11. Here, for example, the word "on _" in the expression "the Al _x Ga _(1-x) N layer 12 is formed on a substrate 11" means that the Al _x Ga ( _1-x) N layer 12 is formed on the substrate 11. The above expression also includes the case where another layer is further present between the substrate 11 and the Al x Ga _(1-x) N layer 12. The word "on" has the same meaning in the relationship between other layers. For example, the case where a buffer layer is formed between the substrate 11 and the Al _x Ga.sub _.(1-x) N layer 12 is also included in the expression "formed on the substrate 11."

Consider the case where Al _x Ga _(1-x) N is grown on a substrate containing Al (for example, an AlN substrate). Both AlN and Al _x Ga _(1-x) N have spontaneous polarization, which is polarized in the c-axis direction. When layers with different polarizations are stacked, a charge is generated at the interface that corresponds to the difference in polarization. In addition, piezoelectric polarization is also generated due to lattice distortion. This piezoelectric polarization and spontaneous polarization induce carriers in the semiconductor layer, and a highly concentrated sheet-like two-dimensional carrier layer is formed at the interface.

For example, when GaN (Al _x Ga _(1-x) N with 0% Al composition) is formed on AlN, a two-dimensional hole gas is formed at the interface between AlN and GaN. Also, when an Al _0.2 Ga _0.8 N layer is laminated on GaN as an electron barrier layer, a two-dimensional electron gas (2DEG) is formed at the interface between GaN and Al _0.2 Ga _0.8 N.
The two-dimensional carrier gas has high saturated electron mobility, and therefore high frequency characteristics can be obtained. In addition, a power device can be obtained that combines low on-resistance due to high electron mobility and high withstand voltage characteristics due to a wide band gap. Here, the on-resistance is determined by the electron mobility of the two-dimensional carrier gas and the concentration of the two-dimensional carrier gas. A lower sheet resistance, which includes both the above-mentioned parameters of electron mobility and concentration, is advantageous for reducing the on-resistance. In addition, the withstand voltage is determined by the band gap of the nitride semiconductor that constitutes the HEMT.

The generation of such a two-dimensional carrier gas is affected by polarization, i.e., distortion. To form this 2DEG with higher concentration and higher electron mobility, it is necessary to consider the effect of alloy scattering. If the Al composition x in the Al _x Ga _(1-x) N layer 12 is too high, the electron mobility is significantly reduced by alloy scattering.

The Al _x Ga _(1-x) N layer 12 is a layer of a nitride semiconductor containing Al and Ga or Ga, and may be, for example, AlGaN or GaN. From the viewpoint of alloy scattering, the Al _x Ga _(1-x) N layer is preferably Al _x Ga _(1-x) N (0≦x≦0.2). When the nitride semiconductor laminate 1 is used in a power device, it is more preferably GaN (x=0) from the viewpoint of achieving both 2DEG concentration and electron mobility.
A buffer layer for reducing lattice mismatch may be provided between the substrate 11 and the Al _x Ga _(1-x) N layer 12. However, from the viewpoint of increasing the concentration of 2DEG, it is preferable that no buffer layer is provided at the interface between the substrate 11 and the Al _x Ga _(1-x) N layer 12. Here, the buffer layer may be, for example, a compositionally graded layer in which the Al composition decreases in the direction away from the substrate 11.

In order to increase the concentration of the 2DEG, the abruptness of the interface is important, and from that viewpoint, the thickness of the Al _x Ga.sub. _(1-x) N layer 12 is preferably 0.5 nm or more and 30 nm or less.
The relaxation rate of the Al _x Ga _(1-x) N layer 12 in a region of 0.5 nm to 5 nm from the substrate 11 side is preferably 0% to 50%. If the Al _x Ga _(1-x) N layer 12 is distorted by 5 nm or more from the substrate 11 side, the crystal quality is impaired. For this reason, the relaxation rate of the Al _x Ga _(1-x) N layer 12 in a region of more than 5 nm to 30 nm from the substrate 11 side is preferably 50% to 100% with respect to the substrate 11.

From the viewpoint of distorting the Al _x Ga.sub.(1- _{x) N layer 12 from its original lattice constant, the in-plane lattice constant in the a-axis direction in a region of the Al x Ga.sub.(1- x) N} layer 12 that is 0.5 nm or more and 5 nm or less from the substrate 11 side is distorted by 0.5% to 2.5%, and more preferably by 1.0% to 2.5%, with respect to the lattice constant of the substrate 11.
However, the crystal quality is impaired when the Al _x Ga _(1-x) N layer 12 is distorted by 5 nm or more from the substrate 11 side. For this reason, it is preferable that the in-plane lattice constant in the a-axis direction in a region of the Al _x Ga _(1-x) N layer 12 that is more than 5 nm and not more than 30 nm from the substrate 11 side is distorted by 0% or more and 1% or less with respect to the lattice constant of the substrate 11.

Similarly, from the viewpoint of distorting the Al _x Ga _(1-x) N layer 12 from its original lattice constant, it is preferable that there are no misfit dislocations or stacking faults in a region of the Al _x Ga _(1-x) N layer 12 that is 0.5 nm or more and 5 nm or less from the substrate 11 side. Here, in this disclosure, "there are no misfit dislocations or stacking faults" means that the dislocation density measured by the method described later is less than 1×10 ⁴ cm ^-3 . Furthermore, "misfit dislocations" and "stacking faults" will be described in detail later.
However, as described above, when the Al _x Ga _(1-x) N layer 12 is distorted by 5 nm or more, the quality of the crystal is impaired. For this reason, it is preferable that misfit dislocations or stacking faults are present in a region of the Al _x Ga _(1-x) N layer 12 that is more than 5 nm and not more than 30 nm from the substrate 11 side. Here, in the present disclosure, "misfit dislocations or stacking faults are present" means that the dislocation density measured by the method described below is 1×10 ⁴ cm ^-3 or more.
The 2DEG has high mobility, and thus a power device using the nitride semiconductor laminate 1 can obtain high frequency characteristics. For this reason, high-quality crystallinity and interface sharpness are desired in the nitride semiconductor laminate 1.

From the viewpoint of increasing the electron mobility of the 2DEG, the coverage of the Al _x Ga.sub. _(1-x) N layer 12 with respect to the layer immediately below is 80% or more and 100% or less.
From the viewpoint of high crystal quality, the dislocation density contained in the Al _x Ga.sub. _(1-x) N layer 12 is preferably ^{1.times.10.sup.4} cm.sup. ^-3 or less.
From the viewpoint of interface sharpness, the surface squared roughness of the Al _x Ga _(1-x) N layer 12 surface is preferably 0.9 nm or less. Here, the surface squared roughness of the Al _x Ga _(1-x) N layer 12 surface is the surface squared roughness of the Al _x Ga _(1-x) N layer 12 on the side opposite to the substrate 11.
This realizes a 2DEG with high concentration and high electron mobility.

The Al _x Ga.sub. _(1-x) N layer 12 may contain impurities such as group V elements other than N, such as P, As, and Sb, and impurities such as C, H, F, O, Be, Mg, Zn, and Si, but the types of impurity elements are not limited to these.

(1.2) Modifications of Nitride Semiconductor Laminate (1.2.1) First Example of Modification The above-mentioned nitride semiconductor laminate 1 may be a light emitting device in which the Al _x Ga _(1-x) N layer 12 is used as a p-type semiconductor layer of the light emitting device. For example, as shown in FIG. 2, the nitride semiconductor laminate 1A includes a light emitting layer 14 provided between a substrate 11 and the Al _x Ga _(1-x) N layer 12. That is, the nitride semiconductor laminate 1A as a light emitting device is configured by sequentially stacking, for example, the substrate 11, the n-type semiconductor layer 13, the light emitting layer 14 including a nitride semiconductor active layer, and the Al _x Ga _(1-x) N layer 12 as a p-type semiconductor layer. In this case, the Al _x Ga _(1-x) N layer 12 is formed of, for example, p-type GaN (x=0). Furthermore, in the nitride semiconductor stack 1A, the Al _x Ga.sub _.(1-x) N layer 12 may be grown on an electron blocking layer (not shown) made of, for example, AlN, AlGaN, etc. In this case, the electron blocking layer is provided between the light emitting layer 14 and the Al _x Ga.sub. _(1-x) N layer 12.
When the Al _x Ga _(1-x) N layer 12 is used as a p-type semiconductor layer, it is preferable that the Al _x Ga _(1-x) N layer 12 contains Mg, Zn or Be as dopant atoms. The concentration of the dopant atoms (p-type doping concentration) is preferably 1×10 ¹⁸ cm ^-3 or more and 5×10 ¹⁹ cm ^-3 or less from the viewpoint of achieving both crystal quality and carrier concentration.

(1.2.2) Second Example of Modification The nitride semiconductor stack 1 described above may further include an AlN layer 15 provided between the substrate 11 and the Al _x Ga.sub _.(1-x) N layer 12, or an electron barrier layer 17 provided on the Al _x Ga.sub. _(1-x) N layer 12.
The AlN layer 15, the compositionally graded layer 16 which is an example of a buffer layer, and the electron barrier layer 17 will be described in detail below with reference to FIG.

(Electron Barrier Layer)
The nitride semiconductor laminate 1B may include an electron barrier layer 17 on the Al _x Ga.sub.( _1-x) N layer 12. The electron barrier layer 17 is a layer provided for forming a two-dimensional electron gas (2DEG) at the interface with the Al _x Ga.sub. _(1-x) N layer 12, for example.
The electron barrier layer 17 is a layer of a nitride semiconductor containing Al and Ga or Ga. From the viewpoint of lattice matching with the Al _x Ga _(1-x) N layer 12, the electron barrier layer 17 is preferably an Al _y Ga _(1-y) N layer formed of Al _y Ga ( _1-y) N (0≦y≦1). The electron barrier layer 17 may also contain impurities such as Group III atoms other than Al and Ga, such as In, Group V elements other than N, such as P, As, Sb, and C, H, F, O, Be, Mg, Zn, Si, etc., but the types of impurity elements are not limited thereto.

A two-dimensional carrier layer is formed at the interface between the electron barrier layer 17 and the Al _x Ga _(1-x) N layer 12, similar to the interface between the substrate 11 and the Al _x Ga _(1-x) N layer 12. For this reason, it is preferable that the Al composition x in the Al _x Ga _(1-x) N layer 12 and the Al composition y in the electron barrier layer 17 are different (i.e., x ≠ y).

From the viewpoint of two-dimensional electron gas formation, it is preferable that the Al composition x in the Al _x Ga _(1-x) N layer 12 is smaller than the Al composition y in the electron barrier layer 17 (x<y). If the difference between the Al compositions x and y in each layer is too large, cracks may occur in the Al _x Ga _(1-x) N layer 12 and the electron barrier layer 17. For this reason, it is preferable that the difference between the Al composition x in the Al _x Ga (1-x) N layer 12 and the Al composition y in the electron barrier layer 17 is 0.5 or less. It is preferable that the Al composition x in the Al _{x Ga (1-x)} N layer 12 is 0≦x≦0.2, and it is more preferable that the Al composition y in the electron barrier layer 17 is 0.2<y≦0.5.

(Compositionally graded layer)
The compositionally graded layer 16, which is an example of the buffer layer described above, may be provided between the substrate 11 and the Al _x Ga.sub _.(1-x) N layer 12. However, from the viewpoint of increasing the concentration of the 2DEG, it is preferable that the compositionally graded layer 16 is not provided.
When the composition gradient layer 16 is provided, the composition gradient layer 16 is formed of Al _z Ga _(1-z) N (0≦z≦1.0), and the Al composition z changes in the direction away from the substrate 11. It is preferable that the Al composition z of the composition gradient layer 16 decreases in the direction away from the substrate 11.

The profile (gradient) of the Al composition z in the composition gradient layer 16 may change continuously or intermittently. Here, "intermittently changing" means that the composition gradient layer 16 includes a portion in which the Al composition z is the same. In other words, the composition gradient layer 16 may include a portion in which the Al composition z does not change in the direction away from the substrate 11.

The compositionally graded layer 16 may be in contact with the substrate 11, or another layer may be present between the compositionally graded layer 16 and the substrate 11. The compositionally graded layer 16 may be in contact with the Al _x Ga _(1-x) N layer 12, or another layer may be present between the compositionally graded layer 16 and the Al _x Ga _(1-x) N layer 12.

(AlN layer)
The AlN layer 15 is an example of an underlayer, and is formed on the entire surface of the substrate 11. That is, the AlN layer 15 is provided between the substrate 11 and the Al _x Ga.sub. _(1-x) N layer 12.
The AlN layer 15 can recover pits and polishing marks formed on the surface of the substrate. In addition, the difference in lattice constant and thermal expansion coefficient between the AlN layer 15 and the Al _x Ga _(1-x) N layer 12 is small, and a nitride semiconductor layer with few defects can be grown on the AlN layer 15. In addition, the AlN layer 15 can grow the Al _x Ga _(1-x) N layer 12 under compressive stress, and can suppress the occurrence of cracks in the Al _x Ga _(1-x) N layer 12. Therefore, even if the substrate 11 is formed of a nitride semiconductor such as AlN or AlGaN, a nitride semiconductor layer with few defects can be grown above the substrate 11 via the AlN layer 15.

The AlN layer 15 may contain impurities such as C, B, O, H, Si, Fe, and Mg.
When AlN is used as the material for forming the substrate 11, the AlN layer 15 and the substrate 11 are made of the same material, and therefore the boundary between the AlN layer 15 and the substrate 11 becomes unclear. When the substrate 11 is made of AlN, the substrate 11 may be regarded as constituting the substrate 11 and the AlN layer 15.

The AlN layer 15 has a thickness of, for example, several μm. Specifically, the thickness of the AlN layer 15 is preferably greater than 10 nm and less than 1 μm. If the thickness of the AlN layer 15 is greater than 10 nm, the recovery of the substrate surface advances and the crystallinity of the AlN increases. In addition, from the viewpoint of raw material costs, it is preferable that the thickness of the AlN layer 15 is less than 1 μm.

(1.3) Manufacturing Method of Nitride Semiconductor Stack The nitride semiconductor stack 1 of this embodiment is manufactured through a process of forming an Al _x Ga.sub. _(1-x) N layer 12 made of Al _x Ga.sub. _(1-x) N (0≦x≦0.2) on a substrate 11.
The substrate 11 is formed by a general substrate growth method such as a vapor phase growth method, such as a sublimation method or a hydride vapor phase epitaxy (HVPE) method, or a liquid phase growth method.

The step of forming the _{Al.sub.xGa.sub} . _(1-x) N layer 12 on the substrate 11 can be performed by metal organic chemical vapor deposition (MOCVD).
Here, the Al _x Ga _(1-x) N layer 12 formed on the substrate 11 can be formed using, for example, an Al source containing trimethylaluminum (TMAl), a Ga source containing, for example, trimethylgallium (TMGa) or triethylgallium (TEGa), or an N source containing, for example, ammonia (NH ₃ ).

The Al _x Ga _(1-x) N layer 12 _is formed by metal organic chemical vapor deposition at a growth rate of 0.7 μm/hr or more on the Al _{-containing substrate 11 at a temperature of 650° C. or more and less than 1000° C., and other conditions are not particularly limited. The growth rate of the Al x Ga (1-x) N layer} 12 is more preferably less than 2 μm/hr.
The sheet resistance is reduced and the electron mobility is improved by setting the growth rate of Al _x Ga _(1-x) N at 0.7 μm/hr or more during the formation of the Al _x Ga _(1-x) N layer 12. The growth rate of the _{Al x} Ga _(1-x) N layer 12 can be controlled to 0.7 μm/hr or more by appropriately adjusting the temperature of the substrate 11, the vacuum degree of the chamber, and the flow rate of the source gas, which will be described later.

At this time, from the viewpoint of improving the sheet resistance and electron mobility of the nitride semiconductor laminate 1, the temperature of the substrate 11 during the formation of the Al _x Ga.sub. _(1-x) N layer 12 is preferably 700.degree. C. or higher and 950.degree. C. or lower, and more preferably 750.degree. C. or higher and 950.degree. C. or lower.
From the viewpoint of removing impurities, it may be preferable to anneal the substrate 11 in a hydrogen atmosphere at 1000° C. or higher, preferably 1200° C. or higher.

From the viewpoint of improving the sheet resistance and electron mobility, the degree of vacuum in the chamber during the formation of the Al _x Ga.sub. _(1-x) N layer 12 is preferably 30 mbar or more and 200 mbar or less, and more preferably 30 mbar or more and 100 mbar or less.

(1.4) Method for Measuring Physical Properties, etc. of Nitride Semiconductor Stack The physical properties, etc. of the nitride semiconductor stack 1 described above can be measured as follows.
(Measurement of coverage of Al _x Ga _(1-x) N layer)
The coverage of the Al _x Ga _(1-x) N layer 12 is measured using, for example, a scanning electron microscope (FE-SEM "SU9000" manufactured by Hitachi High-Technologies Corporation) and image processing software (image analysis software "A-zo-kun" (registered trademark) manufactured by Asahi Kasei Engineering Co., Ltd.). More specifically, during SEM measurement, the exposed surface of the Al _x Ga _(1-x) N layer 12 is measured at three arbitrary points within a measurement range of 50 μm × 50 μm. At this time, a backscattered electron image is obtained by the lower detector, and an SEM image in which the contrast due to composition differences is clearly shown is obtained.

The obtained SEM image is processed using image processing software. Areas whose brightness is 50% or more lower than the average brightness in the SEM image are defined as areas where the Al _x Ga _(1-x) N layer 12 is not covered with the substrate 11, which is the layer directly below. The coverage is defined as the ratio of the covered area, and the average value of any three points is defined as the coverage of the Al _x Ga _(1-x) N layer 12.

The surface roughness is measured using an atomic force microscope (AFM) (Seiko Instruments, "SPA400"). The same location as in the coverage measurement is measured by the AFM at three arbitrary points within a measurement range of 4 μm×4 μm. The scan frequency is 0.2 Hz. The average value of the root mean square roughness obtained by the measurement at three points is defined as the surface roughness of the Al _x Ga _(1-x) N layer 12.

(Measurement of doping atom concentration in Al _x Ga _(1-x) N layer)
The concentration of the dopant or impurity contained in the Al _x Ga.sub. _(1-x) N layer 12 can be measured by secondary ion mass spectrometry (SIMS).
When the concentration of dopants and impurities contained in the Al _x Ga _(1-x) N layer 12 is measured by SIMS after processing into a device, the measurement can be performed in a state where the electrodes are removed by chemical etching or physical polishing. The concentration of dopants and impurities contained in the Al _x Ga _(1-x) N layer 12 can also be measured by sputtering from the substrate 11 side where no electrodes are formed.
Specifically, the SIMS measurement is performed under the measurement conditions provided by Evans Analytical Group (EAG), Inc. A cesium (Cs) ion beam having an energy of 14.5 keV is used for sputtering the sample during the measurement.

(Method of measuring Al _x Ga _(1-x) N layer thickness and threading dislocations)
The thickness of the Al _x Ga _(1-x) N layer 12 can be measured by cutting out a predetermined cross section perpendicular to the substrate 11, observing this cross section with a transmission electron microscope (TEM), and using the length measurement function of the TEM. For the TEM measurement, for example, a transmission electron microscope "HD-2300" manufactured by Hitachi High-Technologies Corporation is used.
As a measurement method, first, a cross section perpendicular to the main surface of the substrate 11 of the nitride semiconductor laminate is observed using a TEM. As an example, measurement on the a-plane (11-20) is preferable. Specifically, for example, in a TEM image showing a cross section perpendicular to the main surface of the substrate 11 of the nitride semiconductor laminate 1, the observation width is set to a range of 2 μm or more in a direction parallel to the main surface of the substrate 11. Since contrast is observed at the interface between two layers with different compositions within this observation width range, the thickness up to this interface is observed in a continuous observation region with a width of 200 nm. The average value of the thickness of each layer included in this 200 nm wide observation region is calculated from five points arbitrarily extracted from the above-mentioned observation width of 2 μm or more, and the film thickness of each layer can be obtained.

Similarly, for threading dislocations, the number of threading dislocations per volume is calculated from the number of threading dislocations present in a cross section perpendicular to the main surface of the substrate 11, the field of view area, and the thickness of the sample. The number of threading dislocations is calculated from five samples, and the average value of these is taken as the number of threading dislocations.

(Measurement of strain, misfit dislocations and stacking faults in nitride semiconductor layers)
The atomic arrangement of each layer constituting the nitride semiconductor laminate 1 can be measured by high-resolution TEM measurement. The high-resolution TEM measurement is performed on the sample exfoliated to 50 nm in the above-mentioned TEM measurement using an atomic resolution analytical electron microscope (acceleration voltage: 200 kV). For example, an atomic resolution analytical electron microscope "JEM-ARM200F" manufactured by JEOL Ltd. is used for the high-resolution TEM measurement.

At this time, the group III atoms and nitrogen atoms are stacked alternately, and if it is observed that the group III atoms are arranged vertically (i.e., there is no misalignment), it can be determined that the atomic arrangement of each layer is lattice-matched.

The presence of misfit dislocations and stacking faults can be confirmed from this atomic arrangement. When the vertical arrangement of group III atoms has a location where, for example, one atom is skipped, this is considered to be a misfit dislocation. When two layers of group III atoms that are aligned horizontally without any misalignment are gathered into one layer, this is considered to be a stacking fault. The dislocation density is calculated from the volume obtained from the film thickness and sample thickness, and the number of misfit dislocations and stacking faults.

Next, the distance between adjacent group III atoms in the horizontal direction of the TEM image is measured. The distance between adjacent atoms is measured by measuring the center-to-center distance of the atomic contrast. This distance between adjacent atoms is measured in the vertical direction in the Al _x Ga _{(1-x) N layer 12. The measurement is performed at a location at any film thickness to be measured in the Al x Ga (1-x) N layer} 12. From the measured interatomic distance, the strain rate can be obtained using equation (1).

Lattice distortion rate [%] = [(a1-a2)/a1] x 100 ... formula (1)
Here, a1 in the formula is the original lattice constant in the in-plane a-axis direction of the Al _x Ga.sub. _(1-x) N layer 12, and a2 is the lattice constant of the Al _x Ga.sub. _(1-x) N layer 12 after being strained to match the lattice constant of the substrate 11.
The lattice distortion rate obtained by the formula (1) is measured at any three points in the image, and the average value of these is taken as the lattice distortion rate.

Here, the original lattice constant a1 is the lattice constant in the a-axis direction of 3.18 Å when the Al _x Ga _(1-x) N layer 12 is GaN, and is the lattice constant in the a-axis direction at Al composition x when the Al _x Ga (1-x ₎ N layer 12 is Al _x Ga _(1-x) N (0<x≦0.2). The lattice constant in the a-axis direction at Al composition x is calculated by Bowing's law using the lattice constant in the a-axis direction of AlN of 3.11 Å and the lattice constant in the a-axis direction of GaN of 3.18 Å, and is calculated by the following formula (2).

Axis lattice constant for Al composition x [Å] = 3.18 x (1-x) + 3.11 x x ... formula (2)

(Method of measuring Al composition and relaxation rate of Al _x Ga _(1-x) N layer)
The relaxation rate can be measured, for example, by performing reciprocal space mapping (RSM) using the X-ray diffraction (XRD) method. For the XRD measurement, for example, "X'pert3 MRD" manufactured by PANalytical is used. In this case, the tube is set at 45 kV/40 mA, a parallelized radiation source is used using two crystal Ge (220), the incident Soller slit is set to 0.04°, and the detector slit is set to 1/16 mm, and the axis is aligned with respect to the (20-24) plane peak of the substrate 11. Thereafter, a 2θ/ω scan is measured, and the 2θ/ω scan is repeated while changing ω at 0.05° intervals within the range of ±1.5°. From such a measurement, the spatial coordinates Qx and Qy are calculated, and the relaxation rate and Al composition for the substrate 11 are calculated.

(1.5) Effects of First Embodiment The nitride semiconductor stack according to the first embodiment has the following effects.
(1) The nitride semiconductor laminate 1 includes a nitride semiconductor substrate containing Al, and an Al _x Ga.sub. _{(1 -x)N layer formed of Al.sub.xGa.sub.(1-x)} N (0.ltoreq.x.ltoreq.0.2) disposed on the nitride _{semiconductor} substrate.
This reduces the effect of alloy scattering of Al _x Ga _(1-x) N constituting the Al _x Ga _(1-x) N layer, suppresses the decrease in the electron mobility of the two-dimensional carrier gas, and provides a low on-resistance, while also providing a high breakdown voltage equivalent to that of a nitride semiconductor containing Al.
(2) In the nitride semiconductor laminate 1, the coverage of the Al _x Ga.sub. _(1-x) N layer with respect to the layer immediately below is 80% or more and 100% or less.
This makes it possible to increase the electron mobility in the 2DEG and obtain a lower on-resistance.

(3) In the nitride semiconductor laminate 1, the nitride semiconductor substrate is preferably an AlN single crystal substrate.
This reduces threading dislocations in the nitride semiconductor layer formed on the upper side of the substrate 11, resulting in a high-quality crystal, and thus making it possible to obtain a nitride semiconductor laminate 1 suitable for use in power devices.
(4) In the nitride semiconductor laminate 1, the thickness of the Al _x Ga.sub. _(1-x) N layer is preferably 0.5 nm or more and 30 nm or less.
This distorts the lattice constant of the Al _x Ga.sub. _(1-x) N layer 12 from its original lattice constant to increase the concentration of the 2DEG, thereby making it possible to obtain a lower on-resistance.

(5) In the nitride semiconductor laminate 1, the relaxation rate in a region of the Al _x Ga _(1-x) N layer 12 that is 0.5 nm or more and 5 nm or less from the substrate 11 side is preferably 0% or more and 50% or less with respect to the substrate 11. Also, the relaxation rate in a region of the Al _x Ga _(1-x) N layer 12 that is more than 5 nm and is 30 nm or less from the substrate 11 side is preferably 50% or more and 100% or less with respect to the substrate 11.
This allows the concentration of the 2DEG to be increased and a lower on-resistance to be obtained.
(6) In the nitride semiconductor laminate 1, the Al _x Ga.sub. _(1-x) N layer preferably has a threading dislocation density of ^{1.times.10.sup.4} cm.sup. ^-3 or less.
This results in a high-quality crystal, and makes it possible to obtain the nitride semiconductor laminate 1 suitable for power devices.

(7) In the nitride semiconductor laminate 1, it is preferable that there are no misfit dislocations or stacking faults in a region of the Al _x Ga.sub. _(1-x) N layer that is 0.5 nm or more and 5 nm or less from the nitride semiconductor substrate side.
This results in a high-quality crystal, and makes it possible to obtain the nitride semiconductor laminate 1 suitable for power devices.
(8) In the nitride semiconductor laminate 1, misfit dislocations or stacking faults preferably exist in a region of the Al _x Ga.sub. _(1-x) N layer that is more than 5 nm and not more than 30 nm from the nitride semiconductor substrate side.
This prevents the Al _x Ga.sub. _(1-x) N layer 12 from being distorted by 5 nm or more, and suppresses damage to the crystal quality.

(9) In the nitride semiconductor laminate 1, the surface root mean square roughness of the Al _x Ga.sub. _(1-x) N layer is preferably 0.9 nm or less.
This makes it possible to improve the abruptness of the interface between the Al _x Ga.sub. _(1-x) N layer and the electron barrier layer, thereby suppressing damage to the crystal quality.
(10) In the nitride semiconductor laminate 1, it is preferable that the in-plane lattice constant in the a-axis direction in a region of the Al _x Ga.sub. _(1-x) N layer that is 0.5 nm or more and 5 nm or less from the nitride semiconductor substrate side is distorted by 0.5% or more and 2.5% or less with respect to the lattice constant of the nitride semiconductor substrate.
This makes it possible to distort the Al _x Ga.sub. _(1-x) N layer from its original lattice constant and increase the concentration of the 2DEG.

(11 ₎ In the nitride semiconductor laminate 1, it is preferable that the in-plane lattice constant in the a-axis direction in a region more than 5 nm and not more than 30 nm from the nitride semiconductor substrate side in the Al _x Ga.sub.(1-x)N layer is distorted by 0% or more and 1% or less with respect to the lattice constant of the nitride semiconductor substrate.
This prevents the Al _x Ga.sub. _(1-x) N layer 12 from being distorted by 5 nm or more, and suppresses damage to the crystal quality.
(12) In the nitride semiconductor laminate 1, the Al _x Ga.sub. _(1-x) N layer preferably contains Mg, Zn or Be as a dopant atom at a concentration of ^{1.times.10.sup.18} cm.sup. ^-3 or more and ^{5.times.10.sup.19} cm.sup. ^-3 or less.
This makes it possible to obtain a nitride semiconductor laminate 1 that achieves both crystal quality and carrier concentration and is suitable for power devices.

(13) In the nitride semiconductor laminate 1, the Al _x Ga.sub. _(1-x) N layer is preferably made of GaN.
This makes it possible to obtain a device that has both a high 2DEG concentration and high electron mobility, and has a lower on-resistance and a higher breakdown voltage.
(14) In the nitride semiconductor laminate 1, it is preferable that no compositionally graded layer in which the Al composition decreases in the thickness direction of the substrate is provided between the nitride semiconductor substrate and the Al _x Ga.sub. _(1-x) N layer.
This makes it possible to increase the concentration of 2DEG.
(15) The nitride semiconductor stack 1 preferably further includes a light emitting layer provided between the substrate 11 and the Al _x Ga.sub. _(1-x) N layer 12, and the p-type doping concentration of the Al _x Ga.sub. _(1-x) N layer 12 is preferably ^{1.times.10.sup.18} cm.sup. ^-3 or more and ^{5.times.10.sup.19} cm.sup. ^-3 or less.
This makes it possible for the nitride semiconductor stack 1 to be used as a light emitting device.

(16) In a method for producing a nitride semiconductor laminate 1, an Al x Ga (1-x) N layer made of Al _x Ga _(1-x) N (0≦x≦0.2) is formed on an Al-containing nitride semiconductor substrate at a temperature of 650° C. or higher and lower than 1000° C. by metal _- organic chemical vapor deposition at a growth rate of 0.7 _μm/ hr or higher.
This makes it possible to reduce the sheet resistance and improve the electron mobility.

(17) It is preferable that the temperature of the surface of the nitride semiconductor substrate is set to 750° C. or higher and 950° C. or lower.
This makes it possible to improve the sheet resistance and electron mobility of the nitride semiconductor stack 1 .
(18) The degree of vacuum during the formation of the Al _x Ga.sub _.(1-x) N layer is preferably set to 30 mbar or more and 150 mbar or less.
This makes it possible to improve the sheet resistance and the electron mobility.

[Example 1]
Annealing was performed on a c-plane AlN single crystal substrate having a thickness of 550 μm using a metal organic chemical vapor deposition (MOCVD) apparatus. The annealing was performed in two sets of annealing at 1300° C., each set consisting of annealing for 5 minutes in an NH ₃ atmosphere and annealing for 5 minutes in an H ₂ atmosphere.

Next, an AlN layer, which is a homoepitaxial layer, was formed on the AlN single crystal substrate. The AlN layer was formed to a thickness of 500 nm in an environment at 1200° C. At this time, the ratio (V/III ratio) of the supply rate of the group III element source gas to the supply rate of the nitrogen source gas was set to 50. The degree of vacuum of the chamber was set to 50 mbar. The growth rate of the AlN layer was set to 0.5 μm/hr. Trimethylaluminum (TMAl) was used as the Al source. Ammonia (NH ₃ ) was used as the N source.

An Al _x Ga _{(1 -x)} N layer was formed on the above-mentioned substrate. The Al _x Ga (1-x) N layer was formed of GaN (i.e., x=0) with a thickness of 10 nm. The Al _x Ga _(1-x) N layer was formed under the conditions of a growth temperature (substrate temperature) of 700° C., a chamber vacuum of 50 mbar, and a V/III ratio of 1850. The growth rate of GaN was 1 μm/hr.
In this manner, a nitride semiconductor laminate was formed on the AlN substrate.

When the Al _x Ga _(1-x) N layer formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 3.0 nm. The relaxation rate of the Al _x Ga _{(1-x) N layer with respect to the AlN substrate was 90% as measured by XRD reciprocal lattice mapping measurement performed on the (20-24} ) plane. The threading dislocation density observed by cross-sectional TEM measurement was 1×10 ⁸ cm ⁻³ .

When a region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in a region less than 2 nm from the interface was 2.2%. On the other hand, when a region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in a region 5 nm or more and less than 10 nm from the interface was 0%.

Subsequently, an electron barrier layer was formed on the Al _x Ga _(1-x) N layer by growing Al _0.25 Ga _0.75 N (i.e., y=0.25) to a thickness of 20 nm. The electron barrier layer was formed at a growth temperature of 700° C., with a chamber vacuum of 50 mbar and a V/III ratio of 1850.

The obtained laminate was cleaved into a 15 cm square, and alloy electrodes (corresponding to n-type electrodes) containing Ti, Al, Ni, and Au were formed at the four corners to obtain a nitride semiconductor laminate. The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was 10 kΩ/cm ² and the electron mobility was 130 cm ² /Vs.

[Example 2]
A nitride semiconductor laminate was formed in the same manner as in Example 1, except that the growth temperature for the Al _x Ga.sub. _(1-x) N layer and the electron barrier layer was set to 750.degree.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.7 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 80%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 1.5 kΩ/cm ² and the electron mobility was found to be 600 cm ² /Vs.

[Example 3]
A nitride semiconductor laminate was formed in the same manner as in Example 1, except that the growth temperature of the Al _x Ga.sub _.(1-x) N layer and the electron barrier layer was set to 800.degree.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.6 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 70%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 1.0 kΩ/cm ² and the electron mobility was found to be 900 cm ² /Vs.

[Example 4]
A nitride semiconductor laminate was formed in the same manner as in Example 1, except that the growth temperature for the Al _x Ga.sub. _(1-x) N layer and the electron barrier layer was set to 850.degree.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.8 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 65%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 0.8 kΩ/cm ² and the electron mobility was found to be 1100 cm ² /Vs.

[Example 5]
A nitride semiconductor laminate was formed in the same manner as in Example 1, except that the growth temperature of the Al _x Ga.sub _.(1-x) N layer and the electron barrier layer was set to 900.degree.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.5 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 55%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 0.5 kΩ/cm ² and the electron mobility was found to be 1350 cm ² /Vs.

[Example 6]
A nitride semiconductor laminate was formed in the same manner as in Example 1, except that the growth temperature for the Al _x Ga.sub. _(1-x) N layer and the electron barrier layer was set to 950.degree.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.8 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 60%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 0.7 kΩ/cm ² and the electron mobility was found to be 1200 cm ² /Vs.

[Example 7]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the growth rate of the Al _x Ga.sub _.(1-x) N layer was set to 2 μm/hr.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 1.2 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 70%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 5 kΩ/cm ² and the electron mobility was found to be 330 cm ² /Vs.

[Example 8]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the degree of vacuum in the chamber for the Al _x Ga.sub. _(1-x) N layer was set to 30 mbar.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.5 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 75%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 0.5 kΩ/cm ² and the electron mobility was found to be 1300 cm ² /Vs.

[Example 9]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the degree of vacuum in the chamber for the Al _x Ga.sub. _(1-x) N layer was set to 100 mbar.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.6 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 75%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 0.6 kΩ/cm ² and the electron mobility was found to be 1250 cm ² /Vs.

[Example 10]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the degree of vacuum in the chamber for the Al _x Ga.sub. _(1-x) N layer was set to 150 mbar.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 95%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.5 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 70%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 0.6 kΩ/cm ² and the electron mobility was found to be 1250 cm ² /Vs.

[Example 11]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the degree of vacuum in the chamber for the Al _x Ga.sub. _(1-x) N layer was set to 200 mbar.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 85%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 1.6 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 75%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 3.0 kΩ/cm ² and the electron mobility was found to be 510 cm ² /Vs.

[Example 12]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the Al _x Ga _(1-x) N layer was formed of Al _0.1 Ga _0.9 N (that is, x=0.1) and the electron barrier layer was formed of Al _0.35 Ga _0.65 N (that is, y=0.35).

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.5 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 55%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 2.0 kΩ/cm ² and the electron mobility was found to be 900 cm ² /Vs.

[Example 13]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the Al _x Ga _(1-x) N layer was formed of Al _0.15 Ga _0.85 N (that is, x=0.15) and the electron barrier layer was formed of Al _0.4 Ga _0.6 N (that is, y=0.4).

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.5 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 55%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 3.0 kΩ/cm ² and the electron mobility was found to be 670 cm ² /Vs.

[Example 14]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the thickness of the Al _x Ga.sub. _(1-x) N layer was set to 2.0 nm.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.5 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 0%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed with a high-resolution TEM, neither misfit dislocations nor stacking faults were observed, and the lattice distortion of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 2.5 kΩ/cm ² and the electron mobility was found to be 700 cm ² /Vs.

[Example 15]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the thickness of the Al _x Ga.sub. _(1-x) N layer was set to 5.0 nm.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.5 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 0%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed with a high-resolution TEM, neither misfit dislocations nor stacking faults were observed, and the lattice distortion of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 1.3 kΩ/cm ² and the electron mobility was found to be 1000 cm ² /Vs.

[Example 16]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the thickness of the Al _x Ga.sub _.(1-x) N layer was set to 20 nm.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.5 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 60%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 0.4 kΩ/cm ² and the electron mobility was found to be 1400 cm ² /Vs.

[Example 17]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the thickness of the Al _x Ga.sub _.(1-x) N layer was set to 25 nm.
When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.6 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate was 65%, measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 1.4 kΩ/cm ² and the electron mobility was found to be 1250 cm ² /Vs.

[Example 18]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the thickness of the Al _x Ga.sub _.(1-x) N layer was set to 35 nm.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.8. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 80%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 5.0 kΩ/cm ² and the electron mobility was found to be 1000 cm ² /Vs.

[Comparative Example 1]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the Al _x Ga _(1-x) N layer was formed of Al _0.25 Ga _0.75 N (i.e., x=0.25) and the electron barrier layer was formed of Al _0.4 Ga _0.6 N (i.e., y=0.4). At this time, the Al _x Ga _(1-x) N layer was formed under conditions of a growth temperature of 900° C., a vacuum degree of the chamber of 50 mbar, and a V/III ratio of 1850. In addition, the growth rate of Al _0.25 Ga _0.75 N at this time was set to 1 μm/hr. In addition, the electron barrier layer was formed under conditions of a growth temperature of 700° C., a vacuum degree of the chamber of 50 mbar, and a V/III ratio of 1850.

When the Al _x Ga _(1-x) N layer formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 100%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 0.5 nm. The relaxation rate of the Al _x Ga _{(1-x) N layer with respect to the AlN substrate was 70%, as measured by XRD reciprocal lattice mapping measurement performed on the (20-24} ) plane. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
The obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, and the sheet resistance was found to be 30 kΩ/cm ² and the electron mobility was found to be 90 cm ² /Vs.

[Comparative Example 2]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the growth rate of the Al _x Ga.sub. _(1-x) N layer was set to 0.2 μm/hr.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 50%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 13 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 100%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
When the obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, the noise value for both the sheet resistance and the electron mobility was 100%, and no measured value was obtained.

[Comparative Example 3]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the growth rate of the Al _x Ga.sub. _(1-x) N layer was set to 0.5 μm/hr.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 60%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 9.0 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 100%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
When the obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, the noise value for both the sheet resistance and the electron mobility was 100%, and no measured value was obtained.

[Comparative Example 4]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that a sapphire substrate was used as the substrate.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 60%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 12 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 100%. Furthermore, the dislocation density was 1×10 ⁹ cm ⁻³ from cross-sectional TEM measurement.

When a region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 0%. On the other hand, when a region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
When the obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, the noise value for both the sheet resistance and the electron mobility was 100%, and no measured value was obtained.

[Comparative Example 5]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the growth temperature of the Al _x Ga.sub. _(1-x) N layer and the electron barrier layer was set to 1000.degree.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 70%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 15 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 90%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
When the obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, the noise value for both the sheet resistance and the electron mobility was 100%, and no measured value was obtained.

[Comparative Example 6]
A nitride semiconductor laminate was formed in the same manner as in Example 5, except that the growth temperature of the Al _x Ga.sub. _(1-x) N layer and the electron barrier layer was set to 1050.degree.

When the nitride semiconductor laminate formed as described above was observed using a SEM, the surface coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below was 60%. The surface square roughness of the Al _x Ga _(1-x) N layer obtained by AFM measurement was 20 nm. The relaxation rate of the Al _x Ga _(1-x) N layer with respect to the AlN substrate measured by XRD reciprocal lattice mapping measurement performed on the (20-24) plane was 100%. Furthermore, no threading dislocations were observed from cross-sectional TEM measurement.

When the region 5 nm or less from the interface between the AlN substrate and GaN was observed by high-resolution TEM, neither misfit dislocations nor stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region 5 nm or less from the interface was 2.2%. On the other hand, when the region more than 5 nm and less than 10 nm from the interface between the AlN substrate and GaN was observed by high-resolution TEM, misfit dislocations and stacking faults were observed. At this time, the lattice distortion rate of the Al _x Ga _(1-x) N layer in the a-axis direction in the region more than 5 nm and less than 10 nm from the interface was 0%.
When the obtained nitride semiconductor laminate was subjected to Hall measurement by the Van der Pauw method, the noise value for both the sheet resistance and the electron mobility was 100%, and no measured value was obtained.

The configuration and evaluation of each example and comparative example are shown in Table 1 below.

As shown in Table 1, the nitride semiconductor laminate of each Example includes a nitride semiconductor substrate and an Al x Ga (1-x) N layer formed of Al _x Ga _(1-x) N (0≦x≦0.2) by forming the Al _x Ga _(1-x) N layer at a growth rate of 0.7 μm/hr or more by metal organic chemical vapor deposition on an Al _- containing nitride semiconductor substrate at a temperature of 650° C. or more and less than 1000° _C. The nitride semiconductor laminate of each Example can obtain a low sheet resistance and a high electron mobility compared to Comparative Example ₁ in which the _Al composition x exceeds 0.2, Comparative Examples 2 and 3 in which the growth rate is less than 0.7 μm/hr, Comparative Example 4 in which a sapphire substrate is used, and Comparative Examples 5 and 6 in which the growth temperature is 1000° C. or more.

As can be seen from Examples 1 to 6, by setting the growth temperature (substrate temperature) of the Al _x Ga.sub. _(1-x) N layer to 750.degree. C. or more and 950.degree. C. or less, the sheet resistance was significantly reduced and the electron mobility was significantly improved.
Furthermore, as can be seen from Examples 5 and 7, by setting the growth rate of the Al _x Ga.sub. _(1-x) N layer to less than 2 μm/hr, the sheet resistance was significantly reduced and the electron mobility was significantly improved.

As can be seen from Examples 5 and 8 to 11, when the degree of vacuum in the chamber was 30 mbar or more and 150 mbar or less, the sheet resistance and the electron mobility were significantly improved.
Furthermore, as can be seen from Examples 5, 12, and 13 and Comparative Example 1, the smaller the Al composition x of the Al _x Ga.sub. _(1-x) N layer, the more preferable it is, and it is most preferable that x=0 (the Al _x Ga.sub. _(1-x) N layer is made of GaN).

As can be seen from Examples 5 and 14 to 18, when the thickness of the Al _x Ga.sub. _(1-x) N layer was 0.5 nm or more and 30 nm or less, favorable sheet resistance and electron mobility were obtained, and when it was 10 nm or more and 20 nm or less, particularly favorable sheet resistance and electron mobility were obtained.

The scope of the present disclosure is not limited to the exemplary embodiments shown and described, but includes all embodiments that achieve equivalent effects to those intended by the present disclosure. Furthermore, the scope of the present disclosure is not limited to the combination of inventive features defined by the claims, but may be defined by any desired combination of specific features among all the respective disclosed features.

Reference Signs List 1, 1A, 1B Nitride semiconductor laminate 11 Substrate 12 Al _x Ga _(1-x) N layer 13 n-type semiconductor layer 14 Light emitting layer 15 AlN layer 16 Compositionally graded layer 17 Electron barrier layer

Claims (18)

A method for producing a nitride semiconductor laminate, comprising forming an Al x Ga _{(1-x) N layer made of Al x Ga (1-x)} N (0≦x≦0.2) by metal organic chemical vapor deposition at a growth rate of 0.7 μm/hr or more on an AlN single crystal substrate _{, which} is an Al-containing nitride semiconductor substrate, grown at a temperature of 650° C. _{or more and less than 1000° C., such that the coverage of the Al x Ga (1-x)} N layer with respect to the layer immediately below is 80% or more and 100% or less. The method for producing a nitride semiconductor laminate according to claim 1 , wherein the temperature of the surface of the nitride semiconductor substrate is set to 750° C. or higher and 950° C. or lower. 3. The method for producing a nitride semiconductor laminate according to claim 1, wherein the degree of vacuum during the formation of the _{Al.sub.xGa.sub} . _(1-x) N layer is set to 30 mbar or more and 150 mbar or less. a nitride semiconductor substrate containing Al;
an Al _x Ga (1 _-x) N layer formed of Al _x Ga (1 _-x ) N (0≦x≦0.2) disposed on the nitride semiconductor substrate;
Equipped with
the coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below is 80% or more and 100% or less;
The nitride semiconductor laminate, wherein the Al _x Ga.sub . _(1-x) N layer has a threading dislocation density of ^{1.times.10.sup.4} cm.sup. ^-3 or less . The nitride semiconductor laminate according to claim 4 , wherein the nitride semiconductor substrate is an AlN single crystal substrate. 6. The nitride semiconductor laminate according to claim 4 , wherein the Al _x Ga.sub _.(1-x) N layer has a thickness of 0.5 nm or more and 30 nm or less. 7. The nitride semiconductor laminate according to claim 4, wherein a relaxation rate in a region of the Al _x Ga _{(1-x) N} layer from the nitride semiconductor substrate side to 0.5 nm or more and 5 nm or less is 0% or more and 50% or less with respect to the nitride semiconductor substrate, and a relaxation rate in a region of the Al _x Ga (1-x) N layer from the nitride semiconductor substrate side to more than 5 nm and 30 nm or less is 50 % or more and 100% or less with respect to the nitride semiconductor substrate. 8. The nitride semiconductor stack according to claim 4, wherein no misfit dislocations or stacking faults are present in a region of said Al _x Ga.sub. _(1-x) N layer that is 0.5 nm or more and 5 nm or less from said nitride semiconductor substrate side. 9. The nitride semiconductor stack according to claim 4, wherein misfit dislocations or stacking faults are present in a region of the _{Al.sub.xGa.sub} . _(1-x) N layer that is more than 5 nm and not more than 30 nm from the nitride semiconductor substrate side. 10. The nitride semiconductor stack according to claim 4, wherein the Al _x Ga.sub _.(1-x) N layer has a surface roughness root-square of 0.9 nm or less. 11. The nitride semiconductor stack according to claim 4, wherein an in-plane lattice constant in the a-axis direction of the Al _x Ga _(1-x) N layer in a region of 0.5 nm to 5 nm from the nitride semiconductor substrate side is distorted by 1% to 2.5% with respect to the lattice constant of the nitride semiconductor substrate. 12. The nitride semiconductor laminate according to claim 4, wherein the in-plane lattice constant in the a-axis direction in a region of the Al _x Ga _(1-x) N layer that is more than 5 nm and not more than 30 nm from the nitride semiconductor substrate side is distorted by 0% to 1% with respect to the lattice constant of the nitride semiconductor substrate. 13. The nitride semiconductor stack according to claim 4, wherein the Al _x Ga.sub. _(1-x) N layer contains Mg, Zn or Be as a dopant atom at a concentration of ^{1.times.10.sup.18} cm.sup. ^-3 or more and ^{5.times.10.sup.19} cm.sup. ^-3 or less. 14. The nitride semiconductor laminate according to claim 4 , wherein the Al _x Ga.sub. _(1-x) N layer is made of GaN. The nitride semiconductor laminate according to any one of claims 4 to 14, wherein a composition gradient layer in which the Al composition decreases in a direction away from the nitride semiconductor substrate is not provided between the nitride semiconductor substrate and the Al _x Ga _(1- x) N layer. a light emitting layer provided between the nitride semiconductor substrate and the Al _x Ga _(1-x) N layer;
16. The nitride semiconductor stack according to claim 4, wherein the Al _x Ga.sub. _(1-x) N layer has a p-type doping concentration of ^{1.times.10.sup.18} cm.sup. ^-3 or more and ^{5.times.10.sup.19} cm.sup. ^-3 or less. a nitride semiconductor substrate containing Al;
an Al _x Ga (1 _-x) N layer formed of Al _x Ga (1 _-x ) N (0≦x≦0.2) disposed on the nitride semiconductor substrate;
Equipped with
the coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below is 80% or more and 100% or less;
No misfit dislocations or stacking faults are present in a region of the Al _x Ga.sub . _(1-x) N layer that is 0.5 nm or more and 5 nm or less from the nitride semiconductor substrate side.
A nitride semiconductor laminate. a nitride semiconductor substrate containing Al;
an Al _x Ga (1 _-x) N layer formed of Al _x Ga (1 _-x ) N (0≦x≦0.2) disposed on the nitride semiconductor substrate;
Equipped with
the coverage of the Al _x Ga _(1-x) N layer with respect to the layer immediately below is 80% or more and 100% or less;
Misfit dislocations or stacking faults are present in a region of the Al _x Ga.sub . _(1-x) N layer that is more than 5 nm and not more than 30 nm from the nitride semiconductor substrate side.
A nitride semiconductor laminate.

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